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authorFancy Fang <chen.fang@nxp.com>2018-08-30 17:45:47 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:33:58 +0800
commit4cda22c138913af72f4eddf9ce53c98d96c69379 (patch)
tree447f92a962b942b03e1eef763d1b32ee921c2520 /include
parentcff6ad221228f69728c689a8ca7359eaa642573c (diff)
MLK-19317-1 drm/bridge: sec-dsim: add missing 'ctrail' assignment
In the macro 'DSIM_DPHY_TIMING' definition, the field 'clk_trail' assignment to 'ctrail' is missing which certainly needs to be added. Signed-off-by: Fancy Fang <chen.fang@nxp.com> (cherry picked from commit f2818410d3d8d3b09002a85b593cee192d60bb06)
Diffstat (limited to 'include')
-rw-r--r--include/drm/bridge/sec_mipi_dsim.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/bridge/sec_mipi_dsim.h b/include/drm/bridge/sec_mipi_dsim.h
index 44842184cff2..2b125b26b675 100644
--- a/include/drm/bridge/sec_mipi_dsim.h
+++ b/include/drm/bridge/sec_mipi_dsim.h
@@ -54,6 +54,7 @@ struct sec_mipi_dsim_dphy_timing {
.clk_prepare = cpre, \
.clk_zero = czero, \
.clk_post = cpost, \
+ .clk_trail = ctrail, \
.hs_prepare = hpre, \
.hs_zero = hzero, \
.hs_trail = htrail, \