From 4cda22c138913af72f4eddf9ce53c98d96c69379 Mon Sep 17 00:00:00 2001 From: Fancy Fang Date: Thu, 30 Aug 2018 17:45:47 +0800 Subject: MLK-19317-1 drm/bridge: sec-dsim: add missing 'ctrail' assignment In the macro 'DSIM_DPHY_TIMING' definition, the field 'clk_trail' assignment to 'ctrail' is missing which certainly needs to be added. Signed-off-by: Fancy Fang (cherry picked from commit f2818410d3d8d3b09002a85b593cee192d60bb06) --- include/drm/bridge/sec_mipi_dsim.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/drm/bridge/sec_mipi_dsim.h b/include/drm/bridge/sec_mipi_dsim.h index 44842184cff2..2b125b26b675 100644 --- a/include/drm/bridge/sec_mipi_dsim.h +++ b/include/drm/bridge/sec_mipi_dsim.h @@ -54,6 +54,7 @@ struct sec_mipi_dsim_dphy_timing { .clk_prepare = cpre, \ .clk_zero = czero, \ .clk_post = cpost, \ + .clk_trail = ctrail, \ .hs_prepare = hpre, \ .hs_zero = hzero, \ .hs_trail = htrail, \ -- cgit v1.2.3