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authorHiago De Franco <hiago.franco@toradex.com>2025-06-02 15:00:56 -0300
committerHiago De Franco <hiago.franco@toradex.com>2025-06-03 10:26:20 -0300
commitdefb81960f4fcb580b75bbc207e5440dad4376d6 (patch)
treeda4539935a24104d027d92a8f9afd519f2ee625a /arch/x86/kernel/cpu/common.c
parent5a6602cc6c3204b24470b2429e658c25638b10a9 (diff)
parent1b69a86802c7e77a7624fe4970ca7d382a785b8f (diff)
Merge branch '5.15-2.2.x-imx' into toradex_5.15-2.2.x-imxtoradex_5.15-2.2.x-imx
Conflicts: drivers/tty/serial/fsl_lpuart.c Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Diffstat (limited to 'arch/x86/kernel/cpu/common.c')
-rw-r--r--arch/x86/kernel/cpu/common.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index dbaea8a6175b..1ebd67c95d86 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1345,9 +1345,12 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
if (vulnerable_to_rfds(x86_arch_cap_msr))
setup_force_cpu_bug(X86_BUG_RFDS);
- /* When virtualized, eIBRS could be hidden, assume vulnerable */
- if (!(x86_arch_cap_msr & ARCH_CAP_BHI_NO) &&
- !cpu_matches(cpu_vuln_whitelist, NO_BHI) &&
+ /*
+ * Intel parts with eIBRS are vulnerable to BHI attacks. Parts with
+ * BHI_NO still need to use the BHI mitigation to prevent Intra-mode
+ * attacks. When virtualized, eIBRS could be hidden, assume vulnerable.
+ */
+ if (!cpu_matches(cpu_vuln_whitelist, NO_BHI) &&
(boot_cpu_has(X86_FEATURE_IBRS_ENHANCED) ||
boot_cpu_has(X86_FEATURE_HYPERVISOR)))
setup_force_cpu_bug(X86_BUG_BHI);