diff options
| author | Bai Ping <b51503@freescale.com> | 2015-07-01 01:19:14 +0800 |
|---|---|---|
| committer | Bai Ping <b51503@freescale.com> | 2015-07-01 18:19:58 +0800 |
| commit | 31ebd3ecb83c540be2760339d00eeb24f99cabe1 (patch) | |
| tree | 052843045f15cf7960242db6b1cf3cb89803f805 /arch/arm/mach-imx/pm-imx6.c | |
| parent | e15f16cfd075581611c0c55f57b1f1e7c222ee2f (diff) | |
MLK-11204 ARM: imx: set int_mem_clk_lpm bit bit when entering wait mode on 6ul
This bit is used to keep the ARM Platform memory clocks enabled if
an interrupt is pending when entering low power mode. This bit should
always bet set when the CCM_CLPCR_LPM bits are set to 01(WAIT Mode) or
10 (STOP mode) without power gating.
Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6.c')
| -rw-r--r-- | arch/arm/mach-imx/pm-imx6.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index aa186522d473..e1a45e2cb974 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -479,7 +479,8 @@ void imx6q_set_int_mem_clk_lpm(bool enable) if ((cpu_is_imx6q() && imx_get_soc_revision() > IMX_CHIP_REVISION_1_1) || (cpu_is_imx6dl() && imx_get_soc_revision() > - IMX_CHIP_REVISION_1_0) || cpu_is_imx6sx()) { + IMX_CHIP_REVISION_1_0) || cpu_is_imx6sx() || + cpu_is_imx6ul()) { u32 val; val = readl_relaxed(ccm_base + CGPR); |