From 31ebd3ecb83c540be2760339d00eeb24f99cabe1 Mon Sep 17 00:00:00 2001 From: Bai Ping Date: Wed, 1 Jul 2015 01:19:14 +0800 Subject: MLK-11204 ARM: imx: set int_mem_clk_lpm bit bit when entering wait mode on 6ul This bit is used to keep the ARM Platform memory clocks enabled if an interrupt is pending when entering low power mode. This bit should always bet set when the CCM_CLPCR_LPM bits are set to 01(WAIT Mode) or 10 (STOP mode) without power gating. Signed-off-by: Bai Ping --- arch/arm/mach-imx/pm-imx6.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx/pm-imx6.c') diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index aa186522d473..e1a45e2cb974 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -479,7 +479,8 @@ void imx6q_set_int_mem_clk_lpm(bool enable) if ((cpu_is_imx6q() && imx_get_soc_revision() > IMX_CHIP_REVISION_1_1) || (cpu_is_imx6dl() && imx_get_soc_revision() > - IMX_CHIP_REVISION_1_0) || cpu_is_imx6sx()) { + IMX_CHIP_REVISION_1_0) || cpu_is_imx6sx() || + cpu_is_imx6ul()) { u32 val; val = readl_relaxed(ccm_base + CGPR); -- cgit v1.2.3