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| author | Emanuele Ghidoli <emanuele.ghidoli@toradex.com> | 2025-07-29 09:48:59 +0200 |
|---|---|---|
| committer | Emanuele Ghidoli <emanuele.ghidoli@toradex.com> | 2025-07-29 14:48:48 +0200 |
| commit | aa2bf0bad5a816ab5ed9796adc09f406591e01aa (patch) | |
| tree | 1e3319c25ec1a89b94e16fc730cf32fb80ca6d45 | |
| parent | 30f615b6f30dbf8c16ea60e6fa65a9c1e5879935 (diff) | |
arm64: dts: freescale: imx95-toradex-smarc: reserve memory for security enclavetoradex_6.6-2.2.x-imx
The security enclave firmware runs on the Cortex-M33 core, and the
corresponding Linux driver on the Cortex-A core expects responses to
requests to be returned via a shared memory region in DRAM.
Since the Cortex-M33 cannot access the entire DDR memory space, reserve
a Cortex-M33 accessible memory region for the security enclave firmware.
The address match the same address used by U-Boot.
Upstream-Status: Pending
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi index d3f46e761bee..57cf5c01d4bf 100644 --- a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi @@ -150,6 +150,12 @@ #size-cells = <2>; ranges; + ele_reserved: memory@9c300000 { + compatible = "shared-dma-pool"; + reg = <0 0x9c300000 0 0x100000>; + no-map; + }; + linux_cma: linux,cma { compatible = "shared-dma-pool"; reusable; @@ -174,6 +180,10 @@ status = "disabled"; }; +&ele_fw2 { + memory-region = <&ele_reserved>; +}; + /* SMARC GBE0 */ &enetc_port0 { pinctrl-names = "default"; |