From 282312d1ac8aad4947a01c2caf79c9c0299fb495 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Mon, 15 Feb 2016 11:33:15 +0800 Subject: clk: rockchip: disable alt_parent clk in err cases when registering cpuclk Add clk_disable_unprepare to handle cpuclk->alt_parent if rockchip_clk_register_cpuclk fails. Signed-off-by: Shawn Lin Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk-cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers/clk/rockchip/clk-cpu.c') diff --git a/drivers/clk/rockchip/clk-cpu.c b/drivers/clk/rockchip/clk-cpu.c index d07374f48caf..68a2a87717d2 100644 --- a/drivers/clk/rockchip/clk-cpu.c +++ b/drivers/clk/rockchip/clk-cpu.c @@ -290,14 +290,14 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, pr_err("%s: could not lookup parent clock %s\n", __func__, parent_names[0]); ret = -EINVAL; - goto free_cpuclk; + goto free_alt_parent; } ret = clk_notifier_register(clk, &cpuclk->clk_nb); if (ret) { pr_err("%s: failed to register clock notifier for %s\n", __func__, name); - goto free_cpuclk; + goto free_alt_parent; } if (nrates > 0) { @@ -326,6 +326,8 @@ free_rate_table: kfree(cpuclk->rate_table); unregister_notifier: clk_notifier_unregister(clk, &cpuclk->clk_nb); +free_alt_parent: + clk_disable_unprepare(cpuclk->alt_parent); free_cpuclk: kfree(cpuclk); return ERR_PTR(ret); -- cgit v1.2.3 From fc6d875ecb83cd03afad4486c97a9355e00c8944 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Mon, 15 Feb 2016 11:33:50 +0800 Subject: clk: rockchip: fix coding style for clk-cpu.c Fix the issue reported by checkpatch: ERROR: space prohibited before that ',' (ctx:WxW) + writel(clksel->val , cpuclk->reg_base + clksel->reg); Signed-off-by: Shawn Lin Signed-off-by: Heiko Stuebner --- drivers/clk/rockchip/clk-cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk/rockchip/clk-cpu.c') diff --git a/drivers/clk/rockchip/clk-cpu.c b/drivers/clk/rockchip/clk-cpu.c index 68a2a87717d2..4e73ed5cab58 100644 --- a/drivers/clk/rockchip/clk-cpu.c +++ b/drivers/clk/rockchip/clk-cpu.c @@ -116,7 +116,7 @@ static void rockchip_cpuclk_set_dividers(struct rockchip_cpuclk *cpuclk, pr_debug("%s: setting reg 0x%x to 0x%x\n", __func__, clksel->reg, clksel->val); - writel(clksel->val , cpuclk->reg_base + clksel->reg); + writel(clksel->val, cpuclk->reg_base + clksel->reg); } } -- cgit v1.2.3