From 471d7ff8b51b63521c8ea35c51966ab4caa434ee Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Wed, 21 Feb 2018 05:08:29 +1000 Subject: powerpc/64s: Remove POWER4 support POWER4 has been broken since at least the change 49d09bf2a6 ("powerpc/64s: Optimise MSR handling in exception handling"), which requires mtmsrd L=1 support. This was introduced in ISA v2.01, and POWER4 supports ISA v2.00. Signed-off-by: Nicholas Piggin Signed-off-by: Michael Ellerman --- arch/powerpc/kernel/prom_init.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'arch/powerpc/kernel/prom_init.c') diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 0323e073341d..e181fdea3da9 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -1810,16 +1810,8 @@ static void __init prom_initialize_tce_table(void) * size to 4 MB. This is enough to map 2GB of PCI DMA space. * By doing this, we avoid the pitfalls of trying to DMA to * MMIO space and the DMA alias hole. - * - * On POWER4, firmware sets the TCE region by assuming - * each TCE table is 8MB. Using this memory for anything - * else will impact performance, so we always allocate 8MB. - * Anton */ - if (pvr_version_is(PVR_POWER4) || pvr_version_is(PVR_POWER4p)) - minsize = 8UL << 20; - else - minsize = 4UL << 20; + minsize = 4UL << 20; /* Align to the greater of the align or size */ align = max(minalign, minsize); -- cgit v1.2.3