From 460b55880e47a98943f5072bc03ffcfcc8a40a14 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 19 Oct 2009 14:43:19 -0500 Subject: ENGR00117389 Port 5.0.0 release to 2.6.31 This is i.MX BSP 5.0.0 release ported to 2.6.31 Signed-off-by: Rob Herring Signed-off-by: Alan Tull Signed-off-by: Xinyu Chen --- arch/arm/mach-mx51/cpu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 arch/arm/mach-mx51/cpu.c (limited to 'arch/arm/mach-mx51/cpu.c') diff --git a/arch/arm/mach-mx51/cpu.c b/arch/arm/mach-mx51/cpu.c new file mode 100644 index 000000000000..f4b404ad777f --- /dev/null +++ b/arch/arm/mach-mx51/cpu.c @@ -0,0 +1,66 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mach-mx51/cpu.c + * + * @brief This file contains the CPU initialization code. + * + * @ingroup MSL_MX51 + */ + +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * CPU initialization. It is called by fixup_mxc_board() + */ +void __init mxc_cpu_init(void) +{ + if (!system_rev) + mxc_set_system_rev(0x51, CHIP_REV_1_0); +} + +static int __init post_cpu_init(void) +{ + void __iomem *base; + unsigned int reg; + + /* Set ALP bits to 000. Set ALP_EN bit in Arm Memory Controller reg. */ + reg = 0x8; + __raw_writel(reg, MXC_CORTEXA8_PLAT_AMC); + + base = IO_ADDRESS(AIPS1_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + base = IO_ADDRESS(AIPS2_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + return 0; +} + +postcore_initcall(post_cpu_init); -- cgit v1.2.3