From f0402f9b47112faea10541b799b61066ae322c36 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 26 Nov 2013 19:25:59 +0100 Subject: ARM: ixp4xx: stop using MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The only user of symbols defined in ixp4xx's is common.c. Fix that one up by moving the used #define into common.c directly and add a local substitute for the global define LATCH which uses CLOCK_TICK_RATE. This makes ixp4xx not to be a bar to dropping support for . Signed-off-by: Uwe Kleine-König --- arch/arm/mach-ixp4xx/common.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 9edaf4734fa8..20b62aa30086 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -45,6 +44,9 @@ #include #include +#define IXP4XX_TIMER_FREQ 66666000 +#define IXP4XX_LATCH DIV_ROUND_CLOSEST(IXP4XX_TIMER_FREQ, HZ) + static void __init ixp4xx_clocksource_init(void); static void __init ixp4xx_clockevent_init(void); static struct clock_event_device clockevent_ixp4xx; @@ -520,7 +522,7 @@ static void ixp4xx_set_mode(enum clock_event_mode mode, switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - osrt = LATCH & ~IXP4XX_OST_RELOAD_MASK; + osrt = IXP4XX_LATCH & ~IXP4XX_OST_RELOAD_MASK; opts = IXP4XX_OST_ENABLE; break; case CLOCK_EVT_MODE_ONESHOT: -- cgit v1.2.3 From fb3174e4ad2427c6ad90c67093d6ca97f13e8672 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 3 Feb 2014 11:31:19 +0100 Subject: ARM: ixp4xx: fix timer latch calculation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In commit f0402f9b4711 ("ARM: ixp4xx: stop using ") I didn't intend to implement a functional change, but as Olof noticed I failed---at least a bit. Before this commit the following was used to determine the latch value used: #define IXP4XX_TIMER_FREQ 66666000 #define CLOCK_TICK_RATE \ (((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) #define LATCH ((CLOCK_TICK_RATE + HZ/2) / HZ) The complicated calculation was done "b/c the timer register ignores the bottom 2 bits of the LATCH value." With HZ=100 CLOCK_TICK_RATE used to calculate to 66666100 and so LATCH to 666661. In ixp4xx_set_mode the term LATCH & ~IXP4XX_OST_RELOAD_MASK was used to write to the relevant register (with IXP4XX_OST_RELOAD_MASK being 3) and so effectively 666660 was used. In commit f0402f9b4711 I translated that to: #define IXP4XX_TIMER_FREQ 66666000 #define IXP4XX_LATCH DIV_ROUND_CLOSEST(IXP4XX_TIMER_FREQ, HZ) which results in the same register writes, but still doesn't bear in mind that the two least significant bits cannot be specified (which is relevant only when HZ or IXP4XX_TIMER_FREQ are changed). Instead of reverting back to the old approach use a more obvious and also more correct way to calculate LATCH. (Regarding the more correct claim: With IXP4XX_TIMER_FREQ == 66665999, the old code resulted in LATCH = 666657 corresponding to a cycle time of 0.009999940149400597 seconds (error: -6.0e-8 s) while the new approach results in LATCH = 666660 and so a cycle time of 0.010000000150001503 seconds (error: 1.5e-10 s).) Fixes: f0402f9b4711 ("ARM: ixp4xx: stop using ") Signed-off-by: Uwe Kleine-König --- arch/arm/mach-ixp4xx/common.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 20b62aa30086..37e6cdac1642 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -45,7 +45,15 @@ #include #define IXP4XX_TIMER_FREQ 66666000 -#define IXP4XX_LATCH DIV_ROUND_CLOSEST(IXP4XX_TIMER_FREQ, HZ) + +/* + * The timer register doesn't allow to specify the two least significant bits of + * the timeout value and assumes them being zero. So make sure IXP4XX_LATCH is + * the best value with the two least significant bits unset. + */ +#define IXP4XX_LATCH DIV_ROUND_CLOSEST(IXP4XX_TIMER_FREQ, \ + (IXP4XX_OST_RELOAD_MASK + 1) * HZ) * \ + (IXP4XX_OST_RELOAD_MASK + 1) static void __init ixp4xx_clocksource_init(void); static void __init ixp4xx_clockevent_init(void); -- cgit v1.2.3 From 1ee6564d72ce718bf4e50d5684aa98d9d895f859 Mon Sep 17 00:00:00 2001 From: Michael Opdenacker Date: Tue, 4 Mar 2014 21:59:03 +0100 Subject: ARM: 7998/1: IXP4xx: remove deprecated IRQF_DISABLED This patch removes the use of the IRQF_DISABLED flag from code in arch/arm/mach-ixp4xx It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker Signed-off-by: Russell King --- arch/arm/mach-ixp4xx/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..a465f27bc263 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -312,7 +312,7 @@ static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id) static struct irqaction ixp4xx_timer_irq = { .name = "timer1", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .flags = IRQF_TIMER | IRQF_IRQPOLL, .handler = ixp4xx_timer_interrupt, .dev_id = &clockevent_ixp4xx, }; -- cgit v1.2.3 From bfdad565ae0a61ac943974b8ae61ec0ed55ceb04 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Simon=20K=C3=A5gstr=C3=B6m?= Date: Mon, 17 Mar 2014 14:42:35 +0100 Subject: ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation Non-PCI devices can use the entire 32-bit range, PCI dittos are limited to the first 64MiB. Also actually setup coherent_dma_mask. The patch has been verified on a board with 128MiB memory, one ipx4xx_eth device and a e100 PCI device. Signed-off-by: Simon Kagstrom Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..df82a2b4a546 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -578,6 +579,17 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (dev_is_pci(dev) && mask >= SZ_64M) + return -EIO; + + dev->coherent_dma_mask = mask; + + return 0; +} +EXPORT_SYMBOL(dma_set_coherent_mask); + #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI -- cgit v1.2.3 From 48ba81f6fdb7580a5c474da1b14a338e1358e6ab Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 3 Feb 2014 17:40:14 +0100 Subject: ARM: ixp4xx: fix gpio rework Commit 098e30f6558f8 "ARM: ixp4xx: stop broadcasting the custom GPIO API" changed the internal gpio code of ixp4xx to be accessible only from common.c, but unfortunately that broke the Goramo MultiLink code, which uses this API. This tries to restore the previous state without exposing the API globally again. A better solution might be needed. Signed-off-by: Arnd Bergmann Cc: Linus Walleij Cc: Krzysztof Halasa Cc: Imre Kaloz --- arch/arm/mach-ixp4xx/common.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..c751f2f35668 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -99,7 +99,7 @@ void __init ixp4xx_map_io(void) #define IXP4XX_GPIO_CLK_0 14 #define IXP4XX_GPIO_CLK_1 15 -static void gpio_line_config(u8 line, u32 direction) +void gpio_line_config(u8 line, u32 direction) { if (direction == IXP4XX_GPIO_IN) *IXP4XX_GPIO_GPOER |= (1 << line); @@ -107,12 +107,12 @@ static void gpio_line_config(u8 line, u32 direction) *IXP4XX_GPIO_GPOER &= ~(1 << line); } -static void gpio_line_get(u8 line, int *value) +void gpio_line_get(u8 line, int *value) { *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; } -static void gpio_line_set(u8 line, int value) +void gpio_line_set(u8 line, int value) { if (value == IXP4XX_GPIO_HIGH) *IXP4XX_GPIO_GPOUTR |= (1 << line); -- cgit v1.2.3 From 9c9c6c55a887dfe4e68d48d0829e412ed4f14ca9 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Mar 2014 23:03:09 +0100 Subject: Revert "ARM: ixp4xx: fix gpio rework" This reverts commit 48ba81f6fdb7580a5c474da1b14a338e1358e6ab. A better fix was sent by Krzysztof Halasa. Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index eef39c7ad0cf..df82a2b4a546 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -100,7 +100,7 @@ void __init ixp4xx_map_io(void) #define IXP4XX_GPIO_CLK_0 14 #define IXP4XX_GPIO_CLK_1 15 -void gpio_line_config(u8 line, u32 direction) +static void gpio_line_config(u8 line, u32 direction) { if (direction == IXP4XX_GPIO_IN) *IXP4XX_GPIO_GPOER |= (1 << line); @@ -108,12 +108,12 @@ void gpio_line_config(u8 line, u32 direction) *IXP4XX_GPIO_GPOER &= ~(1 << line); } -void gpio_line_get(u8 line, int *value) +static void gpio_line_get(u8 line, int *value) { *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; } -void gpio_line_set(u8 line, int value) +static void gpio_line_set(u8 line, int value) { if (value == IXP4XX_GPIO_HIGH) *IXP4XX_GPIO_GPOUTR |= (1 << line); -- cgit v1.2.3 From 53ad835ce7050dc3a3b3343fb07636db86783e26 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Mar 2014 23:07:17 +0100 Subject: Revert "ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation" This reverts commit bfdad565ae0a61ac943974b8ae61ec0ed55ceb04. The patch turned out to be incorrect, and will be replaced with a correct patch. Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index df82a2b4a546..6d68aed6548a 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include @@ -579,17 +578,6 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (dev_is_pci(dev) && mask >= SZ_64M) - return -EIO; - - dev->coherent_dma_mask = mask; - - return 0; -} -EXPORT_SYMBOL(dma_set_coherent_mask); - #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI -- cgit v1.2.3 From 00e1b3a3d196ae876370633b32007bf98584e748 Mon Sep 17 00:00:00 2001 From: Krzysztof Halasa Date: Sun, 23 Mar 2014 01:36:48 +0100 Subject: IXP4xx: Fix DMA masks. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now, devices will have 32-bit default DMA masks (0xFFFFFFFF) as per DMA API. Fixes: $ ifconfig eth0 up net eth0: coherent DMA mask is unset $ ifconfig hdlc0 up net hdlc0: coherent DMA mask is unset Also fixes a cosmetic off-by-one bug which caused DMA transfers ending exactly on the 64 MiB boundary to go through dmabounce unnecessarily. Signed-off-by: Krzysztof Hałasa Tested-by: Simon Kagstrom Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common.c | 61 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 56 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-ixp4xx/common.c') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..12c71a4a42a0 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -30,8 +30,8 @@ #include #include #include +#include #include - #include #include #include @@ -40,7 +40,6 @@ #include #include #include - #include #include #include @@ -578,6 +577,54 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } +#ifdef CONFIG_PCI +static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) +{ + return (dma_addr + size) > SZ_64M; +} + +static int ixp4xx_platform_notify_remove(struct device *dev) +{ + if (dev_is_pci(dev)) + dmabounce_unregister_dev(dev); + + return 0; +} +#endif + +/* + * Setup DMA mask to 64MB on PCI devices and 4 GB on all other things. + */ +static int ixp4xx_platform_notify(struct device *dev) +{ + dev->dma_mask = &dev->coherent_dma_mask; + +#ifdef CONFIG_PCI + if (dev_is_pci(dev)) { + dev->coherent_dma_mask = DMA_BIT_MASK(28); /* 64 MB */ + dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce); + return 0; + } +#endif + + dev->coherent_dma_mask = DMA_BIT_MASK(32); + return 0; +} + +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (dev_is_pci(dev)) + mask &= DMA_BIT_MASK(28); /* 64 MB */ + + if ((mask & DMA_BIT_MASK(28)) == DMA_BIT_MASK(28)) { + dev->coherent_dma_mask = mask; + return 0; + } + + return -EIO; /* device wanted sub-64MB mask */ +} +EXPORT_SYMBOL(dma_set_coherent_mask); + #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI @@ -600,12 +647,16 @@ static void ixp4xx_iounmap(void __iomem *addr) if (!is_pci_memory((__force u32)addr)) __iounmap(addr); } +#endif void __init ixp4xx_init_early(void) { + platform_notify = ixp4xx_platform_notify; +#ifdef CONFIG_PCI + platform_notify_remove = ixp4xx_platform_notify_remove; +#endif +#ifdef CONFIG_IXP4XX_INDIRECT_PCI arch_ioremap_caller = ixp4xx_ioremap_caller; arch_iounmap = ixp4xx_iounmap; -} -#else -void __init ixp4xx_init_early(void) {} #endif +} -- cgit v1.2.3