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2012-04-15regmap: Add support for writing to regmap registers via debugfsDimitris Papastamos
To enable writing to the regmap debugfs registers file users will need to modify the source directly and #define REGMAP_ALLOW_WRITE_DEBUGFS. The reason for this is that it is dangerous to expose this functionality in general where clients could potentially be PMICs. [A couple of minor style updates -- broonie] Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 09c6ecd394105c4864a0e409e181c9b1578c2a63) Change-Id: Ia9408880e25d5060796ab79812a023def00b10bc Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96483 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Support raw reads from cached registersMark Brown
Fall back to a register by register read to do so; most likely we'll be cache only so the overhead will be low. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit b8fb5ab156055b745254609f4635fcfd6b7dabc8) Change-Id: I9f3b6011f4704987c5a014de8b30a2e6e3196d21 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96482 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-15regmap: Allow users to query the size of register valuesMark Brown
Generic infrastructure based on top of regmap may want to operate on blocks of data and therefore find it useful to find the size of the register values. Provide an accessor operation for this. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cherry-pick from mainline a6539c3 Change-Id: I455ace158eea38f6a92938f6330ec074bc18f0da Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96481 Reviewed-by: Automatic_Commit_Validation_User
2012-04-15regmap: Implement support for 32 bit registers and valuesMark Brown
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 7d5e525b9ceda0e3b85da0acdaa2de19fea51edc) Change-Id: I6f6fec44b439b4916eba7f32ece1fa011e3ac021 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/96480 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-13drivers: hwmon: tsensor: Enable tsensor hw resetJoshua Primero
Enabled hw reset in tsensor if temperature exceeds given temperature limit. bug 966994 Change-Id: I2444c97c97c45b2d190a224388876d592d983c7f Signed-off-by: Joshua Primero <jprimero@nvidia.com> Reviewed-on: http://git-master/r/93030 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-04-13drivers: net: bcmdhd: enable CRD through kernel configNitin Bindal
Enable Custom Regulatory Domain(CRD) support, only if BCMDHD_CUSTOM_REGULATORY_DOMAIN kernel config is set. By default BCMDHD_CUSTOM_REGULATORY_DOMAIN is enabled. Bug 947472 Change-Id: I40ea3c3c531d4e309c0928db396b9cc832be43cc Signed-off-by: Nitin Bindal <nbindal@nvidia.com> Reviewed-on: http://git-master/r/88266 Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Narayan Reddy <narayanr@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-12video: tegra: nvavp: Remove T30 A01 workaroundJuha Tukkinen
Remove CONFIG_TEGRA_SMMU_BASE_AT_E0000000 workaround as T30 A01 is no longer supported. Change-Id: Ic47d0aa16c555bd7821416fff29d723924c6118b Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/95645 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-12tracing: Add tracepoints for CPU scalingAntti P Miettinen
Simple tracepoints for measuring CPU scaling latencies. Bug 960307 Change-Id: I6fd4e67e352a2ff134da58866d943457506d080b Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com> Reviewed-on: http://git-master/r/93080 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-12usb: host: tegra: regrouping ehci functionsVenu Byravarasu
Re-arranged standard and modified ehci functions into two separate groups, for more readability Change-Id: I320a50ed44c3f0990692ae38b55dc6a04fe7c378 Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-on: http://git-master/r/92823 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-12usb: cdc_ether: Add new product id for the 5AE profileJonathan Roux
Bug 924863 Change-Id: I10d3036ce19f8c1f37e57998c204f3a72bd42f85 Signed-off-by: Steve Lin <stlin@nvidia.com> Reviewed-on: http://git-master/r/89718 Reviewed-by: Automatic_Commit_Validation_User
2012-04-12misc: tegra-cryptodev: Enhancement to support user space testsvjagadish
Enchancement to support user space tests such as OFB, CTR, sha1, sha224,sha256, sha384, sha512. BUG 903375 Change-Id: I52767978bd3758671ec6fff988223ac046f5579c Reviewed-on: http://git-master/r/84296 Tested-by: Venkata Jagadish <vjagadish@nvidia.com> Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-11video: tegra: fb: Add interface to nvdps.Kevin Huang
Provide /sys/class/graphics/fb0/device/nvdps to change video mode on-the-fly without resetting window layout like fb_set_var(). This allows flicker free changes in refresh rate. nvdps sysfs file takes an integer, and selects the closest matching mode with the same or higher refresh rate. Reading the file displays the current refresh rate. Bug 560152 Change-Id: Id5c1eafaf338b99fa9742202b38ccbfc238b77d5 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/95473 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-04-11video: tegra: dc: load video mode during vblankJon Mayo
Handle mode set for FBIOPUT_VSCREENINFO at the end of a frame (during vblank). This elimiates the work around that requires disabling then enabling display to change modes. Adds a spinlock to protect irq code from updates to tegra_dc_mode structure. Bug 560152 Change-Id: I5d2175f01a177a32d685b46e5af4f78efeec0786 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/90688 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-10video: tegra: resolve compilation time warningsSanjay Singh Rawat
bug 949219 Change-Id: I1ed8d08de4bdba4643b2ae4e8320db6f9c97a18f Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/92310 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-10power: max17048: correct i2c error handlingChandler Zhang
Correct max17048_read_word() function related i2c error handling Signed-off-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-on: http://git-master/r/93702 (cherry picked from commit ba8bdc020c6e2ed57255786b3d61b870b0b5a516) Change-Id: Ice9845bb39288442bd6637eedeaf6de6ad1acbda Reviewed-on: http://git-master/r/95346 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chandler Zhang <chazhang@nvidia.com> Tested-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com> Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-10power: max17048: addition of new propertiesSyed Rafiuddin
Addition of health and capacity level properties Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-on: http://git-master/r/93532 (cherry picked from commit 9892e1c30828bdcbf6ae53af72bb1a39cd19993e) Change-Id: I28e9822772316ba7389a3c9518cf4778606dbfb7 Reviewed-on: http://git-master/r/95345 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chandler Zhang <chazhang@nvidia.com> Tested-by: Chandler Zhang <chazhang@nvidia.com> Reviewed-by: Syed Rafiuddin <srafiuddin@nvidia.com> Tested-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-04-10video: tegra: dtv: Remove check for dma req list before cancellingLaxman Dewangan
Removing the checking whether dma req queue is empty or not before canceling/stopping dma. This function cannot guarantee correct result as there may be the race between hw and sw status update. If client wants to cancel dma req, it can directly call tegra_dma_cancel(). As the function tegra_dma_is_empty() does not return correct result, it will be depreciated from the dma apis. Change-Id: I3f5ebee8a7be345b02fcd8a69530c9b53207ef28 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/95090 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-10regulator: max8907: Add driver specific data for regulatorAlok Chauhan
Adding the regulator driver specific information and passing this information through regulator driver data. This struture is containing delay operation which is require to voltage to be settle down after enabling rail. Bug 939242 Change-Id: I7da6ec487fe5f04857d3fd5f06a383b4a8fbcc7b Signed-off-by: Alok Chauhan <alokc@nvidia.com> Reviewed-on: http://git-master/r/94500 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-10video: tegra: host: move resources to devicesMayuresh Kulkarni
- as of now the resources needed by all the host1x modules are part of resource list of host1x device - now that each module is a nvhost_device of its own, so it should hold the resources it needs instead of host1x device holding it for them - each device that needs its resources gets it in its _probe() using a helper API in bus_client.c Bug 871237 Change-Id: Ia7c63fcf40cbc5db76d4d8339294a0e9ce75e352 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/94166 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-10nvavp: Add ioctl for wake_avpMandar Potdar
Add wake_avp ioctl which provides way for user-mode driver to simply wake-up the AVP. bug 914504 Change-Id: I3075ba944d39749559f2c340a4851902821c344f Signed-off-by: Mandar Potdar <mpotdar@nvidia.com> Reviewed-on: http://git-master/r/93877 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Gajanan Bhat <gbhat@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-08Revert "video: tegra: dc: Disable 1080p stereo support"Andrija Bosnjakovic
This reverts commit 75009bc2b1a0a2d2efbe1d166647e789b8a1b9f1. In order to work around bug 869099, this mode has been temporarily disabled. Since the bug is not so visible, enable again. Change-Id: Ie71dac4ecf620cd96796e2fde361b45dc7141497 Reviewed-on: http://git-master/r/92157 Reviewed-by: Alok Ahuja <alahuja@nvidia.com> Reviewed-by: Aleksandar Odorovic <aodorovic@nvidia.com> Reviewed-by: Dhiren Bhatia <dbhatia@nvidia.com> Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-04-08usb: ehci: tegra: Fix tegra utmip issuesRakesh Bodla
Following tegra USB UTMIP issues are fixed: 1. Clear run bit directly in the command register instead of updating the shadow variable. 2. Reset EHCI while resuming from LP0 for tegra 2. 3. Wait for 25ms to ensure port is resumed. Bug 912880 Reviewed-on: http://git-master/r/92565 (cherry picked from commit 928ad32858af191fb9d90d736b910499121e10df) Change-Id: I676f7f23fd8833a179e1670e6aed28a01baaf15b Reviewed-on: http://git-master/r/94829 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Tested-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-06video: tegra: dc: avoid overflow in bw calculationJon Mayo
Change to using kbytes/sec to avoid overflowing 32-bit integer in bandwidth calculation. Changing efficiency adjustment to ~35%. Bug 958016 Change-Id: Ia8bdf79e4b3e4bc65517db18d9f351a5f840805e Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/92658 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05video: tegra: host: Move context init outside __initTerje Bergstrom
Context handler init functions are referred to from non-init section. The functions should not have __init attribute, even though they're only used in init time. Change-Id: I1b6bca48504fd7989edaa037c4b022a76244b0f6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/93216 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Ken Adams <kadams@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-05dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclicAlexandre Bounine
Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to allow passing client/target specific information associated with the data transfer. Modify all affected DMA engine drivers. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> Cherry-picked from mainline 185ecb5f4fd43911c35956d4cc7d94a1da30417f Change-Id: Ief79d20f6e9d367ee2b530d08df72864fb16895a Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94464 Reviewed-by: Automatic_Commit_Validation_User
2012-04-05dmaengine/dma_slave: introduce inline wrappersAlexandre Bounine
Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to hide new parameter from current users of affected interfaces. Convert current users to use new wrappers instead of direct calls. Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269]. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> cherry-picked from mainline commit 16052827d98fbc13c31ebad560af4bd53e2b4dd5 Change-Id: I929a49556539621a0546829e88b3caa498c94be2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94463
2012-04-05Regulator: gpio_swtich: Remove gpio_switch regulator driverLaxman Dewangan
The gpio_switch regulator is NV driver developed during tegra3 bringup time. The driver functionality is upstreamed to mainline into fixed regulator and it is accepted by community. The required functionality is also downstream and required client driver is moved to use the fixed regulator. Hence this driver is just duplicating functionality with fixed regulator and hence removing this. Change-Id: I893328497644612a2267f2c24298ff2f668e75d4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94198 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-05usb: gadget: fsl_udc: boost cpu rate for transactionAlok Chauhan
Boost CPU rate floor ( based upon TEGRA_GADGET_BOOST_CPU_FREQ ) before any transaction starts and remove the boost once the transaction completes. Bug 923594 Signed-off-by: Alok Chauhan <alokc@nvidia.com> Reviewed-on: http://git-master/r/88247 (cherry picked from commit cfb0c2d7bc7c00962c97c895958e2e0a13a14cfd) Change-Id: I6c7524dbf90d6c3c8840ee8cd88e896dde6aa041 Reviewed-on: http://git-master/r/94173 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-05mfd: tps80031: add option to enable internal pullup or pulldownTom Cherry
Bug 958089 (cherry-picked from commit 7f4c6d6b9dd2b06984b59dcd60d92026cab4c87c) Reviewed-on: http://git-master/r/92053 Change-Id: I0f2bdb5482fdcb508808d2d58771d74a05b5597f Signed-off-by: Tom Cherry <tcherry@nvidia.com> Reviewed-on: http://git-master/r/94117 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-04-05drivers: misc: nct: Remove regulator error messagePreetham Chandru
Print only a warning message if vdd regulator is not registered. Some board do not have a seperate vdd regulator and hence print only a warning message in such cases. Bug 961258 Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Change-Id: I953d17ae14650c622e06febe415362e5cb096236 Reviewed-on: http://git-master/r/93777 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-04-05video: tegra: host: Init scale3d worker alwaysTerje Bergstrom
Initialize scale3d worker even though scale3d would be disabled. Bug 954879 Change-Id: Iaf3a12740d1d377d949cdfbf7e11fa00568e72fe Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/93488 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-04-05video: tegra: host: Add syncpt sysfs entriesTerje Bergstrom
Expose sync point current and max values through sysfs. Bug 957639 Change-Id: I2a3b914d404bb8d7bbed86d383c859bd8237a278 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/92778 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-05i2c: tegra: Support for I2C_M_REV_DIR_ADDR protocol manglingLaxman Dewangan
Add support for protocol mangling "I2C_M_REV_DIR_ADDR" Change-Id: Icdef16885f1cf6ed1ce9c4003a94c2c2e917ced2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/92572 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Stephen Warren <swarren@nvidia.com>
2012-04-05serial: tegra: Use tegra_dma_cancel() to abort requestLaxman Dewangan
To terminate request from dma, use the tegra_dma_cancel() inplace of tegra_dma_dequeue(). The api tegra_dma_dequeue() is getting to be obsolete. Change-Id: I2e2c5d68dee64da02370beca6f61c650049402a2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/91753 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
2012-04-05spi: tegra: Use tegra_dma_cancel() to abort requestLaxman Dewangan
To terminate request from dma, use the tegra_dma_cancel() inplace of tegra_dma_dequeue(). The api tegra_dma_dequeue() is getting to be obsolete. Change-Id: I297e67433a2118377ecb9b028dcf8fa82e09f0e2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/91752 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Ashwini Ghuge <aghuge@nvidia.com> Tested-by: Ashwini Ghuge <aghuge@nvidia.com>
2012-04-04dc: enabled recovery from resettingAdam Jiang
Enabled recovery of DC from resetting. When underflow triggered serveral times(current > 4 for tegra2), DC driver will reset itself to prevent data corruption. Reopend nvhost connection when resetting finished. That helps system to show frames instead of a blank screen again. Fixed Bug 936613 Change-Id: I314c37258a4a446dc07167ac60d0420e79a5fb2d Signed-off-by: Adam Jiang <chaoj@nvidia.com> Reviewed-on: http://git-master/r/89406 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-04-03regulator: fixed: Support for open drain gpio pinLaxman Dewangan
Adding flag on fixed regulator board configuration structure to specify whether gpio is open drain type or not. Passing this information to gpio library when requesting gpio so that gpio driver can set the pin state accordingly, for open drain type: - Pin can be set HIGH as setting as input, PULL UP on pin make this as HIGH. - Pin can be set LOW as setting it as output and drive to LOW. The non-open drain pin can be set HIGH/LOW by setting it to output and driving it to HIGH/LOW. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> cherry picked from mainline commit a4d9f179cc788b7f4b735d32c2e4a3b2562e8240 Change-Id: I2ee7789db67fdeea77c0d6ac2b44876af36c803e Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/94150 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03video: tegra: host: api clean-upMayuresh Kulkarni
- remove redundant 2nd argument to nvhost_module_suspend() - also remove the debug_not_idle() as it redundant after refactor of host1x code - debug_not_idle() iterates through host1x's private instance of channels to find out which client module is active (along with host1x itself). we are going to remove these instances of channels from host1x's device private data - reduce the prints during suspend Bug 871237 Change-Id: I66c7c4d8f35c157b1626784a6a27166442a50557 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/92550 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-04-03power: bpcm: Re-try setting BPC limitAlex Frid
Check returned value from BPC set limit api, and re-try again on error. Keep CPU throttled while re-trying. Signed-off-by: Alex Frid <afrid@nvidia.com> (cherry picked from commit 8d5e5a36a03587e3e9374ad8cec6958bd3617f0c) Change-Id: I29b24a92b87cbd41d68473d0c9ef4c8d6add992f Reviewed-on: http://git-master/r/93732 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-04-03usb: gadget: tegra: Enable AHB prefetchKrishna Yarlagadda
Enable AHB prefetch and call dma_sync to avoid memory coherency issues Bug 921109 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/92257 (cherry picked from commit e8fac4b6f3460928442d6c9dadec301ccf57fb0b) Change-Id: I2788e94d3609bfdd6d112f0b5386a653af15075e Reviewed-on: http://git-master/r/93819 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-03usb: rndis: Avoid unwanted usb config accessKrishna Yarlagadda
Request complete may be called when there is no valid usb config Avoid access to config when not required. Bug 949543 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-on: http://git-master/r/91151 (cherry picked from commit 08bc68164d0bd90c84a8ea82f87f9f44e4341df2) Change-Id: I5969144aaa9bcffddefa7933d43bfd3690814fba Reviewed-on: http://git-master/r/93816 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Tested-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-04-03tegra: video: nvmap: Make nvmap_ioctl.h userspace compatibleYogish Kulkarni
nvmap_ioctl.h intended to be included by both kernel and userspace code. Change-Id: I8cccef5e3bc02f3271f471155b2e36126c68017a Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com> Reviewed-on: http://git-master/r/93329 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
2012-04-03dmaengine/dw_dmac: Reconfigure interrupt and chan_cfg register on resumeViresh Kumar
In S2R all DMA registers are reset by hardware and thus they are required to be reprogrammed. The channels which aren't reprogrammed are channel configuration and interrupt enable registers, which are currently programmed at chan_alloc time. This patch creates another routine to initialize a channel. It will try to initialize channel on every dwc_dostart() call. If channel is already initialised then it simply returns, otherwise it configures registers. This routine will also initialize registers on wakeup from S2R, as we mark channels as uninitialized on suspend. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> cherry-picked from mainline 61e183f8306934a9f66557f69f1f0f56f18dca06 Change-Id: I4ede3e1db8844533161bd4a836b1fece0d0ee716 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93784 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: consolidate initialization of cookiesRussell King - ARM Linux
Provide a common function to initialize a channels cookie values. Change-Id: Idc822d69971d7a6d26ffea8809df4825b87020e5 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit d3ee98cdcd6198ea1cf75c603178acc8a805b69b) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Id7d52f05b78d15b0c61cb04122b19810e78b9269 Reviewed-on: http://git-master/r/93783
2012-04-03dmaengine: consolidate tx_status functionsRussell King - ARM Linux
Now that we have the completed cookie in the dma_chan structure, we can consolidate the tx_status functions by providing a function to set the txstate structure and returning the DMA status. We also provide a separate helper to set the residue for cookies which are still in progress. Change-Id: I4b7672bbd17d072bfde348d04481c8db48e814c4 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit 96a2af41c78b1fbb1f567a3486bdc63f7b31c5fd) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ifdb55d85eb4789f221679f1f38f5566168e5c643 Reviewed-on: http://git-master/r/93782 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: provide a common function for completing a dma descriptorRussell King - ARM Linux
Provide a common function to do the cookie mechanics for completing a DMA descriptor. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> Cherry-picked from mainline commit f7fbce07c6ce26a25b4e0cb5f241c361fde87901 Change-Id: I0b0a9d4ad538db4fda227cc91436c44bc4a6f206 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93781 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: consolidate assignment of DMA cookiesRussell King - ARM Linux
Everyone deals with assigning DMA cookies in the same way (it's part of the API so they should be), so lets consolidate the common code into a helper function to avoid this duplication. Change-Id: I730882ff0f84f9ae42dd137a8926b7ae10868370 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit 884485e1f12dcd39390f042e772cdbefc9ebb750) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ifc4a395a5dbafad03f8b28e052ad0e7ea5d90163 Reviewed-on: http://git-master/r/93780 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: add private header fileRussell King - ARM Linux
Add a local private header file to contain definitions and declarations which should only be used by DMA engine drivers. We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against multiple inclusion. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> (cherry picked from mainline commit d2ebfb335b0426deb1a4fb14e4e926d81ecd8235) Change-Id: I91b051537fa1890e2651ebe0409fa97cbc9191dd Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93779 Reviewed-by: Automatic_Commit_Validation_User
2012-04-03dmaengine: move last completed cookie into generic dma_chan structureRussell King - ARM Linux
Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> cherry-picked from mainline 4d4e58de32a192fea65ab84509d17d199bd291c8 Change-Id: Ib653bcfa5f492986946fd34006a8de3090db0441 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93778
2012-04-03mfd: max8907c: Do not use I2C_M_NOSTART in first messageLaxman Dewangan
It is not recommended to use the flag I2C_M_NOSTART in first message. The documentation kernel/Documentation/i2c/i2c-proocol says: Flag I2C_M_NOSTART: In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some point. For example, setting I2C_M_NOSTART on the second partial message generates something like: S Addr Rd [A] [Data] NA Data [A] P If you set the I2C_M_NOSTART variable for the first partial message, we do not generate Addr, but we do generate the startbit S. This will probably confuse all other clients on your bus, so don't try this. Change-Id: I8a8a4f6f91a1b53b6d443588ab18704cf100fd50 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/93187 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com> Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-06-03 20:50:23 +0000