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path: root/drivers/gpu/drm/i915/intel_ddi.c
AgeCommit message (Expand)Author
2016-05-11drm/i915: Fix eDP low vswing for BroadwellMika Kahola
2016-05-11drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resumeImre Deak
2016-03-03drm/i915/skl: Don't skip mst encoders in skl_ddi_pll_select()Lyude
2015-11-18drm/i915: Consider SPLL as another shared pll, v2.Maarten Lankhorst
2015-10-06drm/i915: Rename DP link training functionsAnder Conselvan de Oliveira
2015-10-02drm/i915/bxt: DSI encoder support in CRTC modesetShashank Sharma
2015-10-01drm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc.Ville Syrjälä
2015-09-30drm/i915: s/_FDI_RXA_.../FDI_RX_...(PIPE_A)/Ville Syrjälä
2015-09-30drm/i915/ddi: use switch case instead of if ladder for ddi_get_encoder_portJani Nikula
2015-09-30drm/i915/ddi: warn instead of oops on invalid ddi encoder typeJani Nikula
2015-09-30drm/i915/bxt: Set oscaledcompmethod to enable scale valueSonika Jindal
2015-09-30drm/i915/bxt: eDP low vswing supportSonika Jindal
2015-09-23drm/i915: Parametrize DDI_BUF_TRANS registersVille Syrjälä
2015-09-18drm/i915/bxt: Fix wrongly placed ')' in I915_READ()Damien Lespiau
2015-09-02Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queuedDaniel Vetter
2015-09-01drm/i915: Don't use link_bw for PLL setupVille Syrjälä
2015-08-26drm/i915: Put back lane_count into intel_dp and add link_rate tooVille Syrjälä
2015-08-26drm/i915/skl: Update DDI buffer translation programming.Rodrigo Vivi
2015-08-14drm/i915: Move intel_dp->lane_count into pipe_configVille Syrjälä
2015-08-14drm/i915: Don't pass clock to DDI PLL select functionsVille Syrjälä
2015-08-14drm/i915: Don't use link_bw for PLL setupVille Syrjälä
2015-08-14drm/i915/bxt: WA for swapped HPD pins in A steppingSonika Jindal
2015-08-14drm/i915: Per-DDI I_boost overrideAntti Koskipaa
2015-08-14drm/i915: Set alternate aux for DDI-ERodrigo Vivi
2015-07-06drm/i915: set FDI translations to NULL on SKLPaulo Zanoni
2015-07-06drm/i915/bxt: BUNs related to port PLLVandana Kannan
2015-07-06drm/i915: Fix HDMI 12bpc and pixel repeat clock readout for DDI platformsVille Syrjälä
2015-07-03drm/i915/bxt: mask off the DPLL state checker bits we don't programImre Deak
2015-06-30drm/i915/bxt: add DDI port HW readout supportImre Deak
2015-06-30drm/i915/bxt: add missing DDI PLL registers to the state checkingImre Deak
2015-06-30drm/i915/skl: Buffer translation improvementsDavid Weinehall
2015-06-26drm/i915/skl: Skip remaining dividers when deviation is 0Damien Lespiau
2015-06-26drm/i915/skl: Prefer even dividers for SKL DPLLsDamien Lespiau
2015-06-26drm/i915/skl: Replace the HDMI DPLL divider computation algorithmDamien Lespiau
2015-06-12drm/i915/bxt: fix DDI PHY vswing scale value settingImre Deak
2015-06-12drm/i915: Don't display the boot CDCLK twiceDamien Lespiau
2015-06-03drm/i915/bxt: edp1.4 Intermediate Freq supportSonika Jindal
2015-05-29drm/i915/skl: Don't try to store the wrong central frequencyDamien Lespiau
2015-05-29drm/i915: Correctly prefix HSW/BDW HDMI clock functionsDamien Lespiau
2015-05-29drm/i915/skl: Remove unnecessary () used with abs_diff()Damien Lespiau
2015-05-29drm/i915/skl: Remove unnecessary () used with div_u64()Damien Lespiau
2015-05-29drm/i915/skl: Factor out computing the DPLL paramaters from the dividersDamien Lespiau
2015-05-29drm/i915/skl: Use a more idomatic early returnDamien Lespiau
2015-05-29drm/i915/skl: Propagate the error if we fail to find a suitable DPLL dividerDamien Lespiau
2015-05-29drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failingDamien Lespiau
2015-05-29drm/i915/skl: Make sure to break when not finding suitable PLL dividersDamien Lespiau
2015-05-29drm/i915: remove useless DP and DDI encoder ->hot_plug hooksJani Nikula
2015-05-29drm/i915: group all hotplug related fields into a new struct in dev_privJani Nikula
2015-05-21drm/i915/skl: Deinit/init the display at suspend/resumeDamien Lespiau
2015-05-20drm/i915/bxt: Move around lane stagger calculationVandana Kannan
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