diff options
Diffstat (limited to 'include/asm-m68knommu')
34 files changed, 477 insertions, 601 deletions
diff --git a/include/asm-m68knommu/anchor.h b/include/asm-m68knommu/anchor.h index 75390e0b40c9..871c0d5cfc3d 100644 --- a/include/asm-m68knommu/anchor.h +++ b/include/asm-m68knommu/anchor.h @@ -14,7 +14,7 @@ /* * Define basic addressing info. */ -#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) +#if defined(CONFIG_M5407C3) #define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */ #define COMEM_IRQ 25 /* IRQ of anchor part */ #else @@ -96,7 +96,7 @@ * The PCI bus will be limited in what slots will actually be used. * Define valid device numbers for different boards. */ -#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) +#if defined(CONFIG_M5407C3) #define COMEM_MINDEV 14 /* Minimum valid DEVICE */ #define COMEM_MAXDEV 14 /* Maximum valid DEVICE */ #define COMEM_BRIDGEDEV 15 /* Slot bridge is in */ diff --git a/include/asm-m68knommu/asm-offsets.h b/include/asm-m68knommu/asm-offsets.h deleted file mode 100644 index 825f6e210f19..000000000000 --- a/include/asm-m68knommu/asm-offsets.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef __ASM_OFFSETS_H__ -#define __ASM_OFFSETS_H__ -/* - * DO NOT MODIFY. - * - * This file was generated by arch/m68knommu/Makefile - * - */ - -#define TASK_STATE 0 /* offsetof(struct task_struct, state) */ -#define TASK_FLAGS 12 /* offsetof(struct task_struct, flags) */ -#define TASK_PTRACE 16 /* offsetof(struct task_struct, ptrace) */ -#define TASK_BLOCKED 922 /* offsetof(struct task_struct, blocked) */ -#define TASK_THREAD 772 /* offsetof(struct task_struct, thread) */ -#define TASK_THREAD_INFO 4 /* offsetof(struct task_struct, thread_info) */ -#define TASK_MM 92 /* offsetof(struct task_struct, mm) */ -#define TASK_ACTIVE_MM 96 /* offsetof(struct task_struct, active_mm) */ -#define CPUSTAT_SOFTIRQ_PENDING 0 /* offsetof(irq_cpustat_t, __softirq_pending) */ -#define THREAD_KSP 0 /* offsetof(struct thread_struct, ksp) */ -#define THREAD_USP 4 /* offsetof(struct thread_struct, usp) */ -#define THREAD_SR 8 /* offsetof(struct thread_struct, sr) */ -#define THREAD_FS 10 /* offsetof(struct thread_struct, fs) */ -#define THREAD_CRP 12 /* offsetof(struct thread_struct, crp) */ -#define THREAD_ESP0 20 /* offsetof(struct thread_struct, esp0) */ -#define THREAD_FPREG 24 /* offsetof(struct thread_struct, fp) */ -#define THREAD_FPCNTL 120 /* offsetof(struct thread_struct, fpcntl) */ -#define THREAD_FPSTATE 132 /* offsetof(struct thread_struct, fpstate) */ -#define PT_D0 32 /* offsetof(struct pt_regs, d0) */ -#define PT_ORIG_D0 36 /* offsetof(struct pt_regs, orig_d0) */ -#define PT_D1 0 /* offsetof(struct pt_regs, d1) */ -#define PT_D2 4 /* offsetof(struct pt_regs, d2) */ -#define PT_D3 8 /* offsetof(struct pt_regs, d3) */ -#define PT_D4 12 /* offsetof(struct pt_regs, d4) */ -#define PT_D5 16 /* offsetof(struct pt_regs, d5) */ -#define PT_A0 20 /* offsetof(struct pt_regs, a0) */ -#define PT_A1 24 /* offsetof(struct pt_regs, a1) */ -#define PT_A2 28 /* offsetof(struct pt_regs, a2) */ -#define PT_PC 48 /* offsetof(struct pt_regs, pc) */ -#define PT_SR 46 /* offsetof(struct pt_regs, sr) */ -#define PT_VECTOR 52 /* offsetof(struct pt_regs, pc) + 4 */ -#define STAT_IRQ 5140 /* offsetof(struct kernel_stat, irqs) */ -#define SIGSEGV 11 /* SIGSEGV */ -#define SEGV_MAPERR 196609 /* SEGV_MAPERR */ -#define SIGTRAP 5 /* SIGTRAP */ -#define TRAP_TRACE 196610 /* TRAP_TRACE */ -#define PT_PTRACED 1 /* PT_PTRACED */ -#define PT_DTRACE 2 /* PT_DTRACE */ - -#endif diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h index b1957fba083b..a83631ed8c8f 100644 --- a/include/asm-m68knommu/atomic.h +++ b/include/asm-m68knommu/atomic.h @@ -100,7 +100,7 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v) #define smp_mb__before_atomic_inc() barrier() #define smp_mb__after_atomic_inc() barrier() -extern __inline__ int atomic_add_return(int i, atomic_t * v) +static inline int atomic_add_return(int i, atomic_t * v) { unsigned long temp, flags; @@ -115,7 +115,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v) #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) -extern __inline__ int atomic_sub_return(int i, atomic_t * v) +static inline int atomic_sub_return(int i, atomic_t * v) { unsigned long temp, flags; diff --git a/include/asm-m68knommu/auxvec.h b/include/asm-m68knommu/auxvec.h new file mode 100644 index 000000000000..844d6d52204b --- /dev/null +++ b/include/asm-m68knommu/auxvec.h @@ -0,0 +1,4 @@ +#ifndef __ASMm68k_AUXVEC_H +#define __ASMm68k_AUXVEC_H + +#endif diff --git a/include/asm-m68knommu/bitops.h b/include/asm-m68knommu/bitops.h index f95e32b40425..c42f88a9b9f9 100644 --- a/include/asm-m68knommu/bitops.h +++ b/include/asm-m68knommu/bitops.h @@ -259,7 +259,7 @@ static __inline__ int __test_bit(int nr, const volatile unsigned long * addr) #define find_first_bit(addr, size) \ find_next_bit((addr), (size), 0) -static __inline__ int find_next_zero_bit (void * addr, int size, int offset) +static __inline__ int find_next_zero_bit (const void * addr, int size, int offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; diff --git a/include/asm-m68knommu/cacheflush.h b/include/asm-m68knommu/cacheflush.h index aa7a2ffa41af..026bbc9565b4 100644 --- a/include/asm-m68knommu/cacheflush.h +++ b/include/asm-m68knommu/cacheflush.h @@ -2,23 +2,23 @@ #define _M68KNOMMU_CACHEFLUSH_H /* - * (C) Copyright 2000-2002, Greg Ungerer <gerg@snapgear.com> + * (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com> */ #include <linux/mm.h> #define flush_cache_all() __flush_cache_all() #define flush_cache_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_range(start,len) do { } while (0) +#define flush_cache_range(vma, start, end) __flush_cache_all() +#define flush_cache_page(vma, vmaddr) do { } while (0) +#define flush_dcache_range(start,len) __flush_cache_all() #define flush_dcache_page(page) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) #define flush_icache_range(start,len) __flush_cache_all() #define flush_icache_page(vma,pg) do { } while (0) #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() +#define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vunmap(start, end) do { } while (0) #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) @@ -50,22 +50,23 @@ extern inline void __flush_cache_all(void) "movec %%d0,%%CACR\n\t" : : : "d0", "a0" ); #endif /* CONFIG_M5407 */ -#ifdef CONFIG_M5272 +#if defined(CONFIG_M527x) || defined(CONFIG_M528x) __asm__ __volatile__ ( - "movel #0x01000000, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - "movel #0x80000100, %%d0\n\t" + "movel #0x81400100, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" : : : "d0" ); -#endif /* CONFIG_M5272 */ -#if 0 /* CONFIG_M5249 */ +#endif /* CONFIG_M527x || CONFIG_M528x */ +#ifdef CONFIG_M5272 __asm__ __volatile__ ( "movel #0x01000000, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" - "movel #0xa0000200, %%d0\n\t" + : : : "d0" ); +#endif /* CONFIG_M5272 */ +#if CONFIG_M5249 + __asm__ __volatile__ ( + "movel #0xa1000200, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" : : : "d0" ); diff --git a/include/asm-m68knommu/checksum.h b/include/asm-m68knommu/checksum.h index 92cf102c2534..294ec7583ac9 100644 --- a/include/asm-m68knommu/checksum.h +++ b/include/asm-m68knommu/checksum.h @@ -25,7 +25,8 @@ unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) * better 64-bit) boundary */ -unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); +unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst, + int len, int sum); /* @@ -35,8 +36,8 @@ unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum); * better 64-bit) boundary */ -extern unsigned int csum_partial_copy_from_user(const char *src, char *dst, - int len, int sum, int *csum_err); +extern unsigned int csum_partial_copy_from_user(const unsigned char *src, + unsigned char *dst, int len, int sum, int *csum_err); #define csum_partial_copy_nocheck(src, dst, len, sum) \ csum_partial_copy((src), (dst), (len), (sum)) diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h index 16f32cc80c40..6190f77b1e6c 100644 --- a/include/asm-m68knommu/coldfire.h +++ b/include/asm-m68knommu/coldfire.h @@ -20,9 +20,14 @@ */ #define MCF_MBAR 0x10000000 #define MCF_MBAR2 0x80000000 +#if defined(CONFIG_M520x) +#define MCF_IPSBAR 0xFC000000 +#else #define MCF_IPSBAR 0x40000000 +#endif -#if defined(CONFIG_M527x) || defined(CONFIG_M528x) +#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ + defined(CONFIG_M520x) #undef MCF_MBAR #define MCF_MBAR MCF_IPSBAR #endif @@ -54,6 +59,8 @@ #define MCF_CLK 54000000 #elif defined(CONFIG_CLOCK_60MHz) #define MCF_CLK 60000000 +#elif defined(CONFIG_CLOCK_62_5MHz) +#define MCF_CLK 62500000 #elif defined(CONFIG_CLOCK_64MHz) #define MCF_CLK 64000000 #elif defined(CONFIG_CLOCK_66MHz) @@ -76,7 +83,8 @@ * One some ColdFire family members the bus clock (used by internal * peripherals) is not the same as the CPU clock. */ -#if defined(CONFIG_M5249) || defined(CONFIG_M527x) +#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \ + defined(CONFIG_M520x) #define MCF_BUSCLK (MCF_CLK / 2) #else #define MCF_BUSCLK MCF_CLK diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h index e3a976254672..04a20fd051cf 100644 --- a/include/asm-m68knommu/delay.h +++ b/include/asm-m68knommu/delay.h @@ -8,7 +8,7 @@ #include <asm/param.h> -extern __inline__ void __delay(unsigned long loops) +static inline void __delay(unsigned long loops) { #if defined(CONFIG_COLDFIRE) /* The coldfire runs this loop at significantly different speeds @@ -48,7 +48,7 @@ extern __inline__ void __delay(unsigned long loops) extern unsigned long loops_per_jiffy; -extern __inline__ void _udelay(unsigned long usecs) +static inline void _udelay(unsigned long usecs) { #if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \ defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \ diff --git a/include/asm-m68knommu/futex.h b/include/asm-m68knommu/futex.h new file mode 100644 index 000000000000..9feff4ce1424 --- /dev/null +++ b/include/asm-m68knommu/futex.h @@ -0,0 +1,53 @@ +#ifndef _ASM_FUTEX_H +#define _ASM_FUTEX_H + +#ifdef __KERNEL__ + +#include <linux/futex.h> +#include <asm/errno.h> +#include <asm/uaccess.h> + +static inline int +futex_atomic_op_inuser (int encoded_op, int __user *uaddr) +{ + int op = (encoded_op >> 28) & 7; + int cmp = (encoded_op >> 24) & 15; + int oparg = (encoded_op << 8) >> 20; + int cmparg = (encoded_op << 20) >> 20; + int oldval = 0, ret; + if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) + oparg = 1 << oparg; + + if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + + inc_preempt_count(); + + switch (op) { + case FUTEX_OP_SET: + case FUTEX_OP_ADD: + case FUTEX_OP_OR: + case FUTEX_OP_ANDN: + case FUTEX_OP_XOR: + default: + ret = -ENOSYS; + } + + dec_preempt_count(); + + if (!ret) { + switch (cmp) { + case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; + case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; + case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; + case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; + case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; + case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; + default: ret = -ENOSYS; + } + } + return ret; +} + +#endif +#endif diff --git a/include/asm-m68knommu/hdreg.h b/include/asm-m68knommu/hdreg.h deleted file mode 100644 index 5cdd9b084d37..000000000000 --- a/include/asm-m68knommu/hdreg.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-m68k/hdreg.h> diff --git a/include/asm-m68knommu/ide.h b/include/asm-m68knommu/ide.h deleted file mode 100644 index b1cbf8bb9232..000000000000 --- a/include/asm-m68knommu/ide.h +++ /dev/null @@ -1,444 +0,0 @@ -/****************************************************************************/ -/* - * linux/include/asm-m68knommu/ide.h - * - * Copyright (C) 1994-1996 Linus Torvalds & authors - * Copyright (C) 2001 Lineo Inc., davidm@uclinux.org - */ -/****************************************************************************/ -#ifndef _M68KNOMMU_IDE_H -#define _M68KNOMMU_IDE_H - -#ifdef __KERNEL__ -/****************************************************************************/ - -#include <linux/config.h> -#include <linux/interrupt.h> - -#include <asm/setup.h> -#include <asm/io.h> -#include <asm/irq.h> - -/****************************************************************************/ -/* - * some coldfire specifics - */ - -#ifdef CONFIG_COLDFIRE -#include <asm/coldfire.h> -#include <asm/mcfsim.h> - -/* - * Save some space, only have 1 interface - */ -#define MAX_HWIFS 1 /* we only have one interface for now */ - -#ifdef CONFIG_SECUREEDGEMP3 -#define MCFSIM_LOCALCS MCFSIM_CSCR4 -#else -#define MCFSIM_LOCALCS MCFSIM_CSCR6 -#endif - -#endif /* CONFIG_COLDFIRE */ - -/****************************************************************************/ -/* - * Fix up things that may not have been provided - */ - -#ifndef MAX_HWIFS -#define MAX_HWIFS 4 /* same as the other archs */ -#endif - -#undef SUPPORT_SLOW_DATA_PORTS -#define SUPPORT_SLOW_DATA_PORTS 0 - -#undef SUPPORT_VLB_SYNC -#define SUPPORT_VLB_SYNC 0 - -/* this definition is used only on startup .. */ -#undef HD_DATA -#define HD_DATA NULL - -#define DBGIDE(fmt,a...) -// #define DBGIDE(fmt,a...) printk(fmt, ##a) -#define IDE_INLINE __inline__ -// #define IDE_INLINE - -/****************************************************************************/ - -typedef union { - unsigned all : 8; /* all of the bits together */ - struct { - unsigned bit7 : 1; /* always 1 */ - unsigned lba : 1; /* using LBA instead of CHS */ - unsigned bit5 : 1; /* always 1 */ - unsigned unit : 1; /* drive select number, 0 or 1 */ - unsigned head : 4; /* always zeros here */ - } b; -} select_t; - -/* - * our list of ports/irq's for different boards - */ - -static struct m68k_ide_defaults { - ide_ioreg_t base; - int irq; -} m68k_ide_defaults[MAX_HWIFS] = { -#if defined(CONFIG_SECUREEDGEMP3) - { ((ide_ioreg_t)0x30800000), 29 }, -#elif defined(CONFIG_eLIA) - { ((ide_ioreg_t)0x30c00000), 29 }, -#else - { ((ide_ioreg_t)0x0), 0 } -#endif -}; - -/****************************************************************************/ - -static IDE_INLINE int ide_default_irq(ide_ioreg_t base) -{ - int i; - - for (i = 0; i < MAX_HWIFS; i++) - if (m68k_ide_defaults[i].base == base) - return(m68k_ide_defaults[i].irq); - return 0; -} - -static IDE_INLINE ide_ioreg_t ide_default_io_base(int index) -{ - if (index >= 0 && index < MAX_HWIFS) - return(m68k_ide_defaults[index].base); - return 0; -} - - -/* - * Set up a hw structure for a specified data port, control port and IRQ. - * This should follow whatever the default interface uses. - */ -static IDE_INLINE void ide_init_hwif_ports( - hw_regs_t *hw, - ide_ioreg_t data_port, - ide_ioreg_t ctrl_port, - int *irq) -{ - ide_ioreg_t reg = data_port; - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { - hw->io_ports[i] = reg; - reg += 1; - } - if (ctrl_port) { - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; - } else { - hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe; - } -} - -#define ide_init_default_irq(base) ide_default_irq(base) - -static IDE_INLINE int -ide_request_irq( - unsigned int irq, - void (*handler)(int, void *, struct pt_regs *), - unsigned long flags, - const char *device, - void *dev_id) -{ -#ifdef CONFIG_COLDFIRE - mcf_autovector(irq); -#endif - return(request_irq(irq, handler, flags, device, dev_id)); -} - - -static IDE_INLINE void -ide_free_irq(unsigned int irq, void *dev_id) -{ - free_irq(irq, dev_id); -} - - -static IDE_INLINE int -ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return 0; -} - - -static IDE_INLINE void -ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name) -{ -} - - -static IDE_INLINE void -ide_release_region(ide_ioreg_t from, unsigned int extent) -{ -} - - -static IDE_INLINE void -ide_fix_driveid(struct hd_driveid *id) -{ -#ifdef CONFIG_COLDFIRE - int i, n; - unsigned short *wp = (unsigned short *) id; - int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */ - - /* Need to byte swap shorts, but not char fields */ - for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) { - if (avoid[n] == i) { - n++; - continue; - } - *wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff); - } - /* have to word swap the one 32 bit field */ - id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) | - ((id->lba_capacity >> 16) & 0xffff); -#endif -} - - -static IDE_INLINE void -ide_release_lock (int *ide_lock) -{ -} - - -static IDE_INLINE void -ide_get_lock( - int *ide_lock, - void (*handler)(int, void *, struct pt_regs *), - void *data) -{ -} - - -#define ide_ack_intr(hwif) \ - ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1) -#define ide__sti() __sti() - -/****************************************************************************/ -/* - * System specific IO requirements - */ - -#ifdef CONFIG_COLDFIRE - -#ifdef CONFIG_SECUREEDGEMP3 - -/* Replace standard IO functions for funky mapping of MP3 board */ -#undef outb -#undef outb_p -#undef inb -#undef inb_p - -#define outb(v, a) ide_outb(v, (unsigned long) (a)) -#define outb_p(v, a) ide_outb(v, (unsigned long) (a)) -#define inb(a) ide_inb((unsigned long) (a)) -#define inb_p(a) ide_inb((unsigned long) (a)) - -#define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr)) -#define ADDR16_PTR(addr) (addr) -#define ADDR32_PTR(addr) (addr) -#define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8)) -#define SWAP16(w) (w) -#define SWAP32(w) (w) - - -static IDE_INLINE void -ide_outb(unsigned int val, unsigned int addr) -{ - volatile unsigned short *rp; - - DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr); - rp = (volatile unsigned short *) ADDR8_PTR(addr); - *rp = SWAP8(val); -} - - -static IDE_INLINE int -ide_inb(unsigned int addr) -{ - volatile unsigned short *rp, val; - - DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr); - rp = (volatile unsigned short *) ADDR8_PTR(addr); - val = *rp; - return(SWAP8(val)); -} - - -static IDE_INLINE void -ide_outw(unsigned int val, unsigned int addr) -{ - volatile unsigned short *rp; - - DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr); - rp = (volatile unsigned short *) ADDR16_PTR(addr); - *rp = SWAP16(val); -} - -static IDE_INLINE void -ide_outsw(unsigned int addr, const void *vbuf, unsigned long len) -{ - volatile unsigned short *rp, val; - unsigned short *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) ADDR16_PTR(addr); - for (; (len > 0); len--) { - val = *buf++; - *rp = SWAP16(val); - } -} - -static IDE_INLINE int -ide_inw(unsigned int addr) -{ - volatile unsigned short *rp, val; - - DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr); - rp = (volatile unsigned short *) ADDR16_PTR(addr); - val = *rp; - return(SWAP16(val)); -} - -static IDE_INLINE void -ide_insw(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned short *rp; - unsigned short w, *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) ADDR16_PTR(addr); - for (; (len > 0); len--) { - w = *rp; - *buf++ = SWAP16(w); - } -} - -static IDE_INLINE void -ide_insl(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned long *rp; - unsigned long w, *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned long *) vbuf; - rp = (volatile unsigned long *) ADDR32_PTR(addr); - for (; (len > 0); len--) { - w = *rp; - *buf++ = SWAP32(w); - } -} - -static IDE_INLINE void -ide_outsl(unsigned int addr, const void *vbuf, unsigned long len) -{ - volatile unsigned long *rp, val; - unsigned long *buf; - - DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len); - buf = (unsigned long *) vbuf; - rp = (volatile unsigned long *) ADDR32_PTR(addr); - for (; (len > 0); len--) { - val = *buf++; - *rp = SWAP32(val); - } -} - -#elif CONFIG_eLIA - -/* 8/16 bit acesses are controlled by flicking bits in the CS register */ -#define ACCESS_MODE_16BIT() \ - *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080 -#define ACCESS_MODE_8BIT() \ - *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040 - - -static IDE_INLINE void -ide_outw(unsigned int val, unsigned int addr) -{ - ACCESS_MODE_16BIT(); - outw(val, addr); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE void -ide_outsw(unsigned int addr, const void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - outsw(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE int -ide_inw(unsigned int addr) -{ - int ret; - - ACCESS_MODE_16BIT(); - ret = inw(addr); - ACCESS_MODE_8BIT(); - return(ret); -} - -static IDE_INLINE void -ide_insw(unsigned int addr, void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - insw(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE void -ide_insl(unsigned int addr, void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - insl(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -static IDE_INLINE void -ide_outsl(unsigned int addr, const void *vbuf, unsigned long len) -{ - ACCESS_MODE_16BIT(); - outsl(addr, vbuf, len); - ACCESS_MODE_8BIT(); -} - -#endif /* CONFIG_SECUREEDGEMP3 */ - -#undef outw -#undef outw_p -#undef outsw -#undef inw -#undef inw_p -#undef insw -#undef insl -#undef outsl - -#define outw(v, a) ide_outw(v, (unsigned long) (a)) -#define outw_p(v, a) ide_outw(v, (unsigned long) (a)) -#define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n) -#define inw(a) ide_inw((unsigned long) (a)) -#define inw_p(a) ide_inw((unsigned long) (a)) -#define insw(a, b, n) ide_insw((unsigned long) (a), b, n) -#define insl(a, b, n) ide_insl((unsigned long) (a), b, n) -#define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n) - -#endif CONFIG_COLDFIRE - -/****************************************************************************/ -#endif /* __KERNEL__ */ -#endif /* _M68KNOMMU_IDE_H */ -/****************************************************************************/ diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h index 30fade4149b8..e08f2ee4b4a2 100644 --- a/include/asm-m68knommu/io.h +++ b/include/asm-m68knommu/io.h @@ -147,19 +147,19 @@ static inline void io_insl(unsigned int addr, void *buf, int len) extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); extern void __iounmap(void *addr, unsigned long size); -extern inline void *ioremap(unsigned long physaddr, unsigned long size) +static inline void *ioremap(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); } -extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) +static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); } -extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) +static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); } -extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) +static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) { return __ioremap(physaddr, size, IOMAP_FULL_CACHING); } diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h new file mode 100644 index 000000000000..6dc62869e62b --- /dev/null +++ b/include/asm-m68knommu/m520xsim.h @@ -0,0 +1,54 @@ +/****************************************************************************/ + +/* + * m520xsim.h -- ColdFire 5207/5208 System Integration Module support. + * + * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com) + */ + +/****************************************************************************/ +#ifndef m520xsim_h +#define m520xsim_h +/****************************************************************************/ + +#include <linux/config.h> + +/* + * Define the 5282 SIM register set addresses. + */ +#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */ +#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ +#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ +#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ +#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ +#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ +#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ +#define MCFINTC_ICR0 0x40 /* Base ICR register */ + +#define MCFINT_VECBASE 64 +#define MCFINT_UART0 26 /* Interrupt number for UART0 */ +#define MCFINT_UART1 27 /* Interrupt number for UART1 */ +#define MCFINT_UART2 28 /* Interrupt number for UART2 */ +#define MCFINT_QSPI 31 /* Interrupt number for QSPI */ +#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */ + + +#define MCF_GPIO_PAR_UART (0xA4036) +#define MCF_GPIO_PAR_FECI2C (0xA4033) +#define MCF_GPIO_PAR_FEC (0xA4038) + +#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) +#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0002) + +#define MCF_GPIO_PAR_UART_PAR_URXD1 (0x0040) +#define MCF_GPIO_PAR_UART_PAR_UTXD1 (0x0080) + +#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02) +#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) + +#define ICR_INTRCONF 0x05 +#define MCFPIT_IMR MCFINTC_IMRL +#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1) + +/****************************************************************************/ +#endif /* m520xsim_h */ diff --git a/include/asm-m68knommu/m523xsim.h b/include/asm-m68knommu/m523xsim.h new file mode 100644 index 000000000000..926cfb805df7 --- /dev/null +++ b/include/asm-m68knommu/m523xsim.h @@ -0,0 +1,46 @@ +/****************************************************************************/ + +/* + * m523xsim.h -- ColdFire 523x System Integration Module support. + * + * (C) Copyright 2003-2005, Greg Ungerer <gerg@snapgear.com> + */ + +/****************************************************************************/ +#ifndef m523xsim_h +#define m523xsim_h +/****************************************************************************/ + +#include <linux/config.h> + +/* + * Define the 523x SIM register set addresses. + */ +#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */ +#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 0 */ +#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ +#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ +#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ +#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ +#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ +#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ +#define MCFINTC_IRLR 0x18 /* */ +#define MCFINTC_IACKL 0x19 /* */ +#define MCFINTC_ICR0 0x40 /* Base ICR register */ + +#define MCFINT_VECBASE 64 /* Vector base number */ +#define MCFINT_UART0 13 /* Interrupt number for UART0 */ +#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ +#define MCFINT_QSPI 18 /* Interrupt number for QSPI */ + +/* + * SDRAM configuration registers. + */ +#define MCFSIM_DCR 0x44 /* SDRAM control */ +#define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ +#define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */ +#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */ +#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ + +/****************************************************************************/ +#endif /* m523xsim_h */ diff --git a/include/asm-m68knommu/m527xsim.h b/include/asm-m68knommu/m527xsim.h index d280d013da03..e7878d0f7d7a 100644 --- a/include/asm-m68knommu/m527xsim.h +++ b/include/asm-m68knommu/m527xsim.h @@ -37,13 +37,14 @@ /* * SDRAM configuration registers. */ -#ifdef CONFIG_M5271EVB +#ifdef CONFIG_M5271 #define MCFSIM_DCR 0x40 /* SDRAM control */ #define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ #define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */ #define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */ #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ -#else +#endif +#ifdef CONFIG_M5275 #define MCFSIM_DMR 0x40 /* SDRAM mode */ #define MCFSIM_DCR 0x44 /* SDRAM control */ #define MCFSIM_DCFG1 0x48 /* SDRAM configuration 1 */ @@ -54,5 +55,21 @@ #define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */ #endif +/* + * GPIO pins setups to enable the UARTs. + */ +#ifdef CONFIG_M5271 +#define MCF_GPIO_PAR_UART 0x100048 /* PAR UART address */ +#define UART0_ENABLE_MASK 0x000f +#define UART1_ENABLE_MASK 0x0ff0 +#define UART2_ENABLE_MASK 0x3000 +#endif +#ifdef CONFIG_M5275 +#define MCF_GPIO_PAR_UART 0x10007c /* PAR UART address */ +#define UART0_ENABLE_MASK 0x000f +#define UART1_ENABLE_MASK 0x00f0 +#define UART2_ENABLE_MASK 0x3f00 +#endif + /****************************************************************************/ #endif /* m527xsim_h */ diff --git a/include/asm-m68knommu/m528xsim.h b/include/asm-m68knommu/m528xsim.h index 371993a206ac..610774a17f70 100644 --- a/include/asm-m68knommu/m528xsim.h +++ b/include/asm-m68knommu/m528xsim.h @@ -41,5 +41,117 @@ #define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */ #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ +/* + * Derek Cheung - 6 Feb 2005 + * add I2C and QSPI register definition using Freescale's MCF5282 + */ +/* set Port AS pin for I2C or UART */ +#define MCF5282_GPIO_PASPAR (volatile u16 *) (MCF_IPSBAR + 0x00100056) + +/* Interrupt Mask Register Register Low */ +#define MCF5282_INTC0_IMRL (volatile u32 *) (MCF_IPSBAR + 0x0C0C) +/* Interrupt Control Register 7 */ +#define MCF5282_INTC0_ICR17 (volatile u8 *) (MCF_IPSBAR + 0x0C51) + + + +/********************************************************************* +* +* Inter-IC (I2C) Module +* +*********************************************************************/ +/* Read/Write access macros for general use */ +#define MCF5282_I2C_I2ADR (volatile u8 *) (MCF_IPSBAR + 0x0300) // Address +#define MCF5282_I2C_I2FDR (volatile u8 *) (MCF_IPSBAR + 0x0304) // Freq Divider +#define MCF5282_I2C_I2CR (volatile u8 *) (MCF_IPSBAR + 0x0308) // Control +#define MCF5282_I2C_I2SR (volatile u8 *) (MCF_IPSBAR + 0x030C) // Status +#define MCF5282_I2C_I2DR (volatile u8 *) (MCF_IPSBAR + 0x0310) // Data I/O + +/* Bit level definitions and macros */ +#define MCF5282_I2C_I2ADR_ADDR(x) (((x)&0x7F)<<0x01) + +#define MCF5282_I2C_I2FDR_IC(x) (((x)&0x3F)) + +#define MCF5282_I2C_I2CR_IEN (0x80) // I2C enable +#define MCF5282_I2C_I2CR_IIEN (0x40) // interrupt enable +#define MCF5282_I2C_I2CR_MSTA (0x20) // master/slave mode +#define MCF5282_I2C_I2CR_MTX (0x10) // transmit/receive mode +#define MCF5282_I2C_I2CR_TXAK (0x08) // transmit acknowledge enable +#define MCF5282_I2C_I2CR_RSTA (0x04) // repeat start + +#define MCF5282_I2C_I2SR_ICF (0x80) // data transfer bit +#define MCF5282_I2C_I2SR_IAAS (0x40) // I2C addressed as a slave +#define MCF5282_I2C_I2SR_IBB (0x20) // I2C bus busy +#define MCF5282_I2C_I2SR_IAL (0x10) // aribitration lost +#define MCF5282_I2C_I2SR_SRW (0x04) // slave read/write +#define MCF5282_I2C_I2SR_IIF (0x02) // I2C interrupt +#define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge + + + +/********************************************************************* +* +* Queued Serial Peripheral Interface (QSPI) Module +* +*********************************************************************/ +/* Derek - 21 Feb 2005 */ +/* change to the format used in I2C */ +/* Read/Write access macros for general use */ +#define MCF5282_QSPI_QMR MCF_IPSBAR + 0x0340 +#define MCF5282_QSPI_QDLYR MCF_IPSBAR + 0x0344 +#define MCF5282_QSPI_QWR MCF_IPSBAR + 0x0348 +#define MCF5282_QSPI_QIR MCF_IPSBAR + 0x034C +#define MCF5282_QSPI_QAR MCF_IPSBAR + 0x0350 +#define MCF5282_QSPI_QDR MCF_IPSBAR + 0x0354 +#define MCF5282_QSPI_QCR MCF_IPSBAR + 0x0354 + +/* Bit level definitions and macros */ +#define MCF5282_QSPI_QMR_MSTR (0x8000) +#define MCF5282_QSPI_QMR_DOHIE (0x4000) +#define MCF5282_QSPI_QMR_BITS_16 (0x0000) +#define MCF5282_QSPI_QMR_BITS_8 (0x2000) +#define MCF5282_QSPI_QMR_BITS_9 (0x2400) +#define MCF5282_QSPI_QMR_BITS_10 (0x2800) +#define MCF5282_QSPI_QMR_BITS_11 (0x2C00) +#define MCF5282_QSPI_QMR_BITS_12 (0x3000) +#define MCF5282_QSPI_QMR_BITS_13 (0x3400) +#define MCF5282_QSPI_QMR_BITS_14 (0x3800) +#define MCF5282_QSPI_QMR_BITS_15 (0x3C00) +#define MCF5282_QSPI_QMR_CPOL (0x0200) +#define MCF5282_QSPI_QMR_CPHA (0x0100) +#define MCF5282_QSPI_QMR_BAUD(x) (((x)&0x00FF)) + +#define MCF5282_QSPI_QDLYR_SPE (0x80) +#define MCF5282_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) +#define MCF5282_QSPI_QDLYR_DTL(x) (((x)&0x00FF)) + +#define MCF5282_QSPI_QWR_HALT (0x8000) +#define MCF5282_QSPI_QWR_WREN (0x4000) +#define MCF5282_QSPI_QWR_WRTO (0x2000) +#define MCF5282_QSPI_QWR_CSIV (0x1000) +#define MCF5282_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) +#define MCF5282_QSPI_QWR_CPTQP(x) (((x)&0x000F)<<4) +#define MCF5282_QSPI_QWR_NEWQP(x) (((x)&0x000F)) + +#define MCF5282_QSPI_QIR_WCEFB (0x8000) +#define MCF5282_QSPI_QIR_ABRTB (0x4000) +#define MCF5282_QSPI_QIR_ABRTL (0x1000) +#define MCF5282_QSPI_QIR_WCEFE (0x0800) +#define MCF5282_QSPI_QIR_ABRTE (0x0400) +#define MCF5282_QSPI_QIR_SPIFE (0x0100) +#define MCF5282_QSPI_QIR_WCEF (0x0008) +#define MCF5282_QSPI_QIR_ABRT (0x0004) +#define MCF5282_QSPI_QIR_SPIF (0x0001) + +#define MCF5282_QSPI_QAR_ADDR(x) (((x)&0x003F)) + +#define MCF5282_QSPI_QDR_COMMAND(x) (((x)&0xFF00)) +#define MCF5282_QSPI_QCR_DATA(x) (((x)&0x00FF)<<8) +#define MCF5282_QSPI_QCR_CONT (0x8000) +#define MCF5282_QSPI_QCR_BITSE (0x4000) +#define MCF5282_QSPI_QCR_DT (0x2000) +#define MCF5282_QSPI_QCR_DSCK (0x1000) +#define MCF5282_QSPI_QCR_CS (((x)&0x000F)<<8) + /****************************************************************************/ #endif /* m528xsim_h */ diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h index bdd8c53ef34c..9cb401421835 100644 --- a/include/asm-m68knommu/mcfcache.h +++ b/include/asm-m68knommu/mcfcache.h @@ -33,7 +33,7 @@ .endm #endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */ -#if defined(CONFIG_M527x) +#if defined(CONFIG_M523x) || defined(CONFIG_M527x) /* * New version 2 cores have a configurable split cache arrangement. * For now I am just enabling instruction cache - but ultimately I @@ -51,23 +51,20 @@ movec %d0,%CACR /* enable cache */ nop .endm -#endif /* CONFIG_M527x */ +#endif /* CONFIG_M523x || CONFIG_M527x */ #if defined(CONFIG_M528x) -/* - * Cache is totally broken on early 5282 silicon. So far now we - * disable its cache all together. - */ .macro CACHE_ENABLE - movel #0x01000000,%d0 - movec %d0,%CACR /* invalidate cache */ nop - movel #0x0000c000,%d0 /* set SDRAM cached only */ - movec %d0,%ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - movel #0x00000000,%d0 /* configure cache */ - movec %d0,%CACR /* enable cache */ + movel #0x01000000, %d0 + movec %d0, %CACR /* Invalidate cache */ + nop + movel #0x0000c020, %d0 /* Set SDRAM cached only */ + movec %d0, %ACR0 + movel #0xff00c000, %d0 /* Cache Flash also */ + movec %d0, %ACR1 + movel #0x80000200, %d0 /* Setup cache mask */ + movec %d0, %CACR /* Enable cache */ nop .endm #endif /* CONFIG_M528x */ @@ -120,6 +117,20 @@ .endm #endif /* CONFIG_M5407 */ +#if defined(CONFIG_M520x) +.macro CACHE_ENABLE + move.l #0x01000000,%d0 /* invalidate whole cache */ + movec %d0,%CACR + nop + move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */ + movec %d0,%ACR0 + move.l #0x00000000,%d0 /* no other regions cached */ + movec %d0,%ACR1 + move.l #0x80400000,%d0 /* enable 8K instruction cache */ + movec %d0,%CACR + nop +.endm +#endif /* CONFIG_M520x */ /****************************************************************************/ #endif /* __M68KNOMMU_MCFCACHE_H */ diff --git a/include/asm-m68knommu/mcfdma.h b/include/asm-m68knommu/mcfdma.h index 350c6090b5c1..b93f8ba8a248 100644 --- a/include/asm-m68knommu/mcfdma.h +++ b/include/asm-m68knommu/mcfdma.h @@ -21,7 +21,7 @@ #define MCFDMA_BASE1 0x240 /* Base address of DMA 1 */ #elif defined(CONFIG_M5272) #define MCFDMA_BASE0 0x0e0 /* Base address of DMA 0 */ -#elif defined(CONFIG_M527x) || defined(CONFIG_M528x) +#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) /* These are relative to the IPSBAR, not MBAR */ #define MCFDMA_BASE0 0x100 /* Base address of DMA 0 */ #define MCFDMA_BASE1 0x140 /* Base address of DMA 1 */ diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h index 045875651e4d..a71b1c8cb4f8 100644 --- a/include/asm-m68knommu/mcfne.h +++ b/include/asm-m68knommu/mcfne.h @@ -35,7 +35,7 @@ * Define the basic hardware resources of NE2000 boards. */ -#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) +#if defined(CONFIG_ARN5206) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0xf0 @@ -44,7 +44,7 @@ #define NE2000_BYTE volatile unsigned short #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) +#if defined(CONFIG_M5206eC3) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1c @@ -61,7 +61,7 @@ #define NE2000_BYTE volatile unsigned char #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) +#if defined(CONFIG_CFV240) #define NE2000_ADDR 0x40010000 #define NE2000_ADDR1 0x40010001 #define NE2000_ODDOFFSET 0x00000000 @@ -72,7 +72,7 @@ #define NE2000_BYTE volatile unsigned char #endif -#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA) +#if defined(CONFIG_M5307C3) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1b @@ -114,7 +114,7 @@ #define RSWAP(w) (((w) << 8) | ((w) >> 8)) #endif -#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH) +#if defined(CONFIG_ARN5307) #define NE2000_ADDR 0xfe600300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1b @@ -123,7 +123,7 @@ #define NE2000_BYTE volatile unsigned short #endif -#if defined(CONFIG_M5407) +#if defined(CONFIG_M5407C3) #define NE2000_ADDR 0x40000300 #define NE2000_ODDOFFSET 0x00010000 #define NE2000_IRQ_VECTOR 0x1b @@ -264,7 +264,7 @@ void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len) * Minor differences between the different board types. */ -#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) +#if defined(CONFIG_ARN5206) void ne2000_irqsetup(int irq) { volatile unsigned char *icrp; @@ -275,7 +275,7 @@ void ne2000_irqsetup(int irq) } #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) +#if defined(CONFIG_M5206eC3) void ne2000_irqsetup(int irq) { volatile unsigned char *icrp; @@ -286,7 +286,7 @@ void ne2000_irqsetup(int irq) } #endif -#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) +#if defined(CONFIG_CFV240) void ne2000_irqsetup(int irq) { volatile unsigned char *icrp; diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h index 4cc2e9fd6ad0..a685f1b45401 100644 --- a/include/asm-m68knommu/mcfpit.h +++ b/include/asm-m68knommu/mcfpit.h @@ -14,13 +14,17 @@ #include <linux/config.h> /* - * Get address specific defines for the 5270/5271 and 5280/5282. + * Get address specific defines for the 5270/5271, 5280/5282, and 5208. */ +#if defined(CONFIG_M520x) +#define MCFPIT_BASE1 0x00080000 /* Base address of TIMER1 */ +#define MCFPIT_BASE2 0x00084000 /* Base address of TIMER2 */ +#else #define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */ #define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */ #define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */ #define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */ - +#endif /* * Define the PIT timer register set addresses. diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h index 522e513c2bc6..81d74a31dc43 100644 --- a/include/asm-m68knommu/mcfsim.h +++ b/include/asm-m68knommu/mcfsim.h @@ -15,13 +15,17 @@ #include <linux/config.h> /* - * Include 5204, 5206/e, 5249, 5270/5271, 5272, 5280/5282, 5307 or - * 5407 specific addresses. + * Include 5204, 5206/e, 5235, 5249, 5270/5271, 5272, 5280/5282, + * 5307 or 5407 specific addresses. */ #if defined(CONFIG_M5204) #include <asm/m5204sim.h> #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) #include <asm/m5206sim.h> +#elif defined(CONFIG_M520x) +#include <asm/m520xsim.h> +#elif defined(CONFIG_M523x) +#include <asm/m523xsim.h> #elif defined(CONFIG_M5249) #include <asm/m5249sim.h> #elif defined(CONFIG_M527x) @@ -97,6 +101,19 @@ #define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */ #endif +/* + * PIT interrupt settings, if not found in mXXXXsim.h file. + */ +#ifndef ICR_INTRCONF +#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */ +#endif +#ifndef MCFPIT_IMR +#define MCFPIT_IMR MCFINTC_IMRH +#endif +#ifndef MCFPIT_IMR_IBIT +#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32)) +#endif + #ifndef __ASSEMBLY__ /* diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h index 54d4a85f4fdf..b016fad83119 100644 --- a/include/asm-m68knommu/mcfuart.h +++ b/include/asm-m68knommu/mcfuart.h @@ -29,7 +29,7 @@ #define MCFUART_BASE1 0x140 /* Base address of UART1 */ #define MCFUART_BASE2 0x180 /* Base address of UART2 */ #endif -#elif defined(CONFIG_M527x) || defined(CONFIG_M528x) +#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) #define MCFUART_BASE1 0x200 /* Base address of UART1 */ #define MCFUART_BASE2 0x240 /* Base address of UART2 */ #define MCFUART_BASE3 0x280 /* Base address of UART3 */ @@ -41,6 +41,10 @@ #define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ #define MCFUART_BASE2 0x200 /* Base address of UART2 */ #endif +#elif defined(CONFIG_M520x) +#define MCFUART_BASE1 0x60000 /* Base address of UART1 */ +#define MCFUART_BASE2 0x64000 /* Base address of UART2 */ +#define MCFUART_BASE3 0x68000 /* Base address of UART2 */ #endif diff --git a/include/asm-m68knommu/mcfwdebug.h b/include/asm-m68knommu/mcfwdebug.h index c425dd568155..6ceae103596b 100644 --- a/include/asm-m68knommu/mcfwdebug.h +++ b/include/asm-m68knommu/mcfwdebug.h @@ -90,7 +90,7 @@ * that the debug module instructions (2 longs) must be long word aligned and * some pointer fiddling is performed to ensure this. */ -extern inline void wdebug(int reg, unsigned long data) { +static inline void wdebug(int reg, unsigned long data) { unsigned short dbg_spc[6]; unsigned short *dbg; diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h index 9bc0fd49b8aa..1e080eca9ca8 100644 --- a/include/asm-m68knommu/mmu_context.h +++ b/include/asm-m68knommu/mmu_context.h @@ -10,7 +10,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } -extern inline int +static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { // mm->context = virt_to_phys(mm->pgd); @@ -25,7 +25,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, str #define deactivate_mm(tsk,mm) do { } while (0) -extern inline void activate_mm(struct mm_struct *prev_mm, +static inline void activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm) { } diff --git a/include/asm-m68knommu/page.h b/include/asm-m68knommu/page.h index 05e03df0ec29..942dfbead27f 100644 --- a/include/asm-m68knommu/page.h +++ b/include/asm-m68knommu/page.h @@ -48,20 +48,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; /* to align the pointer to the (next) page boundary */ #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) -/* Pure 2^n version of get_order */ -extern __inline__ int get_order(unsigned long size) -{ - int order; - - size = (size-1) >> (PAGE_SHIFT-1); - order = -1; - do { - size >>= 1; - order++; - } while (size); - return order; -} - extern unsigned long memory_start; extern unsigned long memory_end; @@ -73,8 +59,8 @@ extern unsigned long memory_end; #ifndef __ASSEMBLY__ -#define __pa(vaddr) virt_to_phys((void *)vaddr) -#define __va(paddr) phys_to_virt((unsigned long)paddr) +#define __pa(vaddr) virt_to_phys((void *)(vaddr)) +#define __va(paddr) phys_to_virt((unsigned long)(paddr)) #define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT) #define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT) @@ -84,6 +70,7 @@ extern unsigned long memory_end; #define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn)) #define page_to_pfn(page) virt_to_pfn(page_to_virt(page)) +#define pfn_valid(pfn) ((pfn) < max_mapnr) #define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \ ((void *)(kaddr) < (void *)memory_end)) @@ -92,4 +79,6 @@ extern unsigned long memory_end; #endif /* __KERNEL__ */ +#include <asm-generic/page.h> + #endif /* _M68KNOMMU_PAGE_H */ diff --git a/include/asm-m68knommu/pgtable.h b/include/asm-m68knommu/pgtable.h index e2a69fffa370..00893055e6c2 100644 --- a/include/asm-m68knommu/pgtable.h +++ b/include/asm-m68knommu/pgtable.h @@ -56,8 +56,6 @@ extern int is_in_rom(unsigned long); * No page table caches to initialise. */ #define pgtable_cache_init() do { } while (0) -#define io_remap_page_range(vma, vaddr, paddr, size, prot) \ - remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot) #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ remap_pfn_range(vma, vaddr, pfn, size, prot) diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h index 85a054e758b1..ba393b1a023b 100644 --- a/include/asm-m68knommu/processor.h +++ b/include/asm-m68knommu/processor.h @@ -21,7 +21,7 @@ #include <asm/ptrace.h> #include <asm/current.h> -extern inline unsigned long rdusp(void) +static inline unsigned long rdusp(void) { #ifdef CONFIG_COLDFIRE extern unsigned int sw_usp; @@ -33,7 +33,7 @@ extern inline unsigned long rdusp(void) #endif } -extern inline void wrusp(unsigned long usp) +static inline void wrusp(unsigned long usp) { #ifdef CONFIG_COLDFIRE extern unsigned int sw_usp; diff --git a/include/asm-m68knommu/scatterlist.h b/include/asm-m68knommu/scatterlist.h index 230b8d56d17f..12309b181d29 100644 --- a/include/asm-m68knommu/scatterlist.h +++ b/include/asm-m68knommu/scatterlist.h @@ -1,6 +1,8 @@ #ifndef _M68KNOMMU_SCATTERLIST_H #define _M68KNOMMU_SCATTERLIST_H +#include <linux/mm.h> + struct scatterlist { struct page *page; unsigned int offset; @@ -8,6 +10,10 @@ struct scatterlist { unsigned int length; }; +#define sg_address(sg) (page_address((sg)->page) + (sg)->offset +#define sg_dma_address(sg) ((sg)->dma_address) +#define sg_dma_len(sg) ((sg)->length) + #define ISA_DMA_THRESHOLD (0xffffffff) #endif /* !(_M68KNOMMU_SCATTERLIST_H) */ diff --git a/include/asm-m68knommu/semaphore.h b/include/asm-m68knommu/semaphore.h index febe85add509..5cc1fdd86f50 100644 --- a/include/asm-m68knommu/semaphore.h +++ b/include/asm-m68knommu/semaphore.h @@ -35,16 +35,13 @@ struct semaphore { .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ } -#define __MUTEX_INITIALIZER(name) \ - __SEMAPHORE_INITIALIZER(name,1) - #define __DECLARE_SEMAPHORE_GENERIC(name,count) \ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) -extern inline void sema_init (struct semaphore *sem, int val) +static inline void sema_init (struct semaphore *sem, int val) { *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val); } @@ -76,7 +73,7 @@ extern spinlock_t semaphore_wake_lock; * "down_failed" is a special asm handler that calls the C * routine that actually waits. See arch/m68k/lib/semaphore.S */ -extern inline void down(struct semaphore * sem) +static inline void down(struct semaphore * sem) { might_sleep(); __asm__ __volatile__( @@ -91,7 +88,7 @@ extern inline void down(struct semaphore * sem) : "cc", "%a0", "%a1", "memory"); } -extern inline int down_interruptible(struct semaphore * sem) +static inline int down_interruptible(struct semaphore * sem) { int ret; @@ -110,7 +107,7 @@ extern inline int down_interruptible(struct semaphore * sem) return(ret); } -extern inline int down_trylock(struct semaphore * sem) +static inline int down_trylock(struct semaphore * sem) { register struct semaphore *sem1 __asm__ ("%a1") = sem; register int result __asm__ ("%d0"); @@ -138,7 +135,7 @@ extern inline int down_trylock(struct semaphore * sem) * The default case (no contention) will result in NO * jumps for both down() and up(). */ -extern inline void up(struct semaphore * sem) +static inline void up(struct semaphore * sem) { __asm__ __volatile__( "| atomic up operation\n\t" diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h index c341b66c147b..6338afc850ba 100644 --- a/include/asm-m68knommu/system.h +++ b/include/asm-m68knommu/system.h @@ -57,9 +57,18 @@ asmlinkage void resume(void); : "cc", "%d0", "memory") #define local_irq_disable() __asm__ __volatile__ ( \ "move %/sr,%%d0\n\t" \ - "ori.l #0x0700,%%d0\n\t" \ + "ori.l #0x0700,%%d0\n\t" \ "move %%d0,%/sr\n" \ - : /* no inputs */ \ + : /* no outputs */ \ + : \ + : "cc", "%d0", "memory") +/* For spinlocks etc */ +#define local_irq_save(x) __asm__ __volatile__ ( \ + "movew %%sr,%0\n\t" \ + "movew #0x0700,%%d0\n\t" \ + "or.l %0,%%d0\n\t" \ + "movew %%d0,%/sr" \ + : "=d" (x) \ : \ : "cc", "%d0", "memory") #else @@ -75,7 +84,9 @@ asmlinkage void resume(void); #define local_irq_restore(x) asm volatile ("movew %0,%%sr": :"d" (x) : "memory") /* For spinlocks etc */ +#ifndef local_irq_save #define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } while (0) +#endif #define irqs_disabled() \ ({ \ @@ -234,9 +245,9 @@ cmpxchg(volatile int *p, int old, int new) #ifdef CONFIG_COLDFIRE #if defined(CONFIG_M5272) && defined(CONFIG_NETtel) /* - * Need to account for broken early mask of 5272 silicon. So don't - * jump through the original start address. Jump strait into the - * known start of the FLASH code. + * Need to account for broken early mask of 5272 silicon. So don't + * jump through the original start address. Jump strait into the + * known start of the FLASH code. */ #define HARD_RESET_NOW() ({ \ asm(" \ @@ -244,7 +255,9 @@ cmpxchg(volatile int *p, int old, int new) jmp 0xf0000400; \ "); \ }) -#elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA) +#elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \ + defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \ + defined(CONFIG_CLEOPATRA) #define HARD_RESET_NOW() ({ \ asm(" \ movew #0x2700, %sr; \ @@ -257,6 +270,26 @@ cmpxchg(volatile int *p, int old, int new) jmp (%a0); \ "); \ }) +#elif defined(CONFIG_M5272) +/* + * Retrieve the boot address in flash using CSBR0 and CSOR0 + * find the reset vector at flash_address + 4 (e.g. 0x400) + * remap it in the flash's current location (e.g. 0xf0000400) + * and jump there. + */ +#define HARD_RESET_NOW() ({ \ + asm(" \ + movew #0x2700, %%sr; \ + move.l %0+0x40,%%d0; \ + and.l %0+0x44,%%d0; \ + andi.l #0xfffff000,%%d0; \ + mov.l %%d0,%%a0; \ + or.l 4(%%a0),%%d0; \ + mov.l %%d0,%%a0; \ + jmp (%%a0);" \ + : /* No output */ \ + : "o" (*(char *)MCF_MBAR) ); \ +}) #elif defined(CONFIG_M528x) /* * The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR), @@ -270,6 +303,28 @@ cmpxchg(volatile int *p, int old, int new) while(1) \ *reset |= (0x01 << 7);\ }) +#elif defined(CONFIG_M523x) +#define HARD_RESET_NOW() ({ \ + asm(" \ + movew #0x2700, %sr; \ + movel #0x01000000, %sp; \ + moveal #0x40110000, %a0; \ + moveb #0x80, (%a0); \ + "); \ +}) +#elif defined(CONFIG_M520x) + /* + * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register + * RCR), that when set, resets the MCF5208. + */ +#define HARD_RESET_NOW() \ +({ \ + unsigned char volatile *reset; \ + asm("move.w #0x2700, %sr"); \ + reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000)); \ + while(1) \ + *reset |= 0x80; \ +}) #else #define HARD_RESET_NOW() ({ \ asm(" \ diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h index bf7004e1afe0..de858db28b00 100644 --- a/include/asm-m68knommu/tlbflush.h +++ b/include/asm-m68knommu/tlbflush.h @@ -47,12 +47,12 @@ static inline void flush_tlb_range(struct mm_struct *mm, BUG(); } -extern inline void flush_tlb_kernel_page(unsigned long addr) +static inline void flush_tlb_kernel_page(unsigned long addr) { BUG(); } -extern inline void flush_tlb_pgtables(struct mm_struct *mm, +static inline void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end) { BUG(); diff --git a/include/asm-m68knommu/uaccess.h b/include/asm-m68knommu/uaccess.h index f0be74bb353c..05be9515a2d2 100644 --- a/include/asm-m68knommu/uaccess.h +++ b/include/asm-m68knommu/uaccess.h @@ -23,12 +23,6 @@ static inline int _access_ok(unsigned long addr, unsigned long size) (is_in_rom(addr) && is_in_rom(addr+size))); } -/* this function will go away soon - use access_ok() instead */ -extern inline int __deprecated verify_area(int type, const void * addr, unsigned long size) -{ - return access_ok(type,addr,size)?0:-EFAULT; -} - /* * The exception table consists of pairs of addresses: the first is the * address of an instruction that is allowed to fault, and the second is diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h index 84b6fa14459f..5373988a7e51 100644 --- a/include/asm-m68knommu/unistd.h +++ b/include/asm-m68knommu/unistd.h @@ -504,7 +504,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, unsigned long fd, unsigned long pgoff); asmlinkage int sys_execve(char *name, char **argv, char **envp); asmlinkage int sys_pipe(unsigned long *fildes); -asmlinkage int sys_ptrace(long request, long pid, long addr, long data); struct pt_regs; int sys_request_irq(unsigned int, irqreturn_t (*)(int, void *, struct pt_regs *), |