diff options
Diffstat (limited to 'arch')
509 files changed, 36391 insertions, 14265 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a04f507e7f2c..de211ac3853e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -180,8 +180,8 @@ config ARCH_AT91 bool "Atmel AT91" select GENERIC_GPIO help - This enables support for systems based on the Atmel AT91RM9200 - and AT91SAM9xxx processors. + This enables support for systems based on the Atmel AT91RM9200, + AT91SAM9 and AT91CAP9 processors. config ARCH_CLPS7500 bool "Cirrus CL-PS7500FE" @@ -217,6 +217,7 @@ config ARCH_EP93XX bool "EP93xx-based" select ARM_AMBA select ARM_VIC + select GENERIC_GPIO help This enables support for the Cirrus EP93xx series of CPUs. @@ -333,6 +334,16 @@ config ARCH_MXC help Support for Freescale MXC/iMX-based family of processors +config ARCH_ORION + bool "Marvell Orion" + depends on MMU + select PCI + select GENERIC_GPIO + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + help + Support for Marvell Orion System on Chip family. + config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" help @@ -345,6 +356,7 @@ config ARCH_PXA select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS + select TICK_ONESHOT help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. @@ -366,6 +378,7 @@ config ARCH_SA1100 select ARCH_DISCONTIGMEM_ENABLE select ARCH_MTD_XIP select GENERIC_GPIO + select GENERIC_TIME help Support for StrongARM 11x0 based boards. @@ -409,6 +422,17 @@ config ARCH_OMAP help Support for TI's OMAP platform (OMAP1 and OMAP2). +config ARCH_MSM7X00A + bool "Qualcomm MSM7X00A" + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + help + Support for Qualcomm MSM7X00A based systems. This runs on the ARM11 + apps processor of the MSM7X00A and depends on a shared memory + interface to the ARM9 modem processor which runs the baseband stack + and controls some vital subsystems (clock and power control, etc). + <http://www.cdmatech.com/products/msm7200_chipset_solution.jsp> + endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -441,6 +465,8 @@ source "arch/arm/mach-omap1/Kconfig" source "arch/arm/mach-omap2/Kconfig" +source "arch/arm/mach-orion/Kconfig" + source "arch/arm/plat-s3c24xx/Kconfig" source "arch/arm/plat-s3c/Kconfig" @@ -477,6 +503,8 @@ source "arch/arm/mach-davinci/Kconfig" source "arch/arm/mach-ks8695/Kconfig" +source "arch/arm/mach-msm/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool @@ -657,6 +685,7 @@ config HZ default 128 if ARCH_L7200 default 200 if ARCH_EBSA110 || ARCH_S3C2410 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER + default AT91_TIMER_HZ if ARCH_AT91 default 100 config AEABI @@ -716,7 +745,7 @@ config LEDS ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \ - ARCH_KS8695 + ARCH_KS8695 || MACH_RD88F5182 help If you say Y here, the LEDs on your machine will be used to provide useful information about your current system status. @@ -867,7 +896,7 @@ config KEXEC endmenu -if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX ) +if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA) menu "CPU Frequency scaling" @@ -903,6 +932,12 @@ config CPU_FREQ_IMX If in doubt, say N. +config CPU_FREQ_PXA + bool + depends on CPU_FREQ && ARCH_PXA && PXA25x + default y + select CPU_FREQ_DEFAULT_GOV_USERSPACE + endmenu endif @@ -951,7 +986,7 @@ config FPE_FASTFPE config VFP bool "VFP-format floating point maths" - depends on CPU_V6 || CPU_ARM926T + depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON help Say Y to include VFP support code in the kernel. This is needed if your hardware includes a VFP unit. @@ -961,6 +996,18 @@ config VFP Say N if your target does not have VFP hardware. +config VFPv3 + bool + depends on VFP + default y if CPU_V7 + +config NEON + bool "Advanced SIMD (NEON) Extension support" + depends on VFPv3 && CPU_V7 + help + Say Y to include support code for NEON, the ARMv7 Advanced SIMD + Extension. + endmenu menu "Userspace binary formats" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 18101f5f5f24..192ee01a9ba2 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -43,6 +43,12 @@ config DEBUG_ERRORS you are concerned with the code size or don't want to see these messages. +config DEBUG_STACK_USAGE + bool "Enable stack utilization instrumentation" + depends on DEBUG_KERNEL + help + Enables the display of the minimum amount of free stack which each + task has ever had available in the sysrq-T output. # These options are only for real kernel hackers who want to get their hands dirty. config DEBUG_LL diff --git a/arch/arm/Kconfig.instrumentation b/arch/arm/Kconfig.instrumentation index 63b8c6d5606a..453ad8e15d69 100644 --- a/arch/arm/Kconfig.instrumentation +++ b/arch/arm/Kconfig.instrumentation @@ -43,6 +43,16 @@ config OPROFILE_MPCORE config OPROFILE_ARM11_CORE bool +config KPROBES + bool "Kprobes" + depends on KALLSYMS && MODULES && !UML && !XIP_KERNEL + help + Kprobes allows you to trap at almost any kernel address and + execute a callback function. register_kprobe() establishes + a probepoint and specifies the callback. Kprobes is useful + for kernel debugging, non-intrusive instrumentation and testing. + If in doubt, say "N". + config MARKERS bool "Activate markers" help diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 35e56c99ad1d..7b8ff66febe1 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -139,6 +139,8 @@ endif machine-$(CONFIG_ARCH_KS8695) := ks8695 incdir-$(CONFIG_ARCH_MXC) := mxc machine-$(CONFIG_ARCH_MX3) := mx3 + machine-$(CONFIG_ARCH_ORION) := orion + machine-$(CONFIG_ARCH_MSM7X00A) := msm ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 5fde99f9d9f9..de9d9ee50958 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -44,10 +44,6 @@ ifeq ($(CONFIG_PXA_SHARPSL),y) OBJS += head-sharpsl.o endif -ifeq ($(CONFIG_ARCH_AT91RM9200),y) -OBJS += head-at91rm9200.o -endif - ifeq ($(CONFIG_CPU_BIG_ENDIAN),y) ifeq ($(CONFIG_CPU_CP15),y) OBJS += big-endian.o diff --git a/arch/arm/boot/compressed/head-at91rm9200.S b/arch/arm/boot/compressed/head-at91rm9200.S deleted file mode 100644 index 11782ccd93a1..000000000000 --- a/arch/arm/boot/compressed/head-at91rm9200.S +++ /dev/null @@ -1,81 +0,0 @@ -/* - * linux/arch/arm/boot/compressed/head-at91rm9200.S - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ -#include <asm/mach-types.h> - - .section ".start", "ax" - - @ Atmel AT91RM9200-DK : 262 - mov r3, #(MACH_TYPE_AT91RM9200DK & 0xff) - orr r3, r3, #(MACH_TYPE_AT91RM9200DK & 0xff00) - cmp r7, r3 - beq 99f - - @ Cogent CSB337 : 399 - mov r3, #(MACH_TYPE_CSB337 & 0xff) - orr r3, r3, #(MACH_TYPE_CSB337 & 0xff00) - cmp r7, r3 - beq 99f - - @ Cogent CSB637 : 648 - mov r3, #(MACH_TYPE_CSB637 & 0xff) - orr r3, r3, #(MACH_TYPE_CSB637 & 0xff00) - cmp r7, r3 - beq 99f - - @ Atmel AT91RM9200-EK : 705 - mov r3, #(MACH_TYPE_AT91RM9200EK & 0xff) - orr r3, r3, #(MACH_TYPE_AT91RM9200EK & 0xff00) - cmp r7, r3 - beq 99f - - @ Conitec Carmeva : 769 - mov r3, #(MACH_TYPE_CARMEVA & 0xff) - orr r3, r3, #(MACH_TYPE_CARMEVA & 0xff00) - cmp r7, r3 - beq 99f - - @ KwikByte KB920x : 612 - mov r3, #(MACH_TYPE_KB9200 & 0xff) - orr r3, r3, #(MACH_TYPE_KB9200 & 0xff00) - cmp r7, r3 - beq 99f - - @ Embest ATEB9200 : 923 - mov r3, #(MACH_TYPE_ATEB9200 & 0xff) - orr r3, r3, #(MACH_TYPE_ATEB9200 & 0xff00) - cmp r7, r3 - beq 99f - - @ Sperry-Sun KAFA : 662 - mov r3, #(MACH_TYPE_KAFA & 0xff) - orr r3, r3, #(MACH_TYPE_KAFA & 0xff00) - cmp r7, r3 - beq 99f - - @ picotux 200 : 963 - mov r3, #(MACH_TYPE_PICOTUX2XX & 0xff) - orr r3, r3, #(MACH_TYPE_PICOTUX2XX & 0xff00) - cmp r7, r3 - beq 99f - - @ Ajeco 1ARM : 1075 - mov r3, #(MACH_TYPE_ONEARM & 0xff) - orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00) - cmp r7, r3 - beq 99f - - @ Unknown board, use the AT91RM9200DK board - @ mov r7, #MACH_TYPE_AT91RM9200 - mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff) - orr r7, r7, #(MACH_TYPE_AT91RM9200DK & 0xff00) - -99: diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 5cac46a19bb7..3c2c8f2a1dc4 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -623,6 +623,12 @@ proc_types: b __armv4_mmu_cache_off b __armv4_mmu_cache_flush + .word 0x56055310 @ Feroceon + .word 0xfffffff0 + b __armv4_mmu_cache_on + b __armv4_mmu_cache_off + b __armv5tej_mmu_cache_flush + @ These match on the architecture ID .word 0x00020000 @ ARMv4T @@ -641,7 +647,7 @@ proc_types: .word 0x000f0000 b __armv4_mmu_cache_on b __armv4_mmu_cache_off - b __armv4_mmu_cache_flush + b __armv5tej_mmu_cache_flush .word 0x0007b000 @ ARMv6 .word 0x000ff000 @@ -821,6 +827,13 @@ iflush: mcr p15, 0, r10, c7, c10, 4 @ drain WB mov pc, lr +__armv5tej_mmu_cache_flush: +1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache + bne 1b + mcr p15, 0, r0, c7, c5, 0 @ flush I cache + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + __armv4_mmu_cache_flush: mov r2, #64*1024 @ default: 32K dcache size (*2) mov r11, #32 @ default: 32 byte line size diff --git a/arch/arm/common/rtctime.c b/arch/arm/common/rtctime.c index bf1075e1f571..f53bca46e23c 100644 --- a/arch/arm/common/rtctime.c +++ b/arch/arm/common/rtctime.c @@ -20,7 +20,6 @@ #include <linux/capability.h> #include <linux/device.h> #include <linux/mutex.h> -#include <linux/rtc.h> #include <asm/rtc.h> #include <asm/semaphore.h> diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9adk_defconfig new file mode 100644 index 000000000000..e32e73648129 --- /dev/null +++ b/arch/arm/configs/at91cap9adk_defconfig @@ -0,0 +1,1143 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24-rc8 +# Wed Jan 23 22:55:57 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +# CONFIG_GENERIC_TIME is not set +# CONFIG_GENERIC_CLOCKEVENTS is not set +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +# CONFIG_ARCH_AT91SAM9260 is not set +# CONFIG_ARCH_AT91SAM9261 is not set +# CONFIG_ARCH_AT91SAM9263 is not set +# CONFIG_ARCH_AT91SAM9RL is not set +CONFIG_ARCH_AT91CAP9=y +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91CAP9 Board Type +# +CONFIG_MACH_AT91CAP9ADK=y + +# +# AT91 Board Options +# +CONFIG_MTD_AT91_DATAFLASH_CARD=y +# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set + +# +# AT91 Feature Selections +# +CONFIG_AT91_PROGRAMMABLE_CLOCKS=y +CONFIG_AT91_TIMER_HZ=100 + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_PREEMPT is not set +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +CONFIG_LEDS_CPU=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_AT91=y +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ATMEL_SSC=y + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_ATMEL=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +CONFIG_LOGO_LINUX_VGA16=y +# CONFIG_LOGO_LINUX_CLUT224 is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_AT91=y +# CONFIG_MMC_SPI is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +CONFIG_INSTRUMENTATION=y +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/colibri_defconfig b/arch/arm/configs/colibri_defconfig new file mode 100644 index 000000000000..c3e3418ed4fe --- /dev/null +++ b/arch/arm/configs/colibri_defconfig @@ -0,0 +1,1481 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24-rc3 +# Mon Dec 3 13:36:09 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +CONFIG_LBD=y +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_LSF=y +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +CONFIG_MACH_COLIBRI=y +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_ARMCORE is not set +CONFIG_PXA27x=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_UP_POSSIBLE=y +CONFIG_SUSPEND=y +# CONFIG_APM_EMULATION is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IP_VS is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NF_CONNTRACK_ENABLED is not set +# CONFIG_NF_CONNTRACK is not set +# CONFIG_NETFILTER_XTABLES is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_QUEUE=m +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +CONFIG_VLAN_8021Q=m +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRCOMM=m +CONFIG_IRDA_ULTRA=y + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +# CONFIG_DONGLE is not set +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set + +# +# Old SIR device drivers +# +# CONFIG_IRPORT_SIR is not set + +# +# Old Serial dongle support +# + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_SIGMATEL_FIR is not set +# CONFIG_PXA_FICP is not set +# CONFIG_MCS_FIR is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIUSB is not set +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +CONFIG_CFG80211=y +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=y +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +CONFIG_IEEE80211_SOFTMAC=m +# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_NOSWAP is not set +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +CONFIG_MTD_CFI_LE_BYTE_SWAP=y +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +CONFIG_MTD_PXA2XX=y +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +CONFIG_MTD_BLOCK2MTD=y + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_H1900 is not set +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_NAND_DISKONCHIP=y +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000 +CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y +CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y +# CONFIG_MTD_NAND_SHARPSL is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_ONENAND=y +# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set +# CONFIG_MTD_ONENAND_GENERIC is not set +# CONFIG_MTD_ONENAND_OTP is not set +# CONFIG_MTD_ONENAND_2X_PROGRAM is not set +# CONFIG_MTD_ONENAND_SIM is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=y +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=8 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +CONFIG_IDE=y +CONFIG_IDE_MAX_HWIFS=4 +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +# CONFIG_BLK_DEV_PLATFORM is not set +# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +CONFIG_IDE_ARCH_OBSOLETE_INIT=y +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +CONFIG_DM9000=y +# CONFIG_SMC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y +# CONFIG_LIBERTAS is not set +# CONFIG_USB_ZD1201 is not set +CONFIG_HOSTAP=y +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +# CONFIG_ZD1211RW is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=m +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_PXA27x is not set +# CONFIG_KEYBOARD_GPIO is not set +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_SERIAL=m +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_UCB1400=y +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_PXA is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_SA1100_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_MBX is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_AC97_BUS=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_PERSIST is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_PXA is not set +CONFIG_NEW_LEDS=y +# CONFIG_LEDS_CLASS is not set + +# +# LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +# CONFIG_LEDS_TRIGGER_IDE_DISK is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +CONFIG_RTC_DRV_PCF8583=m +# CONFIG_RTC_DRV_M41T80 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_SA1100 is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=1 +CONFIG_JFFS2_FS_WRITEBUFFER=y +CONFIG_JFFS2_FS_WBUF_VERIFY=y +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-15" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set +CONFIG_INSTRUMENTATION=y +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +# CONFIG_SECURITY_NETWORK is not set +CONFIG_SECURITY_CAPABILITIES=y +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_DEC16=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig index 970c8c772eb7..4264e273202d 100644 --- a/arch/arm/configs/collie_defconfig +++ b/arch/arm/configs/collie_defconfig @@ -367,7 +367,6 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set -CONFIG_MTD_OBSOLETE_CHIPS=y CONFIG_MTD_SHARP=y # CONFIG_MTD_XIP is not set diff --git a/arch/arm/configs/eseries_pxa_defconfig b/arch/arm/configs/eseries_pxa_defconfig new file mode 100644 index 000000000000..ed487b90dbed --- /dev/null +++ b/arch/arm/configs/eseries_pxa_defconfig @@ -0,0 +1,1499 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.21-hh17 +# Fri Nov 9 20:23:03 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_BOARD_IRQ_MAP_SMALL is not set +CONFIG_BOARD_IRQ_MAP_BIG=y +CONFIG_DMABOUNCE=y + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +CONFIG_TOSHIBA_TMIO_OHCI=y +CONFIG_ARCH_ESERIES=y +CONFIG_MACH_E330=y +CONFIG_MACH_E740=y +CONFIG_MACH_E750=y +CONFIG_MACH_E400=y +CONFIG_MACH_E800=y +CONFIG_E330_LCD=y +CONFIG_E740_LCD=y +CONFIG_E750_LCD=y +CONFIG_E400_LCD=y +CONFIG_E800_LCD=y +CONFIG_ESERIES_UDC=y +CONFIG_E330_TC6387XB=y +CONFIG_E740_T7L66XB=y +CONFIG_E400_T7L66XB=y +CONFIG_E750_E800_TC6393XB=y +CONFIG_E740_PCMCIA=m +CONFIG_E750_PCMCIA=m +CONFIG_E800_PCMCIA=m +# CONFIG_MACH_A620 is not set +# CONFIG_MACH_A716 is not set +# CONFIG_MACH_A730 is not set +# CONFIG_ARCH_H1900 is not set +# CONFIG_ARCH_H2200 is not set +# CONFIG_MACH_H3900 is not set +# CONFIG_MACH_H4000 is not set +# CONFIG_MACH_H4700 is not set +# CONFIG_MACH_HX2750 is not set +# CONFIG_ARCH_H5400 is not set +# CONFIG_MACH_HIMALAYA is not set +# CONFIG_MACH_HTCUNIVERSAL is not set +# CONFIG_MACH_HTCALPINE is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_HTCAPACHE is not set +# CONFIG_MACH_BLUEANGEL is not set + +# +# HTC_HW6X00 +# +# CONFIG_MACH_HTCBEETLES is not set +# CONFIG_MACH_HW6900 is not set +# CONFIG_MACH_HTCATHENA is not set +# CONFIG_ARCH_AXIMX3 is not set +# CONFIG_ARCH_AXIMX5 is not set +# CONFIG_MACH_X50 is not set +# CONFIG_ARCH_ROVERP1 is not set +# CONFIG_ARCH_ROVERP5P is not set +# CONFIG_MACH_XSCALE_PALMLD is not set +# CONFIG_MACH_T3XSCALE is not set +# CONFIG_MACH_RECON is not set +# CONFIG_MACH_GHI270HG is not set +# CONFIG_MACH_GHI270 is not set +# CONFIG_MACH_LOOXC550 is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_MACH_TRIZEPS4 is not set +CONFIG_PXA25x=y + +# +# Linux As Bootloader +# +# CONFIG_LAB is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_PCMCIA_PXA2XX=m + +# +# Kernel Features +# +# CONFIG_PREEMPT is not set +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +# CONFIG_TXTOFFSET_DELTA is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +CONFIG_PM=y +CONFIG_PM_LEGACY=y +# CONFIG_PM_DEBUG is not set +# CONFIG_DPM_DEBUG is not set +# CONFIG_PM_SYSFS_DEPRECATED is not set +# CONFIG_APM_EMULATION is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +# CONFIG_PACKET is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +# CONFIG_IEEE80211_CRYPT_CCMP is not set +# CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_IEEE80211_SOFTMAC is not set +CONFIG_WIRELESS_EXT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +# CONFIG_STANDALONE is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=m +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=m +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=m +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_H1900 is not set +CONFIG_MTD_NAND_IDS=m +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_SHARPSL is not set +# CONFIG_MTD_NAND_NANDSIM is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=6144 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=m +CONFIG_IDE_MAX_HWIFS=4 +CONFIG_BLK_DEV_IDE=m + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=m +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +# CONFIG_BLK_DEV_SD is not set +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set + +# +# PCMCIA SCSI adapter support +# +# CONFIG_PCMCIA_AHA152X is not set +# CONFIG_PCMCIA_FDOMAIN is not set +# CONFIG_PCMCIA_NINJA_SCSI is not set +# CONFIG_PCMCIA_QLOGIC is not set +# CONFIG_PCMCIA_SYM53C500 is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_NET_WIRELESS_RTNETLINK is not set + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set +# CONFIG_PCMCIA_WAVELAN is not set +# CONFIG_PCMCIA_NETWAVE is not set + +# +# Wireless 802.11 Frequency Hopping cards support +# +# CONFIG_PCMCIA_RAYCS is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Wireless 802.11b Pcmcia/Cardbus cards support +# +# CONFIG_AIRO_CS is not set +# CONFIG_PCMCIA_WL3501 is not set +# CONFIG_USB_ZD1201 is not set +CONFIG_HOSTAP=m +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_HOSTAP_CS is not set +# CONFIG_ACX is not set +CONFIG_NET_WIRELESS=y + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_TSDEV=m +CONFIG_INPUT_TSDEV_SCREEN_X=240 +CONFIG_INPUT_TSDEV_SCREEN_Y=320 +CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_LED_TRIGGER is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TOUCHSCREEN_WM9705=y +CONFIG_TOUCHSCREEN_WM9712=y +CONFIG_TOUCHSCREEN_WM9713=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_PXA is not set +# CONFIG_RS232_SERIAL is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +CONFIG_HW_RANDOM=m +# CONFIG_NVRAM is not set +# CONFIG_SA1100_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_TIHTC is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set +# CONFIG_POWER_SUPPLY is not set + +# +# L3 serial bus support +# +# CONFIG_L3 is not set + +# +# Misc devices +# + +# +# Multimedia Capabilities Port drivers +# +# CONFIG_ADC is not set + +# +# Compaq/iPAQ Drivers +# + +# +# Compaq/HP iPAQ Drivers +# +# CONFIG_IPAQ_SLEEVE is not set +# CONFIG_SLEEVE_DEBUG is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_ASIC2 is not set +# CONFIG_HTC_ASIC3 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_BBKEYS is not set +# CONFIG_HTC_ASIC3_DS1WM is not set +# CONFIG_SOC_SAMCOP is not set +# CONFIG_SOC_HAMCOP is not set +# CONFIG_SOC_MQ11XX is not set +CONFIG_SOC_T7L66XB=y +# CONFIG_SOC_TC6387XB is not set +CONFIG_SOC_TC6393XB=y +# CONFIG_SOC_TSC2101 is not set +# CONFIG_SOC_TSC2200 is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_BACKLIGHT_CORGI=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_IMAGEON is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_MBX is not set +CONFIG_FB_W100=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_VSFB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +CONFIG_FONT_ACORN_8x8=y +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set + +# +# Logo configuration +# +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_PXA2XX_AC97 is not set +# CONFIG_SND_RECON is not set + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# SoC audio support +# +CONFIG_SND_SOC_AC97_BUS=y +CONFIG_SND_SOC=m + +# +# SoC Platforms +# + +# +# SoC Audio for the Atmel AT91 +# + +# +# SoC Audio for the Intel PXA2xx +# +CONFIG_SND_PXA2XX_SOC=m +CONFIG_SND_PXA2XX_SOC_AC97=m +CONFIG_SND_PXA2XX_SOC_E740_WM9705=m +CONFIG_SND_PXA2XX_SOC_E750_WM9705=m +CONFIG_SND_PXA2XX_SOC_E800_WM9712=m +# CONFIG_SND_PXA2XX_SOC_MAGICIAN is not set +# CONFIG_SND_PXA2XX_SOC_BLUEANGEL is not set +# CONFIG_SND_PXA2XX_SOC_H5000 is not set + +# +# SoC Audio for the Freescale i.MX +# + +# +# SoC Audio for the Samsung S3C24XX +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8772 is not set +# CONFIG_SND_SOC_WM8971 is not set +# CONFIG_SND_SOC_WM8956 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8976 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8980 is not set +CONFIG_SND_SOC_WM9705=m +# CONFIG_SND_SOC_WM9713 is not set +CONFIG_SND_SOC_WM9712=m +# CONFIG_SND_SOC_UDA1380 is not set +# CONFIG_SND_SOC_AK4535 is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m + +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=m +CONFIG_USB_DEBUG=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DYNAMIC_MINORS=y +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_GTCO is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +CONFIG_USB_GADGET_PXA2XX=y +CONFIG_USB_PXA2XX=y +# CONFIG_USB_PXA2XX_SMALL is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_MQ11XX is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +# CONFIG_USB_ETH_RNDIS is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_CHAR is not set +# CONFIG_USB_PXA2XX_GPIO is not set + +# +# MMC/SD Card support +# +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=y +# CONFIG_MMC_PXA is not set +CONFIG_MMC_TMIO=y +# CONFIG_MMC_SAMCOP is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_DEFLATE=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/arch/arm/configs/iop13xx_defconfig b/arch/arm/configs/iop13xx_defconfig index add03c9e5553..988b4d13e76f 100644 --- a/arch/arm/configs/iop13xx_defconfig +++ b/arch/arm/configs/iop13xx_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22 -# Thu Jul 19 15:57:52 2007 +# Linux kernel version: 2.6.24-rc5 +# Wed Dec 12 16:11:03 2007 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -26,15 +26,11 @@ CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SWAP=y @@ -45,10 +41,15 @@ CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set # CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y @@ -69,7 +70,6 @@ CONFIG_FUTEX=y CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y @@ -130,6 +130,7 @@ CONFIG_ARCH_IOP13XX=y # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_KS8695 is not set # CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set # CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set @@ -151,9 +152,12 @@ CONFIG_MACH_IQ81340SC=y CONFIG_MACH_IQ81340MC=y # -# IOP13XX IMU Support +# Boot options +# + +# +# Power management # -# CONFIG_IOP_IMU is not set CONFIG_PLAT_IOP=y # @@ -185,10 +189,7 @@ CONFIG_PCI=y CONFIG_PCI_SYSCALL=y CONFIG_ARCH_SUPPORTS_MSI=y # CONFIG_PCI_MSI is not set - -# -# PCCARD (PCMCIA/CardBus) support -# +CONFIG_PCI_LEGACY=y # CONFIG_PCCARD is not set # @@ -207,6 +208,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=1 @@ -246,6 +248,7 @@ CONFIG_BINFMT_AOUT=y # Power management options # # CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y # # Networking @@ -285,6 +288,7 @@ CONFIG_IP_PNP_BOOTP=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set @@ -324,10 +328,6 @@ CONFIG_IPV6=y # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set # @@ -356,6 +356,7 @@ CONFIG_IPV6=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set @@ -383,6 +384,7 @@ CONFIG_MTD_BLOCK=y # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -423,6 +425,7 @@ CONFIG_MTD_PHYSMAP_START=0xfa000000 CONFIG_MTD_PHYSMAP_LEN=0x0 CONFIG_MTD_PHYSMAP_BANKWIDTH=2 # CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # @@ -463,6 +466,11 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set # # SCSI device support @@ -499,12 +507,9 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set CONFIG_SCSI_ISCSI_ATTRS=y -CONFIG_SCSI_SAS_ATTRS=y # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_3W_9XXX is not set @@ -515,6 +520,7 @@ CONFIG_SCSI_SAS_ATTRS=y # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set # CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set @@ -555,14 +561,8 @@ CONFIG_BLK_DEV_DM=y # CONFIG_DM_ZERO is not set # CONFIG_DM_MULTIPATH is not set # CONFIG_DM_DELAY is not set - -# -# Fusion MPT device support -# +# CONFIG_DM_UEVENT is not set # CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set # # IEEE 1394 (FireWire) support @@ -577,6 +577,8 @@ CONFIG_NETDEVICES=y # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_IP1000 is not set # CONFIG_ARCNET is not set # CONFIG_NET_ETHERNET is not set CONFIG_NETDEV_1000=y @@ -585,6 +587,7 @@ CONFIG_NETDEV_1000=y CONFIG_E1000=y CONFIG_E1000_NAPI=y # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set @@ -592,6 +595,7 @@ CONFIG_E1000_NAPI=y # CONFIG_SIS190 is not set # CONFIG_SKGE is not set # CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set # CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set @@ -600,11 +604,14 @@ CONFIG_E1000_NAPI=y CONFIG_NETDEV_10000=y # CONFIG_CHELSIO_T1 is not set # CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set # CONFIG_IXGB is not set # CONFIG_S2IO is not set # CONFIG_MYRI10GE is not set # CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set # CONFIG_MLX4_CORE is not set +# CONFIG_TEHUTI is not set # CONFIG_TR is not set # @@ -639,7 +646,6 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set @@ -688,12 +694,10 @@ CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=y # CONFIG_NVRAM is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -# CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y @@ -758,9 +762,9 @@ CONFIG_I2C_IOP3XX=y # CONFIG_SPI is not set # CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set @@ -768,12 +772,13 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set @@ -787,14 +792,17 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set @@ -806,29 +814,18 @@ CONFIG_HWMON=y # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set +# CONFIG_WATCHDOG is not set # -# LED drivers +# Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# LED Triggers +# Multifunction device drivers # +# CONFIG_MFD_SM501 is not set # # Multimedia devices @@ -840,14 +837,16 @@ CONFIG_DAB=y # # Graphics support # +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_VGASTATE is not set -# CONFIG_FB is not set # # Console display driver support @@ -862,6 +861,7 @@ CONFIG_DUMMY_CONSOLE=y CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y @@ -877,16 +877,15 @@ CONFIG_USB_ARCH_HAS_EHCI=y # # CONFIG_USB_GADGET is not set # CONFIG_MMC is not set - -# -# Real Time Clock -# +# CONFIG_NEW_LEDS is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set +CONFIG_DMADEVICES=y # -# DMA Engine support +# DMA Devices # +CONFIG_INTEL_IOP_ADMA=y CONFIG_DMA_ENGINE=y # @@ -895,12 +894,6 @@ CONFIG_DMA_ENGINE=y # CONFIG_NET_DMA is not set # -# DMA Devices -# -# CONFIG_INTEL_IOATDMA is not set -CONFIG_INTEL_IOP_ADMA=y - -# # File systems # CONFIG_EXT2_FS=y @@ -912,7 +905,6 @@ CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set @@ -952,7 +944,6 @@ CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -969,10 +960,12 @@ CONFIG_ECRYPT_FS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set # CONFIG_JFFS2_SUMMARY is not set # CONFIG_JFFS2_FS_XATTR is not set # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y @@ -981,10 +974,7 @@ CONFIG_CRAMFS=y # CONFIG_QNX4FS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set @@ -1037,10 +1027,6 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set # CONFIG_SYSV68_PARTITION is not set - -# -# Native Language Support -# CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" # CONFIG_NLS_CODEPAGE_437 is not set @@ -1081,21 +1067,16 @@ CONFIG_NLS_DEFAULT="iso8859-1" # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_UTF8 is not set - -# -# Distributed Lock Manager -# # CONFIG_DLM is not set - -# -# Profiling support -# +CONFIG_INSTRUMENTATION=y # CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y # CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set @@ -1104,6 +1085,7 @@ CONFIG_ENABLE_MUST_CHECK=y # CONFIG_DEBUG_KERNEL is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set CONFIG_DEBUG_USER=y # @@ -1112,6 +1094,7 @@ CONFIG_DEBUG_USER=y CONFIG_KEYS=y CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_XOR_BLOCKS=y CONFIG_ASYNC_CORE=y CONFIG_ASYNC_MEMCPY=y @@ -1136,6 +1119,7 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_LRW=y +# CONFIG_CRYPTO_XTS is not set # CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set @@ -1150,11 +1134,13 @@ CONFIG_CRYPTO_TEA=y CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_KHAZAD=y CONFIG_CRYPTO_ANUBIS=y +# CONFIG_CRYPTO_SEED is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set CONFIG_CRYPTO_HW=y # diff --git a/arch/arm/configs/iop32x_defconfig b/arch/arm/configs/iop32x_defconfig index 027aef22b4d1..83f40d4041a6 100644 --- a/arch/arm/configs/iop32x_defconfig +++ b/arch/arm/configs/iop32x_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22 -# Thu Jul 19 16:00:36 2007 +# Linux kernel version: 2.6.24-rc5 +# Wed Dec 12 15:49:08 2007 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -26,15 +26,11 @@ CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y @@ -45,9 +41,14 @@ CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set # CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y @@ -69,7 +70,6 @@ CONFIG_FUTEX=y CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y @@ -130,6 +130,7 @@ CONFIG_ARCH_IOP32X=y # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_KS8695 is not set # CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set # CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set @@ -153,6 +154,15 @@ CONFIG_ARCH_IQ80321=y CONFIG_ARCH_IQ31244=y CONFIG_MACH_N2100=y CONFIG_IOP3XX_ATU=y +# CONFIG_MACH_EM7210 is not set + +# +# Boot options +# + +# +# Power management +# CONFIG_PLAT_IOP=y # @@ -182,11 +192,8 @@ CONFIG_XSCALE_PMU=y CONFIG_PCI=y CONFIG_PCI_SYSCALL=y # CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y # CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# # CONFIG_PCCARD is not set # @@ -205,6 +212,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=1 @@ -244,6 +252,7 @@ CONFIG_BINFMT_AOUT=y # Power management options # # CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y # # Networking @@ -282,6 +291,7 @@ CONFIG_IP_PNP_BOOTP=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set @@ -321,10 +331,6 @@ CONFIG_IPV6=y # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set # @@ -353,6 +359,7 @@ CONFIG_IPV6=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set @@ -382,6 +389,7 @@ CONFIG_MTD_BLOCK=y # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -417,6 +425,7 @@ CONFIG_MTD_PHYSMAP_START=0x0 CONFIG_MTD_PHYSMAP_LEN=0x0 CONFIG_MTD_PHYSMAP_BANKWIDTH=1 # CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # @@ -459,6 +468,11 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set # CONFIG_IDE is not set # @@ -496,12 +510,9 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_3W_9XXX is not set @@ -512,6 +523,7 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set # CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set @@ -576,6 +588,7 @@ CONFIG_SATA_VITESSE=y # CONFIG_PATA_OLDPIIX is not set # CONFIG_PATA_NETCELL is not set # CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set # CONFIG_PATA_PDC_OLD is not set @@ -606,14 +619,8 @@ CONFIG_BLK_DEV_DM=y # CONFIG_DM_ZERO is not set # CONFIG_DM_MULTIPATH is not set # CONFIG_DM_DELAY is not set - -# -# Fusion MPT device support -# +# CONFIG_DM_UEVENT is not set # CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set # # IEEE 1394 (FireWire) support @@ -628,6 +635,8 @@ CONFIG_NETDEVICES=y # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_IP1000 is not set # CONFIG_ARCNET is not set # CONFIG_PHYLIB is not set CONFIG_NET_ETHERNET=y @@ -641,13 +650,16 @@ CONFIG_MII=y # CONFIG_DM9000 is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_B44 is not set # CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set # CONFIG_EEPRO100 is not set CONFIG_E100=y # CONFIG_FEALNX is not set @@ -667,6 +679,7 @@ CONFIG_NETDEV_1000=y CONFIG_E1000=y CONFIG_E1000_NAPI=y # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set @@ -675,6 +688,7 @@ CONFIG_R8169=y # CONFIG_SIS190 is not set # CONFIG_SKGE is not set # CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set # CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set @@ -683,11 +697,14 @@ CONFIG_R8169=y CONFIG_NETDEV_10000=y # CONFIG_CHELSIO_T1 is not set # CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set # CONFIG_IXGB is not set # CONFIG_S2IO is not set # CONFIG_MYRI10GE is not set # CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set # CONFIG_MLX4_CORE is not set +# CONFIG_TEHUTI is not set # CONFIG_TR is not set # @@ -703,7 +720,6 @@ CONFIG_NETDEV_10000=y # CONFIG_USB_KAWETH is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set # CONFIG_USB_USBNET is not set # CONFIG_WAN is not set # CONFIG_FDDI is not set @@ -732,7 +748,6 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set @@ -781,12 +796,10 @@ CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=y # CONFIG_NVRAM is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -# CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y @@ -852,9 +865,9 @@ CONFIG_I2C_IOP3XX=y # CONFIG_SPI is not set # CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set @@ -862,12 +875,13 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set @@ -881,14 +895,17 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set @@ -900,29 +917,18 @@ CONFIG_HWMON=y # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set +# CONFIG_WATCHDOG is not set # -# LED drivers +# Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# LED Triggers +# Multifunction device drivers # +# CONFIG_MFD_SM501 is not set # # Multimedia devices @@ -935,14 +941,16 @@ CONFIG_DAB=y # # Graphics support # +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_VGASTATE is not set -# CONFIG_FB is not set # # Console display driver support @@ -957,6 +965,7 @@ CONFIG_DUMMY_CONSOLE=y CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set # # USB Input Devices @@ -1013,6 +1022,7 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set # CONFIG_USB_STORAGE_DPCM is not set # CONFIG_USB_STORAGE_USBAT is not set # CONFIG_USB_STORAGE_SDDR09 is not set @@ -1070,28 +1080,66 @@ CONFIG_USB_MON=y # # CONFIG_USB_GADGET is not set # CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set # -# Real Time Clock +# RTC interfaces # -CONFIG_RTC_LIB=y -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set # -# DMA Engine support +# I2C RTC drivers # -CONFIG_DMA_ENGINE=y +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RS5C372=y +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set # -# DMA Clients +# SPI RTC drivers # -CONFIG_NET_DMA=y + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_DMADEVICES=y # # DMA Devices # -# CONFIG_INTEL_IOATDMA is not set CONFIG_INTEL_IOP_ADMA=y +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +CONFIG_NET_DMA=y # # File systems @@ -1105,7 +1153,6 @@ CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set @@ -1145,7 +1192,6 @@ CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -1162,10 +1208,12 @@ CONFIG_ECRYPT_FS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set # CONFIG_JFFS2_SUMMARY is not set # CONFIG_JFFS2_FS_XATTR is not set # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y @@ -1174,10 +1222,7 @@ CONFIG_CRAMFS=y # CONFIG_QNX4FS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set @@ -1224,26 +1269,17 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set # CONFIG_SYSV68_PARTITION is not set - -# -# Native Language Support -# # CONFIG_NLS is not set - -# -# Distributed Lock Manager -# # CONFIG_DLM is not set - -# -# Profiling support -# +CONFIG_INSTRUMENTATION=y # CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set @@ -1270,10 +1306,13 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y # CONFIG_FORCED_INLINING is not set +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set CONFIG_DEBUG_USER=y # CONFIG_DEBUG_ERRORS is not set CONFIG_DEBUG_LL=y @@ -1285,6 +1324,7 @@ CONFIG_DEBUG_LL=y CONFIG_KEYS=y CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_XOR_BLOCKS=y CONFIG_ASYNC_CORE=y CONFIG_ASYNC_MEMCPY=y @@ -1309,6 +1349,7 @@ CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_LRW=y +# CONFIG_CRYPTO_XTS is not set # CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set @@ -1323,11 +1364,13 @@ CONFIG_CRYPTO_TEA=y CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_KHAZAD=y CONFIG_CRYPTO_ANUBIS=y +# CONFIG_CRYPTO_SEED is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set CONFIG_CRYPTO_HW=y # diff --git a/arch/arm/configs/iop33x_defconfig b/arch/arm/configs/iop33x_defconfig index 721ee64a13f7..917afb5ccfac 100644 --- a/arch/arm/configs/iop33x_defconfig +++ b/arch/arm/configs/iop33x_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22 -# Thu Jul 19 16:05:59 2007 +# Linux kernel version: 2.6.24-rc5 +# Wed Dec 12 16:11:27 2007 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -26,15 +26,11 @@ CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y @@ -45,9 +41,14 @@ CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set # CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y @@ -69,7 +70,6 @@ CONFIG_FUTEX=y CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y @@ -130,6 +130,7 @@ CONFIG_ARCH_IOP33X=y # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_KS8695 is not set # CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set # CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set @@ -150,6 +151,14 @@ CONFIG_IOP3XX_ATU=y # CONFIG_ARCH_IQ80331=y CONFIG_MACH_IQ80332=y + +# +# Boot options +# + +# +# Power management +# CONFIG_PLAT_IOP=y # @@ -179,11 +188,8 @@ CONFIG_XSCALE_PMU=y CONFIG_PCI=y CONFIG_PCI_SYSCALL=y # CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y # CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# # CONFIG_PCCARD is not set # @@ -202,6 +208,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=1 @@ -241,6 +248,7 @@ CONFIG_BINFMT_AOUT=y # Power management options # # CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y # # Networking @@ -279,6 +287,7 @@ CONFIG_IP_PNP_BOOTP=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set @@ -318,10 +327,6 @@ CONFIG_IPV6=y # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set # @@ -350,6 +355,7 @@ CONFIG_IPV6=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set @@ -379,6 +385,7 @@ CONFIG_MTD_BLOCK=y # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -419,6 +426,7 @@ CONFIG_MTD_PHYSMAP_START=0x0 CONFIG_MTD_PHYSMAP_LEN=0x0 CONFIG_MTD_PHYSMAP_BANKWIDTH=1 # CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # @@ -459,6 +467,11 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set # CONFIG_IDE is not set # @@ -496,12 +509,9 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_3W_9XXX is not set @@ -512,6 +522,7 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set # CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set @@ -552,14 +563,8 @@ CONFIG_BLK_DEV_DM=y # CONFIG_DM_ZERO is not set # CONFIG_DM_MULTIPATH is not set # CONFIG_DM_DELAY is not set - -# -# Fusion MPT device support -# +# CONFIG_DM_UEVENT is not set # CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set # # IEEE 1394 (FireWire) support @@ -574,6 +579,8 @@ CONFIG_NETDEVICES=y # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_IP1000 is not set # CONFIG_ARCNET is not set # CONFIG_NET_ETHERNET is not set CONFIG_NETDEV_1000=y @@ -582,6 +589,7 @@ CONFIG_NETDEV_1000=y CONFIG_E1000=y CONFIG_E1000_NAPI=y # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set @@ -589,6 +597,7 @@ CONFIG_E1000_NAPI=y # CONFIG_SIS190 is not set # CONFIG_SKGE is not set # CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set # CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set @@ -597,11 +606,14 @@ CONFIG_E1000_NAPI=y CONFIG_NETDEV_10000=y # CONFIG_CHELSIO_T1 is not set # CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set # CONFIG_IXGB is not set # CONFIG_S2IO is not set # CONFIG_MYRI10GE is not set # CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set # CONFIG_MLX4_CORE is not set +# CONFIG_TEHUTI is not set # CONFIG_TR is not set # @@ -636,7 +648,6 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set @@ -685,12 +696,10 @@ CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=y # CONFIG_NVRAM is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -# CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y @@ -755,9 +764,9 @@ CONFIG_I2C_IOP3XX=y # CONFIG_SPI is not set # CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set @@ -765,12 +774,13 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set @@ -784,14 +794,17 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set @@ -803,29 +816,18 @@ CONFIG_HWMON=y # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set +# CONFIG_WATCHDOG is not set # -# LED drivers +# Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# LED Triggers +# Multifunction device drivers # +# CONFIG_MFD_SM501 is not set # # Multimedia devices @@ -837,14 +839,16 @@ CONFIG_DAB=y # # Graphics support # +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_VGASTATE is not set -# CONFIG_FB is not set # # Console display driver support @@ -859,6 +863,7 @@ CONFIG_DUMMY_CONSOLE=y CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y @@ -874,16 +879,15 @@ CONFIG_USB_ARCH_HAS_EHCI=y # # CONFIG_USB_GADGET is not set # CONFIG_MMC is not set - -# -# Real Time Clock -# +# CONFIG_NEW_LEDS is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set +CONFIG_DMADEVICES=y # -# DMA Engine support +# DMA Devices # +CONFIG_INTEL_IOP_ADMA=y CONFIG_DMA_ENGINE=y # @@ -892,12 +896,6 @@ CONFIG_DMA_ENGINE=y CONFIG_NET_DMA=y # -# DMA Devices -# -# CONFIG_INTEL_IOATDMA is not set -CONFIG_INTEL_IOP_ADMA=y - -# # File systems # CONFIG_EXT2_FS=y @@ -909,7 +907,6 @@ CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set @@ -949,7 +946,6 @@ CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -969,10 +965,7 @@ CONFIG_CRAMFS=y # CONFIG_QNX4FS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set @@ -1019,26 +1012,17 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set # CONFIG_SYSV68_PARTITION is not set - -# -# Native Language Support -# # CONFIG_NLS is not set - -# -# Distributed Lock Manager -# # CONFIG_DLM is not set - -# -# Profiling support -# +CONFIG_INSTRUMENTATION=y # CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set @@ -1065,10 +1049,13 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y # CONFIG_FORCED_INLINING is not set +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set CONFIG_DEBUG_USER=y # CONFIG_DEBUG_ERRORS is not set CONFIG_DEBUG_LL=y @@ -1079,6 +1066,7 @@ CONFIG_DEBUG_LL=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_XOR_BLOCKS=y CONFIG_ASYNC_CORE=y CONFIG_ASYNC_MEMCPY=y diff --git a/arch/sh64/configs/harp_defconfig b/arch/arm/configs/littleton_defconfig index ba302cd0c285..1db496908052 100644 --- a/arch/sh64/configs/harp_defconfig +++ b/arch/arm/configs/littleton_defconfig @@ -1,21 +1,29 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.24-rc1 -# Fri Nov 2 14:35:57 2007 -# -CONFIG_SUPERH=y -CONFIG_SUPERH64=y +# Linux kernel version: 2.6.24-rc5 +# Fri Dec 21 11:06:19 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_MMU=y -CONFIG_QUICKLIST=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_NO_IOPORT is not set CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_NO_VIRT_TO_BUS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # @@ -28,11 +36,13 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y -# CONFIG_SYSVIPC is not set -CONFIG_POSIX_MQUEUE=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set # CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 @@ -42,8 +52,9 @@ CONFIG_FAIR_USER_SCHED=y # CONFIG_FAIR_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set -# CONFIG_BLK_DEV_INITRD is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set CONFIG_UID16=y @@ -69,7 +80,12 @@ CONFIG_SLAB=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 -# CONFIG_MODULES is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set @@ -90,54 +106,114 @@ CONFIG_DEFAULT_CFQ=y CONFIG_DEFAULT_IOSCHED="cfq" # -# System type +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# + +# +# Supported PXA3xx Processor Variants +# +CONFIG_CPU_PXA300=y +CONFIG_CPU_PXA310=y +# CONFIG_CPU_PXA320 is not set +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_ZYLONITE is not set +CONFIG_MACH_LITTLETON=y +# CONFIG_MACH_ARMCORE is not set +CONFIG_PXA3xx=y +CONFIG_PXA_SSP=y + +# +# Boot options # -# CONFIG_SH_SIMULATOR is not set -# CONFIG_SH_CAYMAN is not set -CONFIG_SH_HARP=y -CONFIG_CPU_SH5=y -CONFIG_CPU_SUBTYPE_SH5_101=y -# CONFIG_CPU_SUBTYPE_SH5_103 is not set -CONFIG_LITTLE_ENDIAN=y -# CONFIG_BIG_ENDIAN is not set -CONFIG_SH_FPU=y -# CONFIG_SH64_FPU_DENORM_FLUSH is not set -CONFIG_SH64_PGTABLE_2_LEVEL=y -# CONFIG_SH64_PGTABLE_3_LEVEL is not set -CONFIG_HUGETLB_PAGE_SIZE_64K=y -# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set -# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set -CONFIG_SH64_USER_MISALIGNED_FIXUP=y # -# Memory options +# Power management # -CONFIG_CACHED_MEMORY_OFFSET=0x20000000 -CONFIG_MEMORY_START=0x80000000 -CONFIG_MEMORY_SIZE_IN_MB=128 # -# Cache options +# Processor Type # -CONFIG_DCACHE_WRITE_BACK=y -# CONFIG_DCACHE_WRITE_THROUGH is not set -# CONFIG_DCACHE_DISABLED is not set -# CONFIG_ICACHE_DISABLED is not set -CONFIG_PCIDEVICE_MEMORY_START=C0000000 -CONFIG_DEVICE_MEMORY_START=E0000000 -CONFIG_FLASH_MEMORY_START=0x00000000 -CONFIG_PCI_BLOCK_START=0x40000000 +CONFIG_CPU_32=y +CONFIG_CPU_XSC3=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_IO_36=y # -# CPU Subtype specific options +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y + # -CONFIG_SH64_ID2815_WORKAROUND=y +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set # -# Misc options +# Kernel Features # -# CONFIG_SH_DMA is not set +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set @@ -146,24 +222,52 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_NR_QUICK=1 +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y # -# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# Boot options # -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=64M" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set # -# Executable file formats +# Userspace binary formats # CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set # CONFIG_BINFMT_MISC is not set # +# Power management options +# +# CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y + +# # Networking # CONFIG_NET=y @@ -254,69 +358,26 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set +# CONFIG_STANDALONE is not set +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +CONFIG_FW_LOADER=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set # CONFIG_MTD is not set # CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -CONFIG_MISC_DEVICES=y -# CONFIG_EEPROM_93CX6 is not set +# CONFIG_BLK_DEV is not set +# CONFIG_MISC_DEVICES is not set # CONFIG_IDE is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set # CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_DEBUG is not set # CONFIG_ATA is not set # CONFIG_MD is not set CONFIG_NETDEVICES=y @@ -329,17 +390,18 @@ CONFIG_NETDEVICES=y # CONFIG_VETH is not set # CONFIG_PHYLIB is not set CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set -# CONFIG_STNIC is not set -# CONFIG_SMC91X is not set +CONFIG_MII=y +# CONFIG_AX88796 is not set +CONFIG_SMC91X=y +# CONFIG_DM9000 is not set # CONFIG_SMC911X is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_EMAC4 is not set # CONFIG_B44 is not set -CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set # # Wireless LAN @@ -354,7 +416,6 @@ CONFIG_NETDEV_10000=y # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_ISDN is not set -# CONFIG_PHONE is not set # # Input device support @@ -407,16 +468,15 @@ CONFIG_HW_CONSOLE=y # # Non-8250 serial port support # -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=2 -CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_LEGACY_PTYS is not set # CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set # CONFIG_R3964 is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set @@ -429,26 +489,8 @@ CONFIG_HW_RANDOM=y # CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set # # Sonics Silicon Backplane @@ -466,19 +508,19 @@ CONFIG_SSB_POSSIBLE=y # # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set -CONFIG_DAB=y +# CONFIG_DAB is not set # # Graphics support # # CONFIG_VGASTATE is not set -CONFIG_VIDEO_OUTPUT_CONTROL=y +# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y +# CONFIG_FIRMWARE_EDID is not set # CONFIG_FB_DDC is not set -# CONFIG_FB_CFB_FILLRECT is not set -# CONFIG_FB_CFB_COPYAREA is not set -# CONFIG_FB_CFB_IMAGEBLIT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set # CONFIG_FB_SYS_FILLRECT is not set # CONFIG_FB_SYS_COPYAREA is not set @@ -488,13 +530,16 @@ CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set # # Frame buffer hardware drivers # # CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_MBX is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set @@ -506,6 +551,7 @@ CONFIG_FB_MODE_HELPERS=y # # Console display driver support # +# CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set @@ -522,70 +568,38 @@ CONFIG_FONT_8x16=y # CONFIG_FONT_SUN12x22 is not set # CONFIG_FONT_10x18 is not set CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -# CONFIG_LOGO_LINUX_CLUT224 is not set -# CONFIG_LOGO_SUPERH_MONO is not set -# CONFIG_LOGO_SUPERH_VGA16 is not set -CONFIG_LOGO_SUPERH_CLUT224=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y # # Sound # # CONFIG_SOUND is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HID_DEBUG is not set -# CONFIG_HIDRAW is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -# CONFIG_USB_ARCH_HAS_OHCI is not set -# CONFIG_USB_ARCH_HAS_EHCI is not set -# CONFIG_USB is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set # CONFIG_MMC is not set # CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set # -# Userspace I/O -# -# CONFIG_UIO is not set - -# # File systems # -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set # CONFIG_EXT4DEV_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set +CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -CONFIG_MINIX_FS=y -CONFIG_ROMFS_FS=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_INOTIFY is not set # CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y +# CONFIG_DNOTIFY is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -607,13 +621,10 @@ CONFIG_DNOTIFY=y # Pseudo filesystems # CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set # CONFIG_CONFIGFS_FS is not set # @@ -635,17 +646,19 @@ CONFIG_HUGETLB_PAGE=y CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_DIRECTIO=y # CONFIG_NFSD is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y # CONFIG_SUNRPC_BIND34 is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set +CONFIG_RPCSEC_GSS_KRB5=y # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set @@ -656,70 +669,55 @@ CONFIG_SUNRPC=y # # Partition Types # -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set +# CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set # CONFIG_NLS is not set # CONFIG_DLM is not set -CONFIG_INSTRUMENTATION=y -# CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set +# CONFIG_INSTRUMENTATION is not set # # Kernel hacking # -# CONFIG_PRINTK_TIME is not set +CONFIG_PRINTK_TIME=y CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set CONFIG_DETECT_SOFTLOCKUP=y CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y +# CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set # CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_PREEMPT is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set +CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y CONFIG_FORCED_INLINING=y # CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set # CONFIG_FAULT_INJECTION is not set # CONFIG_SAMPLES is not set -# CONFIG_EARLY_PRINTK is not set -CONFIG_SH64_PROC_TLB=y -CONFIG_SH64_PROC_ASIDS=y -CONFIG_SH64_SR_WATCH=y -# CONFIG_POOR_MANS_STRACE is not set -# CONFIG_SH_NO_BSS_INIT is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set # # Security options @@ -727,13 +725,53 @@ CONFIG_SH64_SR_WATCH=y # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_CRYPTO is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_ECB is not set +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_HW=y # # Library routines # CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set +CONFIG_CRC_CCITT=y # CONFIG_CRC16 is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig new file mode 100644 index 000000000000..ae4c5e62086a --- /dev/null +++ b/arch/arm/configs/msm_defconfig @@ -0,0 +1,895 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.23 +# Wed Nov 7 01:36:45 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_GPIOS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_MODULES is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_GOLDFISH is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_ARCH_MSM7X00A=y + +# +# Boot options +# + +# +# Power management +# + +# +# MSM7200 Board Type +# +CONFIG_MACH_HALIBUT=y +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y +# CONFIG_SERIAL_MSM_NOINIT is not set +CONFIG_MSM_SMD=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_RESOURCES_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=64M console=ttyMSM,115200n8" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +CONFIG_SUSPEND_UP_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_PACKET is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set +CONFIG_MTD_MSM_NAND=y + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_GOLDFISH_NAND is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +CONFIG_SMC91X=y +# CONFIG_DM9000 is not set +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_WAN is not set +CONFIG_PPP=y +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=y +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=y +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +CONFIG_MSM_RMNET=y +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_GOLDFISH_EVENTS is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_MEP is not set +CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI=y +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_UINPUT is not set +CONFIG_INPUT_GPIO=y + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DCC_TTY=y +# CONFIG_GOLDFISH_TTY is not set +CONFIG_BINDER=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +CONFIG_I2C_MSM=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +CONFIG_SENSORS_PCA9633=y +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +CONFIG_SENSORS_AKM8976=y +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set +# CONFIG_W1 is not set +# CONFIG_HWMON is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +CONFIG_LOW_MEMORY_KILLER=y + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +CONFIG_DAB=y + +# +# Graphics support +# +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_MSM=y +# CONFIG_FB_GOLDFISH is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_LOGO is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# USB Function Support +# +CONFIG_USB_FUNCTION=y +CONFIG_USB_FUNCTION_MSM_HSUSB=y +# CONFIG_USB_FUNCTION_NULL is not set +# CONFIG_USB_FUNCTION_ZERO is not set +# CONFIG_USB_FUNCTION_LOOPBACK is not set +CONFIG_USB_FUNCTION_ADB=y +# CONFIG_MMC is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# Android +# +# CONFIG_ANDROID_GADGET is not set +# CONFIG_ANDROID_RAM_CONSOLE is not set +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_VIBRATOR=y + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_YAFFS_FS=y +CONFIG_YAFFS_YAFFS1=y +# CONFIG_YAFFS_9BYTE_TAGS is not set +# CONFIG_YAFFS_DOES_ECC is not set +CONFIG_YAFFS_YAFFS2=y +CONFIG_YAFFS_AUTO_YAFFS2=y +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set +CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10 +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FRAME_POINTER=y +# CONFIG_FORCED_INLINING is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/orion_defconfig b/arch/arm/configs/orion_defconfig new file mode 100644 index 000000000000..17a55def1103 --- /dev/null +++ b/arch/arm/configs/orion_defconfig @@ -0,0 +1,1384 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24-rc3 +# Wed Nov 28 15:13:57 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +CONFIG_ARCH_ORION=y +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Orion Implementations +# +CONFIG_MACH_DB88F5281=y +CONFIG_MACH_RD88F5182=y +CONFIG_MACH_KUROBOX_PRO=y +CONFIG_MACH_DNS323=y +CONFIG_MACH_TS209=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_FEROCEON=y +CONFIG_CPU_FEROCEON_OLD_ID=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_SYSCALL=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_LEDS=y +CONFIG_LEDS_CPU=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +CONFIG_FTL=y +CONFIG_NFTL=y +# CONFIG_NFTL_RW is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +CONFIG_MTD_CFI_I4=y +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_NAND_ORION=y +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +CONFIG_SCSI_MVSATA=y + +# +# Sata options +# +# CONFIG_MV_SATA_SUPPORT_ATAPI is not set +# CONFIG_MV_SATA_ENABLE_1MB_IOS is not set +CONFIG_SATA_NO_DEBUG=y +# CONFIG_SATA_DEBUG_ON_ERROR is not set +# CONFIG_SATA_FULL_DEBUG is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_IP1000 is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_EEPRO100 is not set +CONFIG_E100=y +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +CONFIG_SKGE=y +CONFIG_SKY2=y +# CONFIG_SK98LIN is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_TIGON3=y +# CONFIG_BNX2 is not set +CONFIG_MV643XX_ETH=y +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +CONFIG_NETDEV_10000=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set +# CONFIG_MLX4_CORE is not set +# CONFIG_TEHUTI is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +CONFIG_I2C_MV64XXX=y + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_SL811_HCD=y +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +# CONFIG_USB_STORAGE_ISD200 is not set +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_GPIO is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_DS1307=y +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RS5C372=y +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +CONFIG_RTC_DRV_M41T80=y +# CONFIG_RTC_DRV_M41T80_WDT is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_LDM_DEBUG=y +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +CONFIG_INSTRUMENTATION=y +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/pcm027_defconfig b/arch/arm/configs/pcm027_defconfig new file mode 100644 index 000000000000..17b9b2469570 --- /dev/null +++ b/arch/arm/configs/pcm027_defconfig @@ -0,0 +1,1096 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24-rc6 +# Fri Dec 21 10:52:09 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_ARMCORE is not set +CONFIG_MACH_PCM027=y +CONFIG_MACH_PCM990_BASEBOARD=y +CONFIG_PXA27x=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x00000000 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_PXA2XX is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +# CONFIG_BLK_DEV is not set +# CONFIG_MISC_DEVICES is not set +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +CONFIG_SMC91X=y +# CONFIG_DM9000 is not set +# CONFIG_SMC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +CONFIG_SENSORS_EEPROM=y +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +CONFIG_SND_PXA2XX_PCM=y +CONFIG_SND_PXA2XX_AC97=y + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# SoC Audio support for SuperH +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_PXA=y +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +CONFIG_RTC_DRV_PCF8563=m +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_SA1100=m + +# +# File systems +# +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=m +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=m +CONFIG_FS_MBCACHE=m +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_DNOTIFY is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=850 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_NFS_DIRECTIO=y +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-15" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=y +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_INSTRUMENTATION is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 593b56509f4f..faa761921153 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o +obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c index 0a3e9ad297d8..2f080a35a2d9 100644 --- a/arch/arm/kernel/dma-isa.c +++ b/arch/arm/kernel/dma-isa.c @@ -216,7 +216,7 @@ void __init isa_init_dma(dma_t *dma) request_dma(DMA_ISA_CASCADE, "cascade"); - for (i = 0; i < sizeof(dma_resources) / sizeof(dma_resources[0]); i++) + for (i = 0; i < ARRAY_SIZE(dma_resources); i++) request_resource(&ioport_resource, dma_resources + i); } } diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 29dec080a604..a46d5b456765 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -11,8 +11,8 @@ * * Low-level vector interface routines * - * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction that causes - * it to save wrong values... Be aware! + * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction + * that causes it to save wrong values... Be aware! */ #include <asm/memory.h> @@ -58,6 +58,12 @@ .endm +#ifdef CONFIG_KPROBES + .section .kprobes.text,"ax",%progbits +#else + .text +#endif + /* * Invalid mode handlers */ @@ -112,8 +118,8 @@ common_invalid: #define SPFIX(code...) #endif - .macro svc_entry - sub sp, sp, #S_FRAME_SIZE + .macro svc_entry, stack_hole=0 + sub sp, sp, #(S_FRAME_SIZE + \stack_hole) SPFIX( tst sp, #4 ) SPFIX( bicne sp, sp, #4 ) stmib sp, {r1 - r12} @@ -121,7 +127,7 @@ common_invalid: ldmia r0, {r1 - r3} add r5, sp, #S_SP @ here for interlock avoidance mov r4, #-1 @ "" "" "" "" - add r0, sp, #S_FRAME_SIZE @ "" "" "" "" + add r0, sp, #(S_FRAME_SIZE + \stack_hole) SPFIX( addne r0, r0, #4 ) str r1, [sp] @ save the "real" r0 copied @ from the exception stack @@ -242,7 +248,14 @@ svc_preempt: .align 5 __und_svc: +#ifdef CONFIG_KPROBES + @ If a kprobe is about to simulate a "stmdb sp..." instruction, + @ it obviously needs free stack space which then will belong to + @ the saved context. + svc_entry 64 +#else svc_entry +#endif @ @ call emulation code, which returns using r9 if it has emulated @@ -480,6 +493,13 @@ __und_usr: * co-processor instructions. However, we have to watch out * for the ARM6/ARM7 SWI bug. * + * NEON is a special case that has to be handled here. Not all + * NEON instructions are co-processor instructions, so we have + * to make a special case of checking for them. Plus, there's + * five groups of them, so we have a table of mask/opcode pairs + * to check against, and if any match then we branch off into the + * NEON handler code. + * * Emulators may wish to make use of the following registers: * r0 = instruction opcode. * r2 = PC+4 @@ -488,6 +508,23 @@ __und_usr: * lr = unrecognised instruction return address */ call_fpe: +#ifdef CONFIG_NEON + adr r6, .LCneon_opcodes +2: + ldr r7, [r6], #4 @ mask value + cmp r7, #0 @ end mask? + beq 1f + and r8, r0, r7 + ldr r7, [r6], #4 @ opcode bits matching in mask + cmp r8, r7 @ NEON instruction? + bne 2b + get_thread_info r10 + mov r7, #1 + strb r7, [r10, #TI_USED_CP + 10] @ mark CP#10 as used + strb r7, [r10, #TI_USED_CP + 11] @ mark CP#11 as used + b do_vfp @ let VFP handler handle this +1: +#endif tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 #if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) and r8, r0, #0x0f000000 @ mask out op-code bits @@ -537,6 +574,20 @@ call_fpe: mov pc, lr @ CP#14 (Debug) mov pc, lr @ CP#15 (Control) +#ifdef CONFIG_NEON + .align 6 + +.LCneon_opcodes: + .word 0xfe000000 @ mask + .word 0xf2000000 @ opcode + + .word 0xff100000 @ mask + .word 0xf4000000 @ opcode + + .word 0x00000000 @ mask + .word 0x00000000 @ opcode +#endif + do_fpe: enable_irq ldr r4, .LCfp @@ -555,7 +606,7 @@ do_fpe: .data ENTRY(fp_enter) .word no_fp - .text + .previous no_fp: mov pc, lr diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 33e6cc2ffd3b..6c90c50a9ee3 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -72,7 +72,7 @@ no_work_pending: ldr r1, [sp, #S_PSR] @ get calling cpsr ldr lr, [sp, #S_PC]! @ get pc msr spsr_cxsf, r1 @ save in spsr_svc - ldmdb sp, {r0 - lr}^ @ get calling r1 - lr + ldmdb sp, {r0 - lr}^ @ get calling r0 - lr mov r0, r0 add sp, sp, #S_FRAME_SIZE - S_PC movs pc, lr @ return & move spsr_svc into cpsr diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c new file mode 100644 index 000000000000..d51bc8b60557 --- /dev/null +++ b/arch/arm/kernel/kprobes-decode.c @@ -0,0 +1,1529 @@ +/* + * arch/arm/kernel/kprobes-decode.c + * + * Copyright (C) 2006, 2007 Motorola Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +/* + * We do not have hardware single-stepping on ARM, This + * effort is further complicated by the ARM not having a + * "next PC" register. Instructions that change the PC + * can't be safely single-stepped in a MP environment, so + * we have a lot of work to do: + * + * In the prepare phase: + * *) If it is an instruction that does anything + * with the CPU mode, we reject it for a kprobe. + * (This is out of laziness rather than need. The + * instructions could be simulated.) + * + * *) Otherwise, decode the instruction rewriting its + * registers to take fixed, ordered registers and + * setting a handler for it to run the instruction. + * + * In the execution phase by an instruction's handler: + * + * *) If the PC is written to by the instruction, the + * instruction must be fully simulated in software. + * If it is a conditional instruction, the handler + * will use insn[0] to copy its condition code to + * set r0 to 1 and insn[1] to "mov pc, lr" to return. + * + * *) Otherwise, a modified form of the instruction is + * directly executed. Its handler calls the + * instruction in insn[0]. In insn[1] is a + * "mov pc, lr" to return. + * + * Before calling, load up the reordered registers + * from the original instruction's registers. If one + * of the original input registers is the PC, compute + * and adjust the appropriate input register. + * + * After call completes, copy the output registers to + * the original instruction's original registers. + * + * We don't use a real breakpoint instruction since that + * would have us in the kernel go from SVC mode to SVC + * mode losing the link register. Instead we use an + * undefined instruction. To simplify processing, the + * undefined instruction used for kprobes must be reserved + * exclusively for kprobes use. + * + * TODO: ifdef out some instruction decoding based on architecture. + */ + +#include <linux/kernel.h> +#include <linux/kprobes.h> + +#define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit))))) + +#define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25) + +#define PSR_fs (PSR_f|PSR_s) + +#define KPROBE_RETURN_INSTRUCTION 0xe1a0f00e /* mov pc, lr */ +#define SET_R0_TRUE_INSTRUCTION 0xe3a00001 /* mov r0, #1 */ + +#define truecc_insn(insn) (((insn) & 0xf0000000) | \ + (SET_R0_TRUE_INSTRUCTION & 0x0fffffff)) + +typedef long (insn_0arg_fn_t)(void); +typedef long (insn_1arg_fn_t)(long); +typedef long (insn_2arg_fn_t)(long, long); +typedef long (insn_3arg_fn_t)(long, long, long); +typedef long (insn_4arg_fn_t)(long, long, long, long); +typedef long long (insn_llret_0arg_fn_t)(void); +typedef long long (insn_llret_3arg_fn_t)(long, long, long); +typedef long long (insn_llret_4arg_fn_t)(long, long, long, long); + +union reg_pair { + long long dr; +#ifdef __LITTLE_ENDIAN + struct { long r0, r1; }; +#else + struct { long r1, r0; }; +#endif +}; + +/* + * For STR and STM instructions, an ARM core may choose to use either + * a +8 or a +12 displacement from the current instruction's address. + * Whichever value is chosen for a given core, it must be the same for + * both instructions and may not change. This function measures it. + */ + +static int str_pc_offset; + +static void __init find_str_pc_offset(void) +{ + int addr, scratch, ret; + + __asm__ ( + "sub %[ret], pc, #4 \n\t" + "str pc, %[addr] \n\t" + "ldr %[scr], %[addr] \n\t" + "sub %[ret], %[scr], %[ret] \n\t" + : [ret] "=r" (ret), [scr] "=r" (scratch), [addr] "+m" (addr)); + + str_pc_offset = ret; +} + +/* + * The insnslot_?arg_r[w]flags() functions below are to keep the + * msr -> *fn -> mrs instruction sequences indivisible so that + * the state of the CPSR flags aren't inadvertently modified + * just before or just after the call. + */ + +static inline long __kprobes +insnslot_0arg_rflags(long cpsr, insn_0arg_fn_t *fn) +{ + register long ret asm("r0"); + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + : "=r" (ret) + : [cpsr] "r" (cpsr), [fn] "r" (fn) + : "lr", "cc" + ); + return ret; +} + +static inline long long __kprobes +insnslot_llret_0arg_rflags(long cpsr, insn_llret_0arg_fn_t *fn) +{ + register long ret0 asm("r0"); + register long ret1 asm("r1"); + union reg_pair fnr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + : "=r" (ret0), "=r" (ret1) + : [cpsr] "r" (cpsr), [fn] "r" (fn) + : "lr", "cc" + ); + fnr.r0 = ret0; + fnr.r1 = ret1; + return fnr.dr; +} + +static inline long __kprobes +insnslot_1arg_rflags(long r0, long cpsr, insn_1arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long ret asm("r0"); + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + : "=r" (ret) + : "0" (rr0), [cpsr] "r" (cpsr), [fn] "r" (fn) + : "lr", "cc" + ); + return ret; +} + +static inline long __kprobes +insnslot_2arg_rflags(long r0, long r1, long cpsr, insn_2arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long ret asm("r0"); + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + : "=r" (ret) + : "0" (rr0), "r" (rr1), + [cpsr] "r" (cpsr), [fn] "r" (fn) + : "lr", "cc" + ); + return ret; +} + +static inline long __kprobes +insnslot_3arg_rflags(long r0, long r1, long r2, long cpsr, insn_3arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long rr2 asm("r2") = r2; + register long ret asm("r0"); + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + : "=r" (ret) + : "0" (rr0), "r" (rr1), "r" (rr2), + [cpsr] "r" (cpsr), [fn] "r" (fn) + : "lr", "cc" + ); + return ret; +} + +static inline long long __kprobes +insnslot_llret_3arg_rflags(long r0, long r1, long r2, long cpsr, + insn_llret_3arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long rr2 asm("r2") = r2; + register long ret0 asm("r0"); + register long ret1 asm("r1"); + union reg_pair fnr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + : "=r" (ret0), "=r" (ret1) + : "0" (rr0), "r" (rr1), "r" (rr2), + [cpsr] "r" (cpsr), [fn] "r" (fn) + : "lr", "cc" + ); + fnr.r0 = ret0; + fnr.r1 = ret1; + return fnr.dr; +} + +static inline long __kprobes +insnslot_4arg_rflags(long r0, long r1, long r2, long r3, long cpsr, + insn_4arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long rr2 asm("r2") = r2; + register long rr3 asm("r3") = r3; + register long ret asm("r0"); + + __asm__ __volatile__ ( + "msr cpsr_fs, %[cpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + : "=r" (ret) + : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3), + [cpsr] "r" (cpsr), [fn] "r" (fn) + : "lr", "cc" + ); + return ret; +} + +static inline long __kprobes +insnslot_1arg_rwflags(long r0, long *cpsr, insn_1arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long ret asm("r0"); + long oldcpsr = *cpsr; + long newcpsr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[oldcpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + "mrs %[newcpsr], cpsr \n\t" + : "=r" (ret), [newcpsr] "=r" (newcpsr) + : "0" (rr0), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) + : "lr", "cc" + ); + *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); + return ret; +} + +static inline long __kprobes +insnslot_2arg_rwflags(long r0, long r1, long *cpsr, insn_2arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long ret asm("r0"); + long oldcpsr = *cpsr; + long newcpsr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[oldcpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + "mrs %[newcpsr], cpsr \n\t" + : "=r" (ret), [newcpsr] "=r" (newcpsr) + : "0" (rr0), "r" (rr1), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) + : "lr", "cc" + ); + *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); + return ret; +} + +static inline long __kprobes +insnslot_3arg_rwflags(long r0, long r1, long r2, long *cpsr, + insn_3arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long rr2 asm("r2") = r2; + register long ret asm("r0"); + long oldcpsr = *cpsr; + long newcpsr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[oldcpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + "mrs %[newcpsr], cpsr \n\t" + : "=r" (ret), [newcpsr] "=r" (newcpsr) + : "0" (rr0), "r" (rr1), "r" (rr2), + [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) + : "lr", "cc" + ); + *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); + return ret; +} + +static inline long __kprobes +insnslot_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr, + insn_4arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long rr2 asm("r2") = r2; + register long rr3 asm("r3") = r3; + register long ret asm("r0"); + long oldcpsr = *cpsr; + long newcpsr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[oldcpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + "mrs %[newcpsr], cpsr \n\t" + : "=r" (ret), [newcpsr] "=r" (newcpsr) + : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3), + [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) + : "lr", "cc" + ); + *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); + return ret; +} + +static inline long long __kprobes +insnslot_llret_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr, + insn_llret_4arg_fn_t *fn) +{ + register long rr0 asm("r0") = r0; + register long rr1 asm("r1") = r1; + register long rr2 asm("r2") = r2; + register long rr3 asm("r3") = r3; + register long ret0 asm("r0"); + register long ret1 asm("r1"); + long oldcpsr = *cpsr; + long newcpsr; + union reg_pair fnr; + + __asm__ __volatile__ ( + "msr cpsr_fs, %[oldcpsr] \n\t" + "mov lr, pc \n\t" + "mov pc, %[fn] \n\t" + "mrs %[newcpsr], cpsr \n\t" + : "=r" (ret0), "=r" (ret1), [newcpsr] "=r" (newcpsr) + : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3), + [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) + : "lr", "cc" + ); + *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); + fnr.r0 = ret0; + fnr.r1 = ret1; + return fnr.dr; +} + +/* + * To avoid the complications of mimicing single-stepping on a + * processor without a Next-PC or a single-step mode, and to + * avoid having to deal with the side-effects of boosting, we + * simulate or emulate (almost) all ARM instructions. + * + * "Simulation" is where the instruction's behavior is duplicated in + * C code. "Emulation" is where the original instruction is rewritten + * and executed, often by altering its registers. + * + * By having all behavior of the kprobe'd instruction completed before + * returning from the kprobe_handler(), all locks (scheduler and + * interrupt) can safely be released. There is no need for secondary + * breakpoints, no race with MP or preemptable kernels, nor having to + * clean up resources counts at a later time impacting overall system + * performance. By rewriting the instruction, only the minimum registers + * need to be loaded and saved back optimizing performance. + * + * Calling the insnslot_*_rwflags version of a function doesn't hurt + * anything even when the CPSR flags aren't updated by the + * instruction. It's just a little slower in return for saving + * a little space by not having a duplicate function that doesn't + * update the flags. (The same optimization can be said for + * instructions that do or don't perform register writeback) + * Also, instructions can either read the flags, only write the + * flags, or read and write the flags. To save combinations + * rather than for sheer performance, flag functions just assume + * read and write of flags. + */ + +static void __kprobes simulate_bbl(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + long iaddr = (long)p->addr; + int disp = branch_displacement(insn); + + if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) + return; + + if (insn & (1 << 24)) + regs->ARM_lr = iaddr + 4; + + regs->ARM_pc = iaddr + 8 + disp; +} + +static void __kprobes simulate_blx1(struct kprobe *p, struct pt_regs *regs) +{ + kprobe_opcode_t insn = p->opcode; + long iaddr = (long)p->addr; + int disp = branch_displacement(insn); + + regs->ARM_lr = iaddr + 4; + regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2); + regs->ARM_cpsr |= PSR_T_BIT; +} + +static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rm = insn & 0xf; + long rmv = regs->uregs[rm]; + + if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) + return; + + if (insn & (1 << 5)) + regs->ARM_lr = (long)p->addr + 4; + + regs->ARM_pc = rmv & ~0x1; + regs->ARM_cpsr &= ~PSR_T_BIT; + if (rmv & 0x1) + regs->ARM_cpsr |= PSR_T_BIT; +} + +static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rn = (insn >> 16) & 0xf; + int lbit = insn & (1 << 20); + int wbit = insn & (1 << 21); + int ubit = insn & (1 << 23); + int pbit = insn & (1 << 24); + long *addr = (long *)regs->uregs[rn]; + int reg_bit_vector; + int reg_count; + + if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) + return; + + reg_count = 0; + reg_bit_vector = insn & 0xffff; + while (reg_bit_vector) { + reg_bit_vector &= (reg_bit_vector - 1); + ++reg_count; + } + + if (!ubit) + addr -= reg_count; + addr += (!pbit ^ !ubit); + + reg_bit_vector = insn & 0xffff; + while (reg_bit_vector) { + int reg = __ffs(reg_bit_vector); + reg_bit_vector &= (reg_bit_vector - 1); + if (lbit) + regs->uregs[reg] = *addr++; + else + *addr++ = regs->uregs[reg]; + } + + if (wbit) { + if (!ubit) + addr -= reg_count; + addr -= (!pbit ^ !ubit); + regs->uregs[rn] = (long)addr; + } +} + +static void __kprobes simulate_stm1_pc(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + + if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) + return; + + regs->ARM_pc = (long)p->addr + str_pc_offset; + simulate_ldm1stm1(p, regs); + regs->ARM_pc = (long)p->addr + 4; +} + +static void __kprobes simulate_mov_ipsp(struct kprobe *p, struct pt_regs *regs) +{ + regs->uregs[12] = regs->uregs[13]; +} + +static void __kprobes emulate_ldcstc(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rn = (insn >> 16) & 0xf; + long rnv = regs->uregs[rn]; + + /* Save Rn in case of writeback. */ + regs->uregs[rn] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs) +{ + insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + int rm = insn & 0xf; /* rm may be invalid, don't care. */ + + /* Not following the C calling convention here, so need asm(). */ + __asm__ __volatile__ ( + "ldr r0, %[rn] \n\t" + "ldr r1, %[rm] \n\t" + "msr cpsr_fs, %[cpsr]\n\t" + "mov lr, pc \n\t" + "mov pc, %[i_fn] \n\t" + "str r0, %[rn] \n\t" /* in case of writeback */ + "str r2, %[rd0] \n\t" + "str r3, %[rd1] \n\t" + : [rn] "+m" (regs->uregs[rn]), + [rd0] "=m" (regs->uregs[rd]), + [rd1] "=m" (regs->uregs[rd+1]) + : [rm] "m" (regs->uregs[rm]), + [cpsr] "r" (regs->ARM_cpsr), + [i_fn] "r" (i_fn) + : "r0", "r1", "r2", "r3", "lr", "cc" + ); +} + +static void __kprobes emulate_strd(struct kprobe *p, struct pt_regs *regs) +{ + insn_4arg_fn_t *i_fn = (insn_4arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + int rm = insn & 0xf; + long rnv = regs->uregs[rn]; + long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ + + regs->uregs[rn] = insnslot_4arg_rflags(rnv, rmv, regs->uregs[rd], + regs->uregs[rd+1], + regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs) +{ + insn_llret_3arg_fn_t *i_fn = (insn_llret_3arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + union reg_pair fnr; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + int rm = insn & 0xf; + long rdv; + long rnv = regs->uregs[rn]; + long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ + long cpsr = regs->ARM_cpsr; + + fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn); + regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */ + rdv = fnr.r1; + + if (rd == 15) { +#if __LINUX_ARM_ARCH__ >= 5 + cpsr &= ~PSR_T_BIT; + if (rdv & 0x1) + cpsr |= PSR_T_BIT; + regs->ARM_cpsr = cpsr; + rdv &= ~0x1; +#else + rdv &= ~0x2; +#endif + } + regs->uregs[rd] = rdv; +} + +static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs) +{ + insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + long iaddr = (long)p->addr; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + int rm = insn & 0xf; + long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd]; + long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn]; + long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ + + /* Save Rn in case of writeback. */ + regs->uregs[rn] = + insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs) +{ + insn_llret_0arg_fn_t *i_fn = (insn_llret_0arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + union reg_pair fnr; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + + fnr.dr = insnslot_llret_0arg_rflags(regs->ARM_cpsr, i_fn); + regs->uregs[rn] = fnr.r0; + regs->uregs[rd] = fnr.r1; +} + +static void __kprobes emulate_mcrr(struct kprobe *p, struct pt_regs *regs) +{ + insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + long rnv = regs->uregs[rn]; + long rdv = regs->uregs[rd]; + + insnslot_2arg_rflags(rnv, rdv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_sat(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rm = insn & 0xf; + long rmv = regs->uregs[rm]; + + /* Writes Q flag */ + regs->uregs[rd] = insnslot_1arg_rwflags(rmv, ®s->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_sel(struct kprobe *p, struct pt_regs *regs) +{ + insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + int rm = insn & 0xf; + long rnv = regs->uregs[rn]; + long rmv = regs->uregs[rm]; + + /* Reads GE bits */ + regs->uregs[rd] = insnslot_2arg_rflags(rnv, rmv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_none(struct kprobe *p, struct pt_regs *regs) +{ + insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0]; + + insnslot_0arg_rflags(regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_rd12(struct kprobe *p, struct pt_regs *regs) +{ + insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + + regs->uregs[rd] = insnslot_0arg_rflags(regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_ird12(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int ird = (insn >> 12) & 0xf; + + insnslot_1arg_rflags(regs->uregs[ird], regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_rn16(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rn = (insn >> 16) & 0xf; + long rnv = regs->uregs[rn]; + + insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes emulate_rd12rm0(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rm = insn & 0xf; + long rmv = regs->uregs[rm]; + + regs->uregs[rd] = insnslot_1arg_rflags(rmv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes +emulate_rd12rn16rm0_rwflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + int rm = insn & 0xf; + long rnv = regs->uregs[rn]; + long rmv = regs->uregs[rm]; + + regs->uregs[rd] = + insnslot_2arg_rwflags(rnv, rmv, ®s->ARM_cpsr, i_fn); +} + +static void __kprobes +emulate_rd16rn12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 16) & 0xf; + int rn = (insn >> 12) & 0xf; + int rs = (insn >> 8) & 0xf; + int rm = insn & 0xf; + long rnv = regs->uregs[rn]; + long rsv = regs->uregs[rs]; + long rmv = regs->uregs[rm]; + + regs->uregs[rd] = + insnslot_3arg_rwflags(rnv, rsv, rmv, ®s->ARM_cpsr, i_fn); +} + +static void __kprobes +emulate_rd16rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 16) & 0xf; + int rs = (insn >> 8) & 0xf; + int rm = insn & 0xf; + long rsv = regs->uregs[rs]; + long rmv = regs->uregs[rm]; + + regs->uregs[rd] = + insnslot_2arg_rwflags(rsv, rmv, ®s->ARM_cpsr, i_fn); +} + +static void __kprobes +emulate_rdhi16rdlo12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_llret_4arg_fn_t *i_fn = (insn_llret_4arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + union reg_pair fnr; + int rdhi = (insn >> 16) & 0xf; + int rdlo = (insn >> 12) & 0xf; + int rs = (insn >> 8) & 0xf; + int rm = insn & 0xf; + long rsv = regs->uregs[rs]; + long rmv = regs->uregs[rm]; + + fnr.dr = insnslot_llret_4arg_rwflags(regs->uregs[rdhi], + regs->uregs[rdlo], rsv, rmv, + ®s->ARM_cpsr, i_fn); + regs->uregs[rdhi] = fnr.r0; + regs->uregs[rdlo] = fnr.r1; +} + +static void __kprobes +emulate_alu_imm_rflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn]; + + regs->uregs[rd] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes +emulate_alu_imm_rwflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; + long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn]; + + regs->uregs[rd] = insnslot_1arg_rwflags(rnv, ®s->ARM_cpsr, i_fn); +} + +static void __kprobes +emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + long ppc = (long)p->addr + 8; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */ + int rs = (insn >> 8) & 0xf; /* invalid, don't care. */ + int rm = insn & 0xf; + long rnv = (rn == 15) ? ppc : regs->uregs[rn]; + long rmv = (rm == 15) ? ppc : regs->uregs[rm]; + long rsv = regs->uregs[rs]; + + regs->uregs[rd] = + insnslot_3arg_rflags(rnv, rmv, rsv, regs->ARM_cpsr, i_fn); +} + +static void __kprobes +emulate_alu_rwflags(struct kprobe *p, struct pt_regs *regs) +{ + insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; + kprobe_opcode_t insn = p->opcode; + long ppc = (long)p->addr + 8; + int rd = (insn >> 12) & 0xf; + int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */ + int rs = (insn >> 8) & 0xf; /* invalid, don't care. */ + int rm = insn & 0xf; + long rnv = (rn == 15) ? ppc : regs->uregs[rn]; + long rmv = (rm == 15) ? ppc : regs->uregs[rm]; + long rsv = regs->uregs[rs]; + + regs->uregs[rd] = + insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn); +} + +static enum kprobe_insn __kprobes +prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + int ibit = (insn & (1 << 26)) ? 25 : 22; + + insn &= 0xfff00fff; + insn |= 0x00001000; /* Rn = r0, Rd = r1 */ + if (insn & (1 << ibit)) { + insn &= ~0xf; + insn |= 2; /* Rm = r2 */ + } + asi->insn[0] = insn; + asi->insn_handler = (insn & (1 << 20)) ? emulate_ldr : emulate_str; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +prep_emulate_rd12rm0(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_rd12rm0; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +prep_emulate_rd12(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + insn &= 0xffff0fff; /* Rd = r0 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_rd12; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +prep_emulate_rd12rn16rm0_wflags(kprobe_opcode_t insn, + struct arch_specific_insn *asi) +{ + insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ + insn |= 0x00000001; /* Rm = r1 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_rd12rn16rm0_rwflags; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +prep_emulate_rd16rs8rm0_wflags(kprobe_opcode_t insn, + struct arch_specific_insn *asi) +{ + insn &= 0xfff0f0f0; /* Rd = r0, Rs = r0 */ + insn |= 0x00000001; /* Rm = r1 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_rd16rs8rm0_rwflags; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +prep_emulate_rd16rn12rs8rm0_wflags(kprobe_opcode_t insn, + struct arch_specific_insn *asi) +{ + insn &= 0xfff000f0; /* Rd = r0, Rn = r0 */ + insn |= 0x00000102; /* Rs = r1, Rm = r2 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_rd16rn12rs8rm0_rwflags; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn, + struct arch_specific_insn *asi) +{ + insn &= 0xfff000f0; /* RdHi = r0, RdLo = r1 */ + insn |= 0x00001203; /* Rs = r2, Rm = r3 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_rdhi16rdlo12rs8rm0_rwflags; + return INSN_GOOD; +} + +/* + * For the instruction masking and comparisons in all the "space_*" + * functions below, Do _not_ rearrange the order of tests unless + * you're very, very sure of what you are doing. For the sake of + * efficiency, the masks for some tests sometimes assume other test + * have been done prior to them so the number of patterns to test + * for an instruction set can be as broad as possible to reduce the + * number of tests needed. + */ + +static enum kprobe_insn __kprobes +space_1111(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* CPS mmod == 1 : 1111 0001 0000 xx10 xxxx xxxx xx0x xxxx */ + /* RFE : 1111 100x x0x1 xxxx xxxx 1010 xxxx xxxx */ + /* SRS : 1111 100x x1x0 1101 xxxx 0101 xxxx xxxx */ + if ((insn & 0xfff30020) == 0xf1020000 || + (insn & 0xfe500f00) == 0xf8100a00 || + (insn & 0xfe5f0f00) == 0xf84d0500) + return INSN_REJECTED; + + /* PLD : 1111 01x1 x101 xxxx xxxx xxxx xxxx xxxx : */ + if ((insn & 0xfd700000) == 0xf4500000) { + insn &= 0xfff0ffff; /* Rn = r0 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_rn16; + return INSN_GOOD; + } + + /* BLX(1) : 1111 101x xxxx xxxx xxxx xxxx xxxx xxxx : */ + if ((insn & 0xfe000000) == 0xfa000000) { + asi->insn_handler = simulate_blx1; + return INSN_GOOD_NO_SLOT; + } + + /* SETEND : 1111 0001 0000 0001 xxxx xxxx 0000 xxxx */ + /* CDP2 : 1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ + if ((insn & 0xffff00f0) == 0xf1010000 || + (insn & 0xff000010) == 0xfe000000) { + asi->insn[0] = insn; + asi->insn_handler = emulate_none; + return INSN_GOOD; + } + + /* MCRR2 : 1111 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ + /* MRRC2 : 1111 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ + if ((insn & 0xffe00000) == 0xfc400000) { + insn &= 0xfff00fff; /* Rn = r0 */ + insn |= 0x00001000; /* Rd = r1 */ + asi->insn[0] = insn; + asi->insn_handler = + (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr; + return INSN_GOOD; + } + + /* LDC2 : 1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ + /* STC2 : 1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ + if ((insn & 0xfe000000) == 0xfc000000) { + insn &= 0xfff0ffff; /* Rn = r0 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_ldcstc; + return INSN_GOOD; + } + + /* MCR2 : 1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ + /* MRC2 : 1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ + insn &= 0xffff0fff; /* Rd = r0 */ + asi->insn[0] = insn; + asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx xxx0 xxxx */ + if ((insn & 0x0f900010) == 0x01000000) { + + /* BXJ : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */ + /* MSR : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */ + if ((insn & 0x0ff000f0) == 0x01200020 || + (insn & 0x0fb000f0) == 0x01200000) + return INSN_REJECTED; + + /* MRS : cccc 0001 0x00 xxxx xxxx xxxx 0000 xxxx */ + if ((insn & 0x0fb00010) == 0x01000000) + return prep_emulate_rd12(insn, asi); + + /* SMLALxy : cccc 0001 0100 xxxx xxxx xxxx 1xx0 xxxx */ + if ((insn & 0x0ff00090) == 0x01400080) + return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); + + /* SMULWy : cccc 0001 0010 xxxx xxxx xxxx 1x10 xxxx */ + /* SMULxy : cccc 0001 0110 xxxx xxxx xxxx 1xx0 xxxx */ + if ((insn & 0x0ff000b0) == 0x012000a0 || + (insn & 0x0ff00090) == 0x01600080) + return prep_emulate_rd16rs8rm0_wflags(insn, asi); + + /* SMLAxy : cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx : Q */ + /* SMLAWy : cccc 0001 0010 xxxx xxxx xxxx 0x00 xxxx : Q */ + return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); + + } + + /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx 0xx1 xxxx */ + else if ((insn & 0x0f900090) == 0x01000010) { + + /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */ + if ((insn & 0xfff000f0) == 0xe1200070) + return INSN_REJECTED; + + /* BLX(2) : cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */ + /* BX : cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */ + if ((insn & 0x0ff000d0) == 0x01200010) { + asi->insn[0] = truecc_insn(insn); + asi->insn_handler = simulate_blx2bx; + return INSN_GOOD; + } + + /* CLZ : cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */ + if ((insn & 0x0ff000f0) == 0x01600010) + return prep_emulate_rd12rm0(insn, asi); + + /* QADD : cccc 0001 0000 xxxx xxxx xxxx 0101 xxxx :Q */ + /* QSUB : cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx :Q */ + /* QDADD : cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx :Q */ + /* QDSUB : cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx :Q */ + return prep_emulate_rd12rn16rm0_wflags(insn, asi); + } + + /* cccc 0000 xxxx xxxx xxxx xxxx xxxx 1001 xxxx */ + else if ((insn & 0x0f000090) == 0x00000090) { + + /* MUL : cccc 0000 0000 xxxx xxxx xxxx 1001 xxxx : */ + /* MULS : cccc 0000 0001 xxxx xxxx xxxx 1001 xxxx :cc */ + /* MLA : cccc 0000 0010 xxxx xxxx xxxx 1001 xxxx : */ + /* MLAS : cccc 0000 0011 xxxx xxxx xxxx 1001 xxxx :cc */ + /* UMAAL : cccc 0000 0100 xxxx xxxx xxxx 1001 xxxx : */ + /* UMULL : cccc 0000 1000 xxxx xxxx xxxx 1001 xxxx : */ + /* UMULLS : cccc 0000 1001 xxxx xxxx xxxx 1001 xxxx :cc */ + /* UMLAL : cccc 0000 1010 xxxx xxxx xxxx 1001 xxxx : */ + /* UMLALS : cccc 0000 1011 xxxx xxxx xxxx 1001 xxxx :cc */ + /* SMULL : cccc 0000 1100 xxxx xxxx xxxx 1001 xxxx : */ + /* SMULLS : cccc 0000 1101 xxxx xxxx xxxx 1001 xxxx :cc */ + /* SMLAL : cccc 0000 1110 xxxx xxxx xxxx 1001 xxxx : */ + /* SMLALS : cccc 0000 1111 xxxx xxxx xxxx 1001 xxxx :cc */ + if ((insn & 0x0fe000f0) == 0x00000090) { + return prep_emulate_rd16rs8rm0_wflags(insn, asi); + } else if ((insn & 0x0fe000f0) == 0x00200090) { + return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); + } else { + return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); + } + } + + /* cccc 000x xxxx xxxx xxxx xxxx xxxx 1xx1 xxxx */ + else if ((insn & 0x0e000090) == 0x00000090) { + + /* SWP : cccc 0001 0000 xxxx xxxx xxxx 1001 xxxx */ + /* SWPB : cccc 0001 0100 xxxx xxxx xxxx 1001 xxxx */ + /* LDRD : cccc 000x xxx0 xxxx xxxx xxxx 1101 xxxx */ + /* STRD : cccc 000x xxx0 xxxx xxxx xxxx 1111 xxxx */ + /* STREX : cccc 0001 1000 xxxx xxxx xxxx 1001 xxxx */ + /* LDREX : cccc 0001 1001 xxxx xxxx xxxx 1001 xxxx */ + /* LDRH : cccc 000x xxx1 xxxx xxxx xxxx 1011 xxxx */ + /* STRH : cccc 000x xxx0 xxxx xxxx xxxx 1011 xxxx */ + /* LDRSB : cccc 000x xxx1 xxxx xxxx xxxx 1101 xxxx */ + /* LDRSH : cccc 000x xxx1 xxxx xxxx xxxx 1111 xxxx */ + if ((insn & 0x0fb000f0) == 0x01000090) { + /* SWP/SWPB */ + return prep_emulate_rd12rn16rm0_wflags(insn, asi); + } else if ((insn & 0x0e1000d0) == 0x00000d0) { + /* STRD/LDRD */ + insn &= 0xfff00fff; + insn |= 0x00002000; /* Rn = r0, Rd = r2 */ + if (insn & (1 << 22)) { + /* I bit */ + insn &= ~0xf; + insn |= 1; /* Rm = r1 */ + } + asi->insn[0] = insn; + asi->insn_handler = + (insn & (1 << 5)) ? emulate_strd : emulate_ldrd; + return INSN_GOOD; + } + + return prep_emulate_ldr_str(insn, asi); + } + + /* cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx xxxx */ + + /* + * ALU op with S bit and Rd == 15 : + * cccc 000x xxx1 xxxx 1111 xxxx xxxx xxxx + */ + if ((insn & 0x0e10f000) == 0x0010f000) + return INSN_REJECTED; + + /* + * "mov ip, sp" is the most common kprobe'd instruction by far. + * Check and optimize for it explicitly. + */ + if (insn == 0xe1a0c00d) { + asi->insn_handler = simulate_mov_ipsp; + return INSN_GOOD_NO_SLOT; + } + + /* + * Data processing: Immediate-shift / Register-shift + * ALU op : cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx + * CPY : cccc 0001 1010 xxxx xxxx 0000 0000 xxxx + * MOV : cccc 0001 101x xxxx xxxx xxxx xxxx xxxx + * *S (bit 20) updates condition codes + * ADC/SBC/RSC reads the C flag + */ + insn &= 0xfff00ff0; /* Rn = r0, Rd = r0 */ + insn |= 0x00000001; /* Rm = r1 */ + if (insn & 0x010) { + insn &= 0xfffff0ff; /* register shift */ + insn |= 0x00000200; /* Rs = r2 */ + } + asi->insn[0] = insn; + asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ + emulate_alu_rwflags : emulate_alu_rflags; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* + * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx + * Undef : cccc 0011 0x00 xxxx xxxx xxxx xxxx xxxx + * ALU op with S bit and Rd == 15 : + * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx + */ + if ((insn & 0x0f900000) == 0x03200000 || /* MSR & Undef */ + (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */ + return INSN_REJECTED; + + /* + * Data processing: 32-bit Immediate + * ALU op : cccc 001x xxxx xxxx xxxx xxxx xxxx xxxx + * MOV : cccc 0011 101x xxxx xxxx xxxx xxxx xxxx + * *S (bit 20) updates condition codes + * ADC/SBC/RSC reads the C flag + */ + insn &= 0xfff00ff0; /* Rn = r0, Rd = r0 */ + asi->insn[0] = insn; + asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ + emulate_alu_imm_rwflags : emulate_alu_imm_rflags; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* SEL : cccc 0110 1000 xxxx xxxx xxxx 1011 xxxx GE: !!! */ + if ((insn & 0x0ff000f0) == 0x068000b0) { + insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ + insn |= 0x00000001; /* Rm = r1 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_sel; + return INSN_GOOD; + } + + /* SSAT : cccc 0110 101x xxxx xxxx xxxx xx01 xxxx :Q */ + /* USAT : cccc 0110 111x xxxx xxxx xxxx xx01 xxxx :Q */ + /* SSAT16 : cccc 0110 1010 xxxx xxxx xxxx 0011 xxxx :Q */ + /* USAT16 : cccc 0110 1110 xxxx xxxx xxxx 0011 xxxx :Q */ + if ((insn & 0x0fa00030) == 0x06a00010 || + (insn & 0x0fb000f0) == 0x06a00030) { + insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_sat; + return INSN_GOOD; + } + + /* REV : cccc 0110 1011 xxxx xxxx xxxx 0011 xxxx */ + /* REV16 : cccc 0110 1011 xxxx xxxx xxxx 1011 xxxx */ + /* REVSH : cccc 0110 1111 xxxx xxxx xxxx 1011 xxxx */ + if ((insn & 0x0ff00070) == 0x06b00030 || + (insn & 0x0ff000f0) == 0x06f000b0) + return prep_emulate_rd12rm0(insn, asi); + + /* SADD16 : cccc 0110 0001 xxxx xxxx xxxx 0001 xxxx :GE */ + /* SADDSUBX : cccc 0110 0001 xxxx xxxx xxxx 0011 xxxx :GE */ + /* SSUBADDX : cccc 0110 0001 xxxx xxxx xxxx 0101 xxxx :GE */ + /* SSUB16 : cccc 0110 0001 xxxx xxxx xxxx 0111 xxxx :GE */ + /* SADD8 : cccc 0110 0001 xxxx xxxx xxxx 1001 xxxx :GE */ + /* SSUB8 : cccc 0110 0001 xxxx xxxx xxxx 1111 xxxx :GE */ + /* QADD16 : cccc 0110 0010 xxxx xxxx xxxx 0001 xxxx : */ + /* QADDSUBX : cccc 0110 0010 xxxx xxxx xxxx 0011 xxxx : */ + /* QSUBADDX : cccc 0110 0010 xxxx xxxx xxxx 0101 xxxx : */ + /* QSUB16 : cccc 0110 0010 xxxx xxxx xxxx 0111 xxxx : */ + /* QADD8 : cccc 0110 0010 xxxx xxxx xxxx 1001 xxxx : */ + /* QSUB8 : cccc 0110 0010 xxxx xxxx xxxx 1111 xxxx : */ + /* SHADD16 : cccc 0110 0011 xxxx xxxx xxxx 0001 xxxx : */ + /* SHADDSUBX : cccc 0110 0011 xxxx xxxx xxxx 0011 xxxx : */ + /* SHSUBADDX : cccc 0110 0011 xxxx xxxx xxxx 0101 xxxx : */ + /* SHSUB16 : cccc 0110 0011 xxxx xxxx xxxx 0111 xxxx : */ + /* SHADD8 : cccc 0110 0011 xxxx xxxx xxxx 1001 xxxx : */ + /* SHSUB8 : cccc 0110 0011 xxxx xxxx xxxx 1111 xxxx : */ + /* UADD16 : cccc 0110 0101 xxxx xxxx xxxx 0001 xxxx :GE */ + /* UADDSUBX : cccc 0110 0101 xxxx xxxx xxxx 0011 xxxx :GE */ + /* USUBADDX : cccc 0110 0101 xxxx xxxx xxxx 0101 xxxx :GE */ + /* USUB16 : cccc 0110 0101 xxxx xxxx xxxx 0111 xxxx :GE */ + /* UADD8 : cccc 0110 0101 xxxx xxxx xxxx 1001 xxxx :GE */ + /* USUB8 : cccc 0110 0101 xxxx xxxx xxxx 1111 xxxx :GE */ + /* UQADD16 : cccc 0110 0110 xxxx xxxx xxxx 0001 xxxx : */ + /* UQADDSUBX : cccc 0110 0110 xxxx xxxx xxxx 0011 xxxx : */ + /* UQSUBADDX : cccc 0110 0110 xxxx xxxx xxxx 0101 xxxx : */ + /* UQSUB16 : cccc 0110 0110 xxxx xxxx xxxx 0111 xxxx : */ + /* UQADD8 : cccc 0110 0110 xxxx xxxx xxxx 1001 xxxx : */ + /* UQSUB8 : cccc 0110 0110 xxxx xxxx xxxx 1111 xxxx : */ + /* UHADD16 : cccc 0110 0111 xxxx xxxx xxxx 0001 xxxx : */ + /* UHADDSUBX : cccc 0110 0111 xxxx xxxx xxxx 0011 xxxx : */ + /* UHSUBADDX : cccc 0110 0111 xxxx xxxx xxxx 0101 xxxx : */ + /* UHSUB16 : cccc 0110 0111 xxxx xxxx xxxx 0111 xxxx : */ + /* UHADD8 : cccc 0110 0111 xxxx xxxx xxxx 1001 xxxx : */ + /* UHSUB8 : cccc 0110 0111 xxxx xxxx xxxx 1111 xxxx : */ + /* PKHBT : cccc 0110 1000 xxxx xxxx xxxx x001 xxxx : */ + /* PKHTB : cccc 0110 1000 xxxx xxxx xxxx x101 xxxx : */ + /* SXTAB16 : cccc 0110 1000 xxxx xxxx xxxx 0111 xxxx : */ + /* SXTB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */ + /* SXTAB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */ + /* SXTAH : cccc 0110 1011 xxxx xxxx xxxx 0111 xxxx : */ + /* UXTAB16 : cccc 0110 1100 xxxx xxxx xxxx 0111 xxxx : */ + /* UXTAB : cccc 0110 1110 xxxx xxxx xxxx 0111 xxxx : */ + /* UXTAH : cccc 0110 1111 xxxx xxxx xxxx 0111 xxxx : */ + return prep_emulate_rd12rn16rm0_wflags(insn, asi); +} + +static enum kprobe_insn __kprobes +space_cccc_0111__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* Undef : cccc 0111 1111 xxxx xxxx xxxx 1111 xxxx */ + if ((insn & 0x0ff000f0) == 0x03f000f0) + return INSN_REJECTED; + + /* USADA8 : cccc 0111 1000 xxxx xxxx xxxx 0001 xxxx */ + /* USAD8 : cccc 0111 1000 xxxx 1111 xxxx 0001 xxxx */ + if ((insn & 0x0ff000f0) == 0x07800010) + return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); + + /* SMLALD : cccc 0111 0100 xxxx xxxx xxxx 00x1 xxxx */ + /* SMLSLD : cccc 0111 0100 xxxx xxxx xxxx 01x1 xxxx */ + if ((insn & 0x0ff00090) == 0x07400010) + return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); + + /* SMLAD : cccc 0111 0000 xxxx xxxx xxxx 00x1 xxxx :Q */ + /* SMLSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx :Q */ + /* SMMLA : cccc 0111 0101 xxxx xxxx xxxx 00x1 xxxx : */ + /* SMMLS : cccc 0111 0101 xxxx xxxx xxxx 11x1 xxxx : */ + if ((insn & 0x0ff00090) == 0x07000010 || + (insn & 0x0ff000d0) == 0x07500010 || + (insn & 0x0ff000d0) == 0x075000d0) + return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); + + /* SMUSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx : */ + /* SMUAD : cccc 0111 0000 xxxx 1111 xxxx 00x1 xxxx :Q */ + /* SMMUL : cccc 0111 0101 xxxx 1111 xxxx 00x1 xxxx : */ + return prep_emulate_rd16rs8rm0_wflags(insn, asi); +} + +static enum kprobe_insn __kprobes +space_cccc_01xx(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* LDR : cccc 01xx x0x1 xxxx xxxx xxxx xxxx xxxx */ + /* LDRB : cccc 01xx x1x1 xxxx xxxx xxxx xxxx xxxx */ + /* LDRBT : cccc 01x0 x111 xxxx xxxx xxxx xxxx xxxx */ + /* LDRT : cccc 01x0 x011 xxxx xxxx xxxx xxxx xxxx */ + /* STR : cccc 01xx x0x0 xxxx xxxx xxxx xxxx xxxx */ + /* STRB : cccc 01xx x1x0 xxxx xxxx xxxx xxxx xxxx */ + /* STRBT : cccc 01x0 x110 xxxx xxxx xxxx xxxx xxxx */ + /* STRT : cccc 01x0 x010 xxxx xxxx xxxx xxxx xxxx */ + return prep_emulate_ldr_str(insn, asi); +} + +static enum kprobe_insn __kprobes +space_cccc_100x(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* LDM(2) : cccc 100x x101 xxxx 0xxx xxxx xxxx xxxx */ + /* LDM(3) : cccc 100x x1x1 xxxx 1xxx xxxx xxxx xxxx */ + if ((insn & 0x0e708000) == 0x85000000 || + (insn & 0x0e508000) == 0x85010000) + return INSN_REJECTED; + + /* LDM(1) : cccc 100x x0x1 xxxx xxxx xxxx xxxx xxxx */ + /* STM(1) : cccc 100x x0x0 xxxx xxxx xxxx xxxx xxxx */ + asi->insn[0] = truecc_insn(insn); + asi->insn_handler = ((insn & 0x108000) == 0x008000) ? /* STM & R15 */ + simulate_stm1_pc : simulate_ldm1stm1; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +space_cccc_101x(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* B : cccc 1010 xxxx xxxx xxxx xxxx xxxx xxxx */ + /* BL : cccc 1011 xxxx xxxx xxxx xxxx xxxx xxxx */ + asi->insn[0] = truecc_insn(insn); + asi->insn_handler = simulate_bbl; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +space_cccc_1100_010x(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* MCRR : cccc 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ + /* MRRC : cccc 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ + insn &= 0xfff00fff; + insn |= 0x00001000; /* Rn = r0, Rd = r1 */ + asi->insn[0] = insn; + asi->insn_handler = (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +space_cccc_110x(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* LDC : cccc 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ + /* STC : cccc 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ + insn &= 0xfff0ffff; /* Rn = r0 */ + asi->insn[0] = insn; + asi->insn_handler = emulate_ldcstc; + return INSN_GOOD; +} + +static enum kprobe_insn __kprobes +space_cccc_111x(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */ + /* SWI : cccc 1111 xxxx xxxx xxxx xxxx xxxx xxxx */ + if ((insn & 0xfff000f0) == 0xe1200070 || + (insn & 0x0f000000) == 0x0f000000) + return INSN_REJECTED; + + /* CDP : cccc 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ + if ((insn & 0x0f000010) == 0x0e000000) { + asi->insn[0] = insn; + asi->insn_handler = emulate_none; + return INSN_GOOD; + } + + /* MCR : cccc 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ + /* MRC : cccc 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ + insn &= 0xffff0fff; /* Rd = r0 */ + asi->insn[0] = insn; + asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12; + return INSN_GOOD; +} + +/* Return: + * INSN_REJECTED If instruction is one not allowed to kprobe, + * INSN_GOOD If instruction is supported and uses instruction slot, + * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot. + * + * For instructions we don't want to kprobe (INSN_REJECTED return result): + * These are generally ones that modify the processor state making + * them "hard" to simulate such as switches processor modes or + * make accesses in alternate modes. Any of these could be simulated + * if the work was put into it, but low return considering they + * should also be very rare. + */ +enum kprobe_insn __kprobes +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) +{ + asi->insn[1] = KPROBE_RETURN_INSTRUCTION; + + if ((insn & 0xf0000000) == 0xf0000000) { + + return space_1111(insn, asi); + + } else if ((insn & 0x0e000000) == 0x00000000) { + + return space_cccc_000x(insn, asi); + + } else if ((insn & 0x0e000000) == 0x02000000) { + + return space_cccc_001x(insn, asi); + + } else if ((insn & 0x0f000010) == 0x06000010) { + + return space_cccc_0110__1(insn, asi); + + } else if ((insn & 0x0f000010) == 0x07000010) { + + return space_cccc_0111__1(insn, asi); + + } else if ((insn & 0x0c000000) == 0x04000000) { + + return space_cccc_01xx(insn, asi); + + } else if ((insn & 0x0e000000) == 0x08000000) { + + return space_cccc_100x(insn, asi); + + } else if ((insn & 0x0e000000) == 0x0a000000) { + + return space_cccc_101x(insn, asi); + + } else if ((insn & 0x0fe00000) == 0x0c400000) { + + return space_cccc_1100_010x(insn, asi); + + } else if ((insn & 0x0e000000) == 0x0c400000) { + + return space_cccc_110x(insn, asi); + + } + + return space_cccc_111x(insn, asi); +} + +void __init arm_kprobe_decode_init(void) +{ + find_str_pc_offset(); +} + + +/* + * All ARM instructions listed below. + * + * Instructions and their general purpose registers are given. + * If a particular register may not use R15, it is prefixed with a "!". + * If marked with a "*" means the value returned by reading R15 + * is implementation defined. + * + * ADC/ADD/AND/BIC/CMN/CMP/EOR/MOV/MVN/ORR/RSB/RSC/SBC/SUB/TEQ + * TST: Rd, Rn, Rm, !Rs + * BX: Rm + * BLX(2): !Rm + * BX: Rm (R15 legal, but discouraged) + * BXJ: !Rm, + * CLZ: !Rd, !Rm + * CPY: Rd, Rm + * LDC/2,STC/2 immediate offset & unindex: Rn + * LDC/2,STC/2 immediate pre/post-indexed: !Rn + * LDM(1/3): !Rn, register_list + * LDM(2): !Rn, !register_list + * LDR,STR,PLD immediate offset: Rd, Rn + * LDR,STR,PLD register offset: Rd, Rn, !Rm + * LDR,STR,PLD scaled register offset: Rd, !Rn, !Rm + * LDR,STR immediate pre/post-indexed: Rd, !Rn + * LDR,STR register pre/post-indexed: Rd, !Rn, !Rm + * LDR,STR scaled register pre/post-indexed: Rd, !Rn, !Rm + * LDRB,STRB immediate offset: !Rd, Rn + * LDRB,STRB register offset: !Rd, Rn, !Rm + * LDRB,STRB scaled register offset: !Rd, !Rn, !Rm + * LDRB,STRB immediate pre/post-indexed: !Rd, !Rn + * LDRB,STRB register pre/post-indexed: !Rd, !Rn, !Rm + * LDRB,STRB scaled register pre/post-indexed: !Rd, !Rn, !Rm + * LDRT,LDRBT,STRBT immediate pre/post-indexed: !Rd, !Rn + * LDRT,LDRBT,STRBT register pre/post-indexed: !Rd, !Rn, !Rm + * LDRT,LDRBT,STRBT scaled register pre/post-indexed: !Rd, !Rn, !Rm + * LDRH/SH/SB/D,STRH/SH/SB/D immediate offset: !Rd, Rn + * LDRH/SH/SB/D,STRH/SH/SB/D register offset: !Rd, Rn, !Rm + * LDRH/SH/SB/D,STRH/SH/SB/D immediate pre/post-indexed: !Rd, !Rn + * LDRH/SH/SB/D,STRH/SH/SB/D register pre/post-indexed: !Rd, !Rn, !Rm + * LDREX: !Rd, !Rn + * MCR/2: !Rd + * MCRR/2,MRRC/2: !Rd, !Rn + * MLA: !Rd, !Rn, !Rm, !Rs + * MOV: Rd + * MRC/2: !Rd (if Rd==15, only changes cond codes, not the register) + * MRS,MSR: !Rd + * MUL: !Rd, !Rm, !Rs + * PKH{BT,TB}: !Rd, !Rn, !Rm + * QDADD,[U]QADD/16/8/SUBX: !Rd, !Rm, !Rn + * QDSUB,[U]QSUB/16/8/ADDX: !Rd, !Rm, !Rn + * REV/16/SH: !Rd, !Rm + * RFE: !Rn + * {S,U}[H]ADD{16,8,SUBX},{S,U}[H]SUB{16,8,ADDX}: !Rd, !Rn, !Rm + * SEL: !Rd, !Rn, !Rm + * SMLA<x><y>,SMLA{D,W<y>},SMLSD,SMML{A,S}: !Rd, !Rn, !Rm, !Rs + * SMLAL<x><y>,SMLA{D,LD},SMLSLD,SMMULL,SMULW<y>: !RdHi, !RdLo, !Rm, !Rs + * SMMUL,SMUAD,SMUL<x><y>,SMUSD: !Rd, !Rm, !Rs + * SSAT/16: !Rd, !Rm + * STM(1/2): !Rn, register_list* (R15 in reg list not recommended) + * STRT immediate pre/post-indexed: Rd*, !Rn + * STRT register pre/post-indexed: Rd*, !Rn, !Rm + * STRT scaled register pre/post-indexed: Rd*, !Rn, !Rm + * STREX: !Rd, !Rn, !Rm + * SWP/B: !Rd, !Rn, !Rm + * {S,U}XTA{B,B16,H}: !Rd, !Rn, !Rm + * {S,U}XT{B,B16,H}: !Rd, !Rm + * UM{AA,LA,UL}L: !RdHi, !RdLo, !Rm, !Rs + * USA{D8,A8,T,T16}: !Rd, !Rm, !Rs + * + * May transfer control by writing R15 (possible mode changes or alternate + * mode accesses marked by "*"): + * ALU op (* with s-bit), B, BL, BKPT, BLX(1/2), BX, BXJ, CPS*, CPY, + * LDM(1), LDM(2/3)*, LDR, MOV, RFE*, SWI* + * + * Instructions that do not take general registers, nor transfer control: + * CDP/2, SETEND, SRS* + */ diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c new file mode 100644 index 000000000000..a22a98c43ca5 --- /dev/null +++ b/arch/arm/kernel/kprobes.c @@ -0,0 +1,447 @@ +/* + * arch/arm/kernel/kprobes.c + * + * Kprobes on ARM + * + * Abhishek Sagar <sagar.abhishek@gmail.com> + * Copyright (C) 2006, 2007 Motorola Inc. + * + * Nicolas Pitre <nico@marvell.com> + * Copyright (C) 2007 Marvell Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <linux/kernel.h> +#include <linux/kprobes.h> +#include <linux/module.h> +#include <linux/stringify.h> +#include <asm/traps.h> +#include <asm/cacheflush.h> + +#define MIN_STACK_SIZE(addr) \ + min((unsigned long)MAX_STACK_SIZE, \ + (unsigned long)current_thread_info() + THREAD_START_SP - (addr)) + +#define flush_insns(addr, cnt) \ + flush_icache_range((unsigned long)(addr), \ + (unsigned long)(addr) + \ + sizeof(kprobe_opcode_t) * (cnt)) + +/* Used as a marker in ARM_pc to note when we're in a jprobe. */ +#define JPROBE_MAGIC_ADDR 0xffffffff + +DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; +DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); + + +int __kprobes arch_prepare_kprobe(struct kprobe *p) +{ + kprobe_opcode_t insn; + kprobe_opcode_t tmp_insn[MAX_INSN_SIZE]; + unsigned long addr = (unsigned long)p->addr; + int is; + + if (addr & 0x3 || in_exception_text(addr)) + return -EINVAL; + + insn = *p->addr; + p->opcode = insn; + p->ainsn.insn = tmp_insn; + + switch (arm_kprobe_decode_insn(insn, &p->ainsn)) { + case INSN_REJECTED: /* not supported */ + return -EINVAL; + + case INSN_GOOD: /* instruction uses slot */ + p->ainsn.insn = get_insn_slot(); + if (!p->ainsn.insn) + return -ENOMEM; + for (is = 0; is < MAX_INSN_SIZE; ++is) + p->ainsn.insn[is] = tmp_insn[is]; + flush_insns(&p->ainsn.insn, MAX_INSN_SIZE); + break; + + case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */ + p->ainsn.insn = NULL; + break; + } + + return 0; +} + +void __kprobes arch_arm_kprobe(struct kprobe *p) +{ + *p->addr = KPROBE_BREAKPOINT_INSTRUCTION; + flush_insns(p->addr, 1); +} + +void __kprobes arch_disarm_kprobe(struct kprobe *p) +{ + *p->addr = p->opcode; + flush_insns(p->addr, 1); +} + +void __kprobes arch_remove_kprobe(struct kprobe *p) +{ + if (p->ainsn.insn) { + mutex_lock(&kprobe_mutex); + free_insn_slot(p->ainsn.insn, 0); + mutex_unlock(&kprobe_mutex); + p->ainsn.insn = NULL; + } +} + +static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb) +{ + kcb->prev_kprobe.kp = kprobe_running(); + kcb->prev_kprobe.status = kcb->kprobe_status; +} + +static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb) +{ + __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp; + kcb->kprobe_status = kcb->prev_kprobe.status; +} + +static void __kprobes set_current_kprobe(struct kprobe *p) +{ + __get_cpu_var(current_kprobe) = p; +} + +static void __kprobes singlestep(struct kprobe *p, struct pt_regs *regs, + struct kprobe_ctlblk *kcb) +{ + regs->ARM_pc += 4; + p->ainsn.insn_handler(p, regs); +} + +/* + * Called with IRQs disabled. IRQs must remain disabled from that point + * all the way until processing this kprobe is complete. The current + * kprobes implementation cannot process more than one nested level of + * kprobe, and that level is reserved for user kprobe handlers, so we can't + * risk encountering a new kprobe in an interrupt handler. + */ +void __kprobes kprobe_handler(struct pt_regs *regs) +{ + struct kprobe *p, *cur; + struct kprobe_ctlblk *kcb; + kprobe_opcode_t *addr = (kprobe_opcode_t *)regs->ARM_pc; + + kcb = get_kprobe_ctlblk(); + cur = kprobe_running(); + p = get_kprobe(addr); + + if (p) { + if (cur) { + /* Kprobe is pending, so we're recursing. */ + switch (kcb->kprobe_status) { + case KPROBE_HIT_ACTIVE: + case KPROBE_HIT_SSDONE: + /* A pre- or post-handler probe got us here. */ + kprobes_inc_nmissed_count(p); + save_previous_kprobe(kcb); + set_current_kprobe(p); + kcb->kprobe_status = KPROBE_REENTER; + singlestep(p, regs, kcb); + restore_previous_kprobe(kcb); + break; + default: + /* impossible cases */ + BUG(); + } + } else { + set_current_kprobe(p); + kcb->kprobe_status = KPROBE_HIT_ACTIVE; + + /* + * If we have no pre-handler or it returned 0, we + * continue with normal processing. If we have a + * pre-handler and it returned non-zero, it prepped + * for calling the break_handler below on re-entry, + * so get out doing nothing more here. + */ + if (!p->pre_handler || !p->pre_handler(p, regs)) { + kcb->kprobe_status = KPROBE_HIT_SS; + singlestep(p, regs, kcb); + if (p->post_handler) { + kcb->kprobe_status = KPROBE_HIT_SSDONE; + p->post_handler(p, regs, 0); + } + reset_current_kprobe(); + } + } + } else if (cur) { + /* We probably hit a jprobe. Call its break handler. */ + if (cur->break_handler && cur->break_handler(cur, regs)) { + kcb->kprobe_status = KPROBE_HIT_SS; + singlestep(cur, regs, kcb); + if (cur->post_handler) { + kcb->kprobe_status = KPROBE_HIT_SSDONE; + cur->post_handler(cur, regs, 0); + } + } + reset_current_kprobe(); + } else { + /* + * The probe was removed and a race is in progress. + * There is nothing we can do about it. Let's restart + * the instruction. By the time we can restart, the + * real instruction will be there. + */ + } +} + +int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) +{ + kprobe_handler(regs); + return 0; +} + +int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr) +{ + struct kprobe *cur = kprobe_running(); + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); + + switch (kcb->kprobe_status) { + case KPROBE_HIT_SS: + case KPROBE_REENTER: + /* + * We are here because the instruction being single + * stepped caused a page fault. We reset the current + * kprobe and the PC to point back to the probe address + * and allow the page fault handler to continue as a + * normal page fault. + */ + regs->ARM_pc = (long)cur->addr; + if (kcb->kprobe_status == KPROBE_REENTER) { + restore_previous_kprobe(kcb); + } else { + reset_current_kprobe(); + } + break; + + case KPROBE_HIT_ACTIVE: + case KPROBE_HIT_SSDONE: + /* + * We increment the nmissed count for accounting, + * we can also use npre/npostfault count for accounting + * these specific fault cases. + */ + kprobes_inc_nmissed_count(cur); + + /* + * We come here because instructions in the pre/post + * handler caused the page_fault, this could happen + * if handler tries to access user space by + * copy_from_user(), get_user() etc. Let the + * user-specified handler try to fix it. + */ + if (cur->fault_handler && cur->fault_handler(cur, regs, fsr)) + return 1; + break; + + default: + break; + } + + return 0; +} + +int __kprobes kprobe_exceptions_notify(struct notifier_block *self, + unsigned long val, void *data) +{ + /* + * notify_die() is currently never called on ARM, + * so this callback is currently empty. + */ + return NOTIFY_DONE; +} + +/* + * When a retprobed function returns, trampoline_handler() is called, + * calling the kretprobe's handler. We construct a struct pt_regs to + * give a view of registers r0-r11 to the user return-handler. This is + * not a complete pt_regs structure, but that should be plenty sufficient + * for kretprobe handlers which should normally be interested in r0 only + * anyway. + */ +static void __attribute__((naked)) __kprobes kretprobe_trampoline(void) +{ + __asm__ __volatile__ ( + "stmdb sp!, {r0 - r11} \n\t" + "mov r0, sp \n\t" + "bl trampoline_handler \n\t" + "mov lr, r0 \n\t" + "ldmia sp!, {r0 - r11} \n\t" + "mov pc, lr \n\t" + : : : "memory"); +} + +/* Called from kretprobe_trampoline */ +static __used __kprobes void *trampoline_handler(struct pt_regs *regs) +{ + struct kretprobe_instance *ri = NULL; + struct hlist_head *head, empty_rp; + struct hlist_node *node, *tmp; + unsigned long flags, orig_ret_address = 0; + unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; + + INIT_HLIST_HEAD(&empty_rp); + spin_lock_irqsave(&kretprobe_lock, flags); + head = kretprobe_inst_table_head(current); + + /* + * It is possible to have multiple instances associated with a given + * task either because multiple functions in the call path have + * a return probe installed on them, and/or more than one return + * probe was registered for a target function. + * + * We can handle this because: + * - instances are always inserted at the head of the list + * - when multiple return probes are registered for the same + * function, the first instance's ret_addr will point to the + * real return address, and all the rest will point to + * kretprobe_trampoline + */ + hlist_for_each_entry_safe(ri, node, tmp, head, hlist) { + if (ri->task != current) + /* another task is sharing our hash bucket */ + continue; + + if (ri->rp && ri->rp->handler) { + __get_cpu_var(current_kprobe) = &ri->rp->kp; + get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE; + ri->rp->handler(ri, regs); + __get_cpu_var(current_kprobe) = NULL; + } + + orig_ret_address = (unsigned long)ri->ret_addr; + recycle_rp_inst(ri, &empty_rp); + + if (orig_ret_address != trampoline_address) + /* + * This is the real return address. Any other + * instances associated with this task are for + * other calls deeper on the call stack + */ + break; + } + + kretprobe_assert(ri, orig_ret_address, trampoline_address); + spin_unlock_irqrestore(&kretprobe_lock, flags); + + hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) { + hlist_del(&ri->hlist); + kfree(ri); + } + + return (void *)orig_ret_address; +} + +/* Called with kretprobe_lock held. */ +void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, + struct pt_regs *regs) +{ + ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr; + + /* Replace the return addr with trampoline addr. */ + regs->ARM_lr = (unsigned long)&kretprobe_trampoline; +} + +int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) +{ + struct jprobe *jp = container_of(p, struct jprobe, kp); + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); + long sp_addr = regs->ARM_sp; + + kcb->jprobe_saved_regs = *regs; + memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr)); + regs->ARM_pc = (long)jp->entry; + regs->ARM_cpsr |= PSR_I_BIT; + preempt_disable(); + return 1; +} + +void __kprobes jprobe_return(void) +{ + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); + + __asm__ __volatile__ ( + /* + * Setup an empty pt_regs. Fill SP and PC fields as + * they're needed by longjmp_break_handler. + */ + "sub sp, %0, %1 \n\t" + "ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t" + "str %0, [sp, %2] \n\t" + "str r0, [sp, %3] \n\t" + "mov r0, sp \n\t" + "bl kprobe_handler \n\t" + + /* + * Return to the context saved by setjmp_pre_handler + * and restored by longjmp_break_handler. + */ + "ldr r0, [sp, %4] \n\t" + "msr cpsr_cxsf, r0 \n\t" + "ldmia sp, {r0 - pc} \n\t" + : + : "r" (kcb->jprobe_saved_regs.ARM_sp), + "I" (sizeof(struct pt_regs)), + "J" (offsetof(struct pt_regs, ARM_sp)), + "J" (offsetof(struct pt_regs, ARM_pc)), + "J" (offsetof(struct pt_regs, ARM_cpsr)) + : "memory", "cc"); +} + +int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) +{ + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); + long stack_addr = kcb->jprobe_saved_regs.ARM_sp; + long orig_sp = regs->ARM_sp; + struct jprobe *jp = container_of(p, struct jprobe, kp); + + if (regs->ARM_pc == JPROBE_MAGIC_ADDR) { + if (orig_sp != stack_addr) { + struct pt_regs *saved_regs = + (struct pt_regs *)kcb->jprobe_saved_regs.ARM_sp; + printk("current sp %lx does not match saved sp %lx\n", + orig_sp, stack_addr); + printk("Saved registers for jprobe %p\n", jp); + show_regs(saved_regs); + printk("Current registers\n"); + show_regs(regs); + BUG(); + } + *regs = kcb->jprobe_saved_regs; + memcpy((void *)stack_addr, kcb->jprobes_stack, + MIN_STACK_SIZE(stack_addr)); + preempt_enable_no_resched(); + return 1; + } + return 0; +} + +static struct undef_hook kprobes_break_hook = { + .instr_mask = 0xffffffff, + .instr_val = KPROBE_BREAKPOINT_INSTRUCTION, + .cpsr_mask = MODE_MASK, + .cpsr_val = SVC_MODE, + .fn = kprobe_trap_handler, +}; + +int __init arch_init_kprobes() +{ + arm_kprobe_decode_init(); + register_undef_hook(&kprobes_break_hook); + return 0; +} diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index f6f3689a86ee..b5867eca1d0b 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -79,17 +79,6 @@ static unsigned long dummy_gettimeoffset(void) } #endif -/* - * An implementation of printk_clock() independent from - * sched_clock(). This avoids non-bootable kernels when - * printk_clock is enabled. - */ -unsigned long long printk_clock(void) -{ - return (unsigned long long)(jiffies - INITIAL_JIFFIES) * - (1000000000 / HZ); -} - static unsigned long next_rtc_update; /* @@ -336,7 +325,9 @@ void timer_tick(void) profile_tick(CPU_PROFILING); do_leds(); do_set_rtc(); + write_seqlock(&xtime_lock); do_timer(1); + write_sequnlock(&xtime_lock); #ifndef CONFIG_SMP update_process_times(user_mode(get_irq_regs())); #endif diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index c34db4e868fa..5595fdd75e82 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -19,6 +19,7 @@ #include <linux/kallsyms.h> #include <linux/delay.h> #include <linux/init.h> +#include <linux/kprobes.h> #include <asm/atomic.h> #include <asm/cacheflush.h> @@ -46,15 +47,6 @@ __setup("user_debug=", user_debug_setup); static void dump_mem(const char *str, unsigned long bottom, unsigned long top); -static inline int in_exception_text(unsigned long ptr) -{ - extern char __exception_text_start[]; - extern char __exception_text_end[]; - - return ptr >= (unsigned long)&__exception_text_start && - ptr < (unsigned long)&__exception_text_end; -} - void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) { #ifdef CONFIG_KALLSYMS @@ -322,6 +314,17 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) get_user(instr, (u32 __user *)pc); } +#ifdef CONFIG_KPROBES + /* + * It is possible to have recursive kprobes, so we can't call + * the kprobe trap handler with the undef_lock held. + */ + if (instr == KPROBE_BREAKPOINT_INSTRUCTION && !user_mode(regs)) { + kprobe_trap_handler(regs, instr); + return; + } +#endif + spin_lock_irqsave(&undef_lock, flags); list_for_each_entry(hook, &undef_hook, node) { if ((instr & hook->instr_mask) == hook->instr_val && diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 5ff5406666b4..30f732c7fdb5 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -94,6 +94,7 @@ SECTIONS TEXT_TEXT SCHED_TEXT LOCK_TEXT + KPROBES_TEXT #ifdef CONFIG_MMU *(.fixup) #endif diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c index 0446ef2f5bd6..b016be2b0e35 100644 --- a/arch/arm/mach-aaec2000/core.c +++ b/arch/arm/mach-aaec2000/core.c @@ -130,13 +130,9 @@ static irqreturn_t aaec2000_timer_interrupt(int irq, void *dev_id) { /* TODO: Check timer accuracy */ - write_seqlock(&xtime_lock); - timer_tick(); TIMER1_CLEAR = 1; - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 05a9f8a1b45e..5b0422cdde76 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -22,6 +22,9 @@ config ARCH_AT91SAM9263 config ARCH_AT91SAM9RL bool "AT91SAM9RL" +config ARCH_AT91CAP9 + bool "AT91CAP9" + config ARCH_AT91X40 bool "AT91x40" @@ -178,6 +181,21 @@ endif # ---------------------------------------------------------- +if ARCH_AT91CAP9 + +comment "AT91CAP9 Board Type" + +config MACH_AT91CAP9ADK + bool "Atmel AT91CAP9A-DK Evaluation Kit" + depends on ARCH_AT91CAP9 + help + Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> + +endif + +# ---------------------------------------------------------- + if ARCH_AT91X40 comment "AT91X40 Board Type" @@ -198,13 +216,13 @@ comment "AT91 Board Options" config MTD_AT91_DATAFLASH_CARD bool "Enable DataFlash Card support" - depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK) + depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK) help Enable support for the DataFlash card. config MTD_NAND_AT91_BUSWIDTH_16 bool "Enable 16-bit data bus interface to NAND flash" - depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK) + depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK) help On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). @@ -219,6 +237,22 @@ config AT91_PROGRAMMABLE_CLOCKS Select this if you need to program one or more of the PCK0..PCK3 programmable clock outputs. +config AT91_TIMER_HZ + int "Kernel HZ (jiffies per second)" + range 32 1024 + depends on ARCH_AT91 + default "128" if ARCH_AT91RM9200 + default "100" + help + On AT91rm9200 chips where you're using a system clock derived + from the 32768 Hz hardware clock, this tick rate should divide + it exactly: use a power-of-two value, such as 128 or 256, to + reduce timing errors caused by rounding. + + On AT91sam926x chips, or otherwise when using a higher precision + system clock (of at least several MHz), rounding is less of a + problem so it can be safer to use a decimal values like 100. + endmenu endif diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index a21f08c64ea6..bf5f293dccf8 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -8,7 +8,6 @@ obj-n := obj- := obj-$(CONFIG_AT91_PMC_UNIT) += clock.o -obj-$(CONFIG_PM) += pm.o # CPU-specific support obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o @@ -16,6 +15,7 @@ obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_d obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o +obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o # AT91RM9200 board-specific support @@ -29,7 +29,6 @@ obj-$(CONFIG_MACH_KB9200) += board-kb9202.o obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o obj-$(CONFIG_MACH_KAFA) += board-kafa.o obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o -obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o # AT91SAM9260 board-specific support obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o @@ -43,19 +42,17 @@ obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o # AT91SAM9RL board-specific support obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o -# LEDs support -led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o -led-$(CONFIG_MACH_AT91RM9200EK) += leds.o -led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o -led-$(CONFIG_MACH_CSB337) += leds.o -led-$(CONFIG_MACH_CSB637) += leds.o -led-$(CONFIG_MACH_KB9200) += leds.o -led-$(CONFIG_MACH_KAFA) += leds.o -obj-$(CONFIG_LEDS) += $(led-y) +# AT91CAP9 board-specific support +obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o -# VGA support -#obj-$(CONFIG_FB_S1D13XXX) += ics1523.o +# AT91X40 board-specific support +obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o +# Drivers +obj-y += leds.o + +# Power Management +obj-$(CONFIG_PM) += pm.o ifeq ($(CONFIG_PM_DEBUG),y) CFLAGS_pm.o += -DDEBUG diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot index e667dcc7cd34..071a2506a69f 100644 --- a/arch/arm/mach-at91/Makefile.boot +++ b/arch/arm/mach-at91/Makefile.boot @@ -3,7 +3,12 @@ # PARAMS_PHYS must be within 4MB of ZRELADDR # INITRD_PHYS must be in RAM +ifeq ($(CONFIG_ARCH_AT91CAP9),y) + zreladdr-y := 0x70008000 +params_phys-y := 0x70000100 +initrd_phys-y := 0x70410000 +else zreladdr-y := 0x20008000 params_phys-y := 0x20000100 initrd_phys-y := 0x20410000 - +endif diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c new file mode 100644 index 000000000000..48d27d8000b0 --- /dev/null +++ b/arch/arm/mach-at91/at91cap9.c @@ -0,0 +1,365 @@ +/* + * arch/arm/mach-at91/at91cap9.c + * + * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> + * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> + * Copyright (C) 2007 Atmel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include <linux/module.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/arch/at91cap9.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> + +#include "generic.h" +#include "clock.h" + +static struct map_desc at91cap9_io_desc[] __initdata = { + { + .virtual = AT91_VA_BASE_SYS, + .pfn = __phys_to_pfn(AT91_BASE_SYS), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = AT91_IO_VIRT_BASE - AT91CAP9_SRAM_SIZE, + .pfn = __phys_to_pfn(AT91CAP9_SRAM_BASE), + .length = AT91CAP9_SRAM_SIZE, + .type = MT_DEVICE, + }, +}; + +/* -------------------------------------------------------------------- + * Clocks + * -------------------------------------------------------------------- */ + +/* + * The peripheral clocks. + */ +static struct clk pioABCD_clk = { + .name = "pioABCD_clk", + .pmc_mask = 1 << AT91CAP9_ID_PIOABCD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mpb0_clk = { + .name = "mpb0_clk", + .pmc_mask = 1 << AT91CAP9_ID_MPB0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mpb1_clk = { + .name = "mpb1_clk", + .pmc_mask = 1 << AT91CAP9_ID_MPB1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mpb2_clk = { + .name = "mpb2_clk", + .pmc_mask = 1 << AT91CAP9_ID_MPB2, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mpb3_clk = { + .name = "mpb3_clk", + .pmc_mask = 1 << AT91CAP9_ID_MPB3, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mpb4_clk = { + .name = "mpb4_clk", + .pmc_mask = 1 << AT91CAP9_ID_MPB4, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart0_clk = { + .name = "usart0_clk", + .pmc_mask = 1 << AT91CAP9_ID_US0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart1_clk = { + .name = "usart1_clk", + .pmc_mask = 1 << AT91CAP9_ID_US1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart2_clk = { + .name = "usart2_clk", + .pmc_mask = 1 << AT91CAP9_ID_US2, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc0_clk = { + .name = "mci0_clk", + .pmc_mask = 1 << AT91CAP9_ID_MCI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc1_clk = { + .name = "mci1_clk", + .pmc_mask = 1 << AT91CAP9_ID_MCI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk can_clk = { + .name = "can_clk", + .pmc_mask = 1 << AT91CAP9_ID_CAN, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi_clk = { + .name = "twi_clk", + .pmc_mask = 1 << AT91CAP9_ID_TWI, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi0_clk = { + .name = "spi0_clk", + .pmc_mask = 1 << AT91CAP9_ID_SPI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi1_clk = { + .name = "spi1_clk", + .pmc_mask = 1 << AT91CAP9_ID_SPI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ssc0_clk = { + .name = "ssc0_clk", + .pmc_mask = 1 << AT91CAP9_ID_SSC0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ssc1_clk = { + .name = "ssc1_clk", + .pmc_mask = 1 << AT91CAP9_ID_SSC1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ac97_clk = { + .name = "ac97_clk", + .pmc_mask = 1 << AT91CAP9_ID_AC97C, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tcb_clk = { + .name = "tcb_clk", + .pmc_mask = 1 << AT91CAP9_ID_TCB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pwmc_clk = { + .name = "pwmc_clk", + .pmc_mask = 1 << AT91CAP9_ID_PWMC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk macb_clk = { + .name = "macb_clk", + .pmc_mask = 1 << AT91CAP9_ID_EMAC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk aestdes_clk = { + .name = "aestdes_clk", + .pmc_mask = 1 << AT91CAP9_ID_AESTDES, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk adc_clk = { + .name = "adc_clk", + .pmc_mask = 1 << AT91CAP9_ID_ADC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk isi_clk = { + .name = "isi_clk", + .pmc_mask = 1 << AT91CAP9_ID_ISI, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk lcdc_clk = { + .name = "lcdc_clk", + .pmc_mask = 1 << AT91CAP9_ID_LCDC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk dma_clk = { + .name = "dma_clk", + .pmc_mask = 1 << AT91CAP9_ID_DMA, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk udphs_clk = { + .name = "udphs_clk", + .pmc_mask = 1 << AT91CAP9_ID_UDPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ohci_clk = { + .name = "ohci_clk", + .pmc_mask = 1 << AT91CAP9_ID_UHP, + .type = CLK_TYPE_PERIPHERAL, +}; + +static struct clk *periph_clocks[] __initdata = { + &pioABCD_clk, + &mpb0_clk, + &mpb1_clk, + &mpb2_clk, + &mpb3_clk, + &mpb4_clk, + &usart0_clk, + &usart1_clk, + &usart2_clk, + &mmc0_clk, + &mmc1_clk, + &can_clk, + &twi_clk, + &spi0_clk, + &spi1_clk, + &ssc0_clk, + &ssc1_clk, + &ac97_clk, + &tcb_clk, + &pwmc_clk, + &macb_clk, + &aestdes_clk, + &adc_clk, + &isi_clk, + &lcdc_clk, + &dma_clk, + &udphs_clk, + &ohci_clk, + // irq0 .. irq1 +}; + +/* + * The four programmable clocks. + * You must configure pin multiplexing to bring these signals out. + */ +static struct clk pck0 = { + .name = "pck0", + .pmc_mask = AT91_PMC_PCK0, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 0, +}; +static struct clk pck1 = { + .name = "pck1", + .pmc_mask = AT91_PMC_PCK1, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 1, +}; +static struct clk pck2 = { + .name = "pck2", + .pmc_mask = AT91_PMC_PCK2, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 2, +}; +static struct clk pck3 = { + .name = "pck3", + .pmc_mask = AT91_PMC_PCK3, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 3, +}; + +static void __init at91cap9_register_clocks(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) + clk_register(periph_clocks[i]); + + clk_register(&pck0); + clk_register(&pck1); + clk_register(&pck2); + clk_register(&pck3); +} + +/* -------------------------------------------------------------------- + * GPIO + * -------------------------------------------------------------------- */ + +static struct at91_gpio_bank at91cap9_gpio[] = { + { + .id = AT91CAP9_ID_PIOABCD, + .offset = AT91_PIOA, + .clock = &pioABCD_clk, + }, { + .id = AT91CAP9_ID_PIOABCD, + .offset = AT91_PIOB, + .clock = &pioABCD_clk, + }, { + .id = AT91CAP9_ID_PIOABCD, + .offset = AT91_PIOC, + .clock = &pioABCD_clk, + }, { + .id = AT91CAP9_ID_PIOABCD, + .offset = AT91_PIOD, + .clock = &pioABCD_clk, + } +}; + +static void at91cap9_reset(void) +{ + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); +} + +/* -------------------------------------------------------------------- + * AT91CAP9 processor initialization + * -------------------------------------------------------------------- */ + +void __init at91cap9_initialize(unsigned long main_clock) +{ + /* Map peripherals */ + iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc)); + + at91_arch_reset = at91cap9_reset; + at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); + + /* Init clock subsystem */ + at91_clock_init(main_clock); + + /* Register the processor-specific clocks */ + at91cap9_register_clocks(); + + /* Register GPIO subsystem */ + at91_gpio_init(at91cap9_gpio, 4); +} + +/* -------------------------------------------------------------------- + * Interrupt initialization + * -------------------------------------------------------------------- */ + +/* + * The default interrupt priority levels (0 = lowest, 7 = highest). + */ +static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller (FIQ) */ + 7, /* System Peripherals */ + 1, /* Parallel IO Controller A, B, C and D */ + 0, /* MP Block Peripheral 0 */ + 0, /* MP Block Peripheral 1 */ + 0, /* MP Block Peripheral 2 */ + 0, /* MP Block Peripheral 3 */ + 0, /* MP Block Peripheral 4 */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ + 0, /* Multimedia Card Interface 0 */ + 0, /* Multimedia Card Interface 1 */ + 3, /* CAN */ + 6, /* Two-Wire Interface */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ + 4, /* Serial Synchronous Controller 0 */ + 4, /* Serial Synchronous Controller 1 */ + 5, /* AC97 Controller */ + 0, /* Timer Counter 0, 1 and 2 */ + 0, /* Pulse Width Modulation Controller */ + 3, /* Ethernet */ + 0, /* Advanced Encryption Standard, Triple DES*/ + 0, /* Analog-to-Digital Converter */ + 0, /* Image Sensor Interface */ + 3, /* LCD Controller */ + 0, /* DMA Controller */ + 2, /* USB Device Port */ + 2, /* USB Host port */ + 0, /* Advanced Interrupt Controller (IRQ0) */ + 0, /* Advanced Interrupt Controller (IRQ1) */ +}; + +void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS]) +{ + if (!priority) + priority = at91cap9_default_irq_priority; + + /* Initialize the AIC interrupt controller */ + at91_aic_init(priority); + + /* Enable GPIO interrupts */ + at91_gpio_irq_setup(); +} diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c new file mode 100644 index 000000000000..c50fad9cd143 --- /dev/null +++ b/arch/arm/mach-at91/at91cap9_devices.c @@ -0,0 +1,1066 @@ +/* + * arch/arm/mach-at91/at91cap9_devices.c + * + * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> + * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> + * Copyright (C) 2007 Atmel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <linux/dma-mapping.h> +#include <linux/platform_device.h> +#include <linux/mtd/physmap.h> + +#include <video/atmel_lcdc.h> + +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91cap9.h> +#include <asm/arch/at91sam926x_mc.h> +#include <asm/arch/at91cap9_matrix.h> + +#include "generic.h" + + +/* -------------------------------------------------------------------- + * USB Host + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) +static u64 ohci_dmamask = DMA_BIT_MASK(32); +static struct at91_usbh_data usbh_data; + +static struct resource usbh_resources[] = { + [0] = { + .start = AT91CAP9_UHP_BASE, + .end = AT91CAP9_UHP_BASE + SZ_1M - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_UHP, + .end = AT91CAP9_ID_UHP, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91_usbh_device = { + .name = "at91_ohci", + .id = -1, + .dev = { + .dma_mask = &ohci_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &usbh_data, + }, + .resource = usbh_resources, + .num_resources = ARRAY_SIZE(usbh_resources), +}; + +void __init at91_add_device_usbh(struct at91_usbh_data *data) +{ + int i; + + if (!data) + return; + + /* Enable VBus control for UHP ports */ + for (i = 0; i < data->ports; i++) { + if (data->vbus_pin[i]) + at91_set_gpio_output(data->vbus_pin[i], 0); + } + + usbh_data = *data; + platform_device_register(&at91_usbh_device); +} +#else +void __init at91_add_device_usbh(struct at91_usbh_data *data) {} +#endif + + +/* -------------------------------------------------------------------- + * Ethernet + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) +static u64 eth_dmamask = DMA_BIT_MASK(32); +static struct at91_eth_data eth_data; + +static struct resource eth_resources[] = { + [0] = { + .start = AT91CAP9_BASE_EMAC, + .end = AT91CAP9_BASE_EMAC + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_EMAC, + .end = AT91CAP9_ID_EMAC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_eth_device = { + .name = "macb", + .id = -1, + .dev = { + .dma_mask = ð_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = ð_data, + }, + .resource = eth_resources, + .num_resources = ARRAY_SIZE(eth_resources), +}; + +void __init at91_add_device_eth(struct at91_eth_data *data) +{ + if (!data) + return; + + if (data->phy_irq_pin) { + at91_set_gpio_input(data->phy_irq_pin, 0); + at91_set_deglitch(data->phy_irq_pin, 1); + } + + /* Pins used for MII and RMII */ + at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ + at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ + + if (!data->is_rmii) { + at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ + at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ + at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ + at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ + at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ + at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ + at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ + } + + eth_data = *data; + platform_device_register(&at91cap9_eth_device); +} +#else +void __init at91_add_device_eth(struct at91_eth_data *data) {} +#endif + + +/* -------------------------------------------------------------------- + * MMC / SD + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) +static u64 mmc_dmamask = DMA_BIT_MASK(32); +static struct at91_mmc_data mmc0_data, mmc1_data; + +static struct resource mmc0_resources[] = { + [0] = { + .start = AT91CAP9_BASE_MCI0, + .end = AT91CAP9_BASE_MCI0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_MCI0, + .end = AT91CAP9_ID_MCI0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_mmc0_device = { + .name = "at91_mci", + .id = 0, + .dev = { + .dma_mask = &mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &mmc0_data, + }, + .resource = mmc0_resources, + .num_resources = ARRAY_SIZE(mmc0_resources), +}; + +static struct resource mmc1_resources[] = { + [0] = { + .start = AT91CAP9_BASE_MCI1, + .end = AT91CAP9_BASE_MCI1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_MCI1, + .end = AT91CAP9_ID_MCI1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_mmc1_device = { + .name = "at91_mci", + .id = 1, + .dev = { + .dma_mask = &mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &mmc1_data, + }, + .resource = mmc1_resources, + .num_resources = ARRAY_SIZE(mmc1_resources), +}; + +void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) +{ + if (!data) + return; + + /* input/irq */ + if (data->det_pin) { + at91_set_gpio_input(data->det_pin, 1); + at91_set_deglitch(data->det_pin, 1); + } + if (data->wp_pin) + at91_set_gpio_input(data->wp_pin, 1); + if (data->vcc_pin) + at91_set_gpio_output(data->vcc_pin, 0); + + if (mmc_id == 0) { /* MCI0 */ + /* CLK */ + at91_set_A_periph(AT91_PIN_PA2, 0); + + /* CMD */ + at91_set_A_periph(AT91_PIN_PA1, 1); + + /* DAT0, maybe DAT1..DAT3 */ + at91_set_A_periph(AT91_PIN_PA0, 1); + if (data->wire4) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + } + + mmc0_data = *data; + at91_clock_associate("mci0_clk", &at91cap9_mmc1_device.dev, "mci_clk"); + platform_device_register(&at91cap9_mmc0_device); + } else { /* MCI1 */ + /* CLK */ + at91_set_A_periph(AT91_PIN_PA16, 0); + + /* CMD */ + at91_set_A_periph(AT91_PIN_PA17, 1); + + /* DAT0, maybe DAT1..DAT3 */ + at91_set_A_periph(AT91_PIN_PA18, 1); + if (data->wire4) { + at91_set_A_periph(AT91_PIN_PA19, 1); + at91_set_A_periph(AT91_PIN_PA20, 1); + at91_set_A_periph(AT91_PIN_PA21, 1); + } + + mmc1_data = *data; + at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk"); + platform_device_register(&at91cap9_mmc1_device); + } +} +#else +void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} +#endif + + +/* -------------------------------------------------------------------- + * NAND / SmartMedia + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) +static struct at91_nand_data nand_data; + +#define NAND_BASE AT91_CHIPSELECT_3 + +static struct resource nand_resources[] = { + { + .start = NAND_BASE, + .end = NAND_BASE + SZ_256M - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device at91cap9_nand_device = { + .name = "at91_nand", + .id = -1, + .dev = { + .platform_data = &nand_data, + }, + .resource = nand_resources, + .num_resources = ARRAY_SIZE(nand_resources), +}; + +void __init at91_add_device_nand(struct at91_nand_data *data) +{ + unsigned long csa, mode; + + if (!data) + return; + + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); + + /* set the bus interface characteristics */ + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1) + | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1)); + + at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6) + | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6)); + + at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8)); + + if (data->bus_width_16) + mode = AT91_SMC_DBW_16; + else + mode = AT91_SMC_DBW_8; + at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); + + /* enable pin */ + if (data->enable_pin) + at91_set_gpio_output(data->enable_pin, 1); + + /* ready/busy pin */ + if (data->rdy_pin) + at91_set_gpio_input(data->rdy_pin, 1); + + /* card detect pin */ + if (data->det_pin) + at91_set_gpio_input(data->det_pin, 1); + + nand_data = *data; + platform_device_register(&at91cap9_nand_device); +} +#else +void __init at91_add_device_nand(struct at91_nand_data *data) {} +#endif + +/* -------------------------------------------------------------------- + * TWI (i2c) + * -------------------------------------------------------------------- */ + +/* + * Prefer the GPIO code since the TWI controller isn't robust + * (gets overruns and underruns under load) and can only issue + * repeated STARTs in one scenario (the driver doesn't yet handle them). + */ +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) + +static struct i2c_gpio_platform_data pdata = { + .sda_pin = AT91_PIN_PB4, + .sda_is_open_drain = 1, + .scl_pin = AT91_PIN_PB5, + .scl_is_open_drain = 1, + .udelay = 2, /* ~100 kHz */ +}; + +static struct platform_device at91cap9_twi_device = { + .name = "i2c-gpio", + .id = -1, + .dev.platform_data = &pdata, +}; + +void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) +{ + at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */ + at91_set_multi_drive(AT91_PIN_PB4, 1); + + at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */ + at91_set_multi_drive(AT91_PIN_PB5, 1); + + i2c_register_board_info(0, devices, nr_devices); + platform_device_register(&at91cap9_twi_device); +} + +#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) + +static struct resource twi_resources[] = { + [0] = { + .start = AT91CAP9_BASE_TWI, + .end = AT91CAP9_BASE_TWI + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_TWI, + .end = AT91CAP9_ID_TWI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_twi_device = { + .name = "at91_i2c", + .id = -1, + .resource = twi_resources, + .num_resources = ARRAY_SIZE(twi_resources), +}; + +void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) +{ + /* pins used for TWI interface */ + at91_set_B_periph(AT91_PIN_PB4, 0); /* TWD */ + at91_set_multi_drive(AT91_PIN_PB4, 1); + + at91_set_B_periph(AT91_PIN_PB5, 0); /* TWCK */ + at91_set_multi_drive(AT91_PIN_PB5, 1); + + i2c_register_board_info(0, devices, nr_devices); + platform_device_register(&at91cap9_twi_device); +} +#else +void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} +#endif + +/* -------------------------------------------------------------------- + * SPI + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) +static u64 spi_dmamask = DMA_BIT_MASK(32); + +static struct resource spi0_resources[] = { + [0] = { + .start = AT91CAP9_BASE_SPI0, + .end = AT91CAP9_BASE_SPI0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_SPI0, + .end = AT91CAP9_ID_SPI0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_spi0_device = { + .name = "atmel_spi", + .id = 0, + .dev = { + .dma_mask = &spi_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = spi0_resources, + .num_resources = ARRAY_SIZE(spi0_resources), +}; + +static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 }; + +static struct resource spi1_resources[] = { + [0] = { + .start = AT91CAP9_BASE_SPI1, + .end = AT91CAP9_BASE_SPI1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_SPI1, + .end = AT91CAP9_ID_SPI1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_spi1_device = { + .name = "atmel_spi", + .id = 1, + .dev = { + .dma_mask = &spi_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = spi1_resources, + .num_resources = ARRAY_SIZE(spi1_resources), +}; + +static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 }; + +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) +{ + int i; + unsigned long cs_pin; + short enable_spi0 = 0; + short enable_spi1 = 0; + + /* Choose SPI chip-selects */ + for (i = 0; i < nr_devices; i++) { + if (devices[i].controller_data) + cs_pin = (unsigned long) devices[i].controller_data; + else if (devices[i].bus_num == 0) + cs_pin = spi0_standard_cs[devices[i].chip_select]; + else + cs_pin = spi1_standard_cs[devices[i].chip_select]; + + if (devices[i].bus_num == 0) + enable_spi0 = 1; + else + enable_spi1 = 1; + + /* enable chip-select pin */ + at91_set_gpio_output(cs_pin, 1); + + /* pass chip-select pin to driver */ + devices[i].controller_data = (void *) cs_pin; + } + + spi_register_board_info(devices, nr_devices); + + /* Configure SPI bus(es) */ + if (enable_spi0) { + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk"); + platform_device_register(&at91cap9_spi0_device); + } + if (enable_spi1) { + at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ + at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ + at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ + + at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk"); + platform_device_register(&at91cap9_spi1_device); + } +} +#else +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} +#endif + + +/* -------------------------------------------------------------------- + * RTT + * -------------------------------------------------------------------- */ + +static struct platform_device at91cap9_rtt_device = { + .name = "at91_rtt", + .id = -1, + .num_resources = 0, +}; + +static void __init at91_add_device_rtt(void) +{ + platform_device_register(&at91cap9_rtt_device); +} + + +/* -------------------------------------------------------------------- + * Watchdog + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) +static struct platform_device at91cap9_wdt_device = { + .name = "at91_wdt", + .id = -1, + .num_resources = 0, +}; + +static void __init at91_add_device_watchdog(void) +{ + platform_device_register(&at91cap9_wdt_device); +} +#else +static void __init at91_add_device_watchdog(void) {} +#endif + + +/* -------------------------------------------------------------------- + * AC97 + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) +static u64 ac97_dmamask = DMA_BIT_MASK(32); +static struct atmel_ac97_data ac97_data; + +static struct resource ac97_resources[] = { + [0] = { + .start = AT91CAP9_BASE_AC97C, + .end = AT91CAP9_BASE_AC97C + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_AC97C, + .end = AT91CAP9_ID_AC97C, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_ac97_device = { + .name = "ac97c", + .id = 1, + .dev = { + .dma_mask = &ac97_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &ac97_data, + }, + .resource = ac97_resources, + .num_resources = ARRAY_SIZE(ac97_resources), +}; + +void __init at91_add_device_ac97(struct atmel_ac97_data *data) +{ + if (!data) + return; + + at91_set_A_periph(AT91_PIN_PA6, 0); /* AC97FS */ + at91_set_A_periph(AT91_PIN_PA7, 0); /* AC97CK */ + at91_set_A_periph(AT91_PIN_PA8, 0); /* AC97TX */ + at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ + + /* reset */ + if (data->reset_pin) + at91_set_gpio_output(data->reset_pin, 0); + + ac97_data = *data; + platform_device_register(&at91cap9_ac97_device); +} +#else +void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} +#endif + + +/* -------------------------------------------------------------------- + * LCD Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) +static u64 lcdc_dmamask = DMA_BIT_MASK(32); +static struct atmel_lcdfb_info lcdc_data; + +static struct resource lcdc_resources[] = { + [0] = { + .start = AT91CAP9_LCDC_BASE, + .end = AT91CAP9_LCDC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_LCDC, + .end = AT91CAP9_ID_LCDC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91_lcdc_device = { + .name = "atmel_lcdfb", + .id = 0, + .dev = { + .dma_mask = &lcdc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &lcdc_data, + }, + .resource = lcdc_resources, + .num_resources = ARRAY_SIZE(lcdc_resources), +}; + +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) +{ + if (!data) + return; + + at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ + at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ + at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ + at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ + at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ + at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ + at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ + at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */ + at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ + at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ + at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ + at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ + at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ + at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */ + at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ + at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ + + lcdc_data = *data; + platform_device_register(&at91_lcdc_device); +} +#else +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} +#endif + + +/* -------------------------------------------------------------------- + * SSC -- Synchronous Serial Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) +static u64 ssc0_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc0_resources[] = { + [0] = { + .start = AT91CAP9_BASE_SSC0, + .end = AT91CAP9_BASE_SSC0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_SSC0, + .end = AT91CAP9_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_ssc0_device = { + .name = "ssc", + .id = 0, + .dev = { + .dma_mask = &ssc0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc0_resources, + .num_resources = ARRAY_SIZE(ssc0_resources), +}; + +static inline void configure_ssc0_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB0, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB1, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB2, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB3, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB4, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB5, 1); +} + +static u64 ssc1_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc1_resources[] = { + [0] = { + .start = AT91CAP9_BASE_SSC1, + .end = AT91CAP9_BASE_SSC1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_SSC1, + .end = AT91CAP9_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91cap9_ssc1_device = { + .name = "ssc", + .id = 1, + .dev = { + .dma_mask = &ssc1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc1_resources, + .num_resources = ARRAY_SIZE(ssc1_resources), +}; + +static inline void configure_ssc1_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB6, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB7, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB8, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB9, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB10, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB11, 1); +} + +/* + * SSC controllers are accessed through library code, instead of any + * kind of all-singing/all-dancing driver. For example one could be + * used by a particular I2S audio codec's driver, while another one + * on the same system might be used by a custom data capture driver. + */ +void __init at91_add_device_ssc(unsigned id, unsigned pins) +{ + struct platform_device *pdev; + + /* + * NOTE: caller is responsible for passing information matching + * "pins" to whatever will be using each particular controller. + */ + switch (id) { + case AT91CAP9_ID_SSC0: + pdev = &at91cap9_ssc0_device; + configure_ssc0_pins(pins); + at91_clock_associate("ssc0_clk", &pdev->dev, "ssc"); + break; + case AT91CAP9_ID_SSC1: + pdev = &at91cap9_ssc1_device; + configure_ssc1_pins(pins); + at91_clock_associate("ssc1_clk", &pdev->dev, "ssc"); + break; + default: + return; + } + + platform_device_register(pdev); +} + +#else +void __init at91_add_device_ssc(unsigned id, unsigned pins) {} +#endif + + +/* -------------------------------------------------------------------- + * UART + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_SERIAL_ATMEL) +static struct resource dbgu_resources[] = { + [0] = { + .start = AT91_VA_BASE_SYS + AT91_DBGU, + .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct atmel_uart_data dbgu_data = { + .use_dma_tx = 0, + .use_dma_rx = 0, /* DBGU not capable of receive DMA */ + .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), +}; + +static u64 dbgu_dmamask = DMA_BIT_MASK(32); + +static struct platform_device at91cap9_dbgu_device = { + .name = "atmel_usart", + .id = 0, + .dev = { + .dma_mask = &dbgu_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dbgu_data, + }, + .resource = dbgu_resources, + .num_resources = ARRAY_SIZE(dbgu_resources), +}; + +static inline void configure_dbgu_pins(void) +{ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ +} + +static struct resource uart0_resources[] = { + [0] = { + .start = AT91CAP9_BASE_US0, + .end = AT91CAP9_BASE_US0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_US0, + .end = AT91CAP9_ID_US0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct atmel_uart_data uart0_data = { + .use_dma_tx = 1, + .use_dma_rx = 1, +}; + +static u64 uart0_dmamask = DMA_BIT_MASK(32); + +static struct platform_device at91cap9_uart0_device = { + .name = "atmel_usart", + .id = 1, + .dev = { + .dma_mask = &uart0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart0_data, + }, + .resource = uart0_resources, + .num_resources = ARRAY_SIZE(uart0_resources), +}; + +static inline void configure_usart0_pins(unsigned pins) +{ + at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PA24, 0); /* RTS0 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PA25, 0); /* CTS0 */ +} + +static struct resource uart1_resources[] = { + [0] = { + .start = AT91CAP9_BASE_US1, + .end = AT91CAP9_BASE_US1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_US1, + .end = AT91CAP9_ID_US1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct atmel_uart_data uart1_data = { + .use_dma_tx = 1, + .use_dma_rx = 1, +}; + +static u64 uart1_dmamask = DMA_BIT_MASK(32); + +static struct platform_device at91cap9_uart1_device = { + .name = "atmel_usart", + .id = 2, + .dev = { + .dma_mask = &uart1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart1_data, + }, + .resource = uart1_resources, + .num_resources = ARRAY_SIZE(uart1_resources), +}; + +static inline void configure_usart1_pins(unsigned pins) +{ + at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ +} + +static struct resource uart2_resources[] = { + [0] = { + .start = AT91CAP9_BASE_US2, + .end = AT91CAP9_BASE_US2 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_ID_US2, + .end = AT91CAP9_ID_US2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct atmel_uart_data uart2_data = { + .use_dma_tx = 1, + .use_dma_rx = 1, +}; + +static u64 uart2_dmamask = DMA_BIT_MASK(32); + +static struct platform_device at91cap9_uart2_device = { + .name = "atmel_usart", + .id = 3, + .dev = { + .dma_mask = &uart2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart2_data, + }, + .resource = uart2_resources, + .num_resources = ARRAY_SIZE(uart2_resources), +}; + +static inline void configure_usart2_pins(unsigned pins) +{ + at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ +} + +static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ +struct platform_device *atmel_default_console_device; /* the serial console device */ + +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) +{ + struct platform_device *pdev; + + switch (id) { + case 0: /* DBGU */ + pdev = &at91cap9_dbgu_device; + configure_dbgu_pins(); + at91_clock_associate("mck", &pdev->dev, "usart"); + break; + case AT91CAP9_ID_US0: + pdev = &at91cap9_uart0_device; + configure_usart0_pins(pins); + at91_clock_associate("usart0_clk", &pdev->dev, "usart"); + break; + case AT91CAP9_ID_US1: + pdev = &at91cap9_uart1_device; + configure_usart1_pins(pins); + at91_clock_associate("usart1_clk", &pdev->dev, "usart"); + break; + case AT91CAP9_ID_US2: + pdev = &at91cap9_uart2_device; + configure_usart2_pins(pins); + at91_clock_associate("usart2_clk", &pdev->dev, "usart"); + break; + default: + return; + } + pdev->id = portnr; /* update to mapped ID */ + + if (portnr < ATMEL_MAX_UART) + at91_uarts[portnr] = pdev; +} + +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) + atmel_default_console_device = at91_uarts[portnr]; + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); +} + +void __init at91_add_device_serial(void) +{ + int i; + + for (i = 0; i < ATMEL_MAX_UART; i++) { + if (at91_uarts[i]) + platform_device_register(at91_uarts[i]); + } +} +#else +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} +void __init at91_add_device_serial(void) {} +#endif + + +/* -------------------------------------------------------------------- */ +/* + * These devices are always present and don't need any board-specific + * setup. + */ +static int __init at91_add_standard_devices(void) +{ + at91_add_device_rtt(); + at91_add_device_watchdog(); + return 0; +} + +arch_initcall(at91_add_standard_devices); diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 2cad2bf864be..d688c1dbd925 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -301,28 +301,28 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { 7, /* Advanced Interrupt Controller (FIQ) */ 7, /* System Peripherals */ - 0, /* Parallel IO Controller A */ - 0, /* Parallel IO Controller B */ - 0, /* Parallel IO Controller C */ - 0, /* Parallel IO Controller D */ - 6, /* USART 0 */ - 6, /* USART 1 */ - 6, /* USART 2 */ - 6, /* USART 3 */ + 1, /* Parallel IO Controller A */ + 1, /* Parallel IO Controller B */ + 1, /* Parallel IO Controller C */ + 1, /* Parallel IO Controller D */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ + 5, /* USART 3 */ 0, /* Multimedia Card Interface */ - 4, /* USB Device Port */ - 0, /* Two-Wire Interface */ - 6, /* Serial Peripheral Interface */ - 5, /* Serial Synchronous Controller 0 */ - 5, /* Serial Synchronous Controller 1 */ - 5, /* Serial Synchronous Controller 2 */ + 2, /* USB Device Port */ + 6, /* Two-Wire Interface */ + 5, /* Serial Peripheral Interface */ + 4, /* Serial Synchronous Controller 0 */ + 4, /* Serial Synchronous Controller 1 */ + 4, /* Serial Synchronous Controller 2 */ 0, /* Timer Counter 0 */ 0, /* Timer Counter 1 */ 0, /* Timer Counter 2 */ 0, /* Timer Counter 3 */ 0, /* Timer Counter 4 */ 0, /* Timer Counter 5 */ - 3, /* USB Host port */ + 2, /* USB Host port */ 3, /* Ethernet MAC */ 0, /* Advanced Interrupt Controller (IRQ0) */ 0, /* Advanced Interrupt Controller (IRQ1) */ diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 9296833f91cc..ef6aeb86e980 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -13,6 +13,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <linux/i2c-gpio.h> @@ -29,7 +30,7 @@ * -------------------------------------------------------------------- */ #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static u64 ohci_dmamask = 0xffffffffUL; +static u64 ohci_dmamask = DMA_BIT_MASK(32); static struct at91_usbh_data usbh_data; static struct resource usbh_resources[] = { @@ -50,7 +51,7 @@ static struct platform_device at91rm9200_usbh_device = { .id = -1, .dev = { .dma_mask = &ohci_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &usbh_data, }, .resource = usbh_resources, @@ -125,7 +126,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) -static u64 eth_dmamask = 0xffffffffUL; +static u64 eth_dmamask = DMA_BIT_MASK(32); static struct at91_eth_data eth_data; static struct resource eth_resources[] = { @@ -146,7 +147,7 @@ static struct platform_device at91rm9200_eth_device = { .id = -1, .dev = { .dma_mask = ð_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = ð_data, }, .resource = eth_resources, @@ -285,7 +286,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -static u64 mmc_dmamask = 0xffffffffUL; +static u64 mmc_dmamask = DMA_BIT_MASK(32); static struct at91_mmc_data mmc_data; static struct resource mmc_resources[] = { @@ -306,7 +307,7 @@ static struct platform_device at91rm9200_mmc_device = { .id = -1, .dev = { .dma_mask = &mmc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &mmc_data, }, .resource = mmc_resources, @@ -375,7 +376,7 @@ static struct at91_nand_data nand_data; static struct resource nand_resources[] = { { .start = NAND_BASE, - .end = NAND_BASE + SZ_8M - 1, + .end = NAND_BASE + SZ_256M - 1, .flags = IORESOURCE_MEM, } }; @@ -513,7 +514,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -static u64 spi_dmamask = 0xffffffffUL; +static u64 spi_dmamask = DMA_BIT_MASK(32); static struct resource spi_resources[] = { [0] = { @@ -533,7 +534,7 @@ static struct platform_device at91rm9200_spi_device = { .id = 0, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi_resources, .num_resources = ARRAY_SIZE(spi_resources), @@ -557,8 +558,11 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) else cs_pin = spi_standard_cs[devices[i].chip_select]; - /* enable chip-select pin */ - at91_set_gpio_output(cs_pin, 1); + if (devices[i].chip_select == 0) /* for CS0 errata */ + at91_set_A_periph(cs_pin, 0); + else + at91_set_gpio_output(cs_pin, 1); + /* pass chip-select pin to driver */ devices[i].controller_data = (void *) cs_pin; @@ -613,24 +617,175 @@ static void __init at91_add_device_watchdog(void) {} /* -------------------------------------------------------------------- - * LEDs + * SSC -- Synchronous Serial Controller * -------------------------------------------------------------------- */ -#if defined(CONFIG_LEDS) -u8 at91_leds_cpu; -u8 at91_leds_timer; +#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) +static u64 ssc0_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc0_resources[] = { + [0] = { + .start = AT91RM9200_BASE_SSC0, + .end = AT91RM9200_BASE_SSC0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91RM9200_ID_SSC0, + .end = AT91RM9200_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91rm9200_ssc0_device = { + .name = "ssc", + .id = 0, + .dev = { + .dma_mask = &ssc0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc0_resources, + .num_resources = ARRAY_SIZE(ssc0_resources), +}; + +static inline void configure_ssc0_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB0, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB1, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB2, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB3, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB4, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB5, 1); +} + +static u64 ssc1_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc1_resources[] = { + [0] = { + .start = AT91RM9200_BASE_SSC1, + .end = AT91RM9200_BASE_SSC1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91RM9200_ID_SSC1, + .end = AT91RM9200_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91rm9200_ssc1_device = { + .name = "ssc", + .id = 1, + .dev = { + .dma_mask = &ssc1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc1_resources, + .num_resources = ARRAY_SIZE(ssc1_resources), +}; + +static inline void configure_ssc1_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB6, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB7, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB8, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB9, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB10, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB11, 1); +} + +static u64 ssc2_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc2_resources[] = { + [0] = { + .start = AT91RM9200_BASE_SSC2, + .end = AT91RM9200_BASE_SSC2 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91RM9200_ID_SSC2, + .end = AT91RM9200_ID_SSC2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91rm9200_ssc2_device = { + .name = "ssc", + .id = 2, + .dev = { + .dma_mask = &ssc2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc2_resources, + .num_resources = ARRAY_SIZE(ssc2_resources), +}; + +static inline void configure_ssc2_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB12, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB13, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB14, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB15, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB16, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB17, 1); +} -void __init at91_init_leds(u8 cpu_led, u8 timer_led) +/* + * SSC controllers are accessed through library code, instead of any + * kind of all-singing/all-dancing driver. For example one could be + * used by a particular I2S audio codec's driver, while another one + * on the same system might be used by a custom data capture driver. + */ +void __init at91_add_device_ssc(unsigned id, unsigned pins) { - /* Enable GPIO to access the LEDs */ - at91_set_gpio_output(cpu_led, 1); - at91_set_gpio_output(timer_led, 1); + struct platform_device *pdev; - at91_leds_cpu = cpu_led; - at91_leds_timer = timer_led; + /* + * NOTE: caller is responsible for passing information matching + * "pins" to whatever will be using each particular controller. + */ + switch (id) { + case AT91RM9200_ID_SSC0: + pdev = &at91rm9200_ssc0_device; + configure_ssc0_pins(pins); + at91_clock_associate("ssc0_clk", &pdev->dev, "ssc"); + break; + case AT91RM9200_ID_SSC1: + pdev = &at91rm9200_ssc1_device; + configure_ssc1_pins(pins); + at91_clock_associate("ssc1_clk", &pdev->dev, "ssc"); + break; + case AT91RM9200_ID_SSC2: + pdev = &at91rm9200_ssc2_device; + configure_ssc2_pins(pins); + at91_clock_associate("ssc2_clk", &pdev->dev, "ssc"); + break; + default: + return; + } + + platform_device_register(pdev); } + #else -void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} +void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #endif @@ -658,12 +813,15 @@ static struct atmel_uart_data dbgu_data = { .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), }; +static u64 dbgu_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91rm9200_dbgu_device = { .name = "atmel_usart", .id = 0, .dev = { - .platform_data = &dbgu_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &dbgu_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dbgu_data, }, .resource = dbgu_resources, .num_resources = ARRAY_SIZE(dbgu_resources), @@ -693,28 +851,35 @@ static struct atmel_uart_data uart0_data = { .use_dma_rx = 1, }; +static u64 uart0_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91rm9200_uart0_device = { .name = "atmel_usart", .id = 1, .dev = { - .platform_data = &uart0_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart0_data, }, .resource = uart0_resources, .num_resources = ARRAY_SIZE(uart0_resources), }; -static inline void configure_usart0_pins(void) +static inline void configure_usart0_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */ - at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ - /* - * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. - * We need to drive the pin manually. Default is off (RTS is active low). - */ - at91_set_gpio_output(AT91_PIN_PA21, 1); + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ + + if (pins & ATMEL_UART_RTS) { + /* + * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. + * We need to drive the pin manually. Default is off (RTS is active low). + */ + at91_set_gpio_output(AT91_PIN_PA21, 1); + } } static struct resource uart1_resources[] = { @@ -735,27 +900,37 @@ static struct atmel_uart_data uart1_data = { .use_dma_rx = 1, }; +static u64 uart1_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91rm9200_uart1_device = { .name = "atmel_usart", .id = 2, .dev = { - .platform_data = &uart1_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart1_data, }, .resource = uart1_resources, .num_resources = ARRAY_SIZE(uart1_resources), }; -static inline void configure_usart1_pins(void) +static inline void configure_usart1_pins(unsigned pins) { - at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ - at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */ - at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ - at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ - at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ - at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ + + if (pins & ATMEL_UART_RI) + at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ + if (pins & ATMEL_UART_DTR) + at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ + if (pins & ATMEL_UART_DCD) + at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ + if (pins & ATMEL_UART_DSR) + at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ } static struct resource uart2_resources[] = { @@ -776,21 +951,29 @@ static struct atmel_uart_data uart2_data = { .use_dma_rx = 1, }; +static u64 uart2_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91rm9200_uart2_device = { .name = "atmel_usart", .id = 3, .dev = { - .platform_data = &uart2_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart2_data, }, .resource = uart2_resources, .num_resources = ARRAY_SIZE(uart2_resources), }; -static inline void configure_usart2_pins(void) +static inline void configure_usart2_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */ at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */ + + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PA30, 0); /* CTS2 */ + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PA31, 0); /* RTS2 */ } static struct resource uart3_resources[] = { @@ -811,27 +994,35 @@ static struct atmel_uart_data uart3_data = { .use_dma_rx = 1, }; +static u64 uart3_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91rm9200_uart3_device = { .name = "atmel_usart", .id = 4, .dev = { - .platform_data = &uart3_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart3_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart3_data, }, .resource = uart3_resources, .num_resources = ARRAY_SIZE(uart3_resources), }; -static inline void configure_usart3_pins(void) +static inline void configure_usart3_pins(unsigned pins) { at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ + + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */ + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */ } -struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ +static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ struct platform_device *atmel_default_console_device; /* the serial console device */ -void __init at91_init_serial(struct at91_uart_config *config) +void __init __deprecated at91_init_serial(struct at91_uart_config *config) { int i; @@ -839,22 +1030,22 @@ void __init at91_init_serial(struct at91_uart_config *config) for (i = 0; i < config->nr_tty; i++) { switch (config->tty_map[i]) { case 0: - configure_usart0_pins(); + configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); at91_uarts[i] = &at91rm9200_uart0_device; at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); break; case 1: - configure_usart1_pins(); + configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI); at91_uarts[i] = &at91rm9200_uart1_device; at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); break; case 2: - configure_usart2_pins(); + configure_usart2_pins(0); at91_uarts[i] = &at91rm9200_uart2_device; at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); break; case 3: - configure_usart3_pins(); + configure_usart3_pins(0); at91_uarts[i] = &at91rm9200_uart3_device; at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); break; @@ -876,6 +1067,53 @@ void __init at91_init_serial(struct at91_uart_config *config) printk(KERN_INFO "AT91: No default serial console defined.\n"); } +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) +{ + struct platform_device *pdev; + + switch (id) { + case 0: /* DBGU */ + pdev = &at91rm9200_dbgu_device; + configure_dbgu_pins(); + at91_clock_associate("mck", &pdev->dev, "usart"); + break; + case AT91RM9200_ID_US0: + pdev = &at91rm9200_uart0_device; + configure_usart0_pins(pins); + at91_clock_associate("usart0_clk", &pdev->dev, "usart"); + break; + case AT91RM9200_ID_US1: + pdev = &at91rm9200_uart1_device; + configure_usart1_pins(pins); + at91_clock_associate("usart1_clk", &pdev->dev, "usart"); + break; + case AT91RM9200_ID_US2: + pdev = &at91rm9200_uart2_device; + configure_usart2_pins(pins); + at91_clock_associate("usart2_clk", &pdev->dev, "usart"); + break; + case AT91RM9200_ID_US3: + pdev = &at91rm9200_uart3_device; + configure_usart3_pins(pins); + at91_clock_associate("usart3_clk", &pdev->dev, "usart"); + break; + default: + return; + } + pdev->id = portnr; /* update to mapped ID */ + + if (portnr < ATMEL_MAX_UART) + at91_uarts[portnr] = pdev; +} + +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) + atmel_default_console_device = at91_uarts[portnr]; + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); +} + void __init at91_add_device_serial(void) { int i; @@ -886,7 +1124,9 @@ void __init at91_add_device_serial(void) } } #else -void __init at91_init_serial(struct at91_uart_config *config) {} +void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index e47381e8aaba..18d06612ce8a 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -327,30 +327,30 @@ void __init at91sam9260_initialize(unsigned long main_clock) static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { 7, /* Advanced Interrupt Controller */ 7, /* System Peripherals */ - 0, /* Parallel IO Controller A */ - 0, /* Parallel IO Controller B */ - 0, /* Parallel IO Controller C */ + 1, /* Parallel IO Controller A */ + 1, /* Parallel IO Controller B */ + 1, /* Parallel IO Controller C */ 0, /* Analog-to-Digital Converter */ - 6, /* USART 0 */ - 6, /* USART 1 */ - 6, /* USART 2 */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ 0, /* Multimedia Card Interface */ - 4, /* USB Device Port */ - 0, /* Two-Wire Interface */ - 6, /* Serial Peripheral Interface 0 */ - 6, /* Serial Peripheral Interface 1 */ + 2, /* USB Device Port */ + 6, /* Two-Wire Interface */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ 5, /* Serial Synchronous Controller */ 0, 0, 0, /* Timer Counter 0 */ 0, /* Timer Counter 1 */ 0, /* Timer Counter 2 */ - 3, /* USB Host port */ + 2, /* USB Host port */ 3, /* Ethernet */ 0, /* Image Sensor Interface */ - 6, /* USART 3 */ - 6, /* USART 4 */ - 6, /* USART 5 */ + 5, /* USART 3 */ + 5, /* USART 4 */ + 5, /* USART 5 */ 0, /* Timer Counter 3 */ 0, /* Timer Counter 4 */ 0, /* Timer Counter 5 */ diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 3091bf47d8c9..105f8403860b 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -12,6 +12,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <linux/i2c-gpio.h> @@ -29,7 +30,7 @@ * -------------------------------------------------------------------- */ #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static u64 ohci_dmamask = 0xffffffffUL; +static u64 ohci_dmamask = DMA_BIT_MASK(32); static struct at91_usbh_data usbh_data; static struct resource usbh_resources[] = { @@ -50,7 +51,7 @@ static struct platform_device at91_usbh_device = { .id = -1, .dev = { .dma_mask = &ohci_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &usbh_data, }, .resource = usbh_resources, @@ -125,7 +126,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) -static u64 eth_dmamask = 0xffffffffUL; +static u64 eth_dmamask = DMA_BIT_MASK(32); static struct at91_eth_data eth_data; static struct resource eth_resources[] = { @@ -146,7 +147,7 @@ static struct platform_device at91sam9260_eth_device = { .id = -1, .dev = { .dma_mask = ð_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = ð_data, }, .resource = eth_resources, @@ -199,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -static u64 mmc_dmamask = 0xffffffffUL; +static u64 mmc_dmamask = DMA_BIT_MASK(32); static struct at91_mmc_data mmc_data; static struct resource mmc_resources[] = { @@ -220,7 +221,7 @@ static struct platform_device at91sam9260_mmc_device = { .id = -1, .dev = { .dma_mask = &mmc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &mmc_data, }, .resource = mmc_resources, @@ -289,7 +290,7 @@ static struct at91_nand_data nand_data; static struct resource nand_resources[] = { { .start = NAND_BASE, - .end = NAND_BASE + SZ_8M - 1, + .end = NAND_BASE + SZ_256M - 1, .flags = IORESOURCE_MEM, } }; @@ -312,7 +313,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) return; csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* set the bus interface characteristics */ at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) @@ -431,7 +432,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -static u64 spi_dmamask = 0xffffffffUL; +static u64 spi_dmamask = DMA_BIT_MASK(32); static struct resource spi0_resources[] = { [0] = { @@ -451,7 +452,7 @@ static struct platform_device at91sam9260_spi0_device = { .id = 0, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi0_resources, .num_resources = ARRAY_SIZE(spi0_resources), @@ -477,7 +478,7 @@ static struct platform_device at91sam9260_spi1_device = { .id = 1, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi1_resources, .num_resources = ARRAY_SIZE(spi1_resources), @@ -539,24 +540,126 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) /* -------------------------------------------------------------------- - * LEDs + * RTT * -------------------------------------------------------------------- */ -#if defined(CONFIG_LEDS) -u8 at91_leds_cpu; -u8 at91_leds_timer; +static struct resource rtt_resources[] = { + { + .start = AT91_BASE_SYS + AT91_RTT, + .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; -void __init at91_init_leds(u8 cpu_led, u8 timer_led) +static struct platform_device at91sam9260_rtt_device = { + .name = "at91_rtt", + .id = -1, + .resource = rtt_resources, + .num_resources = ARRAY_SIZE(rtt_resources), +}; + +static void __init at91_add_device_rtt(void) { - /* Enable GPIO to access the LEDs */ - at91_set_gpio_output(cpu_led, 1); - at91_set_gpio_output(timer_led, 1); + platform_device_register(&at91sam9260_rtt_device); +} + - at91_leds_cpu = cpu_led; - at91_leds_timer = timer_led; +/* -------------------------------------------------------------------- + * Watchdog + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) +static struct platform_device at91sam9260_wdt_device = { + .name = "at91_wdt", + .id = -1, + .num_resources = 0, +}; + +static void __init at91_add_device_watchdog(void) +{ + platform_device_register(&at91sam9260_wdt_device); } #else -void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} +static void __init at91_add_device_watchdog(void) {} +#endif + + +/* -------------------------------------------------------------------- + * SSC -- Synchronous Serial Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) +static u64 ssc_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc_resources[] = { + [0] = { + .start = AT91SAM9260_BASE_SSC, + .end = AT91SAM9260_BASE_SSC + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9260_ID_SSC, + .end = AT91SAM9260_ID_SSC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9260_ssc_device = { + .name = "ssc", + .id = 0, + .dev = { + .dma_mask = &ssc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc_resources, + .num_resources = ARRAY_SIZE(ssc_resources), +}; + +static inline void configure_ssc_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB17, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB16, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB18, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB19, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB20, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB21, 1); +} + +/* + * SSC controllers are accessed through library code, instead of any + * kind of all-singing/all-dancing driver. For example one could be + * used by a particular I2S audio codec's driver, while another one + * on the same system might be used by a custom data capture driver. + */ +void __init at91_add_device_ssc(unsigned id, unsigned pins) +{ + struct platform_device *pdev; + + /* + * NOTE: caller is responsible for passing information matching + * "pins" to whatever will be using each particular controller. + */ + switch (id) { + case AT91SAM9260_ID_SSC: + pdev = &at91sam9260_ssc_device; + configure_ssc_pins(pins); + at91_clock_associate("ssc_clk", &pdev->dev, "pclk"); + break; + default: + return; + } + + platform_device_register(pdev); +} + +#else +void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #endif @@ -583,12 +686,15 @@ static struct atmel_uart_data dbgu_data = { .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), }; +static u64 dbgu_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9260_dbgu_device = { .name = "atmel_usart", .id = 0, .dev = { - .platform_data = &dbgu_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &dbgu_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dbgu_data, }, .resource = dbgu_resources, .num_resources = ARRAY_SIZE(dbgu_resources), @@ -618,27 +724,37 @@ static struct atmel_uart_data uart0_data = { .use_dma_rx = 1, }; +static u64 uart0_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9260_uart0_device = { .name = "atmel_usart", .id = 1, .dev = { - .platform_data = &uart0_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart0_data, }, .resource = uart0_resources, .num_resources = ARRAY_SIZE(uart0_resources), }; -static inline void configure_usart0_pins(void) +static inline void configure_usart0_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ - at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */ - at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */ - at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */ - at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */ - at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */ - at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */ + if (pins & ATMEL_UART_DTR) + at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */ + if (pins & ATMEL_UART_DSR) + at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */ + if (pins & ATMEL_UART_DCD) + at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */ + if (pins & ATMEL_UART_RI) + at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */ } static struct resource uart1_resources[] = { @@ -659,23 +775,29 @@ static struct atmel_uart_data uart1_data = { .use_dma_rx = 1, }; +static u64 uart1_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9260_uart1_device = { .name = "atmel_usart", .id = 2, .dev = { - .platform_data = &uart1_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart1_data, }, .resource = uart1_resources, .num_resources = ARRAY_SIZE(uart1_resources), }; -static inline void configure_usart1_pins(void) +static inline void configure_usart1_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ - at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */ - at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */ } static struct resource uart2_resources[] = { @@ -696,21 +818,29 @@ static struct atmel_uart_data uart2_data = { .use_dma_rx = 1, }; +static u64 uart2_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9260_uart2_device = { .name = "atmel_usart", .id = 3, .dev = { - .platform_data = &uart2_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart2_data, }, .resource = uart2_resources, .num_resources = ARRAY_SIZE(uart2_resources), }; -static inline void configure_usart2_pins(void) +static inline void configure_usart2_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */ } static struct resource uart3_resources[] = { @@ -731,21 +861,29 @@ static struct atmel_uart_data uart3_data = { .use_dma_rx = 1, }; +static u64 uart3_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9260_uart3_device = { .name = "atmel_usart", .id = 4, .dev = { - .platform_data = &uart3_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart3_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart3_data, }, .resource = uart3_resources, .num_resources = ARRAY_SIZE(uart3_resources), }; -static inline void configure_usart3_pins(void) +static inline void configure_usart3_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */ at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */ } static struct resource uart4_resources[] = { @@ -766,12 +904,15 @@ static struct atmel_uart_data uart4_data = { .use_dma_rx = 1, }; +static u64 uart4_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9260_uart4_device = { .name = "atmel_usart", .id = 5, .dev = { - .platform_data = &uart4_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart4_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart4_data, }, .resource = uart4_resources, .num_resources = ARRAY_SIZE(uart4_resources), @@ -801,12 +942,15 @@ static struct atmel_uart_data uart5_data = { .use_dma_rx = 1, }; +static u64 uart5_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9260_uart5_device = { .name = "atmel_usart", .id = 6, .dev = { - .platform_data = &uart5_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart5_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart5_data, }, .resource = uart5_resources, .num_resources = ARRAY_SIZE(uart5_resources), @@ -818,10 +962,10 @@ static inline void configure_usart5_pins(void) at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */ } -struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ +static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ struct platform_device *atmel_default_console_device; /* the serial console device */ -void __init at91_init_serial(struct at91_uart_config *config) +void __init __deprecated at91_init_serial(struct at91_uart_config *config) { int i; @@ -829,22 +973,22 @@ void __init at91_init_serial(struct at91_uart_config *config) for (i = 0; i < config->nr_tty; i++) { switch (config->tty_map[i]) { case 0: - configure_usart0_pins(); + configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI); at91_uarts[i] = &at91sam9260_uart0_device; at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart"); break; case 1: - configure_usart1_pins(); + configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); at91_uarts[i] = &at91sam9260_uart1_device; at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart"); break; case 2: - configure_usart2_pins(); + configure_usart2_pins(0); at91_uarts[i] = &at91sam9260_uart2_device; at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart"); break; case 3: - configure_usart3_pins(); + configure_usart3_pins(0); at91_uarts[i] = &at91sam9260_uart3_device; at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart"); break; @@ -876,6 +1020,63 @@ void __init at91_init_serial(struct at91_uart_config *config) printk(KERN_INFO "AT91: No default serial console defined.\n"); } +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) +{ + struct platform_device *pdev; + + switch (id) { + case 0: /* DBGU */ + pdev = &at91sam9260_dbgu_device; + configure_dbgu_pins(); + at91_clock_associate("mck", &pdev->dev, "usart"); + break; + case AT91SAM9260_ID_US0: + pdev = &at91sam9260_uart0_device; + configure_usart0_pins(pins); + at91_clock_associate("usart0_clk", &pdev->dev, "usart"); + break; + case AT91SAM9260_ID_US1: + pdev = &at91sam9260_uart1_device; + configure_usart1_pins(pins); + at91_clock_associate("usart1_clk", &pdev->dev, "usart"); + break; + case AT91SAM9260_ID_US2: + pdev = &at91sam9260_uart2_device; + configure_usart2_pins(pins); + at91_clock_associate("usart2_clk", &pdev->dev, "usart"); + break; + case AT91SAM9260_ID_US3: + pdev = &at91sam9260_uart3_device; + configure_usart3_pins(pins); + at91_clock_associate("usart3_clk", &pdev->dev, "usart"); + break; + case AT91SAM9260_ID_US4: + pdev = &at91sam9260_uart4_device; + configure_usart4_pins(); + at91_clock_associate("usart4_clk", &pdev->dev, "usart"); + break; + case AT91SAM9260_ID_US5: + pdev = &at91sam9260_uart5_device; + configure_usart5_pins(); + at91_clock_associate("usart5_clk", &pdev->dev, "usart"); + break; + default: + return; + } + pdev->id = portnr; /* update to mapped ID */ + + if (portnr < ATMEL_MAX_UART) + at91_uarts[portnr] = pdev; +} + +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) + atmel_default_console_device = at91_uarts[portnr]; + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); +} + void __init at91_add_device_serial(void) { int i; @@ -886,7 +1087,9 @@ void __init at91_add_device_serial(void) } } #else -void __init at91_init_serial(struct at91_uart_config *config) {} +void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif @@ -898,6 +1101,8 @@ void __init at91_add_device_serial(void) {} */ static int __init at91_add_standard_devices(void) { + at91_add_device_rtt(); + at91_add_device_watchdog(); return 0; } diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index dfe8c39c9fb9..90b87e1877d9 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -279,25 +279,25 @@ void __init at91sam9261_initialize(unsigned long main_clock) static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { 7, /* Advanced Interrupt Controller */ 7, /* System Peripherals */ - 0, /* Parallel IO Controller A */ - 0, /* Parallel IO Controller B */ - 0, /* Parallel IO Controller C */ + 1, /* Parallel IO Controller A */ + 1, /* Parallel IO Controller B */ + 1, /* Parallel IO Controller C */ 0, - 6, /* USART 0 */ - 6, /* USART 1 */ - 6, /* USART 2 */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ 0, /* Multimedia Card Interface */ - 4, /* USB Device Port */ - 0, /* Two-Wire Interface */ - 6, /* Serial Peripheral Interface 0 */ - 6, /* Serial Peripheral Interface 1 */ - 5, /* Serial Synchronous Controller 0 */ - 5, /* Serial Synchronous Controller 1 */ - 5, /* Serial Synchronous Controller 2 */ + 2, /* USB Device Port */ + 6, /* Two-Wire Interface */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ + 4, /* Serial Synchronous Controller 0 */ + 4, /* Serial Synchronous Controller 1 */ + 4, /* Serial Synchronous Controller 2 */ 0, /* Timer Counter 0 */ 0, /* Timer Counter 1 */ 0, /* Timer Counter 2 */ - 3, /* USB Host port */ + 2, /* USB Host port */ 3, /* LCD Controller */ 0, 0, diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 64979a9023c2..245641263fce 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -13,6 +13,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <linux/i2c-gpio.h> @@ -33,7 +34,7 @@ * -------------------------------------------------------------------- */ #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static u64 ohci_dmamask = 0xffffffffUL; +static u64 ohci_dmamask = DMA_BIT_MASK(32); static struct at91_usbh_data usbh_data; static struct resource usbh_resources[] = { @@ -54,7 +55,7 @@ static struct platform_device at91sam9261_usbh_device = { .id = -1, .dev = { .dma_mask = &ohci_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &usbh_data, }, .resource = usbh_resources, @@ -106,8 +107,6 @@ static struct platform_device at91sam9261_udc_device = { void __init at91_add_device_udc(struct at91_udc_data *data) { - unsigned long x; - if (!data) return; @@ -116,9 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) at91_set_deglitch(data->vbus_pin, 1); } - /* Pullup pin is handled internally */ - x = at91_sys_read(AT91_MATRIX_USBPUCR); - at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON); + /* Pullup pin is handled internally by USB device peripheral */ udc_data = *data; platform_device_register(&at91sam9261_udc_device); @@ -132,7 +129,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -static u64 mmc_dmamask = 0xffffffffUL; +static u64 mmc_dmamask = DMA_BIT_MASK(32); static struct at91_mmc_data mmc_data; static struct resource mmc_resources[] = { @@ -153,7 +150,7 @@ static struct platform_device at91sam9261_mmc_device = { .id = -1, .dev = { .dma_mask = &mmc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &mmc_data, }, .resource = mmc_resources, @@ -232,7 +229,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) return; csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* set the bus interface characteristics */ at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) @@ -354,7 +351,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -static u64 spi_dmamask = 0xffffffffUL; +static u64 spi_dmamask = DMA_BIT_MASK(32); static struct resource spi0_resources[] = { [0] = { @@ -374,7 +371,7 @@ static struct platform_device at91sam9261_spi0_device = { .id = 0, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi0_resources, .num_resources = ARRAY_SIZE(spi0_resources), @@ -400,7 +397,7 @@ static struct platform_device at91sam9261_spi1_device = { .id = 1, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi1_resources, .num_resources = ARRAY_SIZE(spi1_resources), @@ -466,7 +463,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) -static u64 lcdc_dmamask = 0xffffffffUL; +static u64 lcdc_dmamask = DMA_BIT_MASK(32); static struct atmel_lcdfb_info lcdc_data; static struct resource lcdc_resources[] = { @@ -494,7 +491,7 @@ static struct platform_device at91_lcdc_device = { .id = 0, .dev = { .dma_mask = &lcdc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &lcdc_data, }, .resource = lcdc_resources, @@ -507,6 +504,17 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) return; } +#if defined(CONFIG_FB_ATMEL_STN) + at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */ + at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ + at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ + at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */ + at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ +#else at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ @@ -529,6 +537,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ +#endif lcdc_data = *data; platform_device_register(&at91_lcdc_device); @@ -539,24 +548,220 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} /* -------------------------------------------------------------------- - * LEDs + * RTT + * -------------------------------------------------------------------- */ + +static struct resource rtt_resources[] = { + { + .start = AT91_BASE_SYS + AT91_RTT, + .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device at91sam9261_rtt_device = { + .name = "at91_rtt", + .id = -1, + .resource = rtt_resources, + .num_resources = ARRAY_SIZE(rtt_resources), +}; + +static void __init at91_add_device_rtt(void) +{ + platform_device_register(&at91sam9261_rtt_device); +} + + +/* -------------------------------------------------------------------- + * Watchdog + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) +static struct platform_device at91sam9261_wdt_device = { + .name = "at91_wdt", + .id = -1, + .num_resources = 0, +}; + +static void __init at91_add_device_watchdog(void) +{ + platform_device_register(&at91sam9261_wdt_device); +} +#else +static void __init at91_add_device_watchdog(void) {} +#endif + + +/* -------------------------------------------------------------------- + * SSC -- Synchronous Serial Controller * -------------------------------------------------------------------- */ -#if defined(CONFIG_LEDS) -u8 at91_leds_cpu; -u8 at91_leds_timer; +#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) +static u64 ssc0_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc0_resources[] = { + [0] = { + .start = AT91SAM9261_BASE_SSC0, + .end = AT91SAM9261_BASE_SSC0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9261_ID_SSC0, + .end = AT91SAM9261_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9261_ssc0_device = { + .name = "ssc", + .id = 0, + .dev = { + .dma_mask = &ssc0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc0_resources, + .num_resources = ARRAY_SIZE(ssc0_resources), +}; + +static inline void configure_ssc0_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB21, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB22, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB23, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB24, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB25, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB26, 1); +} + +static u64 ssc1_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc1_resources[] = { + [0] = { + .start = AT91SAM9261_BASE_SSC1, + .end = AT91SAM9261_BASE_SSC1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9261_ID_SSC1, + .end = AT91SAM9261_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9261_ssc1_device = { + .name = "ssc", + .id = 1, + .dev = { + .dma_mask = &ssc1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc1_resources, + .num_resources = ARRAY_SIZE(ssc1_resources), +}; + +static inline void configure_ssc1_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_B_periph(AT91_PIN_PA17, 1); + if (pins & ATMEL_SSC_TK) + at91_set_B_periph(AT91_PIN_PA18, 1); + if (pins & ATMEL_SSC_TD) + at91_set_B_periph(AT91_PIN_PA19, 1); + if (pins & ATMEL_SSC_RD) + at91_set_B_periph(AT91_PIN_PA20, 1); + if (pins & ATMEL_SSC_RK) + at91_set_B_periph(AT91_PIN_PA21, 1); + if (pins & ATMEL_SSC_RF) + at91_set_B_periph(AT91_PIN_PA22, 1); +} + +static u64 ssc2_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc2_resources[] = { + [0] = { + .start = AT91SAM9261_BASE_SSC2, + .end = AT91SAM9261_BASE_SSC2 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9261_ID_SSC2, + .end = AT91SAM9261_ID_SSC2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9261_ssc2_device = { + .name = "ssc", + .id = 2, + .dev = { + .dma_mask = &ssc2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc2_resources, + .num_resources = ARRAY_SIZE(ssc2_resources), +}; + +static inline void configure_ssc2_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_B_periph(AT91_PIN_PC25, 1); + if (pins & ATMEL_SSC_TK) + at91_set_B_periph(AT91_PIN_PC26, 1); + if (pins & ATMEL_SSC_TD) + at91_set_B_periph(AT91_PIN_PC27, 1); + if (pins & ATMEL_SSC_RD) + at91_set_B_periph(AT91_PIN_PC28, 1); + if (pins & ATMEL_SSC_RK) + at91_set_B_periph(AT91_PIN_PC29, 1); + if (pins & ATMEL_SSC_RF) + at91_set_B_periph(AT91_PIN_PC30, 1); +} -void __init at91_init_leds(u8 cpu_led, u8 timer_led) +/* + * SSC controllers are accessed through library code, instead of any + * kind of all-singing/all-dancing driver. For example one could be + * used by a particular I2S audio codec's driver, while another one + * on the same system might be used by a custom data capture driver. + */ +void __init at91_add_device_ssc(unsigned id, unsigned pins) { - /* Enable GPIO to access the LEDs */ - at91_set_gpio_output(cpu_led, 1); - at91_set_gpio_output(timer_led, 1); + struct platform_device *pdev; + + /* + * NOTE: caller is responsible for passing information matching + * "pins" to whatever will be using each particular controller. + */ + switch (id) { + case AT91SAM9261_ID_SSC0: + pdev = &at91sam9261_ssc0_device; + configure_ssc0_pins(pins); + at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); + break; + case AT91SAM9261_ID_SSC1: + pdev = &at91sam9261_ssc1_device; + configure_ssc1_pins(pins); + at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); + break; + case AT91SAM9261_ID_SSC2: + pdev = &at91sam9261_ssc2_device; + configure_ssc2_pins(pins); + at91_clock_associate("ssc2_clk", &pdev->dev, "pclk"); + break; + default: + return; + } - at91_leds_cpu = cpu_led; - at91_leds_timer = timer_led; + platform_device_register(pdev); } + #else -void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} +void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #endif @@ -584,12 +789,15 @@ static struct atmel_uart_data dbgu_data = { .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), }; +static u64 dbgu_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9261_dbgu_device = { .name = "atmel_usart", .id = 0, .dev = { - .platform_data = &dbgu_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &dbgu_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dbgu_data, }, .resource = dbgu_resources, .num_resources = ARRAY_SIZE(dbgu_resources), @@ -619,23 +827,29 @@ static struct atmel_uart_data uart0_data = { .use_dma_rx = 1, }; +static u64 uart0_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9261_uart0_device = { .name = "atmel_usart", .id = 1, .dev = { - .platform_data = &uart0_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart0_data, }, .resource = uart0_resources, .num_resources = ARRAY_SIZE(uart0_resources), }; -static inline void configure_usart0_pins(void) +static inline void configure_usart0_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ - at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */ - at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */ } static struct resource uart1_resources[] = { @@ -656,21 +870,29 @@ static struct atmel_uart_data uart1_data = { .use_dma_rx = 1, }; +static u64 uart1_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9261_uart1_device = { .name = "atmel_usart", .id = 2, .dev = { - .platform_data = &uart1_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart1_data, }, .resource = uart1_resources, .num_resources = ARRAY_SIZE(uart1_resources), }; -static inline void configure_usart1_pins(void) +static inline void configure_usart1_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PA12, 0); /* RTS1 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PA13, 0); /* CTS1 */ } static struct resource uart2_resources[] = { @@ -691,27 +913,35 @@ static struct atmel_uart_data uart2_data = { .use_dma_rx = 1, }; +static u64 uart2_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9261_uart2_device = { .name = "atmel_usart", .id = 3, .dev = { - .platform_data = &uart2_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart2_data, }, .resource = uart2_resources, .num_resources = ARRAY_SIZE(uart2_resources), }; -static inline void configure_usart2_pins(void) +static inline void configure_usart2_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PA15, 0); /* RTS2*/ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */ } -struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ +static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ struct platform_device *atmel_default_console_device; /* the serial console device */ -void __init at91_init_serial(struct at91_uart_config *config) +void __init __deprecated at91_init_serial(struct at91_uart_config *config) { int i; @@ -719,17 +949,17 @@ void __init at91_init_serial(struct at91_uart_config *config) for (i = 0; i < config->nr_tty; i++) { switch (config->tty_map[i]) { case 0: - configure_usart0_pins(); + configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); at91_uarts[i] = &at91sam9261_uart0_device; at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart"); break; case 1: - configure_usart1_pins(); + configure_usart1_pins(0); at91_uarts[i] = &at91sam9261_uart1_device; at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart"); break; case 2: - configure_usart2_pins(); + configure_usart2_pins(0); at91_uarts[i] = &at91sam9261_uart2_device; at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart"); break; @@ -751,6 +981,48 @@ void __init at91_init_serial(struct at91_uart_config *config) printk(KERN_INFO "AT91: No default serial console defined.\n"); } +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) +{ + struct platform_device *pdev; + + switch (id) { + case 0: /* DBGU */ + pdev = &at91sam9261_dbgu_device; + configure_dbgu_pins(); + at91_clock_associate("mck", &pdev->dev, "usart"); + break; + case AT91SAM9261_ID_US0: + pdev = &at91sam9261_uart0_device; + configure_usart0_pins(pins); + at91_clock_associate("usart0_clk", &pdev->dev, "usart"); + break; + case AT91SAM9261_ID_US1: + pdev = &at91sam9261_uart1_device; + configure_usart1_pins(pins); + at91_clock_associate("usart1_clk", &pdev->dev, "usart"); + break; + case AT91SAM9261_ID_US2: + pdev = &at91sam9261_uart2_device; + configure_usart2_pins(pins); + at91_clock_associate("usart2_clk", &pdev->dev, "usart"); + break; + default: + return; + } + pdev->id = portnr; /* update to mapped ID */ + + if (portnr < ATMEL_MAX_UART) + at91_uarts[portnr] = pdev; +} + +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) + atmel_default_console_device = at91_uarts[portnr]; + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); +} + void __init at91_add_device_serial(void) { int i; @@ -761,7 +1033,9 @@ void __init at91_add_device_serial(void) } } #else -void __init at91_init_serial(struct at91_uart_config *config) {} +void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif @@ -774,6 +1048,8 @@ void __init at91_add_device_serial(void) {} */ static int __init at91_add_standard_devices(void) { + at91_add_device_rtt(); + at91_add_device_watchdog(); return 0; } diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 00e27b177857..a53ba0f74351 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -304,34 +304,34 @@ void __init at91sam9263_initialize(unsigned long main_clock) static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { 7, /* Advanced Interrupt Controller (FIQ) */ 7, /* System Peripherals */ - 0, /* Parallel IO Controller A */ - 0, /* Parallel IO Controller B */ - 0, /* Parallel IO Controller C, D and E */ + 1, /* Parallel IO Controller A */ + 1, /* Parallel IO Controller B */ + 1, /* Parallel IO Controller C, D and E */ 0, 0, - 6, /* USART 0 */ - 6, /* USART 1 */ - 6, /* USART 2 */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ 0, /* Multimedia Card Interface 0 */ 0, /* Multimedia Card Interface 1 */ - 4, /* CAN */ - 0, /* Two-Wire Interface */ - 6, /* Serial Peripheral Interface 0 */ - 6, /* Serial Peripheral Interface 1 */ - 5, /* Serial Synchronous Controller 0 */ - 5, /* Serial Synchronous Controller 1 */ - 6, /* AC97 Controller */ + 3, /* CAN */ + 6, /* Two-Wire Interface */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ + 4, /* Serial Synchronous Controller 0 */ + 4, /* Serial Synchronous Controller 1 */ + 5, /* AC97 Controller */ 0, /* Timer Counter 0, 1 and 2 */ 0, /* Pulse Width Modulation Controller */ 3, /* Ethernet */ 0, 0, /* 2D Graphic Engine */ - 3, /* USB Device Port */ + 2, /* USB Device Port */ 0, /* Image Sensor Interface */ 3, /* LDC Controller */ 0, /* DMA Controller */ 0, - 3, /* USB Host port */ + 2, /* USB Host port */ 0, /* Advanced Interrupt Controller (IRQ0) */ 0, /* Advanced Interrupt Controller (IRQ1) */ }; diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index ac329a98e959..0b12e1adcc8e 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -12,6 +12,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <linux/i2c-gpio.h> @@ -32,7 +33,7 @@ * -------------------------------------------------------------------- */ #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) -static u64 ohci_dmamask = 0xffffffffUL; +static u64 ohci_dmamask = DMA_BIT_MASK(32); static struct at91_usbh_data usbh_data; static struct resource usbh_resources[] = { @@ -53,7 +54,7 @@ static struct platform_device at91_usbh_device = { .id = -1, .dev = { .dma_mask = &ohci_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &usbh_data, }, .resource = usbh_resources, @@ -136,7 +137,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) -static u64 eth_dmamask = 0xffffffffUL; +static u64 eth_dmamask = DMA_BIT_MASK(32); static struct at91_eth_data eth_data; static struct resource eth_resources[] = { @@ -157,7 +158,7 @@ static struct platform_device at91sam9263_eth_device = { .id = -1, .dev = { .dma_mask = ð_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = ð_data, }, .resource = eth_resources, @@ -210,7 +211,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -static u64 mmc_dmamask = 0xffffffffUL; +static u64 mmc_dmamask = DMA_BIT_MASK(32); static struct at91_mmc_data mmc0_data, mmc1_data; static struct resource mmc0_resources[] = { @@ -231,7 +232,7 @@ static struct platform_device at91sam9263_mmc0_device = { .id = 0, .dev = { .dma_mask = &mmc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &mmc0_data, }, .resource = mmc0_resources, @@ -256,7 +257,7 @@ static struct platform_device at91sam9263_mmc1_device = { .id = 1, .dev = { .dma_mask = &mmc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &mmc1_data, }, .resource = mmc1_resources, @@ -382,7 +383,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) return; csa = at91_sys_read(AT91_MATRIX_EBI0CSA); - at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC); + at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); /* set the bus interface characteristics */ at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) @@ -500,7 +501,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -static u64 spi_dmamask = 0xffffffffUL; +static u64 spi_dmamask = DMA_BIT_MASK(32); static struct resource spi0_resources[] = { [0] = { @@ -520,7 +521,7 @@ static struct platform_device at91sam9263_spi0_device = { .id = 0, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi0_resources, .num_resources = ARRAY_SIZE(spi0_resources), @@ -546,7 +547,7 @@ static struct platform_device at91sam9263_spi1_device = { .id = 1, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi1_resources, .num_resources = ARRAY_SIZE(spi1_resources), @@ -612,7 +613,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) -static u64 ac97_dmamask = 0xffffffffUL; +static u64 ac97_dmamask = DMA_BIT_MASK(32); static struct atmel_ac97_data ac97_data; static struct resource ac97_resources[] = { @@ -633,7 +634,7 @@ static struct platform_device at91sam9263_ac97_device = { .id = 1, .dev = { .dma_mask = &ac97_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &ac97_data, }, .resource = ac97_resources, @@ -667,7 +668,7 @@ void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) -static u64 lcdc_dmamask = 0xffffffffUL; +static u64 lcdc_dmamask = DMA_BIT_MASK(32); static struct atmel_lcdfb_info lcdc_data; static struct resource lcdc_resources[] = { @@ -688,7 +689,7 @@ static struct platform_device at91_lcdc_device = { .id = 0, .dev = { .dma_mask = &lcdc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &lcdc_data, }, .resource = lcdc_resources, @@ -732,24 +733,242 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} /* -------------------------------------------------------------------- - * LEDs + * Image Sensor Interface * -------------------------------------------------------------------- */ -#if defined(CONFIG_LEDS) -u8 at91_leds_cpu; -u8 at91_leds_timer; +#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE) -void __init at91_init_leds(u8 cpu_led, u8 timer_led) +struct resource isi_resources[] = { + [0] = { + .start = AT91SAM9263_BASE_ISI, + .end = AT91SAM9263_BASE_ISI + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9263_ID_ISI, + .end = AT91SAM9263_ID_ISI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9263_isi_device = { + .name = "at91_isi", + .id = -1, + .resource = isi_resources, + .num_resources = ARRAY_SIZE(isi_resources), +}; + +void __init at91_add_device_isi(void) +{ + at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */ + at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */ + at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */ + at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */ + at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */ + at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */ + at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */ + at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */ + at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */ + at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */ + at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */ + at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */ + at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */ + at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */ + at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */ + at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */ +} +#else +void __init at91_add_device_isi(void) {} +#endif + + +/* -------------------------------------------------------------------- + * RTT + * -------------------------------------------------------------------- */ + +static struct resource rtt0_resources[] = { + { + .start = AT91_BASE_SYS + AT91_RTT0, + .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device at91sam9263_rtt0_device = { + .name = "at91_rtt", + .id = 0, + .resource = rtt0_resources, + .num_resources = ARRAY_SIZE(rtt0_resources), +}; + +static struct resource rtt1_resources[] = { + { + .start = AT91_BASE_SYS + AT91_RTT1, + .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device at91sam9263_rtt1_device = { + .name = "at91_rtt", + .id = 1, + .resource = rtt1_resources, + .num_resources = ARRAY_SIZE(rtt1_resources), +}; + +static void __init at91_add_device_rtt(void) +{ + platform_device_register(&at91sam9263_rtt0_device); + platform_device_register(&at91sam9263_rtt1_device); +} + + +/* -------------------------------------------------------------------- + * Watchdog + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) +static struct platform_device at91sam9263_wdt_device = { + .name = "at91_wdt", + .id = -1, + .num_resources = 0, +}; + +static void __init at91_add_device_watchdog(void) +{ + platform_device_register(&at91sam9263_wdt_device); +} +#else +static void __init at91_add_device_watchdog(void) {} +#endif + + +/* -------------------------------------------------------------------- + * SSC -- Synchronous Serial Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) +static u64 ssc0_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc0_resources[] = { + [0] = { + .start = AT91SAM9263_BASE_SSC0, + .end = AT91SAM9263_BASE_SSC0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9263_ID_SSC0, + .end = AT91SAM9263_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9263_ssc0_device = { + .name = "ssc", + .id = 0, + .dev = { + .dma_mask = &ssc0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc0_resources, + .num_resources = ARRAY_SIZE(ssc0_resources), +}; + +static inline void configure_ssc0_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_B_periph(AT91_PIN_PB0, 1); + if (pins & ATMEL_SSC_TK) + at91_set_B_periph(AT91_PIN_PB1, 1); + if (pins & ATMEL_SSC_TD) + at91_set_B_periph(AT91_PIN_PB2, 1); + if (pins & ATMEL_SSC_RD) + at91_set_B_periph(AT91_PIN_PB3, 1); + if (pins & ATMEL_SSC_RK) + at91_set_B_periph(AT91_PIN_PB4, 1); + if (pins & ATMEL_SSC_RF) + at91_set_B_periph(AT91_PIN_PB5, 1); +} + +static u64 ssc1_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc1_resources[] = { + [0] = { + .start = AT91SAM9263_BASE_SSC1, + .end = AT91SAM9263_BASE_SSC1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9263_ID_SSC1, + .end = AT91SAM9263_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9263_ssc1_device = { + .name = "ssc", + .id = 1, + .dev = { + .dma_mask = &ssc1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc1_resources, + .num_resources = ARRAY_SIZE(ssc1_resources), +}; + +static inline void configure_ssc1_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PB6, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PB7, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PB8, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PB9, 1); + if (pins & ATMEL_SSC_RK) + at91_set_A_periph(AT91_PIN_PB10, 1); + if (pins & ATMEL_SSC_RF) + at91_set_A_periph(AT91_PIN_PB11, 1); +} + +/* + * Return the device node so that board init code can use it as the + * parent for the device node reflecting how it's used on this board. + * + * SSC controllers are accessed through library code, instead of any + * kind of all-singing/all-dancing driver. For example one could be + * used by a particular I2S audio codec's driver, while another one + * on the same system might be used by a custom data capture driver. + */ +void __init at91_add_device_ssc(unsigned id, unsigned pins) { - /* Enable GPIO to access the LEDs */ - at91_set_gpio_output(cpu_led, 1); - at91_set_gpio_output(timer_led, 1); + struct platform_device *pdev; + + /* + * NOTE: caller is responsible for passing information matching + * "pins" to whatever will be using each particular controller. + */ + switch (id) { + case AT91SAM9263_ID_SSC0: + pdev = &at91sam9263_ssc0_device; + configure_ssc0_pins(pins); + at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); + break; + case AT91SAM9263_ID_SSC1: + pdev = &at91sam9263_ssc1_device; + configure_ssc1_pins(pins); + at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); + break; + default: + return; + } - at91_leds_cpu = cpu_led; - at91_leds_timer = timer_led; + platform_device_register(pdev); } + #else -void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} +void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #endif @@ -778,12 +997,15 @@ static struct atmel_uart_data dbgu_data = { .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), }; +static u64 dbgu_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9263_dbgu_device = { .name = "atmel_usart", .id = 0, .dev = { - .platform_data = &dbgu_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &dbgu_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dbgu_data, }, .resource = dbgu_resources, .num_resources = ARRAY_SIZE(dbgu_resources), @@ -813,23 +1035,29 @@ static struct atmel_uart_data uart0_data = { .use_dma_rx = 1, }; +static u64 uart0_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9263_uart0_device = { .name = "atmel_usart", .id = 1, .dev = { - .platform_data = &uart0_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart0_data, }, .resource = uart0_resources, .num_resources = ARRAY_SIZE(uart0_resources), }; -static inline void configure_usart0_pins(void) +static inline void configure_usart0_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ - at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */ - at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */ } static struct resource uart1_resources[] = { @@ -850,23 +1078,29 @@ static struct atmel_uart_data uart1_data = { .use_dma_rx = 1, }; +static u64 uart1_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9263_uart1_device = { .name = "atmel_usart", .id = 2, .dev = { - .platform_data = &uart1_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart1_data, }, .resource = uart1_resources, .num_resources = ARRAY_SIZE(uart1_resources), }; -static inline void configure_usart1_pins(void) +static inline void configure_usart1_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ - at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ - at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ } static struct resource uart2_resources[] = { @@ -887,29 +1121,35 @@ static struct atmel_uart_data uart2_data = { .use_dma_rx = 1, }; +static u64 uart2_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9263_uart2_device = { .name = "atmel_usart", .id = 3, .dev = { - .platform_data = &uart2_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart2_data, }, .resource = uart2_resources, .num_resources = ARRAY_SIZE(uart2_resources), }; -static inline void configure_usart2_pins(void) +static inline void configure_usart2_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ - at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ - at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ } -struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ +static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ struct platform_device *atmel_default_console_device; /* the serial console device */ -void __init at91_init_serial(struct at91_uart_config *config) +void __init __deprecated at91_init_serial(struct at91_uart_config *config) { int i; @@ -917,17 +1157,17 @@ void __init at91_init_serial(struct at91_uart_config *config) for (i = 0; i < config->nr_tty; i++) { switch (config->tty_map[i]) { case 0: - configure_usart0_pins(); + configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); at91_uarts[i] = &at91sam9263_uart0_device; at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart"); break; case 1: - configure_usart1_pins(); + configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); at91_uarts[i] = &at91sam9263_uart1_device; at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart"); break; case 2: - configure_usart2_pins(); + configure_usart2_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); at91_uarts[i] = &at91sam9263_uart2_device; at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart"); break; @@ -949,6 +1189,48 @@ void __init at91_init_serial(struct at91_uart_config *config) printk(KERN_INFO "AT91: No default serial console defined.\n"); } +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) +{ + struct platform_device *pdev; + + switch (id) { + case 0: /* DBGU */ + pdev = &at91sam9263_dbgu_device; + configure_dbgu_pins(); + at91_clock_associate("mck", &pdev->dev, "usart"); + break; + case AT91SAM9263_ID_US0: + pdev = &at91sam9263_uart0_device; + configure_usart0_pins(pins); + at91_clock_associate("usart0_clk", &pdev->dev, "usart"); + break; + case AT91SAM9263_ID_US1: + pdev = &at91sam9263_uart1_device; + configure_usart1_pins(pins); + at91_clock_associate("usart1_clk", &pdev->dev, "usart"); + break; + case AT91SAM9263_ID_US2: + pdev = &at91sam9263_uart2_device; + configure_usart2_pins(pins); + at91_clock_associate("usart2_clk", &pdev->dev, "usart"); + break; + default: + return; + } + pdev->id = portnr; /* update to mapped ID */ + + if (portnr < ATMEL_MAX_UART) + at91_uarts[portnr] = pdev; +} + +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) + atmel_default_console_device = at91_uarts[portnr]; + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); +} + void __init at91_add_device_serial(void) { int i; @@ -960,6 +1242,8 @@ void __init at91_add_device_serial(void) } #else void __init at91_init_serial(struct at91_uart_config *config) {} +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif @@ -971,6 +1255,8 @@ void __init at91_add_device_serial(void) {} */ static int __init at91_add_standard_devices(void) { + at91_add_device_rtt(); + at91_add_device_watchdog(); return 0; } diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 2bd60a3dc623..f43b5c33e45d 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -9,6 +9,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <linux/i2c-gpio.h> @@ -29,7 +30,7 @@ * -------------------------------------------------------------------- */ #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) -static u64 mmc_dmamask = 0xffffffffUL; +static u64 mmc_dmamask = DMA_BIT_MASK(32); static struct at91_mmc_data mmc_data; static struct resource mmc_resources[] = { @@ -50,7 +51,7 @@ static struct platform_device at91sam9rl_mmc_device = { .id = -1, .dev = { .dma_mask = &mmc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &mmc_data, }, .resource = mmc_resources, @@ -247,7 +248,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) -static u64 spi_dmamask = 0xffffffffUL; +static u64 spi_dmamask = DMA_BIT_MASK(32); static struct resource spi_resources[] = { [0] = { @@ -267,7 +268,7 @@ static struct platform_device at91sam9rl_spi_device = { .id = 0, .dev = { .dma_mask = &spi_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = spi_resources, .num_resources = ARRAY_SIZE(spi_resources), @@ -312,7 +313,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) * -------------------------------------------------------------------- */ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) -static u64 lcdc_dmamask = 0xffffffffUL; +static u64 lcdc_dmamask = DMA_BIT_MASK(32); static struct atmel_lcdfb_info lcdc_data; static struct resource lcdc_resources[] = { @@ -340,7 +341,7 @@ static struct platform_device at91_lcdc_device = { .id = 0, .dev = { .dma_mask = &lcdc_dmamask, - .coherent_dma_mask = 0xffffffff, + .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &lcdc_data, }, .resource = lcdc_resources, @@ -384,24 +385,196 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} /* -------------------------------------------------------------------- - * LEDs + * RTC * -------------------------------------------------------------------- */ -#if defined(CONFIG_LEDS) -u8 at91_leds_cpu; -u8 at91_leds_timer; +#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) +static struct platform_device at91sam9rl_rtc_device = { + .name = "at91_rtc", + .id = -1, + .num_resources = 0, +}; -void __init at91_init_leds(u8 cpu_led, u8 timer_led) +static void __init at91_add_device_rtc(void) { - /* Enable GPIO to access the LEDs */ - at91_set_gpio_output(cpu_led, 1); - at91_set_gpio_output(timer_led, 1); + platform_device_register(&at91sam9rl_rtc_device); +} +#else +static void __init at91_add_device_rtc(void) {} +#endif + + +/* -------------------------------------------------------------------- + * RTT + * -------------------------------------------------------------------- */ + +static struct resource rtt_resources[] = { + { + .start = AT91_BASE_SYS + AT91_RTT, + .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device at91sam9rl_rtt_device = { + .name = "at91_rtt", + .id = -1, + .resource = rtt_resources, + .num_resources = ARRAY_SIZE(rtt_resources), +}; - at91_leds_cpu = cpu_led; - at91_leds_timer = timer_led; +static void __init at91_add_device_rtt(void) +{ + platform_device_register(&at91sam9rl_rtt_device); +} + + +/* -------------------------------------------------------------------- + * Watchdog + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) +static struct platform_device at91sam9rl_wdt_device = { + .name = "at91_wdt", + .id = -1, + .num_resources = 0, +}; + +static void __init at91_add_device_watchdog(void) +{ + platform_device_register(&at91sam9rl_wdt_device); } #else -void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} +static void __init at91_add_device_watchdog(void) {} +#endif + + +/* -------------------------------------------------------------------- + * SSC -- Synchronous Serial Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) +static u64 ssc0_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc0_resources[] = { + [0] = { + .start = AT91SAM9RL_BASE_SSC0, + .end = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9RL_ID_SSC0, + .end = AT91SAM9RL_ID_SSC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9rl_ssc0_device = { + .name = "ssc", + .id = 0, + .dev = { + .dma_mask = &ssc0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc0_resources, + .num_resources = ARRAY_SIZE(ssc0_resources), +}; + +static inline void configure_ssc0_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_A_periph(AT91_PIN_PC0, 1); + if (pins & ATMEL_SSC_TK) + at91_set_A_periph(AT91_PIN_PC1, 1); + if (pins & ATMEL_SSC_TD) + at91_set_A_periph(AT91_PIN_PA15, 1); + if (pins & ATMEL_SSC_RD) + at91_set_A_periph(AT91_PIN_PA16, 1); + if (pins & ATMEL_SSC_RK) + at91_set_B_periph(AT91_PIN_PA10, 1); + if (pins & ATMEL_SSC_RF) + at91_set_B_periph(AT91_PIN_PA22, 1); +} + +static u64 ssc1_dmamask = DMA_BIT_MASK(32); + +static struct resource ssc1_resources[] = { + [0] = { + .start = AT91SAM9RL_BASE_SSC1, + .end = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9RL_ID_SSC1, + .end = AT91SAM9RL_ID_SSC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9rl_ssc1_device = { + .name = "ssc", + .id = 1, + .dev = { + .dma_mask = &ssc1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = ssc1_resources, + .num_resources = ARRAY_SIZE(ssc1_resources), +}; + +static inline void configure_ssc1_pins(unsigned pins) +{ + if (pins & ATMEL_SSC_TF) + at91_set_B_periph(AT91_PIN_PA29, 1); + if (pins & ATMEL_SSC_TK) + at91_set_B_periph(AT91_PIN_PA30, 1); + if (pins & ATMEL_SSC_TD) + at91_set_B_periph(AT91_PIN_PA13, 1); + if (pins & ATMEL_SSC_RD) + at91_set_B_periph(AT91_PIN_PA14, 1); + if (pins & ATMEL_SSC_RK) + at91_set_B_periph(AT91_PIN_PA9, 1); + if (pins & ATMEL_SSC_RF) + at91_set_B_periph(AT91_PIN_PA8, 1); +} + +/* + * Return the device node so that board init code can use it as the + * parent for the device node reflecting how it's used on this board. + * + * SSC controllers are accessed through library code, instead of any + * kind of all-singing/all-dancing driver. For example one could be + * used by a particular I2S audio codec's driver, while another one + * on the same system might be used by a custom data capture driver. + */ +void __init at91_add_device_ssc(unsigned id, unsigned pins) +{ + struct platform_device *pdev; + + /* + * NOTE: caller is responsible for passing information matching + * "pins" to whatever will be using each particular controller. + */ + switch (id) { + case AT91SAM9RL_ID_SSC0: + pdev = &at91sam9rl_ssc0_device; + configure_ssc0_pins(pins); + at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); + break; + case AT91SAM9RL_ID_SSC1: + pdev = &at91sam9rl_ssc1_device; + configure_ssc1_pins(pins); + at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); + break; + default: + return; + } + + platform_device_register(pdev); +} + +#else +void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #endif @@ -429,12 +602,15 @@ static struct atmel_uart_data dbgu_data = { .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), }; +static u64 dbgu_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9rl_dbgu_device = { .name = "atmel_usart", .id = 0, .dev = { - .platform_data = &dbgu_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &dbgu_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dbgu_data, }, .resource = dbgu_resources, .num_resources = ARRAY_SIZE(dbgu_resources), @@ -464,23 +640,37 @@ static struct atmel_uart_data uart0_data = { .use_dma_rx = 1, }; +static u64 uart0_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9rl_uart0_device = { .name = "atmel_usart", .id = 1, .dev = { - .platform_data = &uart0_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart0_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart0_data, }, .resource = uart0_resources, .num_resources = ARRAY_SIZE(uart0_resources), }; -static inline void configure_usart0_pins(void) +static inline void configure_usart0_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ - at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */ - at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */ + if (pins & ATMEL_UART_DSR) + at91_set_A_periph(AT91_PIN_PD14, 0); /* DSR0 */ + if (pins & ATMEL_UART_DTR) + at91_set_A_periph(AT91_PIN_PD15, 0); /* DTR0 */ + if (pins & ATMEL_UART_DCD) + at91_set_A_periph(AT91_PIN_PD16, 0); /* DCD0 */ + if (pins & ATMEL_UART_RI) + at91_set_A_periph(AT91_PIN_PD17, 0); /* RI0 */ } static struct resource uart1_resources[] = { @@ -501,21 +691,29 @@ static struct atmel_uart_data uart1_data = { .use_dma_rx = 1, }; +static u64 uart1_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9rl_uart1_device = { .name = "atmel_usart", .id = 2, .dev = { - .platform_data = &uart1_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart1_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart1_data, }, .resource = uart1_resources, .num_resources = ARRAY_SIZE(uart1_resources), }; -static inline void configure_usart1_pins(void) +static inline void configure_usart1_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PA18, 0); /* RTS1 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PA19, 0); /* CTS1 */ } static struct resource uart2_resources[] = { @@ -536,21 +734,29 @@ static struct atmel_uart_data uart2_data = { .use_dma_rx = 1, }; +static u64 uart2_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9rl_uart2_device = { .name = "atmel_usart", .id = 3, .dev = { - .platform_data = &uart2_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart2_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart2_data, }, .resource = uart2_resources, .num_resources = ARRAY_SIZE(uart2_resources), }; -static inline void configure_usart2_pins(void) +static inline void configure_usart2_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ + + if (pins & ATMEL_UART_RTS) + at91_set_A_periph(AT91_PIN_PA29, 0); /* RTS2 */ + if (pins & ATMEL_UART_CTS) + at91_set_A_periph(AT91_PIN_PA30, 0); /* CTS2 */ } static struct resource uart3_resources[] = { @@ -571,27 +777,35 @@ static struct atmel_uart_data uart3_data = { .use_dma_rx = 1, }; +static u64 uart3_dmamask = DMA_BIT_MASK(32); + static struct platform_device at91sam9rl_uart3_device = { .name = "atmel_usart", .id = 4, .dev = { - .platform_data = &uart3_data, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &uart3_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &uart3_data, }, .resource = uart3_resources, .num_resources = ARRAY_SIZE(uart3_resources), }; -static inline void configure_usart3_pins(void) +static inline void configure_usart3_pins(unsigned pins) { at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */ at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */ + + if (pins & ATMEL_UART_RTS) + at91_set_B_periph(AT91_PIN_PD4, 0); /* RTS3 */ + if (pins & ATMEL_UART_CTS) + at91_set_B_periph(AT91_PIN_PD3, 0); /* CTS3 */ } -struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ +static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ struct platform_device *atmel_default_console_device; /* the serial console device */ -void __init at91_init_serial(struct at91_uart_config *config) +void __init __deprecated at91_init_serial(struct at91_uart_config *config) { int i; @@ -599,22 +813,22 @@ void __init at91_init_serial(struct at91_uart_config *config) for (i = 0; i < config->nr_tty; i++) { switch (config->tty_map[i]) { case 0: - configure_usart0_pins(); + configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); at91_uarts[i] = &at91sam9rl_uart0_device; at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart"); break; case 1: - configure_usart1_pins(); + configure_usart1_pins(0); at91_uarts[i] = &at91sam9rl_uart1_device; at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart"); break; case 2: - configure_usart2_pins(); + configure_usart2_pins(0); at91_uarts[i] = &at91sam9rl_uart2_device; at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart"); break; case 3: - configure_usart3_pins(); + configure_usart3_pins(0); at91_uarts[i] = &at91sam9rl_uart3_device; at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart"); break; @@ -636,6 +850,53 @@ void __init at91_init_serial(struct at91_uart_config *config) printk(KERN_INFO "AT91: No default serial console defined.\n"); } +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) +{ + struct platform_device *pdev; + + switch (id) { + case 0: /* DBGU */ + pdev = &at91sam9rl_dbgu_device; + configure_dbgu_pins(); + at91_clock_associate("mck", &pdev->dev, "usart"); + break; + case AT91SAM9RL_ID_US0: + pdev = &at91sam9rl_uart0_device; + configure_usart0_pins(pins); + at91_clock_associate("usart0_clk", &pdev->dev, "usart"); + break; + case AT91SAM9RL_ID_US1: + pdev = &at91sam9rl_uart1_device; + configure_usart1_pins(pins); + at91_clock_associate("usart1_clk", &pdev->dev, "usart"); + break; + case AT91SAM9RL_ID_US2: + pdev = &at91sam9rl_uart2_device; + configure_usart2_pins(pins); + at91_clock_associate("usart2_clk", &pdev->dev, "usart"); + break; + case AT91SAM9RL_ID_US3: + pdev = &at91sam9rl_uart3_device; + configure_usart3_pins(pins); + at91_clock_associate("usart3_clk", &pdev->dev, "usart"); + break; + default: + return; + } + pdev->id = portnr; /* update to mapped ID */ + + if (portnr < ATMEL_MAX_UART) + at91_uarts[portnr] = pdev; +} + +void __init at91_set_serial_console(unsigned portnr) +{ + if (portnr < ATMEL_MAX_UART) + atmel_default_console_device = at91_uarts[portnr]; + if (!atmel_default_console_device) + printk(KERN_INFO "AT91: No default serial console defined.\n"); +} + void __init at91_add_device_serial(void) { int i; @@ -646,7 +907,9 @@ void __init at91_add_device_serial(void) } } #else -void __init at91_init_serial(struct at91_uart_config *config) {} +void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} +void __init at91_set_serial_console(unsigned portnr) {} void __init at91_add_device_serial(void) {} #endif @@ -659,6 +922,9 @@ void __init at91_add_device_serial(void) {} */ static int __init at91_add_standard_devices(void) { + at91_add_device_rtc(); + at91_add_device_rtt(); + at91_add_device_watchdog(); return 0; } diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c new file mode 100644 index 000000000000..185437131541 --- /dev/null +++ b/arch/arm/mach-at91/board-cap9adk.c @@ -0,0 +1,359 @@ +/* + * linux/arch/arm/mach-at91/board-cap9adk.c + * + * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> + * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> + * Copyright (C) 2005 SAN People + * Copyright (C) 2007 Atmel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> +#include <linux/fb.h> +#include <linux/mtd/physmap.h> + +#include <video/atmel_lcdc.h> + +#include <asm/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/arch/board.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91cap9_matrix.h> +#include <asm/arch/at91sam926x_mc.h> + +#include "generic.h" + + +static void __init cap9adk_map_io(void) +{ + /* Initialize processor: 12 MHz crystal */ + at91cap9_initialize(12000000); + + /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */ + at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11); + /* ... POWER LED always on */ + at91_set_gpio_output(AT91_PIN_PC29, 1); + + /* Setup the serial ports and console */ + at91_register_uart(0, 0, 0); /* DBGU = ttyS0 */ + at91_set_serial_console(0); +} + +static void __init cap9adk_init_irq(void) +{ + at91cap9_init_interrupts(NULL); +} + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata cap9adk_usbh_data = { + .ports = 2, +}; + + +/* + * ADS7846 Touchscreen + */ +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) +static int ads7843_pendown_state(void) +{ + return !at91_get_gpio_value(AT91_PIN_PC4); /* Touchscreen PENIRQ */ +} + +static struct ads7846_platform_data ads_info = { + .model = 7843, + .x_min = 150, + .x_max = 3830, + .y_min = 190, + .y_max = 3830, + .vref_delay_usecs = 100, + .x_plate_ohms = 450, + .y_plate_ohms = 250, + .pressure_max = 15000, + .debounce_max = 1, + .debounce_rep = 0, + .debounce_tol = (~0), + .get_pendown_state = ads7843_pendown_state, +}; + +static void __init cap9adk_add_device_ts(void) +{ + at91_set_gpio_input(AT91_PIN_PC4, 1); /* Touchscreen PENIRQ */ + at91_set_gpio_input(AT91_PIN_PC5, 1); /* Touchscreen BUSY */ +} +#else +static void __init cap9adk_add_device_ts(void) {} +#endif + + +/* + * SPI devices. + */ +static struct spi_board_info cap9adk_spi_devices[] = { +#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) + { /* DataFlash card */ + .modalias = "mtd_dataflash", + .chip_select = 0, + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, +#endif +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) + { + .modalias = "ads7846", + .chip_select = 3, /* can be 2 or 3, depending on J2 jumper */ + .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ + .bus_num = 0, + .platform_data = &ads_info, + .irq = AT91_PIN_PC4, + }, +#endif +}; + + +/* + * MCI (SD/MMC) + */ +static struct at91_mmc_data __initdata cap9adk_mmc_data = { + .wire4 = 1, +// .det_pin = ... not connected +// .wp_pin = ... not connected +// .vcc_pin = ... not connected +}; + + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata cap9adk_macb_data = { + .is_rmii = 1, +}; + + +/* + * NAND flash + */ +static struct mtd_partition __initdata cap9adk_nand_partitions[] = { + { + .name = "NAND partition", + .offset = 0, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) +{ + *num_partitions = ARRAY_SIZE(cap9adk_nand_partitions); + return cap9adk_nand_partitions; +} + +static struct at91_nand_data __initdata cap9adk_nand_data = { + .ale = 21, + .cle = 22, +// .det_pin = ... not connected +// .rdy_pin = ... not connected + .enable_pin = AT91_PIN_PD15, + .partition_info = nand_partitions, +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) + .bus_width_16 = 1, +#else + .bus_width_16 = 0, +#endif +}; + + +/* + * NOR flash + */ +static struct mtd_partition cap9adk_nor_partitions[] = { + { + .name = "NOR partition", + .offset = 0, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data cap9adk_nor_data = { + .width = 2, + .parts = cap9adk_nor_partitions, + .nr_parts = ARRAY_SIZE(cap9adk_nor_partitions), +}; + +#define NOR_BASE AT91_CHIPSELECT_0 +#define NOR_SIZE 0x800000 + +static struct resource nor_flash_resources[] = { + { + .start = NOR_BASE, + .end = NOR_BASE + NOR_SIZE - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device cap9adk_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &cap9adk_nor_data, + }, + .resource = nor_flash_resources, + .num_resources = ARRAY_SIZE(nor_flash_resources), +}; + +static __init void cap9adk_add_device_nor(void) +{ + unsigned long csa; + + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); + + /* set the bus interface characteristics */ + at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2) + | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2)); + + at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10) + | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10)); + + at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); + + at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE + | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE + | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1)); + + platform_device_register(&cap9adk_nor_flash); +} + + +/* + * LCD Controller + */ +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) +static struct fb_videomode at91_tft_vga_modes[] = { + { + .name = "TX09D50VM1CCA @ 60", + .refresh = 60, + .xres = 240, .yres = 320, + .pixclock = KHZ2PICOS(4965), + + .left_margin = 1, .right_margin = 33, + .upper_margin = 1, .lower_margin = 0, + .hsync_len = 5, .vsync_len = 1, + + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED, + }, +}; + +static struct fb_monspecs at91fb_default_monspecs = { + .manufacturer = "HIT", + .monitor = "TX09D70VM1CCA", + + .modedb = at91_tft_vga_modes, + .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), + .hfmin = 15000, + .hfmax = 64000, + .vfmin = 50, + .vfmax = 150, +}; + +#define AT91CAP9_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ + | ATMEL_LCDC_DISTYPE_TFT \ + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) + +static void at91_lcdc_power_control(int on) +{ + if (on) + at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */ + else + at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */ +} + +/* Driver datas */ +static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = { + .default_bpp = 16, + .default_dmacon = ATMEL_LCDC_DMAEN, + .default_lcdcon2 = AT91CAP9_DEFAULT_LCDCON2, + .default_monspecs = &at91fb_default_monspecs, + .atmel_lcdfb_power_control = at91_lcdc_power_control, + .guard_time = 1, +}; + +#else +static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data; +#endif + + +/* + * AC97 + */ +static struct atmel_ac97_data cap9adk_ac97_data = { +// .reset_pin = ... not connected +}; + + +static void __init cap9adk_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH); + at91_add_device_usbh(&cap9adk_usbh_data); + /* SPI */ + at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); + /* Touchscreen */ + cap9adk_add_device_ts(); + /* MMC */ + at91_add_device_mmc(1, &cap9adk_mmc_data); + /* Ethernet */ + at91_add_device_eth(&cap9adk_macb_data); + /* NAND */ + at91_add_device_nand(&cap9adk_nand_data); + /* NOR Flash */ + cap9adk_add_device_nor(); + /* I2C */ + at91_add_device_i2c(NULL, 0); + /* LCD Controller */ + set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH); + at91_add_device_lcdc(&cap9adk_lcdc_data); + /* AC97 */ + at91_add_device_ac97(&cap9adk_ac97_data); +} + +MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") + /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = cap9adk_map_io, + .init_irq = cap9adk_init_irq, + .init_machine = cap9adk_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index d0aa20c9383e..0e2a11fc5bbd 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c @@ -25,6 +25,8 @@ #include <linux/platform_device.h> #include <linux/spi/spi.h> #include <linux/mtd/physmap.h> +#include <linux/input.h> +#include <linux/gpio_keys.h> #include <asm/hardware.h> #include <asm/setup.h> @@ -156,6 +158,85 @@ static struct platform_device csb_flash = { .num_resources = ARRAY_SIZE(csb_flash_resources), }; +/* + * GPIO Buttons (on CSB300) + */ +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button csb300_buttons[] = { + { + .gpio = AT91_PIN_PB29, + .code = BTN_0, + .desc = "sw0", + .active_low = 1, + .wakeup = 1, + }, + { + .gpio = AT91_PIN_PB28, + .code = BTN_1, + .desc = "sw1", + .active_low = 1, + .wakeup = 1, + }, + { + .gpio = AT91_PIN_PA21, + .code = BTN_2, + .desc = "sw2", + .active_low = 1, + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data csb300_button_data = { + .buttons = csb300_buttons, + .nbuttons = ARRAY_SIZE(csb300_buttons), +}; + +static struct platform_device csb300_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &csb300_button_data, + } +}; + +static void __init csb300_add_device_buttons(void) +{ + at91_set_gpio_input(AT91_PIN_PB29, 0); /* sw0 */ + at91_set_deglitch(AT91_PIN_PB29, 1); + at91_set_gpio_input(AT91_PIN_PB28, 0); /* sw1 */ + at91_set_deglitch(AT91_PIN_PB28, 1); + at91_set_gpio_input(AT91_PIN_PA21, 0); /* sw2 */ + at91_set_deglitch(AT91_PIN_PA21, 1); + + platform_device_register(&csb300_button_device); +} +#else +static void __init csb300_add_device_buttons(void) {} +#endif + +static struct gpio_led csb_leds[] = { + { /* "led0", yellow */ + .name = "led0", + .gpio = AT91_PIN_PB2, + .active_low = 1, + .default_trigger = "heartbeat", + }, + { /* "led1", green */ + .name = "led1", + .gpio = AT91_PIN_PB1, + .active_low = 1, + .default_trigger = "mmc0", + }, + { /* "led2", yellow */ + .name = "led2", + .gpio = AT91_PIN_PB0, + .active_low = 1, + .default_trigger = "ide-disk", + }, +}; + + static void __init csb337_board_init(void) { /* Serial */ @@ -177,6 +258,10 @@ static void __init csb337_board_init(void) at91_add_device_mmc(0, &csb337_mmc_data); /* NOR flash */ platform_device_register(&csb_flash); + /* LEDs */ + at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds)); + /* Switches on CSB300 */ + csb300_add_device_buttons(); } MACHINE_START(CSB337, "Cogent CSB337") diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c index 40c9e4331706..0a897efeba8e 100644 --- a/arch/arm/mach-at91/board-dk.c +++ b/arch/arm/mach-at91/board-dk.c @@ -183,6 +183,14 @@ static struct platform_device dk_flash = { .num_resources = 1, }; +static struct gpio_led dk_leds[] = { + { + .name = "led0", + .gpio = AT91_PIN_PB2, + .active_low = 1, + .default_trigger = "heartbeat", + } +}; static void __init dk_board_init(void) { @@ -213,6 +221,8 @@ static void __init dk_board_init(void) at91_add_device_nand(&dk_nand_data); /* NOR Flash */ platform_device_register(&dk_flash); + /* LEDs */ + at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds)); /* VGA */ // dk_add_device_video(); } diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c index 53a5ef9e72ee..0574e50a30dd 100644 --- a/arch/arm/mach-at91/board-ek.c +++ b/arch/arm/mach-at91/board-ek.c @@ -141,6 +141,25 @@ static struct platform_device ek_flash = { .num_resources = 1, }; +static struct gpio_led ek_leds[] = { + { /* "user led 1", DS2 */ + .name = "green", + .gpio = AT91_PIN_PB0, + .active_low = 1, + .default_trigger = "mmc0", + }, + { /* "user led 2", DS4 */ + .name = "yellow", + .gpio = AT91_PIN_PB1, + .active_low = 1, + .default_trigger = "heartbeat", + }, + { /* "user led 3", DS6 */ + .name = "red", + .gpio = AT91_PIN_PB2, + .active_low = 1, + } +}; static void __init ek_board_init(void) { @@ -167,6 +186,8 @@ static void __init ek_board_init(void) #endif /* NOR Flash */ platform_device_register(&ek_flash); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); /* VGA */ // ek_add_device_video(); } diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 550ae59a3aca..aa29ea58ca09 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -280,6 +280,68 @@ static struct spi_board_info ek_spi_devices[] = { * LCD Controller */ #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) + +#if defined(CONFIG_FB_ATMEL_STN) + +/* STN */ +static struct fb_videomode at91_stn_modes[] = { + { + .name = "SP06Q002 @ 75", + .refresh = 75, + .xres = 320, .yres = 240, + .pixclock = KHZ2PICOS(1440), + + .left_margin = 1, .right_margin = 1, + .upper_margin = 0, .lower_margin = 0, + .hsync_len = 1, .vsync_len = 1, + + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED, + }, +}; + +static struct fb_monspecs at91fb_default_stn_monspecs = { + .manufacturer = "HIT", + .monitor = "SP06Q002", + + .modedb = at91_stn_modes, + .modedb_len = ARRAY_SIZE(at91_stn_modes), + .hfmin = 15000, + .hfmax = 64000, + .vfmin = 50, + .vfmax = 150, +}; + +#define AT91SAM9261_DEFAULT_STN_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ + | ATMEL_LCDC_DISTYPE_STNMONO \ + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE \ + | ATMEL_LCDC_IFWIDTH_4 \ + | ATMEL_LCDC_SCANMOD_SINGLE) + +static void at91_lcdc_stn_power_control(int on) +{ + /* backlight */ + if (on) { /* power up */ + at91_set_gpio_value(AT91_PIN_PC14, 0); + at91_set_gpio_value(AT91_PIN_PC15, 0); + } else { /* power down */ + at91_set_gpio_value(AT91_PIN_PC14, 1); + at91_set_gpio_value(AT91_PIN_PC15, 1); + } +} + +static struct atmel_lcdfb_info __initdata ek_lcdc_data = { + .default_bpp = 1, + .default_dmacon = ATMEL_LCDC_DMAEN, + .default_lcdcon2 = AT91SAM9261_DEFAULT_STN_LCDCON2, + .default_monspecs = &at91fb_default_stn_monspecs, + .atmel_lcdfb_power_control = at91_lcdc_stn_power_control, + .guard_time = 1, +}; + +#else + +/* TFT */ static struct fb_videomode at91_tft_vga_modes[] = { { .name = "TX09D50VM1CCA @ 60", @@ -296,7 +358,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { }, }; -static struct fb_monspecs at91fb_default_monspecs = { +static struct fb_monspecs at91fb_default_tft_monspecs = { .manufacturer = "HIT", .monitor = "TX09D50VM1CCA", @@ -308,11 +370,11 @@ static struct fb_monspecs at91fb_default_monspecs = { .vfmax = 150, }; -#define AT91SAM9261_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ +#define AT91SAM9261_DEFAULT_TFT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ | ATMEL_LCDC_DISTYPE_TFT \ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) -static void at91_lcdc_power_control(int on) +static void at91_lcdc_tft_power_control(int on) { if (on) at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */ @@ -320,15 +382,15 @@ static void at91_lcdc_power_control(int on) at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */ } -/* Driver datas */ static struct atmel_lcdfb_info __initdata ek_lcdc_data = { .default_bpp = 16, .default_dmacon = ATMEL_LCDC_DMAEN, - .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2, - .default_monspecs = &at91fb_default_monspecs, - .atmel_lcdfb_power_control = at91_lcdc_power_control, + .default_lcdcon2 = AT91SAM9261_DEFAULT_TFT_LCDCON2, + .default_monspecs = &at91fb_default_tft_monspecs, + .atmel_lcdfb_power_control = at91_lcdc_tft_power_control, .guard_time = 1, }; +#endif #else static struct atmel_lcdfb_info __initdata ek_lcdc_data; @@ -342,25 +404,25 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data; static struct gpio_keys_button ek_buttons[] = { { .gpio = AT91_PIN_PA27, - .keycode = BTN_0, + .code = BTN_0, .desc = "Button 0", .active_low = 1, }, { .gpio = AT91_PIN_PA26, - .keycode = BTN_1, + .code = BTN_1, .desc = "Button 1", .active_low = 1, }, { .gpio = AT91_PIN_PA25, - .keycode = BTN_2, + .code = BTN_2, .desc = "Button 2", .active_low = 1, }, { .gpio = AT91_PIN_PA24, - .keycode = BTN_3, + .code = BTN_3, .desc = "Button 3", .active_low = 1, } diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index ab9dcc075454..f09347a86e71 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -27,6 +27,8 @@ #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> #include <linux/fb.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> #include <video/atmel_lcdc.h> @@ -163,6 +165,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { * MACB Ethernet device */ static struct at91_eth_data __initdata ek_macb_data = { + .phy_irq_pin = AT91_PIN_PE31, .is_rmii = 1, }; @@ -264,6 +267,55 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data; /* + * GPIO Buttons + */ +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button ek_buttons[] = { + { /* BP1, "leftclic" */ + .code = BTN_LEFT, + .gpio = AT91_PIN_PC5, + .active_low = 1, + .desc = "left_click", + .wakeup = 1, + }, + { /* BP2, "rightclic" */ + .code = BTN_RIGHT, + .gpio = AT91_PIN_PC4, + .active_low = 1, + .desc = "right_click", + .wakeup = 1, + }, +}; + +static struct gpio_keys_platform_data ek_button_data = { + .buttons = ek_buttons, + .nbuttons = ARRAY_SIZE(ek_buttons), +}; + +static struct platform_device ek_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &ek_button_data, + } +}; + +static void __init ek_add_device_buttons(void) +{ + at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */ + at91_set_deglitch(AT91_PIN_PC5, 1); + at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */ + at91_set_deglitch(AT91_PIN_PC4, 1); + + platform_device_register(&ek_button_device); +} +#else +static void __init ek_add_device_buttons(void) {} +#endif + + +/* * AC97 */ static struct atmel_ac97_data ek_ac97_data = { @@ -271,6 +323,30 @@ static struct atmel_ac97_data ek_ac97_data = { }; +/* + * LEDs ... these could all be PWM-driven, for variable brightness + */ +static struct gpio_led ek_leds[] = { + { /* "left" led, green, userled1, pwm1 */ + .name = "ds1", + .gpio = AT91_PIN_PB8, + .active_low = 1, + .default_trigger = "mmc0", + }, + { /* "right" led, green, userled2, pwm2 */ + .name = "ds2", + .gpio = AT91_PIN_PC29, + .active_low = 1, + .default_trigger = "nand-disk", + }, + { /* "power" led, yellow, pwm0 */ + .name = "ds3", + .gpio = AT91_PIN_PB7, + .default_trigger = "heartbeat", + }, +}; + + static void __init ek_board_init(void) { /* Serial */ @@ -294,8 +370,12 @@ static void __init ek_board_init(void) at91_add_device_i2c(NULL, 0); /* LCD Controller */ at91_add_device_lcdc(&ek_lcdc_data); + /* Push Buttons */ + ek_add_device_buttons(); /* AC97 */ at91_add_device_ac97(&ek_ac97_data); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); } MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 57c3b647ce83..ec76eeaafd45 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -574,6 +574,8 @@ int __init at91_clock_init(unsigned long main_clock) } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) { uhpck.pmc_mask = AT91SAM926x_PMC_UHP; udpck.pmc_mask = AT91SAM926x_PMC_UDP; + } else if (cpu_is_at91cap9()) { + uhpck.pmc_mask = AT91CAP9_PMC_UHP; } at91_sys_write(AT91_CKGR_PLLBR, 0); diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 77d4c0a37842..b5daf7f5e011 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -15,6 +15,7 @@ extern void __init at91sam9261_initialize(unsigned long main_clock); extern void __init at91sam9263_initialize(unsigned long main_clock); extern void __init at91sam9rl_initialize(unsigned long main_clock); extern void __init at91x40_initialize(unsigned long main_clock); +extern void __init at91cap9_initialize(unsigned long main_clock); /* Interrupts */ extern void __init at91rm9200_init_interrupts(unsigned int priority[]); @@ -23,6 +24,7 @@ extern void __init at91sam9261_init_interrupts(unsigned int priority[]); extern void __init at91sam9263_init_interrupts(unsigned int priority[]); extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); extern void __init at91x40_init_interrupts(unsigned int priority[]); +extern void __init at91cap9_init_interrupts(unsigned int priority[]); extern void __init at91_aic_init(unsigned int priority[]); /* Timer */ diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index aa2d365c93fb..6aeddd68d8af 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -13,6 +13,8 @@ #include <linux/errno.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/debugfs.h> +#include <linux/seq_file.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/module.h> @@ -414,6 +416,66 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) /*--------------------------------------------------------------------------*/ +#ifdef CONFIG_DEBUG_FS + +static int at91_gpio_show(struct seq_file *s, void *unused) +{ + int bank, j; + + /* print heading */ + seq_printf(s, "Pin\t"); + for (bank = 0; bank < gpio_banks; bank++) { + seq_printf(s, "PIO%c\t", 'A' + bank); + }; + seq_printf(s, "\n\n"); + + /* print pin status */ + for (j = 0; j < 32; j++) { + seq_printf(s, "%i:\t", j); + + for (bank = 0; bank < gpio_banks; bank++) { + unsigned pin = PIN_BASE + (32 * bank) + j; + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (__raw_readl(pio + PIO_PSR) & mask) + seq_printf(s, "GPIO:%s", __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0"); + else + seq_printf(s, "%s", __raw_readl(pio + PIO_ABSR) & mask ? "B" : "A"); + + seq_printf(s, "\t"); + } + + seq_printf(s, "\n"); + } + + return 0; +} + +static int at91_gpio_open(struct inode *inode, struct file *file) +{ + return single_open(file, at91_gpio_show, NULL); +} + +static const struct file_operations at91_gpio_operations = { + .open = at91_gpio_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __init at91_gpio_debugfs_init(void) +{ + /* /sys/kernel/debug/at91_gpio */ + (void) debugfs_create_file("at91_gpio", S_IFREG | S_IRUGO, NULL, NULL, &at91_gpio_operations); + return 0; +} +postcore_initcall(at91_gpio_debugfs_init); + +#endif + +/*--------------------------------------------------------------------------*/ + /* * Called from the processor-specific init to enable GPIO interrupt support. */ diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c index 0d5144973988..9cdcda500fe8 100644 --- a/arch/arm/mach-at91/leds.c +++ b/arch/arm/mach-at91/leds.c @@ -14,11 +14,62 @@ #include <linux/init.h> #include <asm/mach-types.h> -#include <asm/leds.h> #include <asm/arch/board.h> #include <asm/arch/gpio.h> +/* ------------------------------------------------------------------------- */ + +#if defined(CONFIG_NEW_LEDS) + +#include <linux/platform_device.h> + +/* + * New cross-platform LED support. + */ + +static struct gpio_led_platform_data led_data; + +static struct platform_device at91_leds = { + .name = "leds-gpio", + .id = -1, + .dev.platform_data = &led_data, +}; + +void __init at91_gpio_leds(struct gpio_led *leds, int nr) +{ + int i; + + if (!nr) + return; + + for (i = 0; i < nr; i++) + at91_set_gpio_output(leds[i].gpio, leds[i].active_low); + + led_data.leds = leds; + led_data.num_leds = nr; + platform_device_register(&at91_leds); +} + +#else +void __init at91_gpio_leds(struct gpio_led *leds, int nr) {} +#endif + + +/* ------------------------------------------------------------------------- */ + +#if defined(CONFIG_LEDS) + +#include <asm/leds.h> + +/* + * Old ARM-specific LED framework; not fully functional when generic time is + * in use. + */ + +static u8 at91_leds_cpu; +static u8 at91_leds_timer; + static inline void at91_led_on(unsigned int led) { at91_set_gpio_value(led, 0); @@ -93,3 +144,18 @@ static int __init leds_init(void) } __initcall(leds_init); + + +void __init at91_init_leds(u8 cpu_led, u8 timer_led) +{ + /* Enable GPIO to access the LEDs */ + at91_set_gpio_output(cpu_led, 1); + at91_set_gpio_output(timer_led, 1); + + at91_leds_cpu = cpu_led; + at91_leds_timer = timer_led; +} + +#else +void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} +#endif diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 98cb61482917..4b120cc36135 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -80,6 +80,11 @@ static int at91_pm_verify_clocks(void) pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); return 0; } + } else if (cpu_is_at91cap9()) { + if ((scsr & AT91CAP9_PMC_UHP) != 0) { + pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); + return 0; + } } #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c index f428af7545b4..e5dc33f1f95c 100644 --- a/arch/arm/mach-clps711x/time.c +++ b/arch/arm/mach-clps711x/time.c @@ -50,9 +50,7 @@ static unsigned long clps711x_gettimeoffset(void) static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); timer_tick(); - write_sequnlock(&xtime_lock); return IRQ_HANDLED; } diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index 986205ec9269..2ac63671ea5f 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c @@ -298,8 +298,6 @@ extern unsigned long ioc_timer_gettimeoffset(void); static irqreturn_t clps7500_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - timer_tick(); /* Why not using do_leds interface?? */ @@ -313,8 +311,6 @@ clps7500_timer_interrupt(int irq, void *dev_id) } } - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 8c1b5690dfe8..7710e14b5268 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -178,8 +178,6 @@ ebsa110_timer_interrupt(int irq, void *dev_id) { u32 count; - write_seqlock(&xtime_lock); - /* latch and read timer 1 */ __raw_writeb(0x40, PIT_CTRL); count = __raw_readb(PIT_T1); @@ -192,8 +190,6 @@ ebsa110_timer_interrupt(int irq, void *dev_id) timer_tick(); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 70b2c7801110..91f6a07a51d5 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -3,6 +3,7 @@ * Core routines for Cirrus EP93xx chips. * * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> * * Thanks go to Michael Burian and Ray Lehtiniemi for their key * role in the ep93xx linux community. @@ -21,7 +22,6 @@ #include <linux/serial.h> #include <linux/tty.h> #include <linux/bitops.h> -#include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/serial_core.h> #include <linux/device.h> @@ -99,8 +99,6 @@ static unsigned int last_jiffy_time; static int ep93xx_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - __raw_writel(1, EP93XX_TIMER1_CLEAR); while ((signed long) (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) @@ -109,8 +107,6 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id) timer_tick(); } - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } @@ -157,38 +153,41 @@ static unsigned char gpio_int_enabled[3]; static unsigned char gpio_int_type1[3]; static unsigned char gpio_int_type2[3]; -static void update_gpio_int_params(int abf) +/* Port ordering is: A B F */ +static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; +static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; +static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; +static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x5c }; + +static void update_gpio_int_params(unsigned port) { - if (abf == 0) { - __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE); - __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2); - __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1); - __raw_writeb(gpio_int_unmasked[0] & gpio_int_enabled[0], EP93XX_GPIO_A_INT_ENABLE); - } else if (abf == 1) { - __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE); - __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2); - __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1); - __raw_writeb(gpio_int_unmasked[1] & gpio_int_enabled[1], EP93XX_GPIO_B_INT_ENABLE); - } else if (abf == 2) { - __raw_writeb(0, EP93XX_GPIO_F_INT_ENABLE); - __raw_writeb(gpio_int_type2[2], EP93XX_GPIO_F_INT_TYPE2); - __raw_writeb(gpio_int_type1[2], EP93XX_GPIO_F_INT_TYPE1); - __raw_writeb(gpio_int_unmasked[2] & gpio_int_enabled[2], EP93XX_GPIO_F_INT_ENABLE); - } else { - BUG(); - } -} + BUG_ON(port > 2); + __raw_writeb(0, EP93XX_GPIO_REG(int_en_register_offset[port])); -static unsigned char data_register_offset[8] = { - 0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40, + __raw_writeb(gpio_int_type2[port], + EP93XX_GPIO_REG(int_type2_register_offset[port])); + + __raw_writeb(gpio_int_type1[port], + EP93XX_GPIO_REG(int_type1_register_offset[port])); + + __raw_writeb(gpio_int_unmasked[port] & gpio_int_enabled[port], + EP93XX_GPIO_REG(int_en_register_offset[port])); +} + +/* Port ordering is: A B F D E C G H */ +static const u8 data_register_offset[8] = { + 0x00, 0x04, 0x30, 0x0c, 0x20, 0x08, 0x38, 0x40, }; -static unsigned char data_direction_register_offset[8] = { - 0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44, +static const u8 data_direction_register_offset[8] = { + 0x10, 0x14, 0x34, 0x1c, 0x24, 0x18, 0x3c, 0x44, }; -void gpio_line_config(int line, int direction) +#define GPIO_IN 0 +#define GPIO_OUT 1 + +static void ep93xx_gpio_set_direction(unsigned line, int direction) { unsigned int data_direction_register; unsigned long flags; @@ -199,14 +198,10 @@ void gpio_line_config(int line, int direction) local_irq_save(flags); if (direction == GPIO_OUT) { - if (line >= 0 && line < 16) { - /* Port A/B. */ + if (line >= 0 && line <= EP93XX_GPIO_LINE_MAX_IRQ) { + /* Port A/B/F */ gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); update_gpio_int_params(line >> 3); - } else if (line >= 40 && line < 48) { - /* Port F. */ - gpio_int_unmasked[2] &= ~(1 << (line & 7)); - update_gpio_int_params(2); } v = __raw_readb(data_direction_register); @@ -219,39 +214,58 @@ void gpio_line_config(int line, int direction) } local_irq_restore(flags); } -EXPORT_SYMBOL(gpio_line_config); -int gpio_line_get(int line) +int gpio_direction_input(unsigned gpio) +{ + if (gpio > EP93XX_GPIO_LINE_MAX) + return -EINVAL; + + ep93xx_gpio_set_direction(gpio, GPIO_IN); + + return 0; +} +EXPORT_SYMBOL(gpio_direction_input); + +int gpio_direction_output(unsigned gpio, int value) +{ + if (gpio > EP93XX_GPIO_LINE_MAX) + return -EINVAL; + + gpio_set_value(gpio, value); + ep93xx_gpio_set_direction(gpio, GPIO_OUT); + + return 0; +} +EXPORT_SYMBOL(gpio_direction_output); + +int gpio_get_value(unsigned gpio) { unsigned int data_register; - data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]); + data_register = EP93XX_GPIO_REG(data_register_offset[gpio >> 3]); - return !!(__raw_readb(data_register) & (1 << (line & 7))); + return !!(__raw_readb(data_register) & (1 << (gpio & 7))); } -EXPORT_SYMBOL(gpio_line_get); +EXPORT_SYMBOL(gpio_get_value); -void gpio_line_set(int line, int value) +void gpio_set_value(unsigned gpio, int value) { unsigned int data_register; unsigned long flags; unsigned char v; - data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]); + data_register = EP93XX_GPIO_REG(data_register_offset[gpio >> 3]); local_irq_save(flags); - if (value == EP93XX_GPIO_HIGH) { - v = __raw_readb(data_register); - v |= 1 << (line & 7); - __raw_writeb(v, data_register); - } else if (value == EP93XX_GPIO_LOW) { - v = __raw_readb(data_register); - v &= ~(1 << (line & 7)); - __raw_writeb(v, data_register); - } + v = __raw_readb(data_register); + if (value) + v |= 1 << (gpio & 7); + else + v &= ~(1 << (gpio & 7)); + __raw_writeb(v, data_register); local_irq_restore(flags); } -EXPORT_SYMBOL(gpio_line_set); +EXPORT_SYMBOL(gpio_set_value); /************************************************************************* @@ -265,47 +279,67 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) status = __raw_readb(EP93XX_GPIO_A_INT_STATUS); for (i = 0; i < 8; i++) { if (status & (1 << i)) { - desc = irq_desc + IRQ_EP93XX_GPIO(0) + i; - desc_handle_irq(IRQ_EP93XX_GPIO(0) + i, desc); + int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; + desc = irq_desc + gpio_irq; + desc_handle_irq(gpio_irq, desc); } } status = __raw_readb(EP93XX_GPIO_B_INT_STATUS); for (i = 0; i < 8; i++) { if (status & (1 << i)) { - desc = irq_desc + IRQ_EP93XX_GPIO(8) + i; - desc_handle_irq(IRQ_EP93XX_GPIO(8) + i, desc); + int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; + desc = irq_desc + gpio_irq; + desc_handle_irq(gpio_irq, desc); } } } static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) { - int gpio_irq = IRQ_EP93XX_GPIO(16) + (((irq + 1) & 7) ^ 4); + /* + * map discontiguous hw irq range to continous sw irq range: + * + * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7}) + */ + int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */ + int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx; desc_handle_irq(gpio_irq, irq_desc + gpio_irq); } +static void ep93xx_gpio_irq_ack(unsigned int irq) +{ + int line = irq_to_gpio(irq); + int port = line >> 3; + int port_mask = 1 << (line & 7); + + if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { + gpio_int_type2[port] ^= port_mask; /* switch edge direction */ + update_gpio_int_params(port); + } + + __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); +} + static void ep93xx_gpio_irq_mask_ack(unsigned int irq) { - int line = irq - IRQ_EP93XX_GPIO(0); + int line = irq_to_gpio(irq); int port = line >> 3; + int port_mask = 1 << (line & 7); - gpio_int_unmasked[port] &= ~(1 << (line & 7)); + if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) + gpio_int_type2[port] ^= port_mask; /* switch edge direction */ + + gpio_int_unmasked[port] &= ~port_mask; update_gpio_int_params(port); - if (port == 0) { - __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK); - } else if (port == 1) { - __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK); - } else if (port == 2) { - __raw_writel(1 << (line & 7), EP93XX_GPIO_F_INT_ACK); - } + __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); } static void ep93xx_gpio_irq_mask(unsigned int irq) { - int line = irq - IRQ_EP93XX_GPIO(0); + int line = irq_to_gpio(irq); int port = line >> 3; gpio_int_unmasked[port] &= ~(1 << (line & 7)); @@ -314,7 +348,7 @@ static void ep93xx_gpio_irq_mask(unsigned int irq) static void ep93xx_gpio_irq_unmask(unsigned int irq) { - int line = irq - IRQ_EP93XX_GPIO(0); + int line = irq_to_gpio(irq); int port = line >> 3; gpio_int_unmasked[port] |= 1 << (line & 7); @@ -329,38 +363,54 @@ static void ep93xx_gpio_irq_unmask(unsigned int irq) */ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) { - int port; - int line; - - line = irq - IRQ_EP93XX_GPIO(0); - if (line >= 0 && line < 16) { - gpio_line_config(line, GPIO_IN); - } else { - gpio_line_config(EP93XX_GPIO_LINE_F(line-16), GPIO_IN); + struct irq_desc *desc = irq_desc + irq; + const int gpio = irq_to_gpio(irq); + const int port = gpio >> 3; + const int port_mask = 1 << (gpio & 7); + + ep93xx_gpio_set_direction(gpio, GPIO_IN); + + switch (type) { + case IRQT_RISING: + gpio_int_type1[port] |= port_mask; + gpio_int_type2[port] |= port_mask; + desc->handle_irq = handle_edge_irq; + break; + case IRQT_FALLING: + gpio_int_type1[port] |= port_mask; + gpio_int_type2[port] &= ~port_mask; + desc->handle_irq = handle_edge_irq; + break; + case IRQT_HIGH: + gpio_int_type1[port] &= ~port_mask; + gpio_int_type2[port] |= port_mask; + desc->handle_irq = handle_level_irq; + break; + case IRQT_LOW: + gpio_int_type1[port] &= ~port_mask; + gpio_int_type2[port] &= ~port_mask; + desc->handle_irq = handle_level_irq; + break; + case IRQT_BOTHEDGE: + gpio_int_type1[port] |= port_mask; + /* set initial polarity based on current input level */ + if (gpio_get_value(gpio)) + gpio_int_type2[port] &= ~port_mask; /* falling */ + else + gpio_int_type2[port] |= port_mask; /* rising */ + desc->handle_irq = handle_edge_irq; + break; + default: + pr_err("ep93xx: failed to set irq type %d for gpio %d\n", + type, gpio); + return -EINVAL; } - port = line >> 3; - line &= 7; - - if (type & IRQT_RISING) { - gpio_int_enabled[port] |= 1 << line; - gpio_int_type1[port] |= 1 << line; - gpio_int_type2[port] |= 1 << line; - } else if (type & IRQT_FALLING) { - gpio_int_enabled[port] |= 1 << line; - gpio_int_type1[port] |= 1 << line; - gpio_int_type2[port] &= ~(1 << line); - } else if (type & IRQT_HIGH) { - gpio_int_enabled[port] |= 1 << line; - gpio_int_type1[port] &= ~(1 << line); - gpio_int_type2[port] |= 1 << line; - } else if (type & IRQT_LOW) { - gpio_int_enabled[port] |= 1 << line; - gpio_int_type1[port] &= ~(1 << line); - gpio_int_type2[port] &= ~(1 << line); - } else { - gpio_int_enabled[port] &= ~(1 << line); - } + gpio_int_enabled[port] |= port_mask; + + desc->status &= ~IRQ_TYPE_SENSE_MASK; + desc->status |= type & IRQ_TYPE_SENSE_MASK; + update_gpio_int_params(port); return 0; @@ -368,7 +418,8 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) static struct irq_chip ep93xx_gpio_irq_chip = { .name = "GPIO", - .ack = ep93xx_gpio_irq_mask_ack, + .ack = ep93xx_gpio_irq_ack, + .mask_ack = ep93xx_gpio_irq_mask_ack, .mask = ep93xx_gpio_irq_mask, .unmask = ep93xx_gpio_irq_unmask, .set_type = ep93xx_gpio_irq_type, @@ -377,15 +428,16 @@ static struct irq_chip ep93xx_gpio_irq_chip = { void __init ep93xx_init_irq(void) { - int irq; + int gpio_irq; vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK); vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK); - for (irq = IRQ_EP93XX_GPIO(0); irq <= IRQ_EP93XX_GPIO(23); irq++) { - set_irq_chip(irq, &ep93xx_gpio_irq_chip); - set_irq_handler(irq, handle_level_irq); - set_irq_flags(irq, IRQF_VALID); + for (gpio_irq = gpio_to_irq(0); + gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { + set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip); + set_irq_handler(gpio_irq, handle_level_irq); + set_irq_flags(gpio_irq, IRQF_VALID); } set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index 3a63941d43be..b2a21189dd81 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c @@ -30,14 +30,10 @@ static unsigned long timer1_gettimeoffset (void) static irqreturn_t timer1_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - *CSR_TIMER1_CLR = 0; timer_tick(); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c index d08d64139d00..a764e01d3573 100644 --- a/arch/arm/mach-footbridge/isa-timer.c +++ b/arch/arm/mach-footbridge/isa-timer.c @@ -64,9 +64,7 @@ static unsigned long isa_gettimeoffset(void) static irqreturn_t isa_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); timer_tick(); - write_sequnlock(&xtime_lock); return IRQ_HANDLED; } diff --git a/arch/arm/mach-h720x/cpu-h7201.c b/arch/arm/mach-h720x/cpu-h7201.c index 9107b8e2ad6e..c2a431f482f0 100644 --- a/arch/arm/mach-h720x/cpu-h7201.c +++ b/arch/arm/mach-h720x/cpu-h7201.c @@ -29,13 +29,9 @@ static irqreturn_t h7201_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); timer_tick(); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index 0a1a25fb8ba8..c627fa124eb3 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -113,9 +113,7 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc) mask = CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); if ( mask & TSTAT_T0INT ) { - write_seqlock(&xtime_lock); timer_tick(); - write_sequnlock(&xtime_lock); if( mask == TSTAT_T0INT ) return; } diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index e9c82deb791d..7fbbc17f8e8b 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -250,8 +250,6 @@ unsigned long integrator_gettimeoffset(void) static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - /* * clear the interrupt */ @@ -259,8 +257,6 @@ integrator_timer_interrupt(int irq, void *dev_id) timer_tick(); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index d4d8134ce567..d55fa4e9bb43 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -440,7 +440,7 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) return 1; } -static irqreturn_t v3_irq(int irq, void *devid) +static irqreturn_t v3_irq(int dummy, void *devid) { #ifdef CONFIG_DEBUG_LL struct pt_regs *regs = get_irq_regs(); @@ -448,8 +448,10 @@ static irqreturn_t v3_irq(int irq, void *devid) unsigned long instr = *(unsigned long *)pc; char buf[128]; - sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n", irq, - pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255, + sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x " + "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr, + __raw_readl(SC_LBFADDR), + __raw_readl(SC_LBFCODE) & 255, v3_readb(V3_LB_ISTAT)); printascii(buf); #endif diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index 2b086ab2668c..74c65ce221de 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c @@ -3,7 +3,7 @@ * * Board support code for the GLAN Tank. * - * Copyright (C) 2006 Martin Michlmayr <tbm@cyrius.com> + * Copyright (C) 2006, 2007 Martin Michlmayr <tbm@cyrius.com> * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> * * This program is free software; you can redistribute it and/or modify it @@ -21,6 +21,7 @@ #include <linux/serial_core.h> #include <linux/serial_8250.h> #include <linux/mtd/physmap.h> +#include <linux/i2c.h> #include <linux/platform_device.h> #include <asm/hardware.h> #include <asm/io.h> @@ -118,7 +119,7 @@ subsys_initcall(glantank_pci_init); * GLAN Tank machine initialization. */ static struct physmap_flash_data glantank_flash_data = { - .width = 1, + .width = 2, }; static struct resource glantank_flash_resource = { @@ -166,6 +167,13 @@ static struct platform_device glantank_serial_device = { .resource = &glantank_uart_resource, }; +static struct i2c_board_info __initdata glantank_i2c_devices[] = { + { + I2C_BOARD_INFO("rtc-rs5c372", 0x32), + .type = "rs5c372a", + }, +}; + static void glantank_power_off(void) { __raw_writeb(0x01, 0xfe8d0004); @@ -183,6 +191,9 @@ static void __init glantank_init_machine(void) platform_device_register(&iop3xx_dma_0_channel); platform_device_register(&iop3xx_dma_1_channel); + i2c_register_board_info(0, glantank_i2c_devices, + ARRAY_SIZE(glantank_i2c_devices)); + pm_power_off = glantank_power_off; } diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index cb6ad211887a..81cdc8267206 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -206,8 +206,6 @@ unsigned long ixp2000_gettimeoffset (void) static int ixp2000_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - /* clear timer 1 */ ixp2000_reg_wrb(IXP2000_T1_CLR, 1); @@ -217,8 +215,6 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id) next_jiffy_time -= ticks_per_jiffy; } - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 16356ffc86ae..5fea5a132939 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -22,7 +22,6 @@ #include <linux/serial.h> #include <linux/tty.h> #include <linux/bitops.h> -#include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/serial_core.h> #include <linux/device.h> diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index 7a85ced56718..d3a779a7a35f 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c @@ -19,7 +19,6 @@ #include <linux/tty.h> #include <linux/bitops.h> #include <linux/ioport.h> -#include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/serial_core.h> #include <linux/device.h> @@ -40,7 +39,6 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <asm/mach/arch.h> -#include <asm/mach/irq.h> #include <asm/mach/pci.h> static int __init espresso_pci_init(void) diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index c41a6b5a0acc..5c5d4d66dee8 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -24,7 +24,6 @@ #include <linux/tty.h> #include <linux/bitops.h> #include <linux/ioport.h> -#include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/serial_core.h> #include <linux/device.h> @@ -44,7 +43,6 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <asm/mach/arch.h> -#include <asm/mach/irq.h> #include <asm/mach/pci.h> /* diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index e35644961aa4..f0f70ba1e46d 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c @@ -23,7 +23,6 @@ #include <linux/tty.h> #include <linux/bitops.h> #include <linux/ioport.h> -#include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/serial_core.h> #include <linux/device.h> @@ -44,7 +43,6 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> #include <asm/mach/arch.h> -#include <asm/mach/irq.h> #include <asm/mach/pci.h> /* diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c index d59b8dc7dc7a..e38f45fa58ae 100644 --- a/arch/arm/mach-ixp4xx/avila-setup.c +++ b/arch/arm/mach-ixp4xx/avila-setup.c @@ -18,6 +18,7 @@ #include <linux/tty.h> #include <linux/serial_8250.h> #include <linux/slab.h> +#include <linux/i2c-gpio.h> #include <asm/types.h> #include <asm/setup.h> @@ -47,18 +48,17 @@ static struct platform_device avila_flash = { .resource = &avila_flash_resource, }; -static struct ixp4xx_i2c_pins avila_i2c_gpio_pins = { +static struct i2c_gpio_platform_data avila_i2c_gpio_data = { .sda_pin = AVILA_SDA_PIN, .scl_pin = AVILA_SCL_PIN, }; -static struct platform_device avila_i2c_controller = { - .name = "IXP4XX-I2C", +static struct platform_device avila_i2c_gpio = { + .name = "i2c-gpio", .id = 0, - .dev = { - .platform_data = &avila_i2c_gpio_pins, + .dev = { + .platform_data = &avila_i2c_gpio_data, }, - .num_resources = 0 }; static struct resource avila_uart_resources[] = { @@ -133,7 +133,7 @@ static struct platform_device avila_pata = { }; static struct platform_device *avila_devices[] __initdata = { - &avila_i2c_controller, + &avila_i2c_gpio, &avila_flash, &avila_uart }; diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index 1e75e105c4f7..c473d408aa7c 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c @@ -14,6 +14,7 @@ #include <linux/kernel.h> #include <linux/serial.h> #include <linux/serial_8250.h> +#include <linux/i2c-gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -37,15 +38,17 @@ static struct platform_device dsmg600_flash = { .resource = &dsmg600_flash_resource, }; -static struct ixp4xx_i2c_pins dsmg600_i2c_gpio_pins = { +static struct i2c_gpio_platform_data dsmg600_i2c_gpio_data = { .sda_pin = DSMG600_SDA_PIN, .scl_pin = DSMG600_SCL_PIN, }; -static struct platform_device dsmg600_i2c_controller = { - .name = "IXP4XX-I2C", +static struct platform_device dsmg600_i2c_gpio = { + .name = "i2c-gpio", .id = 0, - .dev.platform_data = &dsmg600_i2c_gpio_pins, + .dev = { + .platform_data = &dsmg600_i2c_gpio_data, + }, }; #ifdef CONFIG_LEDS_CLASS @@ -116,7 +119,7 @@ static struct platform_device dsmg600_uart = { }; static struct platform_device *dsmg600_devices[] __initdata = { - &dsmg600_i2c_controller, + &dsmg600_i2c_gpio, &dsmg600_flash, }; diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index d5008d8fc9a5..e89070da28bf 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -15,6 +15,7 @@ #include <linux/tty.h> #include <linux/serial_8250.h> #include <linux/slab.h> +#include <linux/i2c-gpio.h> #include <linux/io.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> @@ -120,18 +121,17 @@ static struct platform_device ixdp425_flash_nand = { }; #endif /* CONFIG_MTD_NAND_PLATFORM */ -static struct ixp4xx_i2c_pins ixdp425_i2c_gpio_pins = { +static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = { .sda_pin = IXDP425_SDA_PIN, .scl_pin = IXDP425_SCL_PIN, }; -static struct platform_device ixdp425_i2c_controller = { - .name = "IXP4XX-I2C", +static struct platform_device ixdp425_i2c_gpio = { + .name = "i2c-gpio", .id = 0, - .dev = { - .platform_data = &ixdp425_i2c_gpio_pins, + .dev = { + .platform_data = &ixdp425_i2c_gpio_data, }, - .num_resources = 0 }; static struct resource ixdp425_uart_resources[] = { @@ -178,7 +178,7 @@ static struct platform_device ixdp425_uart = { }; static struct platform_device *ixdp425_devices[] __initdata = { - &ixdp425_i2c_controller, + &ixdp425_i2c_gpio, &ixdp425_flash, #if defined(CONFIG_MTD_NAND_PLATFORM) || \ defined(CONFIG_MTD_NAND_PLATFORM_MODULE) diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index 78a17413ceca..54d884fb2517 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c @@ -16,6 +16,7 @@ #include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/leds.h> +#include <linux/i2c-gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -68,16 +69,17 @@ static struct platform_device nas100d_leds = { }; #endif -static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = { +static struct i2c_gpio_platform_data nas100d_i2c_gpio_data = { .sda_pin = NAS100D_SDA_PIN, .scl_pin = NAS100D_SCL_PIN, }; -static struct platform_device nas100d_i2c_controller = { - .name = "IXP4XX-I2C", +static struct platform_device nas100d_i2c_gpio = { + .name = "i2c-gpio", .id = 0, - .dev.platform_data = &nas100d_i2c_gpio_pins, - .num_resources = 0, + .dev = { + .platform_data = &nas100d_i2c_gpio_data, + }, }; static struct resource nas100d_uart_resources[] = { @@ -124,7 +126,7 @@ static struct platform_device nas100d_uart = { }; static struct platform_device *nas100d_devices[] __initdata = { - &nas100d_i2c_controller, + &nas100d_i2c_gpio, &nas100d_flash, #ifdef CONFIG_LEDS_IXP4XX &nas100d_leds, diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c index acd71e9c38a7..6f10dc208320 100644 --- a/arch/arm/mach-ixp4xx/nslu2-power.c +++ b/arch/arm/mach-ixp4xx/nslu2-power.c @@ -21,7 +21,6 @@ #include <linux/reboot.h> #include <linux/irq.h> #include <linux/interrupt.h> -#include <linux/reboot.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index 9bf8ccbcaccf..77277d27fcc5 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c @@ -18,6 +18,7 @@ #include <linux/serial.h> #include <linux/serial_8250.h> #include <linux/leds.h> +#include <linux/i2c-gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -41,7 +42,7 @@ static struct platform_device nslu2_flash = { .resource = &nslu2_flash_resource, }; -static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = { +static struct i2c_gpio_platform_data nslu2_i2c_gpio_data = { .sda_pin = NSLU2_SDA_PIN, .scl_pin = NSLU2_SCL_PIN, }; @@ -82,11 +83,12 @@ static struct platform_device nslu2_leds = { }; #endif -static struct platform_device nslu2_i2c_controller = { - .name = "IXP4XX-I2C", +static struct platform_device nslu2_i2c_gpio = { + .name = "i2c-gpio", .id = 0, - .dev.platform_data = &nslu2_i2c_gpio_pins, - .num_resources = 0, + .dev = { + .platform_data = &nslu2_i2c_gpio_data, + }, }; static struct platform_device nslu2_beeper = { @@ -139,7 +141,7 @@ static struct platform_device nslu2_uart = { }; static struct platform_device *nslu2_devices[] __initdata = { - &nslu2_i2c_controller, + &nslu2_i2c_gpio, &nslu2_flash, &nslu2_beeper, #ifdef CONFIG_LEDS_IXP4XX diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile index 2a07a281fa8a..730a3af12c98 100644 --- a/arch/arm/mach-ks8695/Makefile +++ b/arch/arm/mach-ks8695/Makefile @@ -9,7 +9,7 @@ obj-n := obj- := # PCI support is optional -#obj-$(CONFIG_PCI) += pci.o +obj-$(CONFIG_PCI) += pci.o # Board-specific support obj-$(CONFIG_MACH_KS8695) += board-micrel.o diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c index 2feeef81d843..05ac2bd04020 100644 --- a/arch/arm/mach-ks8695/board-micrel.c +++ b/arch/arm/mach-ks8695/board-micrel.c @@ -40,7 +40,7 @@ static void __init micrel_init(void) printk(KERN_INFO "Micrel KS8695 Development Board initializing\n"); #ifdef CONFIG_PCI -// ks8695_init_pci(&micrel_pci); + ks8695_init_pci(&micrel_pci); #endif /* Add devices */ diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c index b1aa3cb3d4a3..5e46191c0af9 100644 --- a/arch/arm/mach-ks8695/gpio.c +++ b/arch/arm/mach-ks8695/gpio.c @@ -20,6 +20,8 @@ #include <linux/kernel.h> #include <linux/mm.h> #include <linux/init.h> +#include <linux/debugfs.h> +#include <linux/seq_file.h> #include <linux/module.h> #include <asm/io.h> @@ -216,3 +218,84 @@ int irq_to_gpio(unsigned int irq) return (irq - KS8695_IRQ_EXTERN0); } EXPORT_SYMBOL(irq_to_gpio); + + +/* .... Debug interface ..................................................... */ + +#ifdef CONFIG_DEBUG_FS + +static int ks8695_gpio_show(struct seq_file *s, void *unused) +{ + unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN }; + unsigned int intmask[] = { IOPC_IOEINT0TM, IOPC_IOEINT1TM, IOPC_IOEINT2TM, IOPC_IOEINT3TM }; + unsigned long mode, ctrl, data; + int i; + + mode = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); + ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC); + data = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); + + seq_printf(s, "Pin\tI/O\tFunction\tState\n\n"); + + for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) { + seq_printf(s, "%i:\t", i); + + seq_printf(s, "%s\t", (mode & IOPM_(i)) ? "Output" : "Input"); + + if (i <= KS8695_GPIO_3) { + if (ctrl & enable[i]) { + seq_printf(s, "EXT%i ", i); + + switch ((ctrl & intmask[i]) >> (4 * i)) { + case IOPC_TM_LOW: + seq_printf(s, "(Low)"); break; + case IOPC_TM_HIGH: + seq_printf(s, "(High)"); break; + case IOPC_TM_RISING: + seq_printf(s, "(Rising)"); break; + case IOPC_TM_FALLING: + seq_printf(s, "(Falling)"); break; + case IOPC_TM_EDGE: + seq_printf(s, "(Edges)"); break; + } + } + else + seq_printf(s, "GPIO\t"); + } + else if (i <= KS8695_GPIO_5) { + if (ctrl & enable[i]) + seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4); + else + seq_printf(s, "GPIO\t"); + } + else + seq_printf(s, "GPIO\t"); + + seq_printf(s, "\t"); + + seq_printf(s, "%i\n", (data & IOPD_(i)) ? 1 : 0); + } + return 0; +} + +static int ks8695_gpio_open(struct inode *inode, struct file *file) +{ + return single_open(file, ks8695_gpio_show, NULL); +} + +static const struct file_operations ks8695_gpio_operations = { + .open = ks8695_gpio_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __init ks8695_gpio_debugfs_init(void) +{ + /* /sys/kernel/debug/ks8695_gpio */ + (void) debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL, &ks8695_gpio_operations); + return 0; +} +postcore_initcall(ks8695_gpio_debugfs_init); + +#endif diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c new file mode 100644 index 000000000000..3f4e0330cb1a --- /dev/null +++ b/arch/arm/mach-ks8695/pci.c @@ -0,0 +1,326 @@ +/* + * arch/arm/mach-ks8695/pci.c + * + * Copyright (C) 2003, Micrel Semiconductors + * Copyright (C) 2006, Greg Ungerer <gerg@snapgear.com> + * Copyright (C) 2006, Ben Dooks + * Copyright (C) 2007, Andrew Victor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/kernel.h> +#include <linux/pci.h> +#include <linux/mm.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/delay.h> + +#include <asm/io.h> +#include <asm/signal.h> +#include <asm/mach/pci.h> +#include <asm/hardware.h> + +#include <asm/arch/devices.h> +#include <asm/arch/regs-pci.h> + + +static int pci_dbg; +static int pci_cfg_dbg; + + +static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where) +{ + unsigned long pbca; + + pbca = PBCA_ENABLE | (where & ~3); + pbca |= PCI_SLOT(devfn) << 11 ; + pbca |= PCI_FUNC(devfn) << 8; + pbca |= bus_nr << 16; + + if (bus_nr == 0) { + /* use Type-0 transaction */ + __raw_writel(pbca, KS8695_PCI_VA + KS8695_PBCA); + } else { + /* use Type-1 transaction */ + __raw_writel(pbca | PBCA_TYPE1, KS8695_PCI_VA + KS8695_PBCA); + } +} + + +/* + * The KS8695 datasheet prohibits anything other than 32bit accesses + * to the IO registers, so all our configuration must be done with + * 32bit operations, and the correct bit masking and shifting. + */ + +static int ks8695_pci_readconfig(struct pci_bus *bus, + unsigned int devfn, int where, int size, u32 *value) +{ + ks8695_pci_setupconfig(bus->number, devfn, where); + + *value = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); + + switch (size) { + case 4: + break; + case 2: + *value = *value >> ((where & 2) * 8); + *value &= 0xffff; + break; + case 1: + *value = *value >> ((where & 3) * 8); + *value &= 0xff; + break; + } + + if (pci_cfg_dbg) { + printk("read: %d,%08x,%02x,%d: %08x (%08x)\n", + bus->number, devfn, where, size, *value, + __raw_readl(KS8695_PCI_VA + KS8695_PBCD)); + } + + return PCIBIOS_SUCCESSFUL; +} + +static int ks8695_pci_writeconfig(struct pci_bus *bus, + unsigned int devfn, int where, int size, u32 value) +{ + unsigned long tmp; + + if (pci_cfg_dbg) { + printk("write: %d,%08x,%02x,%d: %08x\n", + bus->number, devfn, where, size, value); + } + + ks8695_pci_setupconfig(bus->number, devfn, where); + + switch (size) { + case 4: + __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD); + break; + case 2: + tmp = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); + tmp &= ~(0xffff << ((where & 2) * 8)); + tmp |= value << ((where & 2) * 8); + + __raw_writel(tmp, KS8695_PCI_VA + KS8695_PBCD); + break; + case 1: + tmp = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); + tmp &= ~(0xff << ((where & 3) * 8)); + tmp |= value << ((where & 3) * 8); + + __raw_writel(tmp, KS8695_PCI_VA + KS8695_PBCD); + break; + } + + return PCIBIOS_SUCCESSFUL; +} + +static void ks8695_local_writeconfig(int where, u32 value) +{ + ks8695_pci_setupconfig(0, 0, where); + __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD); +} + +static struct pci_ops ks8695_pci_ops = { + .read = ks8695_pci_readconfig, + .write = ks8695_pci_writeconfig, +}; + +static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) +{ + return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys); +} + +static struct resource pci_mem = { + .name = "PCI Memory space", + .start = KS8695_PCIMEM_PA, + .end = KS8695_PCIMEM_PA + (KS8695_PCIMEM_SIZE - 1), + .flags = IORESOURCE_MEM, +}; + +static struct resource pci_io = { + .name = "PCI IO space", + .start = KS8695_PCIIO_PA, + .end = KS8695_PCIIO_PA + (KS8695_PCIIO_SIZE - 1), + .flags = IORESOURCE_IO, +}; + +static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys) +{ + if (nr > 0) + return 0; + + request_resource(&iomem_resource, &pci_mem); + request_resource(&ioport_resource, &pci_io); + + sys->resource[0] = &pci_io; + sys->resource[1] = &pci_mem; + sys->resource[2] = NULL; + + /* Assign and enable processor bridge */ + ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); + + /* Enable bus-master & Memory Space access */ + ks8695_local_writeconfig(PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); + + /* Set cache-line size & latency. */ + ks8695_local_writeconfig(PCI_CACHE_LINE_SIZE, (32 << 8) | (L1_CACHE_BYTES / sizeof(u32))); + + /* Reserve PCI memory space for PCI-AHB resources */ + if (!request_mem_region(KS8695_PCIMEM_PA, SZ_64M, "PCI-AHB Bridge")) { + printk(KERN_ERR "Cannot allocate PCI-AHB Bridge memory.\n"); + return -EBUSY; + } + + return 1; +} + +static inline unsigned int size_mask(unsigned long size) +{ + return (~size) + 1; +} + +static int ks8695_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) +{ + unsigned long pc = instruction_pointer(regs); + unsigned long instr = *(unsigned long *)pc; + unsigned long cmdstat; + + cmdstat = __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS); + + printk(KERN_ERR "PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx [%s%s%s%s%s]\n", + addr, fsr, regs->ARM_pc, regs->ARM_lr, + cmdstat & (PCI_STATUS_SIG_TARGET_ABORT << 16) ? "GenTarget" : " ", + cmdstat & (PCI_STATUS_REC_TARGET_ABORT << 16) ? "RecvTarget" : " ", + cmdstat & (PCI_STATUS_REC_MASTER_ABORT << 16) ? "MasterAbort" : " ", + cmdstat & (PCI_STATUS_SIG_SYSTEM_ERROR << 16) ? "SysError" : " ", + cmdstat & (PCI_STATUS_DETECTED_PARITY << 16) ? "Parity" : " " + ); + + __raw_writel(cmdstat, KS8695_PCI_VA + KS8695_CRCFCS); + + /* + * If the instruction being executed was a read, + * make it look like it read all-ones. + */ + if ((instr & 0x0c100000) == 0x04100000) { + int reg = (instr >> 12) & 15; + unsigned long val; + + if (instr & 0x00400000) + val = 255; + else + val = -1; + + regs->uregs[reg] = val; + regs->ARM_pc += 4; + return 0; + } + + if ((instr & 0x0e100090) == 0x00100090) { + int reg = (instr >> 12) & 15; + + regs->uregs[reg] = -1; + regs->ARM_pc += 4; + return 0; + } + + return 1; +} + +static void __init ks8695_pci_preinit(void) +{ + /* stage 1 initialization, subid, subdevice = 0x0001 */ + __raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID); + + /* stage 2 initialization */ + /* prefetch limits with 16 words, retry enable */ + __raw_writel(0x40000000, KS8695_PCI_VA + KS8695_PBCS); + + /* configure memory mapping */ + __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBA); + __raw_writel(size_mask(KS8695_PCIMEM_SIZE), KS8695_PCI_VA + KS8695_PMBAM); + __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBAT); + __raw_writel(0, KS8695_PCI_VA + KS8695_PMBAC); + + /* configure IO mapping */ + __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBA); + __raw_writel(size_mask(KS8695_PCIIO_SIZE), KS8695_PCI_VA + KS8695_PIOBAM); + __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBAT); + __raw_writel(0, KS8695_PCI_VA + KS8695_PIOBAC); + + /* hook in fault handlers */ + hook_fault_code(8, ks8695_pci_fault, SIGBUS, "external abort on non-linefetch"); + hook_fault_code(10, ks8695_pci_fault, SIGBUS, "external abort on non-linefetch"); +} + +static void ks8695_show_pciregs(void) +{ + if (!pci_dbg) + return; + + printk(KERN_INFO "PCI: CRCFID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFID)); + printk(KERN_INFO "PCI: CRCFCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS)); + printk(KERN_INFO "PCI: CRCFRV = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFRV)); + printk(KERN_INFO "PCI: CRCFLT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFLT)); + printk(KERN_INFO "PCI: CRCBMA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCBMA)); + printk(KERN_INFO "PCI: CRCSID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCSID)); + printk(KERN_INFO "PCI: CRCFIT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFIT)); + + printk(KERN_INFO "PCI: PBM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBM)); + printk(KERN_INFO "PCI: PBCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBCS)); + + printk(KERN_INFO "PCI: PMBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBA)); + printk(KERN_INFO "PCI: PMBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAC)); + printk(KERN_INFO "PCI: PMBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAM)); + printk(KERN_INFO "PCI: PMBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAT)); + + printk(KERN_INFO "PCI: PIOBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBA)); + printk(KERN_INFO "PCI: PIOBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAC)); + printk(KERN_INFO "PCI: PIOBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAM)); + printk(KERN_INFO "PCI: PIOBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAT)); +} + + +static struct hw_pci ks8695_pci __initdata = { + .nr_controllers = 1, + .preinit = ks8695_pci_preinit, + .setup = ks8695_pci_setup, + .scan = ks8695_pci_scan_bus, + .postinit = NULL, + .swizzle = pci_std_swizzle, + .map_irq = NULL, +}; + +void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg) +{ + if (__raw_readl(KS8695_PCI_VA + KS8695_CRCFRV) & CFRV_GUEST) { + printk("PCI: KS8695 in guest mode, not initialising\n"); + return; + } + + printk(KERN_INFO "PCI: Initialising\n"); + ks8695_show_pciregs(); + + /* set Mode */ + __raw_writel(cfg->mode << 29, KS8695_PCI_VA + KS8695_PBM); + + ks8695_pci.map_irq = cfg->map_irq; /* board-specific map_irq method */ + + pci_common_init(&ks8695_pci); +} diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index d2c86e4a72eb..02f766b3121d 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c @@ -70,10 +70,7 @@ static unsigned long ks8695_gettimeoffset (void) */ static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); timer_tick(); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c index c25316d02537..e50e60b33851 100644 --- a/arch/arm/mach-lh7a40x/time.c +++ b/arch/arm/mach-lh7a40x/time.c @@ -41,13 +41,9 @@ static irqreturn_t lh7a40x_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - TIMER_EOI = 0; timer_tick(); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig new file mode 100644 index 000000000000..3553babbbf05 --- /dev/null +++ b/arch/arm/mach-msm/Kconfig @@ -0,0 +1,18 @@ +if ARCH_MSM7X00A + +comment "MSM7X00A Board Type" + depends on ARCH_MSM7X00A + +config MACH_HALIBUT + depends on ARCH_MSM7X00A + default y + bool "Halibut Board (QCT SURF7200A)" + help + Support for the Qualcomm SURF7200A eval board. + +config MSM7X00A_IDLE + depends on ARCH_MSM7X00A + default y + bool "Idle Support for MSM7X00A" + +endif diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile new file mode 100644 index 000000000000..d12f23655850 --- /dev/null +++ b/arch/arm/mach-msm/Makefile @@ -0,0 +1,7 @@ +obj-y += io.o idle.o irq.o timer.o dma.o + +# Common code for board init +obj-y += common.o + +obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o + diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot new file mode 100644 index 000000000000..24dfbf8c07c4 --- /dev/null +++ b/arch/arm/mach-msm/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y := 0x10008000 +params_phys-y := 0x10000100 +initrd_phys-y := 0x10800000 diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c new file mode 100644 index 000000000000..86dfb2b5261c --- /dev/null +++ b/arch/arm/mach-msm/board-halibut.c @@ -0,0 +1,114 @@ +/* linux/arch/arm/mach-msm/board-halibut.c + * + * Copyright (C) 2007 Google, Inc. + * Author: Brian Swetland <swetland@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/input.h> + +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/flash.h> + +#include <asm/arch/board.h> +#include <asm/arch/msm_iomap.h> + +#include <asm/io.h> +#include <asm/delay.h> + +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> + +static struct resource smc91x_resources[] = { + [0] = { + .start = 0x9C004300, + .end = 0x9C004400, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSM_GPIO_TO_INT(49), + .end = MSM_GPIO_TO_INT(49), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +static void mddi0_panel_power(int on) +{ +} + +static struct msm_mddi_platform_data msm_mddi0_pdata = { + .panel_power = mddi0_panel_power, + .has_vsync_irq = 0, +}; + +static struct platform_device msm_mddi0_device = { + .name = "msm_mddi", + .id = 0, + .dev = { + .platform_data = &msm_mddi0_pdata + }, +}; + +static struct platform_device msm_serial0_device = { + .name = "msm_serial", + .id = 0, +}; + +static struct platform_device *devices[] __initdata = { + &msm_serial0_device, + &msm_mddi0_device, + &smc91x_device, +}; + +extern struct sys_timer msm_timer; + +static void __init halibut_init_irq(void) +{ + msm_init_irq(); +} + +static void __init halibut_init(void) +{ + platform_add_devices(devices, ARRAY_SIZE(devices)); + msm_add_devices(); +} + +static void __init halibut_map_io(void) +{ + msm_map_common_io(); +} + +MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") + +/* UART for LL DEBUG */ + .phys_io = MSM_UART1_PHYS, + .io_pg_offst = ((MSM_UART1_BASE) >> 18) & 0xfffc, + + .boot_params = 0x10000100, + .map_io = halibut_map_io, + .init_irq = halibut_init_irq, + .init_machine = halibut_init, + .timer = &msm_timer, +MACHINE_END diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c new file mode 100644 index 000000000000..3f5d3362f887 --- /dev/null +++ b/arch/arm/mach-msm/common.c @@ -0,0 +1,116 @@ +/* linux/arch/arm/mach-msm/common.c + * + * Common setup code for MSM7K Boards + * + * Copyright (C) 2007 Google, Inc. + * Author: Brian Swetland <swetland@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> + +#include <asm/mach/flash.h> +#include <asm/io.h> + +#include <asm/setup.h> + +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> + +#include <asm/arch/msm_iomap.h> + +#include <asm/arch/board.h> + +struct flash_platform_data msm_nand_data = { + .parts = 0, + .nr_parts = 0, +}; + +static struct resource msm_nand_resources[] = { + [0] = { + .start = 7, + .end = 7, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device msm_nand_device = { + .name = "msm_nand", + .id = -1, + .num_resources = ARRAY_SIZE(msm_nand_resources), + .resource = msm_nand_resources, + .dev = { + .platform_data = &msm_nand_data, + }, +}; + +static struct platform_device msm_smd_device = { + .name = "msm_smd", + .id = -1, +}; + +static struct resource msm_i2c_resources[] = { + { + .start = MSM_I2C_BASE, + .end = MSM_I2C_BASE + MSM_I2C_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_PWB_I2C, + .end = INT_PWB_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device msm_i2c_device = { + .name = "msm_i2c", + .id = 0, + .num_resources = ARRAY_SIZE(msm_i2c_resources), + .resource = msm_i2c_resources, +}; + +static struct resource usb_resources[] = { + { + .start = MSM_HSUSB_PHYS, + .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_USB_HS, + .end = INT_USB_HS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device msm_hsusb_device = { + .name = "msm_hsusb", + .id = -1, + .num_resources = ARRAY_SIZE(usb_resources), + .resource = usb_resources, + .dev = { + .coherent_dma_mask = 0xffffffff, + }, +}; + +static struct platform_device *devices[] __initdata = { + &msm_nand_device, + &msm_smd_device, + &msm_i2c_device, + &msm_hsusb_device, +}; + +void __init msm_add_devices(void) +{ + platform_add_devices(devices, ARRAY_SIZE(devices)); +} diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c new file mode 100644 index 000000000000..8b0f339b3274 --- /dev/null +++ b/arch/arm/mach-msm/dma.c @@ -0,0 +1,214 @@ +/* linux/arch/arm/mach-msm/dma.c + * + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <asm/io.h> +#include <linux/interrupt.h> +#include <asm/arch/dma.h> + +#define MSM_DMOV_CHANNEL_COUNT 16 + +enum { + MSM_DMOV_PRINT_ERRORS = 1, + MSM_DMOV_PRINT_IO = 2, + MSM_DMOV_PRINT_FLOW = 4 +}; + +static DEFINE_SPINLOCK(msm_dmov_lock); +static struct msm_dmov_cmd active_command; +static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; +static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; +unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; + +#define MSM_DMOV_DPRINTF(mask, format, args...) \ + do { \ + if ((mask) & msm_dmov_print_mask) \ + printk(KERN_ERR format, args); \ + } while (0) +#define PRINT_ERROR(format, args...) \ + MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_ERRORS, format, args); +#define PRINT_IO(format, args...) \ + MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_IO, format, args); +#define PRINT_FLOW(format, args...) \ + MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args); + +void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) +{ + unsigned long irq_flags; + unsigned int status; + + spin_lock_irqsave(&msm_dmov_lock, irq_flags); + status = readl(DMOV_STATUS(id)); + if (list_empty(&ready_commands[id]) && + (status & DMOV_STATUS_CMD_PTR_RDY)) { +#if 0 + if (list_empty(&active_commands[id])) { + PRINT_FLOW("msm_dmov_enqueue_cmd(%d), enable interrupt\n", id); + writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id)); + } +#endif + PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); + list_add_tail(&cmd->list, &active_commands[id]); + writel(cmd->cmdptr, DMOV_CMD_PTR(id)); + } else { + if (list_empty(&active_commands[id])) + PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status); + + PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status %x\n", id, status); + list_add_tail(&cmd->list, &ready_commands[id]); + } + spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); +} + +struct msm_dmov_exec_cmdptr_cmd { + struct msm_dmov_cmd dmov_cmd; + struct completion complete; + unsigned id; + unsigned int result; + unsigned int flush[6]; +}; + +static void dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, unsigned int result) +{ + struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd); + cmd->result = result; + if (result != 0x80000002) { + cmd->flush[0] = readl(DMOV_FLUSH0(cmd->id)); + cmd->flush[1] = readl(DMOV_FLUSH1(cmd->id)); + cmd->flush[2] = readl(DMOV_FLUSH2(cmd->id)); + cmd->flush[3] = readl(DMOV_FLUSH3(cmd->id)); + cmd->flush[4] = readl(DMOV_FLUSH4(cmd->id)); + cmd->flush[5] = readl(DMOV_FLUSH5(cmd->id)); + } + complete(&cmd->complete); +} + +int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) +{ + struct msm_dmov_exec_cmdptr_cmd cmd; + + PRINT_FLOW("dmov_exec_cmdptr(%d, %x)\n", id, cmdptr); + + cmd.dmov_cmd.cmdptr = cmdptr; + cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func; + cmd.id = id; + init_completion(&cmd.complete); + + msm_dmov_enqueue_cmd(id, &cmd.dmov_cmd); + wait_for_completion(&cmd.complete); + + if (cmd.result != 0x80000002) { + PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result); + PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n", + id, cmd.flush[0], cmd.flush[1], cmd.flush[2], cmd.flush[3]); + return -EIO; + } + PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr); + return 0; +} + + +static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) +{ + unsigned int int_status, mask, id; + unsigned long irq_flags; + unsigned int ch_status; + unsigned int ch_result; + struct msm_dmov_cmd *cmd; + + spin_lock_irqsave(&msm_dmov_lock, irq_flags); + + int_status = readl(DMOV_ISR); /* read and clear interrupt */ + PRINT_FLOW("msm_datamover_irq_handler: DMOV_ISR %x\n", int_status); + + while (int_status) { + mask = int_status & -int_status; + id = fls(mask) - 1; + PRINT_FLOW("msm_datamover_irq_handler %08x %08x id %d\n", int_status, mask, id); + int_status &= ~mask; + ch_status = readl(DMOV_STATUS(id)); + if (!(ch_status & DMOV_STATUS_RSLT_VALID)) { + PRINT_FLOW("msm_datamover_irq_handler id %d, result not valid %x\n", id, ch_status); + continue; + } + do { + ch_result = readl(DMOV_RSLT(id)); + if (list_empty(&active_commands[id])) { + PRINT_ERROR("msm_datamover_irq_handler id %d, got result " + "with no active command, status %x, result %x\n", + id, ch_status, ch_result); + cmd = NULL; + } else + cmd = list_entry(active_commands[id].next, typeof(*cmd), list); + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x, result %x\n", id, ch_status, ch_result); + if (ch_result & DMOV_RSLT_DONE) { + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", + id, ch_status); + PRINT_IO("msm_datamover_irq_handler id %d, got result " + "for %p, result %x\n", id, cmd, ch_result); + if (cmd) { + list_del(&cmd->list); + cmd->complete_func(cmd, ch_result); + } + } + if (ch_result & DMOV_RSLT_FLUSH) { + unsigned int flush0 = readl(DMOV_FLUSH0(id)); + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); + PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, flush0); + if (cmd) { + list_del(&cmd->list); + cmd->complete_func(cmd, ch_result); + } + } + if (ch_result & DMOV_RSLT_ERROR) { + unsigned int flush0 = readl(DMOV_FLUSH0(id)); + PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); + PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, flush0); + if (cmd) { + list_del(&cmd->list); + cmd->complete_func(cmd, ch_result); + } + /* this does not seem to work, once we get an error */ + /* the datamover will no longer accept commands */ + writel(0, DMOV_FLUSH0(id)); + } + ch_status = readl(DMOV_STATUS(id)); + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); + if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) && !list_empty(&ready_commands[id])) { + cmd = list_entry(ready_commands[id].next, typeof(*cmd), list); + list_del(&cmd->list); + list_add_tail(&cmd->list, &active_commands[id]); + PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id); + writel(cmd->cmdptr, DMOV_CMD_PTR(id)); + } + } while (ch_status & DMOV_STATUS_RSLT_VALID); + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); + } + spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); + return IRQ_HANDLED; +} + +static int __init msm_init_datamover(void) +{ + int i; + for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { + INIT_LIST_HEAD(&ready_commands[i]); + INIT_LIST_HEAD(&active_commands[i]); + writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); + } + return request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); +} + +arch_initcall(msm_init_datamover); + diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S new file mode 100644 index 000000000000..2b1cb7f16943 --- /dev/null +++ b/arch/arm/mach-msm/idle.S @@ -0,0 +1,36 @@ +/* linux/include/asm-arm/arch-msm/idle.S + * + * Idle processing for MSM7K - work around bugs with SWFI. + * + * Copyright (c) 2007 QUALCOMM Incorporated. + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/linkage.h> +#include <asm/assembler.h> + +ENTRY(arch_idle) +#ifdef CONFIG_MSM7X00A_IDLE + mrc p15, 0, r1, c1, c0, 0 /* read current CR */ + bic r0, r1, #(1 << 2) /* clear dcache bit */ + bic r0, r0, #(1 << 12) /* clear icache bit */ + mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ + + mov r0, #0 /* prepare wfi value */ + mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ + mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ + mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ + + mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ +#endif + mov pc, lr diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c new file mode 100644 index 000000000000..c39edb994a88 --- /dev/null +++ b/arch/arm/mach-msm/io.c @@ -0,0 +1,85 @@ +/* arch/arm/mach-msm/io.c + * + * MSM7K io support + * + * Copyright (C) 2007 Google, Inc. + * Author: Brian Swetland <swetland@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> + +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/page.h> +#include <asm/arch/msm_iomap.h> +#include <asm/mach/map.h> + +#include <asm/arch/board.h> + +#define MSM_DEVICE(name) { \ + .virtual = MSM_##name##_BASE, \ + .pfn = __phys_to_pfn(MSM_##name##_PHYS), \ + .length = MSM_##name##_SIZE, \ + .type = MT_DEVICE_NONSHARED, \ + } + +static struct map_desc msm_io_desc[] __initdata = { + MSM_DEVICE(VIC), + MSM_DEVICE(CSR), + MSM_DEVICE(GPT), + MSM_DEVICE(DMOV), + MSM_DEVICE(UART1), + MSM_DEVICE(UART2), + MSM_DEVICE(UART3), + MSM_DEVICE(I2C), + MSM_DEVICE(GPIO1), + MSM_DEVICE(GPIO2), + MSM_DEVICE(HSUSB), + MSM_DEVICE(CLK_CTL), + MSM_DEVICE(PMDH), + MSM_DEVICE(EMDH), + MSM_DEVICE(MDP), + { + .virtual = MSM_SHARED_RAM_BASE, + .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), + .length = MSM_SHARED_RAM_SIZE, + .type = MT_DEVICE, + }, +}; + +void __init msm_map_common_io(void) +{ + /* Make sure the peripheral register window is closed, since + * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which + * pages are peripheral interface or not. + */ + asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); + + iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc)); +} + +void __iomem * +__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) +{ + if (mtype == MT_DEVICE) { + /* The peripherals in the 88000000 - D0000000 range + * are only accessable by type MT_DEVICE_NONSHARED. + * Adjust mtype as necessary to make this "just work." + */ + if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) + mtype = MT_DEVICE_NONSHARED; + } + + return __arm_ioremap(phys_addr, size, mtype); +} diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c new file mode 100644 index 000000000000..24158040b789 --- /dev/null +++ b/arch/arm/mach-msm/irq.c @@ -0,0 +1,154 @@ +/* linux/arch/arm/mach-msm/irq.c + * + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/sched.h> +#include <linux/interrupt.h> +#include <linux/ptrace.h> +#include <linux/timer.h> + +#include <linux/irq.h> +#include <asm/hardware.h> + +#include <asm/io.h> + +#include <asm/arch/msm_iomap.h> + +#define VIC_REG(off) (MSM_VIC_BASE + (off)) + +#define VIC_INT_SELECT0 VIC_REG(0x0000) /* 1: FIQ, 0: IRQ */ +#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */ +#define VIC_INT_EN0 VIC_REG(0x0010) +#define VIC_INT_EN1 VIC_REG(0x0014) +#define VIC_INT_ENCLEAR0 VIC_REG(0x0020) +#define VIC_INT_ENCLEAR1 VIC_REG(0x0024) +#define VIC_INT_ENSET0 VIC_REG(0x0030) +#define VIC_INT_ENSET1 VIC_REG(0x0034) +#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */ +#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */ +#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */ +#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */ +#define VIC_NO_PEND_VAL VIC_REG(0x0060) +#define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */ +#define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */ +#define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */ +#define VIC_IRQ_STATUS0 VIC_REG(0x0080) +#define VIC_IRQ_STATUS1 VIC_REG(0x0084) +#define VIC_FIQ_STATUS0 VIC_REG(0x0090) +#define VIC_FIQ_STATUS1 VIC_REG(0x0094) +#define VIC_RAW_STATUS0 VIC_REG(0x00A0) +#define VIC_RAW_STATUS1 VIC_REG(0x00A4) +#define VIC_INT_CLEAR0 VIC_REG(0x00B0) +#define VIC_INT_CLEAR1 VIC_REG(0x00B4) +#define VIC_SOFTINT0 VIC_REG(0x00C0) +#define VIC_SOFTINT1 VIC_REG(0x00C4) +#define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */ +#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */ +#define VIC_IRQ_VEC_WR VIC_REG(0x00D8) +#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E0) +#define VIC_IRQ_IN_STACK VIC_REG(0x00E4) +#define VIC_TEST_BUS_SEL VIC_REG(0x00E8) + +#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4)) +#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4)) + +static void msm_irq_ack(unsigned int irq) +{ + unsigned reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); + irq = 1 << (irq & 31); + writel(irq, reg); +} + +static void msm_irq_mask(unsigned int irq) +{ + unsigned reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); + writel(1 << (irq & 31), reg); +} + +static void msm_irq_unmask(unsigned int irq) +{ + unsigned reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); + writel(1 << (irq & 31), reg); +} + +static int msm_irq_set_wake(unsigned int irq, unsigned int on) +{ + return -EINVAL; +} + +static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) +{ + unsigned treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); + unsigned preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); + int b = 1 << (irq & 31); + + if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) + writel(readl(preg) | b, preg); + if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) + writel(readl(preg) & (~b), preg); + + if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { + writel(readl(treg) | b, treg); + set_irq_handler(irq, handle_edge_irq); + } + if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { + writel(readl(treg) & (~b), treg); + set_irq_handler(irq, handle_level_irq); + } + return 0; +} + +static struct irq_chip msm_irq_chip = { + .name = "msm", + .ack = msm_irq_ack, + .mask = msm_irq_mask, + .unmask = msm_irq_unmask, + .set_wake = msm_irq_set_wake, + .set_type = msm_irq_set_type, +}; + +void __init msm_init_irq(void) +{ + unsigned n; + + /* select level interrupts */ + writel(0, VIC_INT_TYPE0); + writel(0, VIC_INT_TYPE1); + + /* select highlevel interrupts */ + writel(0, VIC_INT_POLARITY0); + writel(0, VIC_INT_POLARITY1); + + /* select IRQ for all INTs */ + writel(0, VIC_INT_SELECT0); + writel(0, VIC_INT_SELECT1); + + /* disable all INTs */ + writel(0, VIC_INT_EN0); + writel(0, VIC_INT_EN1); + + /* don't use 1136 vic */ + writel(0, VIC_CONFIG); + + /* enable interrupt controller */ + writel(1, VIC_INT_MASTEREN); + + for (n = 0; n < NR_MSM_IRQS; n++) { + set_irq_chip(n, &msm_irq_chip); + set_irq_handler(n, handle_level_irq); + set_irq_flags(n, IRQF_VALID); + } +} diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c new file mode 100644 index 000000000000..bd4732d1ab3e --- /dev/null +++ b/arch/arm/mach-msm/timer.c @@ -0,0 +1,205 @@ +/* linux/arch/arm/mach-msm/timer.c + * + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/init.h> +#include <linux/time.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/clk.h> +#include <linux/clockchips.h> +#include <linux/delay.h> + +#include <asm/mach/time.h> +#include <asm/arch/msm_iomap.h> + +#include <asm/io.h> + +#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10) +#define MSM_DGT_SHIFT (5) + +#define TIMER_MATCH_VAL 0x0000 +#define TIMER_COUNT_VAL 0x0004 +#define TIMER_ENABLE 0x0008 +#define TIMER_ENABLE_CLR_ON_MATCH_EN 2 +#define TIMER_ENABLE_EN 1 +#define TIMER_CLEAR 0x000C + +#define CSR_PROTECTION 0x0020 +#define CSR_PROTECTION_EN 1 + +#define GPT_HZ 32768 +#define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */ + +struct msm_clock { + struct clock_event_device clockevent; + struct clocksource clocksource; + struct irqaction irq; + uint32_t regbase; + uint32_t freq; + uint32_t shift; +}; + +static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = dev_id; + evt->event_handler(evt); + return IRQ_HANDLED; +} + +static cycle_t msm_gpt_read(void) +{ + return readl(MSM_GPT_BASE + TIMER_COUNT_VAL); +} + +static cycle_t msm_dgt_read(void) +{ + return readl(MSM_DGT_BASE + TIMER_COUNT_VAL) >> MSM_DGT_SHIFT; +} + +static int msm_timer_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent); + uint32_t now = readl(clock->regbase + TIMER_COUNT_VAL); + uint32_t alarm = now + (cycles << clock->shift); + int late; + + writel(alarm, clock->regbase + TIMER_MATCH_VAL); + now = readl(clock->regbase + TIMER_COUNT_VAL); + late = now - alarm; + if (late >= (-2 << clock->shift) && late < DGT_HZ*5) { + printk(KERN_NOTICE "msm_timer_set_next_event(%lu) clock %s, " + "alarm already expired, now %x, alarm %x, late %d\n", + cycles, clock->clockevent.name, now, alarm, late); + return -ETIME; + } + return 0; +} + +static void msm_timer_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent); + switch (mode) { + case CLOCK_EVT_MODE_RESUME: + case CLOCK_EVT_MODE_PERIODIC: + break; + case CLOCK_EVT_MODE_ONESHOT: + writel(TIMER_ENABLE_EN, clock->regbase + TIMER_ENABLE); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + writel(0, clock->regbase + TIMER_ENABLE); + break; + } +} + +static struct msm_clock msm_clocks[] = { + { + .clockevent = { + .name = "gp_timer", + .features = CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, + .rating = 200, + .set_next_event = msm_timer_set_next_event, + .set_mode = msm_timer_set_mode, + }, + .clocksource = { + .name = "gp_timer", + .rating = 200, + .read = msm_gpt_read, + .mask = CLOCKSOURCE_MASK(32), + .shift = 24, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, + }, + .irq = { + .name = "gp_timer", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, + .handler = msm_timer_interrupt, + .dev_id = &msm_clocks[0].clockevent, + .irq = INT_GP_TIMER_EXP + }, + .regbase = MSM_GPT_BASE, + .freq = GPT_HZ + }, + { + .clockevent = { + .name = "dg_timer", + .features = CLOCK_EVT_FEAT_ONESHOT, + .shift = 32 + MSM_DGT_SHIFT, + .rating = 300, + .set_next_event = msm_timer_set_next_event, + .set_mode = msm_timer_set_mode, + }, + .clocksource = { + .name = "dg_timer", + .rating = 300, + .read = msm_dgt_read, + .mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)), + .shift = 24 - MSM_DGT_SHIFT, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, + }, + .irq = { + .name = "dg_timer", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, + .handler = msm_timer_interrupt, + .dev_id = &msm_clocks[1].clockevent, + .irq = INT_DEBUG_TIMER_EXP + }, + .regbase = MSM_DGT_BASE, + .freq = DGT_HZ >> MSM_DGT_SHIFT, + .shift = MSM_DGT_SHIFT + } +}; + +static void __init msm_timer_init(void) +{ + int i; + int res; + + for (i = 0; i < ARRAY_SIZE(msm_clocks); i++) { + struct msm_clock *clock = &msm_clocks[i]; + struct clock_event_device *ce = &clock->clockevent; + struct clocksource *cs = &clock->clocksource; + writel(0, clock->regbase + TIMER_ENABLE); + writel(0, clock->regbase + TIMER_CLEAR); + writel(~0, clock->regbase + TIMER_MATCH_VAL); + + ce->mult = div_sc(clock->freq, NSEC_PER_SEC, ce->shift); + /* allow at least 10 seconds to notice that the timer wrapped */ + ce->max_delta_ns = + clockevent_delta2ns(0xf0000000 >> clock->shift, ce); + /* 4 gets rounded down to 3 */ + ce->min_delta_ns = clockevent_delta2ns(4, ce); + ce->cpumask = cpumask_of_cpu(0); + + cs->mult = clocksource_hz2mult(clock->freq, cs->shift); + res = clocksource_register(cs); + if (res) + printk(KERN_ERR "msm_timer_init: clocksource_register " + "failed for %s\n", cs->name); + + res = setup_irq(clock->irq.irq, &clock->irq); + if (res) + printk(KERN_ERR "msm_timer_init: setup_irq " + "failed for %s\n", cs->name); + + clockevents_register_device(ce); + } +} + +struct sys_timer msm_timer = { + .init = msm_timer_init +}; diff --git a/arch/arm/mach-mx3/time.c b/arch/arm/mach-mx3/time.c index e81fb5c5d7c3..fb565c98dbfb 100644 --- a/arch/arm/mach-mx3/time.c +++ b/arch/arm/mach-mx3/time.c @@ -45,8 +45,6 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) { unsigned int next_match; - write_seqlock(&xtime_lock); - if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) { do { timer_tick(); @@ -57,8 +55,6 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) __raw_readl(MXC_GPT_GPTCNT)) <= 0); } - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c index 4762e207b0bf..ea07b54afa59 100644 --- a/arch/arm/mach-netx/time.c +++ b/arch/arm/mach-netx/time.c @@ -33,12 +33,8 @@ static irqreturn_t netx_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - timer_tick(); - write_sequnlock(&xtime_lock); - /* acknowledge interrupt */ writel(COUNTER_BIT(0), NETX_GPIO_IRQ); diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index d5f6ea14fc7b..f550b19e1ecd 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -76,7 +76,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = INT_730_MPU_EXT_NIRQ, .end = 0, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 130681201c19..bfa04fa25524 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -27,6 +27,7 @@ #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> #include <linux/input.h> +#include <linux/i2c/tps65010.h> #include <asm/hardware.h> #include <asm/gpio.h> @@ -36,7 +37,6 @@ #include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <asm/arch/tps65010.h> #include <asm/arch/mux.h> #include <asm/arch/tc.h> #include <asm/arch/irda.h> @@ -209,7 +209,7 @@ static struct resource h2_smc91x_resources[] = { [1] = { .start = OMAP_GPIO_IRQ(0), .end = OMAP_GPIO_IRQ(0), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, }, }; diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4f84ae273a1f..056519860565 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -26,6 +26,7 @@ #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> #include <linux/input.h> +#include <linux/i2c/tps65010.h> #include <asm/setup.h> #include <asm/page.h> @@ -37,7 +38,6 @@ #include <asm/mach/flash.h> #include <asm/mach/map.h> -#include <asm/arch/tps65010.h> #include <asm/arch/gpioexpander.h> #include <asm/arch/irqs.h> #include <asm/arch/mux.h> @@ -208,7 +208,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = OMAP_GPIO_IRQ(40), .end = OMAP_GPIO_IRQ(40), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, }, }; diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 7e63a41e37c6..7d2d8af155a3 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -202,7 +202,7 @@ static struct resource innovator1510_smc91x_resources[] = { [1] = { .start = OMAP1510_INT_ETHER, .end = OMAP1510_INT_ETHER, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; @@ -269,7 +269,7 @@ static struct resource innovator1610_smc91x_resources[] = { [1] = { .start = OMAP_GPIO_IRQ(0), .end = OMAP_GPIO_IRQ(0), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, }, }; diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 182a98a9df4c..e2c8ffd75cff 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -32,7 +32,6 @@ #include <asm/arch/common.h> #include <asm/arch/dsp_common.h> #include <asm/arch/aic23.h> -#include <asm/arch/gpio.h> #include <asm/arch/omapfb.h> #include <asm/arch/lcd_mipid.h> diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 5db182da322b..84333440008c 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -31,12 +31,13 @@ #include <linux/platform_device.h> #include <linux/interrupt.h> #include <linux/irq.h> -#include <linux/interrupt.h> #include <linux/i2c.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/i2c/tps65010.h> + #include <asm/hardware.h> #include <asm/gpio.h> @@ -46,7 +47,6 @@ #include <asm/mach/flash.h> #include <asm/arch/usb.h> -#include <asm/arch/tps65010.h> #include <asm/arch/mux.h> #include <asm/arch/tc.h> #include <asm/arch/common.h> @@ -111,7 +111,7 @@ static struct resource osk5912_smc91x_resources[] = { [1] = { .start = OMAP_GPIO_IRQ(0), .end = OMAP_GPIO_IRQ(0), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index e47010fec275..ed7094a70064 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -42,7 +42,6 @@ #include <asm/arch/common.h> #include <asm/arch/omap-alsa.h> -#include <linux/input.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index c275d517764a..a9a0f6610c3d 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -44,7 +44,6 @@ #include <asm/arch/common.h> #include <asm/arch/omap-alsa.h> -#include <linux/input.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index e44437e10eef..534dcfb9d263 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -75,7 +75,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = INT_730_MPU_EXT_NIRQ, .end = 0, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 214dd19889ac..c82a1cd20ad4 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -117,7 +117,7 @@ static struct resource voiceblue_smc91x_resources[] = { [1] = { .start = OMAP_GPIO_IRQ(8), .end = OMAP_GPIO_IRQ(8), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c index 86de303ecab2..6939d5e7569a 100644 --- a/arch/arm/mach-omap1/leds-osk.c +++ b/arch/arm/mach-omap1/leds-osk.c @@ -5,13 +5,13 @@ */ #include <linux/init.h> #include <linux/workqueue.h> +#include <linux/i2c/tps65010.h> #include <asm/hardware.h> #include <asm/leds.h> #include <asm/system.h> #include <asm/arch/gpio.h> -#include <asm/arch/tps65010.h> #include "leds.h" diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index d9805e3d9304..06b7e54a0128 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -639,7 +639,7 @@ static void omap_pm_finish(void) } -static irqreturn_t omap_wakeup_interrupt(int irq, void *dev) +static irqreturn_t omap_wakeup_interrupt(int irq, void *dev) { return IRQ_HANDLED; } diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 7e76fbf19b5d..64235dee5614 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -104,7 +104,7 @@ static struct resource sdp2430_smc91x_resources[] = { [1] = { .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 3bb49c17c858..7846551f0575 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -26,7 +26,6 @@ #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/leds.h> -#include <linux/irq.h> #include <asm/hardware.h> #include <asm/mach-types.h> @@ -127,7 +126,7 @@ static struct resource apollon_smc91x_resources[] = { [1] = { .start = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ), .end = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 8d322c20ccae..3234deedb946 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -40,13 +40,9 @@ static inline void omap2_gp_timer_start(unsigned long load_val) static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW); timer_tick(); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-orion/Kconfig b/arch/arm/mach-orion/Kconfig new file mode 100644 index 000000000000..1dcbb6ac5a30 --- /dev/null +++ b/arch/arm/mach-orion/Kconfig @@ -0,0 +1,41 @@ +if ARCH_ORION + +menu "Orion Implementations" + +config MACH_DB88F5281 + bool "Marvell Orion-2 Development Board" + select I2C_BOARDINFO + help + Say 'Y' here if you want your kernel to support the + Marvell Orion-2 (88F5281) Development Board + +config MACH_RD88F5182 + bool "Marvell Orion-NAS Reference Design" + select I2C_BOARDINFO + help + Say 'Y' here if you want your kernel to support the + Marvell Orion-NAS (88F5182) RD2 + +config MACH_KUROBOX_PRO + bool "KuroBox Pro" + select I2C_BOARDINFO + help + Say 'Y' here if you want your kernel to support the + KuroBox Pro platform. + +config MACH_DNS323 + bool "D-Link DNS-323" + select I2C_BOARDINFO + help + Say 'Y' here if you want your kernel to support the + D-Link DNS-323 platform. + +config MACH_TS209 + bool "QNAP TS-109/TS-209" + help + Say 'Y' here if you want your kernel to support the + QNAP TS-109/TS-209 platform. + +endmenu + +endif diff --git a/arch/arm/mach-orion/Makefile b/arch/arm/mach-orion/Makefile new file mode 100644 index 000000000000..f91d937a73e8 --- /dev/null +++ b/arch/arm/mach-orion/Makefile @@ -0,0 +1,6 @@ +obj-y += common.o addr-map.o pci.o gpio.o irq.o time.o +obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o +obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o +obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o +obj-$(CONFIG_MACH_DNS323) += dns323-setup.o +obj-$(CONFIG_MACH_TS209) += ts209-setup.o diff --git a/arch/arm/mach-orion/Makefile.boot b/arch/arm/mach-orion/Makefile.boot new file mode 100644 index 000000000000..67039c3e0c48 --- /dev/null +++ b/arch/arm/mach-orion/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y := 0x00008000 +params_phys-y := 0x00000100 +initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c new file mode 100644 index 000000000000..488da3811a68 --- /dev/null +++ b/arch/arm/mach-orion/addr-map.c @@ -0,0 +1,484 @@ +/* + * arch/arm/mach-orion/addr-map.c + * + * Address map functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein <tzachi@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <asm/hardware.h> +#include "common.h" + +/* + * The Orion has fully programable address map. There's a separate address + * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB, + * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own + * address decode windows that allow it to access any of the Orion resources. + * + * CPU address decoding -- + * Linux assumes that it is the boot loader that already setup the access to + * DDR and internal registers. + * Setup access to PCI and PCI-E IO/MEM space is issued by core.c. + * Setup access to various devices located on the device bus interface (e.g. + * flashes, RTC, etc) should be issued by machine-setup.c according to + * specific board population (by using orion_setup_cpu_win()). + * + * Non-CPU Masters address decoding -- + * Unlike the CPU, we setup the access from Orion's master interfaces to DDR + * banks only (the typical use case). + * Setup access for each master to DDR is issued by common.c. + * + * Note: although orion_setbits() and orion_clrbits() are not atomic + * no locking is necessary here since code in this file is only called + * at boot time when there is no concurrency issues. + */ + +/* + * Generic Address Decode Windows bit settings + */ +#define TARGET_DDR 0 +#define TARGET_PCI 3 +#define TARGET_PCIE 4 +#define TARGET_DEV_BUS 1 +#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \ + ((n) == 1) ? 0xd : \ + ((n) == 2) ? 0xb : \ + ((n) == 3) ? 0x7 : 0xf) +#define ATTR_PCIE_MEM 0x59 +#define ATTR_PCIE_IO 0x51 +#define ATTR_PCI_MEM 0x59 +#define ATTR_PCI_IO 0x51 +#define ATTR_DEV_CS0 0x1e +#define ATTR_DEV_CS1 0x1d +#define ATTR_DEV_CS2 0x1b +#define ATTR_DEV_BOOT 0xf +#define WIN_EN 1 + +/* + * Helpers to get DDR banks info + */ +#define DDR_BASE_CS(n) ORION_DDR_REG(0x1500 + ((n) * 8)) +#define DDR_SIZE_CS(n) ORION_DDR_REG(0x1504 + ((n) * 8)) +#define DDR_MAX_CS 4 +#define DDR_REG_TO_SIZE(reg) (((reg) | 0xffffff) + 1) +#define DDR_REG_TO_BASE(reg) ((reg) & 0xff000000) +#define DDR_BANK_EN 1 + +/* + * CPU Address Decode Windows registers + */ +#define CPU_WIN_CTRL(n) ORION_BRIDGE_REG(0x000 | ((n) << 4)) +#define CPU_WIN_BASE(n) ORION_BRIDGE_REG(0x004 | ((n) << 4)) +#define CPU_WIN_REMAP_LO(n) ORION_BRIDGE_REG(0x008 | ((n) << 4)) +#define CPU_WIN_REMAP_HI(n) ORION_BRIDGE_REG(0x00c | ((n) << 4)) +#define CPU_MAX_WIN 8 + +/* + * Use this CPU address decode windows allocation + */ +#define CPU_WIN_PCIE_IO 0 +#define CPU_WIN_PCI_IO 1 +#define CPU_WIN_PCIE_MEM 2 +#define CPU_WIN_PCI_MEM 3 +#define CPU_WIN_DEV_BOOT 4 +#define CPU_WIN_DEV_CS0 5 +#define CPU_WIN_DEV_CS1 6 +#define CPU_WIN_DEV_CS2 7 + +/* + * PCIE Address Decode Windows registers + */ +#define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4)) +#define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8)) +#define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8)) +#define PCIE_WIN_CTRL(n) ORION_PCIE_REG(0x1820 + ((n) << 4)) +#define PCIE_WIN_BASE(n) ORION_PCIE_REG(0x1824 + ((n) << 4)) +#define PCIE_WIN_REMAP(n) ORION_PCIE_REG(0x182c + ((n) << 4)) +#define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0) +#define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0) +#define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4) +#define PCIE_MAX_BARS 3 +#define PCIE_MAX_WINS 5 + +/* + * Use PCIE BAR '1' for all DDR banks + */ +#define PCIE_DRAM_BAR 1 + +/* + * PCI Address Decode Windows registers + */ +#define PCI_BAR_SIZE_DDR_CS(n) (((n) == 0) ? ORION_PCI_REG(0xc08) : \ + ((n) == 1) ? ORION_PCI_REG(0xd08) : \ + ((n) == 2) ? ORION_PCI_REG(0xc0c) : \ + ((n) == 3) ? ORION_PCI_REG(0xd0c) : 0) +#define PCI_BAR_REMAP_DDR_CS(n) (((n) ==0) ? ORION_PCI_REG(0xc48) : \ + ((n) == 1) ? ORION_PCI_REG(0xd48) : \ + ((n) == 2) ? ORION_PCI_REG(0xc4c) : \ + ((n) == 3) ? ORION_PCI_REG(0xd4c) : 0) +#define PCI_BAR_ENABLE ORION_PCI_REG(0xc3c) +#define PCI_CTRL_BASE_LO(n) ORION_PCI_REG(0x1e00 | ((n) << 4)) +#define PCI_CTRL_BASE_HI(n) ORION_PCI_REG(0x1e04 | ((n) << 4)) +#define PCI_CTRL_SIZE(n) ORION_PCI_REG(0x1e08 | ((n) << 4)) +#define PCI_ADDR_DECODE_CTRL ORION_PCI_REG(0xd3c) + +/* + * PCI configuration heleprs for BAR settings + */ +#define PCI_CONF_FUNC_BAR_CS(n) ((n) >> 1) +#define PCI_CONF_REG_BAR_LO_CS(n) (((n) & 1) ? 0x18 : 0x10) +#define PCI_CONF_REG_BAR_HI_CS(n) (((n) & 1) ? 0x1c : 0x14) + +/* + * Gigabit Ethernet Address Decode Windows registers + */ +#define ETH_WIN_BASE(win) ORION_ETH_REG(0x200 + ((win) * 8)) +#define ETH_WIN_SIZE(win) ORION_ETH_REG(0x204 + ((win) * 8)) +#define ETH_WIN_REMAP(win) ORION_ETH_REG(0x280 + ((win) * 4)) +#define ETH_WIN_EN ORION_ETH_REG(0x290) +#define ETH_WIN_PROT ORION_ETH_REG(0x294) +#define ETH_MAX_WIN 6 +#define ETH_MAX_REMAP_WIN 4 + +/* + * USB Address Decode Windows registers + */ +#define USB_WIN_CTRL(i, w) ((i == 0) ? ORION_USB0_REG(0x320 + ((w) << 4)) \ + : ORION_USB1_REG(0x320 + ((w) << 4))) +#define USB_WIN_BASE(i, w) ((i == 0) ? ORION_USB0_REG(0x324 + ((w) << 4)) \ + : ORION_USB1_REG(0x324 + ((w) << 4))) +#define USB_MAX_WIN 4 + +/* + * SATA Address Decode Windows registers + */ +#define SATA_WIN_CTRL(win) ORION_SATA_REG(0x30 + ((win) * 0x10)) +#define SATA_WIN_BASE(win) ORION_SATA_REG(0x34 + ((win) * 0x10)) +#define SATA_MAX_WIN 4 + +static int __init orion_cpu_win_can_remap(u32 win) +{ + u32 dev, rev; + + orion_pcie_id(&dev, &rev); + if ((dev == MV88F5281_DEV_ID && win < 4) + || (dev == MV88F5182_DEV_ID && win < 2) + || (dev == MV88F5181_DEV_ID && win < 2)) + return 1; + + return 0; +} + +void __init orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap) +{ + u32 win, attr, ctrl; + + switch (target) { + case ORION_PCIE_IO: + target = TARGET_PCIE; + attr = ATTR_PCIE_IO; + win = CPU_WIN_PCIE_IO; + break; + case ORION_PCI_IO: + target = TARGET_PCI; + attr = ATTR_PCI_IO; + win = CPU_WIN_PCI_IO; + break; + case ORION_PCIE_MEM: + target = TARGET_PCIE; + attr = ATTR_PCIE_MEM; + win = CPU_WIN_PCIE_MEM; + break; + case ORION_PCI_MEM: + target = TARGET_PCI; + attr = ATTR_PCI_MEM; + win = CPU_WIN_PCI_MEM; + break; + case ORION_DEV_BOOT: + target = TARGET_DEV_BUS; + attr = ATTR_DEV_BOOT; + win = CPU_WIN_DEV_BOOT; + break; + case ORION_DEV0: + target = TARGET_DEV_BUS; + attr = ATTR_DEV_CS0; + win = CPU_WIN_DEV_CS0; + break; + case ORION_DEV1: + target = TARGET_DEV_BUS; + attr = ATTR_DEV_CS1; + win = CPU_WIN_DEV_CS1; + break; + case ORION_DEV2: + target = TARGET_DEV_BUS; + attr = ATTR_DEV_CS2; + win = CPU_WIN_DEV_CS2; + break; + case ORION_DDR: + case ORION_REGS: + /* + * Must be mapped by bootloader. + */ + default: + target = attr = win = -1; + BUG(); + } + + base &= 0xffff0000; + ctrl = (((size - 1) & 0xffff0000) | (attr << 8) | + (target << 4) | WIN_EN); + + orion_write(CPU_WIN_BASE(win), base); + orion_write(CPU_WIN_CTRL(win), ctrl); + + if (orion_cpu_win_can_remap(win)) { + if (remap >= 0) { + orion_write(CPU_WIN_REMAP_LO(win), remap & 0xffff0000); + orion_write(CPU_WIN_REMAP_HI(win), 0); + } else { + orion_write(CPU_WIN_REMAP_LO(win), base); + orion_write(CPU_WIN_REMAP_HI(win), 0); + } + } +} + +void __init orion_setup_cpu_wins(void) +{ + int i; + + /* + * First, disable and clear windows + */ + for (i = 0; i < CPU_MAX_WIN; i++) { + orion_write(CPU_WIN_BASE(i), 0); + orion_write(CPU_WIN_CTRL(i), 0); + if (orion_cpu_win_can_remap(i)) { + orion_write(CPU_WIN_REMAP_LO(i), 0); + orion_write(CPU_WIN_REMAP_HI(i), 0); + } + } + + /* + * Setup windows for PCI+PCIE IO+MAM space + */ + orion_setup_cpu_win(ORION_PCIE_IO, ORION_PCIE_IO_BASE, + ORION_PCIE_IO_SIZE, ORION_PCIE_IO_REMAP); + orion_setup_cpu_win(ORION_PCI_IO, ORION_PCI_IO_BASE, + ORION_PCI_IO_SIZE, ORION_PCI_IO_REMAP); + orion_setup_cpu_win(ORION_PCIE_MEM, ORION_PCIE_MEM_BASE, + ORION_PCIE_MEM_SIZE, -1); + orion_setup_cpu_win(ORION_PCI_MEM, ORION_PCI_MEM_BASE, + ORION_PCI_MEM_SIZE, -1); +} + +/* + * Setup PCIE BARs and Address Decode Wins: + * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks + * WIN[0-3] -> DRAM bank[0-3] + */ +void __init orion_setup_pcie_wins(void) +{ + u32 base, size, i; + + /* + * First, disable and clear BARs and windows + */ + for (i = 1; i < PCIE_MAX_BARS; i++) { + orion_write(PCIE_BAR_CTRL(i), 0); + orion_write(PCIE_BAR_LO(i), 0); + orion_write(PCIE_BAR_HI(i), 0); + } + + for (i = 0; i < PCIE_MAX_WINS; i++) { + orion_write(PCIE_WIN_CTRL(i), 0); + orion_write(PCIE_WIN_BASE(i), 0); + orion_write(PCIE_WIN_REMAP(i), 0); + } + + /* + * Setup windows for DDR banks. Count total DDR size on the fly. + */ + base = DDR_REG_TO_BASE(orion_read(DDR_BASE_CS(0))); + size = 0; + for (i = 0; i < DDR_MAX_CS; i++) { + u32 bank_base, bank_size; + bank_size = orion_read(DDR_SIZE_CS(i)); + bank_base = orion_read(DDR_BASE_CS(i)); + if (bank_size & DDR_BANK_EN) { + bank_size = DDR_REG_TO_SIZE(bank_size); + bank_base = DDR_REG_TO_BASE(bank_base); + orion_write(PCIE_WIN_BASE(i), bank_base & 0xffff0000); + orion_write(PCIE_WIN_REMAP(i), 0); + orion_write(PCIE_WIN_CTRL(i), + ((bank_size-1) & 0xffff0000) | + (ATTR_DDR_CS(i) << 8) | + (TARGET_DDR << 4) | + (PCIE_DRAM_BAR << 1) | WIN_EN); + size += bank_size; + } + } + + /* + * Setup BAR[1] to all DRAM banks + */ + orion_write(PCIE_BAR_LO(PCIE_DRAM_BAR), base & 0xffff0000); + orion_write(PCIE_BAR_HI(PCIE_DRAM_BAR), 0); + orion_write(PCIE_BAR_CTRL(PCIE_DRAM_BAR), + ((size - 1) & 0xffff0000) | WIN_EN); +} + +void __init orion_setup_pci_wins(void) +{ + u32 base, size, i; + + /* + * First, disable windows + */ + orion_write(PCI_BAR_ENABLE, 0xffffffff); + + /* + * Setup windows for DDR banks. + */ + for (i = 0; i < DDR_MAX_CS; i++) { + base = orion_read(DDR_BASE_CS(i)); + size = orion_read(DDR_SIZE_CS(i)); + if (size & DDR_BANK_EN) { + u32 bus, dev, func, reg, val; + size = DDR_REG_TO_SIZE(size); + base = DDR_REG_TO_BASE(base); + bus = orion_pci_local_bus_nr(); + dev = orion_pci_local_dev_nr(); + func = PCI_CONF_FUNC_BAR_CS(i); + reg = PCI_CONF_REG_BAR_LO_CS(i); + orion_pci_hw_rd_conf(bus, dev, func, reg, 4, &val); + orion_pci_hw_wr_conf(bus, dev, func, reg, 4, + (base & 0xfffff000) | (val & 0xfff)); + reg = PCI_CONF_REG_BAR_HI_CS(i); + orion_pci_hw_wr_conf(bus, dev, func, reg, 4, 0); + orion_write(PCI_BAR_SIZE_DDR_CS(i), + (size - 1) & 0xfffff000); + orion_write(PCI_BAR_REMAP_DDR_CS(i), + base & 0xfffff000); + orion_clrbits(PCI_BAR_ENABLE, (1 << i)); + } + } + + /* + * Disable automatic update of address remaping when writing to BARs + */ + orion_setbits(PCI_ADDR_DECODE_CTRL, 1); +} + +void __init orion_setup_usb_wins(void) +{ + int i; + u32 usb_if, dev, rev; + u32 max_usb_if = 1; + + orion_pcie_id(&dev, &rev); + if (dev == MV88F5182_DEV_ID) + max_usb_if = 2; + + for (usb_if = 0; usb_if < max_usb_if; usb_if++) { + /* + * First, disable and clear windows + */ + for (i = 0; i < USB_MAX_WIN; i++) { + orion_write(USB_WIN_BASE(usb_if, i), 0); + orion_write(USB_WIN_CTRL(usb_if, i), 0); + } + + /* + * Setup windows for DDR banks. + */ + for (i = 0; i < DDR_MAX_CS; i++) { + u32 base, size; + size = orion_read(DDR_SIZE_CS(i)); + base = orion_read(DDR_BASE_CS(i)); + if (size & DDR_BANK_EN) { + base = DDR_REG_TO_BASE(base); + size = DDR_REG_TO_SIZE(size); + orion_write(USB_WIN_CTRL(usb_if, i), + ((size-1) & 0xffff0000) | + (ATTR_DDR_CS(i) << 8) | + (TARGET_DDR << 4) | WIN_EN); + orion_write(USB_WIN_BASE(usb_if, i), + base & 0xffff0000); + } + } + } +} + +void __init orion_setup_eth_wins(void) +{ + int i; + + /* + * First, disable and clear windows + */ + for (i = 0; i < ETH_MAX_WIN; i++) { + orion_write(ETH_WIN_BASE(i), 0); + orion_write(ETH_WIN_SIZE(i), 0); + orion_setbits(ETH_WIN_EN, 1 << i); + orion_clrbits(ETH_WIN_PROT, 0x3 << (i * 2)); + if (i < ETH_MAX_REMAP_WIN) + orion_write(ETH_WIN_REMAP(i), 0); + } + + /* + * Setup windows for DDR banks. + */ + for (i = 0; i < DDR_MAX_CS; i++) { + u32 base, size; + size = orion_read(DDR_SIZE_CS(i)); + base = orion_read(DDR_BASE_CS(i)); + if (size & DDR_BANK_EN) { + base = DDR_REG_TO_BASE(base); + size = DDR_REG_TO_SIZE(size); + orion_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000); + orion_write(ETH_WIN_BASE(i), (base & 0xffff0000) | + (ATTR_DDR_CS(i) << 8) | + TARGET_DDR); + orion_clrbits(ETH_WIN_EN, 1 << i); + orion_setbits(ETH_WIN_PROT, 0x3 << (i * 2)); + } + } +} + +void __init orion_setup_sata_wins(void) +{ + int i; + + /* + * First, disable and clear windows + */ + for (i = 0; i < SATA_MAX_WIN; i++) { + orion_write(SATA_WIN_BASE(i), 0); + orion_write(SATA_WIN_CTRL(i), 0); + } + + /* + * Setup windows for DDR banks. + */ + for (i = 0; i < DDR_MAX_CS; i++) { + u32 base, size; + size = orion_read(DDR_SIZE_CS(i)); + base = orion_read(DDR_BASE_CS(i)); + if (size & DDR_BANK_EN) { + base = DDR_REG_TO_BASE(base); + size = DDR_REG_TO_SIZE(size); + orion_write(SATA_WIN_CTRL(i), + ((size-1) & 0xffff0000) | + (ATTR_DDR_CS(i) << 8) | + (TARGET_DDR << 4) | WIN_EN); + orion_write(SATA_WIN_BASE(i), + base & 0xffff0000); + } + } +} diff --git a/arch/arm/mach-orion/common.c b/arch/arm/mach-orion/common.c new file mode 100644 index 000000000000..5e20b6b32508 --- /dev/null +++ b/arch/arm/mach-orion/common.c @@ -0,0 +1,315 @@ +/* + * arch/arm/mach-orion/common.c + * + * Core functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein <tzachi@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/serial_8250.h> +#include <linux/mv643xx_eth.h> +#include <linux/mv643xx_i2c.h> +#include <asm/page.h> +#include <asm/timex.h> +#include <asm/mach/map.h> +#include <asm/arch/orion.h> +#include "common.h" + +/***************************************************************************** + * I/O Address Mapping + ****************************************************************************/ +static struct map_desc orion_io_desc[] __initdata = { + { + .virtual = ORION_REGS_BASE, + .pfn = __phys_to_pfn(ORION_REGS_BASE), + .length = ORION_REGS_SIZE, + .type = MT_DEVICE + }, + { + .virtual = ORION_PCIE_IO_BASE, + .pfn = __phys_to_pfn(ORION_PCIE_IO_BASE), + .length = ORION_PCIE_IO_SIZE, + .type = MT_DEVICE + }, + { + .virtual = ORION_PCI_IO_BASE, + .pfn = __phys_to_pfn(ORION_PCI_IO_BASE), + .length = ORION_PCI_IO_SIZE, + .type = MT_DEVICE + }, + { + .virtual = ORION_PCIE_WA_BASE, + .pfn = __phys_to_pfn(ORION_PCIE_WA_BASE), + .length = ORION_PCIE_WA_SIZE, + .type = MT_DEVICE + }, +}; + +void __init orion_map_io(void) +{ + iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc)); +} + +/***************************************************************************** + * UART + ****************************************************************************/ + +static struct resource orion_uart_resources[] = { + { + .start = UART0_BASE, + .end = UART0_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_ORION_UART0, + .end = IRQ_ORION_UART0, + .flags = IORESOURCE_IRQ, + }, + { + .start = UART1_BASE, + .end = UART1_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_ORION_UART1, + .end = IRQ_ORION_UART1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct plat_serial8250_port orion_uart_data[] = { + { + .mapbase = UART0_BASE, + .membase = (char *)UART0_BASE, + .irq = IRQ_ORION_UART0, + .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = ORION_TCLK, + }, + { + .mapbase = UART1_BASE, + .membase = (char *)UART1_BASE, + .irq = IRQ_ORION_UART1, + .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = ORION_TCLK, + }, + { }, +}; + +static struct platform_device orion_uart = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = orion_uart_data, + }, + .resource = orion_uart_resources, + .num_resources = ARRAY_SIZE(orion_uart_resources), +}; + +/******************************************************************************* + * USB Controller - 2 interfaces + ******************************************************************************/ + +static struct resource orion_ehci0_resources[] = { + { + .start = ORION_USB0_REG_BASE, + .end = ORION_USB0_REG_BASE + SZ_4K, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_ORION_USB0_CTRL, + .end = IRQ_ORION_USB0_CTRL, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource orion_ehci1_resources[] = { + { + .start = ORION_USB1_REG_BASE, + .end = ORION_USB1_REG_BASE + SZ_4K, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_ORION_USB1_CTRL, + .end = IRQ_ORION_USB1_CTRL, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 ehci_dmamask = 0xffffffffUL; + +static struct platform_device orion_ehci0 = { + .name = "orion-ehci", + .id = 0, + .dev = { + .dma_mask = &ehci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = orion_ehci0_resources, + .num_resources = ARRAY_SIZE(orion_ehci0_resources), +}; + +static struct platform_device orion_ehci1 = { + .name = "orion-ehci", + .id = 1, + .dev = { + .dma_mask = &ehci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = orion_ehci1_resources, + .num_resources = ARRAY_SIZE(orion_ehci1_resources), +}; + +/***************************************************************************** + * Gigabit Ethernet port + * (The Orion and Discovery (MV643xx) families use the same Ethernet driver) + ****************************************************************************/ + +static struct resource orion_eth_shared_resources[] = { + { + .start = ORION_ETH_REG_BASE, + .end = ORION_ETH_REG_BASE + 0xffff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device orion_eth_shared = { + .name = MV643XX_ETH_SHARED_NAME, + .id = 0, + .num_resources = 1, + .resource = orion_eth_shared_resources, +}; + +static struct resource orion_eth_resources[] = { + { + .name = "eth irq", + .start = IRQ_ORION_ETH_SUM, + .end = IRQ_ORION_ETH_SUM, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device orion_eth = { + .name = MV643XX_ETH_NAME, + .id = 0, + .num_resources = 1, + .resource = orion_eth_resources, +}; + +void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data) +{ + orion_eth.dev.platform_data = eth_data; + platform_device_register(&orion_eth_shared); + platform_device_register(&orion_eth); +} + +/***************************************************************************** + * I2C controller + * (The Orion and Discovery (MV643xx) families share the same I2C controller) + ****************************************************************************/ + +static struct mv64xxx_i2c_pdata orion_i2c_pdata = { + .freq_m = 8, /* assumes 166 MHz TCLK */ + .freq_n = 3, + .timeout = 1000, /* Default timeout of 1 second */ +}; + +static struct resource orion_i2c_resources[] = { + { + .name = "i2c base", + .start = I2C_BASE, + .end = I2C_BASE + 0x20 -1, + .flags = IORESOURCE_MEM, + }, + { + .name = "i2c irq", + .start = IRQ_ORION_I2C, + .end = IRQ_ORION_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device orion_i2c = { + .name = MV64XXX_I2C_CTLR_NAME, + .id = 0, + .num_resources = ARRAY_SIZE(orion_i2c_resources), + .resource = orion_i2c_resources, + .dev = { + .platform_data = &orion_i2c_pdata, + }, +}; + +/***************************************************************************** + * General + ****************************************************************************/ + +/* + * Identify device ID and rev from PCIE configuration header space '0'. + */ +static void orion_id(u32 *dev, u32 *rev, char **dev_name) +{ + orion_pcie_id(dev, rev); + + if (*dev == MV88F5281_DEV_ID) { + if (*rev == MV88F5281_REV_D2) { + *dev_name = "MV88F5281-D2"; + } else if (*rev == MV88F5281_REV_D1) { + *dev_name = "MV88F5281-D1"; + } else { + *dev_name = "MV88F5281-Rev-Unsupported"; + } + } else if (*dev == MV88F5182_DEV_ID) { + if (*rev == MV88F5182_REV_A2) { + *dev_name = "MV88F5182-A2"; + } else { + *dev_name = "MV88F5182-Rev-Unsupported"; + } + } else if (*dev == MV88F5181_DEV_ID) { + if (*rev == MV88F5181_REV_B1) { + *dev_name = "MV88F5181-Rev-B1"; + } else { + *dev_name = "MV88F5181-Rev-Unsupported"; + } + } else { + *dev_name = "Device-Unknown"; + } +} + +void __init orion_init(void) +{ + char *dev_name; + u32 dev, rev; + + orion_id(&dev, &rev, &dev_name); + printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK); + + /* + * Setup Orion address map + */ + orion_setup_cpu_wins(); + orion_setup_usb_wins(); + orion_setup_eth_wins(); + orion_setup_pci_wins(); + orion_setup_pcie_wins(); + if (dev == MV88F5182_DEV_ID) + orion_setup_sata_wins(); + + /* + * REgister devices + */ + platform_device_register(&orion_uart); + platform_device_register(&orion_ehci0); + if (dev == MV88F5182_DEV_ID) + platform_device_register(&orion_ehci1); + platform_device_register(&orion_i2c); +} diff --git a/arch/arm/mach-orion/common.h b/arch/arm/mach-orion/common.h new file mode 100644 index 000000000000..06c10c06f03e --- /dev/null +++ b/arch/arm/mach-orion/common.h @@ -0,0 +1,78 @@ +#ifndef __ARCH_ORION_COMMON_H__ +#define __ARCH_ORION_COMMON_H__ + +/* + * Basic Orion init functions used early by machine-setup. + */ + +void __init orion_map_io(void); +void __init orion_init_irq(void); +void __init orion_init(void); + +/* + * Enumerations and functions for Orion windows mapping. Used by Orion core + * functions to map its interfaces and by the machine-setup to map its on- + * board devices. Details in /mach-orion/addr-map.c + */ + +enum orion_target { + ORION_DEV_BOOT = 0, + ORION_DEV0, + ORION_DEV1, + ORION_DEV2, + ORION_PCIE_MEM, + ORION_PCIE_IO, + ORION_PCI_MEM, + ORION_PCI_IO, + ORION_DDR, + ORION_REGS, + ORION_MAX_TARGETS +}; + +void orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap); +void orion_setup_cpu_wins(void); +void orion_setup_eth_wins(void); +void orion_setup_usb_wins(void); +void orion_setup_pci_wins(void); +void orion_setup_pcie_wins(void); +void orion_setup_sata_wins(void); + +/* + * Shared code used internally by other Orion core functions. + * (/mach-orion/pci.c) + */ + +struct pci_sys_data; +struct pci_bus; + +void orion_pcie_id(u32 *dev, u32 *rev); +u32 orion_pcie_local_bus_nr(void); +u32 orion_pci_local_bus_nr(void); +u32 orion_pci_local_dev_nr(void); +int orion_pci_sys_setup(int nr, struct pci_sys_data *sys); +struct pci_bus *orion_pci_sys_scan_bus(int nr, struct pci_sys_data *sys); +int orion_pci_hw_rd_conf(u32 bus, u32 dev, u32 func, u32 where, u32 size, u32 *val); +int orion_pci_hw_wr_conf(u32 bus, u32 dev, u32 func, u32 where, u32 size, u32 val); + +/* + * Valid GPIO pins according to MPP setup, used by machine-setup. + * (/mach-orion/gpio.c). + */ + +void __init orion_gpio_set_valid_pins(u32 pins); +void gpio_display(void); /* debug */ + +/* + * Orion system timer (clocksource + clockevnt, /mach-orion/time.c) + */ +extern struct sys_timer orion_timer; + +/* + * Pull in Orion Ethernet platform_data, used by machine-setup + */ + +struct mv643xx_eth_platform_data; + +void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data); + +#endif /* __ARCH_ORION_COMMON_H__ */ diff --git a/arch/arm/mach-orion/db88f5281-setup.c b/arch/arm/mach-orion/db88f5281-setup.c new file mode 100644 index 000000000000..cb2a95ce5b57 --- /dev/null +++ b/arch/arm/mach-orion/db88f5281-setup.c @@ -0,0 +1,364 @@ +/* + * arch/arm/mach-orion/db88f5281-setup.c + * + * Marvell Orion-2 Development Board Setup + * + * Maintainer: Tzachi Perelstein <tzachi@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/mtd/physmap.h> +#include <linux/mtd/nand.h> +#include <linux/timer.h> +#include <linux/mv643xx_eth.h> +#include <linux/i2c.h> +#include <asm/mach-types.h> +#include <asm/gpio.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <asm/arch/orion.h> +#include <asm/arch/platform.h> +#include "common.h" + +/***************************************************************************** + * DB-88F5281 on board devices + ****************************************************************************/ + +/* + * 512K NOR flash Device bus boot chip select + */ + +#define DB88F5281_NOR_BOOT_BASE 0xf4000000 +#define DB88F5281_NOR_BOOT_SIZE SZ_512K + +/* + * 7-Segment on Device bus chip select 0 + */ + +#define DB88F5281_7SEG_BASE 0xfa000000 +#define DB88F5281_7SEG_SIZE SZ_1K + +/* + * 32M NOR flash on Device bus chip select 1 + */ + +#define DB88F5281_NOR_BASE 0xfc000000 +#define DB88F5281_NOR_SIZE SZ_32M + +/* + * 32M NAND flash on Device bus chip select 2 + */ + +#define DB88F5281_NAND_BASE 0xfa800000 +#define DB88F5281_NAND_SIZE SZ_1K + +/* + * PCI + */ + +#define DB88F5281_PCI_SLOT0_OFFS 7 +#define DB88F5281_PCI_SLOT0_IRQ_PIN 12 +#define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN 13 + +/***************************************************************************** + * 512M NOR Flash on Device bus Boot CS + ****************************************************************************/ + +static struct physmap_flash_data db88f5281_boot_flash_data = { + .width = 1, /* 8 bit bus width */ +}; + +static struct resource db88f5281_boot_flash_resource = { + .flags = IORESOURCE_MEM, + .start = DB88F5281_NOR_BOOT_BASE, + .end = DB88F5281_NOR_BOOT_BASE + DB88F5281_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device db88f5281_boot_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &db88f5281_boot_flash_data, + }, + .num_resources = 1, + .resource = &db88f5281_boot_flash_resource, +}; + +/***************************************************************************** + * 32M NOR Flash on Device bus CS1 + ****************************************************************************/ + +static struct physmap_flash_data db88f5281_nor_flash_data = { + .width = 4, /* 32 bit bus width */ +}; + +static struct resource db88f5281_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = DB88F5281_NOR_BASE, + .end = DB88F5281_NOR_BASE + DB88F5281_NOR_SIZE - 1, +}; + +static struct platform_device db88f5281_nor_flash = { + .name = "physmap-flash", + .id = 1, + .dev = { + .platform_data = &db88f5281_nor_flash_data, + }, + .num_resources = 1, + .resource = &db88f5281_nor_flash_resource, +}; + +/***************************************************************************** + * 32M NAND Flash on Device bus CS2 + ****************************************************************************/ + +static struct mtd_partition db88f5281_nand_parts[] = { + { + .name = "kernel", + .offset = 0, + .size = SZ_2M, + }, + { + .name = "root", + .offset = SZ_2M, + .size = (SZ_16M - SZ_2M), + }, + { + .name = "user", + .offset = SZ_16M, + .size = SZ_8M, + }, + { + .name = "recovery", + .offset = (SZ_16M + SZ_8M), + .size = SZ_8M, + }, +}; + +static struct resource db88f5281_nand_resource = { + .flags = IORESOURCE_MEM, + .start = DB88F5281_NAND_BASE, + .end = DB88F5281_NAND_BASE + DB88F5281_NAND_SIZE - 1, +}; + +static struct orion_nand_data db88f5281_nand_data = { + .parts = db88f5281_nand_parts, + .nr_parts = ARRAY_SIZE(db88f5281_nand_parts), + .cle = 0, + .ale = 1, + .width = 8, +}; + +static struct platform_device db88f5281_nand_flash = { + .name = "orion_nand", + .id = -1, + .dev = { + .platform_data = &db88f5281_nand_data, + }, + .resource = &db88f5281_nand_resource, + .num_resources = 1, +}; + +/***************************************************************************** + * 7-Segment on Device bus CS0 + * Dummy counter every 2 sec + ****************************************************************************/ + +static void __iomem *db88f5281_7seg; +static struct timer_list db88f5281_timer; + +static void db88f5281_7seg_event(unsigned long data) +{ + static int count = 0; + writel(0, db88f5281_7seg + (count << 4)); + count = (count + 1) & 7; + mod_timer(&db88f5281_timer, jiffies + 2 * HZ); +} + +static int __init db88f5281_7seg_init(void) +{ + if (machine_is_db88f5281()) { + db88f5281_7seg = ioremap(DB88F5281_7SEG_BASE, + DB88F5281_7SEG_SIZE); + if (!db88f5281_7seg) { + printk(KERN_ERR "Failed to ioremap db88f5281_7seg\n"); + return -EIO; + } + setup_timer(&db88f5281_timer, db88f5281_7seg_event, 0); + mod_timer(&db88f5281_timer, jiffies + 2 * HZ); + } + + return 0; +} + +__initcall(db88f5281_7seg_init); + +/***************************************************************************** + * PCI + ****************************************************************************/ + +void __init db88f5281_pci_preinit(void) +{ + int pin; + + /* + * Configure PCI GPIO IRQ pins + */ + pin = DB88F5281_PCI_SLOT0_IRQ_PIN; + if (gpio_request(pin, "PCI Int1") == 0) { + if (gpio_direction_input(pin) == 0) { + set_irq_type(gpio_to_irq(pin), IRQT_LOW); + } else { + printk(KERN_ERR "db88f5281_pci_preinit faield to " + "set_irq_type pin %d\n", pin); + gpio_free(pin); + } + } else { + printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin); + } + + pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; + if (gpio_request(pin, "PCI Int2") == 0) { + if (gpio_direction_input(pin) == 0) { + set_irq_type(gpio_to_irq(pin), IRQT_LOW); + } else { + printk(KERN_ERR "db88f5281_pci_preinit faield " + "to set_irq_type pin %d\n", pin); + gpio_free(pin); + } + } else { + printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin); + } +} + +static int __init db88f5281_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + /* + * PCIE IRQ is connected internally (not GPIO) + */ + if (dev->bus->number == orion_pcie_local_bus_nr()) + return IRQ_ORION_PCIE0_INT; + + /* + * PCI IRQs are connected via GPIOs + */ + switch (slot - DB88F5281_PCI_SLOT0_OFFS) { + case 0: + return gpio_to_irq(DB88F5281_PCI_SLOT0_IRQ_PIN); + case 1: + case 2: + return gpio_to_irq(DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN); + default: + return -1; + } +} + +static struct hw_pci db88f5281_pci __initdata = { + .nr_controllers = 2, + .preinit = db88f5281_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = orion_pci_sys_setup, + .scan = orion_pci_sys_scan_bus, + .map_irq = db88f5281_pci_map_irq, +}; + +static int __init db88f5281_pci_init(void) +{ + if (machine_is_db88f5281()) + pci_common_init(&db88f5281_pci); + + return 0; +} + +subsys_initcall(db88f5281_pci_init); + +/***************************************************************************** + * Ethernet + ****************************************************************************/ +static struct mv643xx_eth_platform_data db88f5281_eth_data = { + .phy_addr = 8, + .force_phy_addr = 1, +}; + +/***************************************************************************** + * RTC DS1339 on I2C bus + ****************************************************************************/ +static struct i2c_board_info __initdata db88f5281_i2c_rtc = { + .driver_name = "rtc-ds1307", + .type = "ds1339", + .addr = 0x68, +}; + +/***************************************************************************** + * General Setup + ****************************************************************************/ + +static struct platform_device *db88f5281_devs[] __initdata = { + &db88f5281_boot_flash, + &db88f5281_nor_flash, + &db88f5281_nand_flash, +}; + +static void __init db88f5281_init(void) +{ + /* + * Basic Orion setup. Need to be called early. + */ + orion_init(); + + /* + * Setup the CPU address decode windows for our on-board devices + */ + orion_setup_cpu_win(ORION_DEV_BOOT, DB88F5281_NOR_BOOT_BASE, + DB88F5281_NOR_BOOT_SIZE, -1); + orion_setup_cpu_win(ORION_DEV0, DB88F5281_7SEG_BASE, + DB88F5281_7SEG_SIZE, -1); + orion_setup_cpu_win(ORION_DEV1, DB88F5281_NOR_BASE, + DB88F5281_NOR_SIZE, -1); + orion_setup_cpu_win(ORION_DEV2, DB88F5281_NAND_BASE, + DB88F5281_NAND_SIZE, -1); + + /* + * Setup Multiplexing Pins: + * MPP0: GPIO (USB Over Current) MPP1: GPIO (USB Vbat input) + * MPP2: PCI_REQn[2] MPP3: PCI_GNTn[2] + * MPP4: PCI_REQn[3] MPP5: PCI_GNTn[3] + * MPP6: GPIO (JP0, CON17.2) MPP7: GPIO (JP1, CON17.1) + * MPP8: GPIO (JP2, CON11.2) MPP9: GPIO (JP3, CON11.3) + * MPP10: GPIO (RTC int) MPP11: GPIO (Baud Rate Generator) + * MPP12: GPIO (PCI int 1) MPP13: GPIO (PCI int 2) + * MPP14: NAND_REn[2] MPP15: NAND_WEn[2] + * MPP16: UART1_RX MPP17: UART1_TX + * MPP18: UART1_CTS MPP19: UART1_RTS + * MPP-DEV: DEV_D[16:31] + */ + orion_write(MPP_0_7_CTRL, 0x00222203); + orion_write(MPP_8_15_CTRL, 0x44000000); + orion_write(MPP_16_19_CTRL, 0); + orion_write(MPP_DEV_CTRL, 0); + + orion_gpio_set_valid_pins(0x00003fc3); + + platform_add_devices(db88f5281_devs, ARRAY_SIZE(db88f5281_devs)); + i2c_register_board_info(0, &db88f5281_i2c_rtc, 1); + orion_eth_init(&db88f5281_eth_data); +} + +MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") + /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */ + .phys_io = ORION_REGS_BASE, + .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xfffc, + .boot_params = 0x00000100, + .init_machine = db88f5281_init, + .map_io = orion_map_io, + .init_irq = orion_init_irq, + .timer = &orion_timer, +MACHINE_END diff --git a/arch/arm/mach-orion/dns323-setup.c b/arch/arm/mach-orion/dns323-setup.c new file mode 100644 index 000000000000..c8a806f249c6 --- /dev/null +++ b/arch/arm/mach-orion/dns323-setup.c @@ -0,0 +1,322 @@ +/* + * arch/arm/mach-orion/dns323-setup.c + * + * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/mtd/physmap.h> +#include <linux/mv643xx_eth.h> +#include <linux/leds.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> +#include <linux/i2c.h> +#include <asm/mach-types.h> +#include <asm/gpio.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <asm/arch/orion.h> +#include <asm/arch/platform.h> +#include "common.h" + +#define DNS323_GPIO_LED_RIGHT_AMBER 1 +#define DNS323_GPIO_LED_LEFT_AMBER 2 +#define DNS323_GPIO_LED_POWER 5 +#define DNS323_GPIO_OVERTEMP 6 +#define DNS323_GPIO_RTC 7 +#define DNS323_GPIO_POWER_OFF 8 +#define DNS323_GPIO_KEY_POWER 9 +#define DNS323_GPIO_KEY_RESET 10 + +/**************************************************************************** + * PCI setup + */ + +static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + /* PCI-E */ + if (dev->bus->number == orion_pcie_local_bus_nr()) + return IRQ_ORION_PCIE0_INT; + + pr_err("%s: requested mapping for unknown bus\n", __func__); + + return -1; +} + +static struct hw_pci dns323_pci __initdata = { + .nr_controllers = 1, + .swizzle = pci_std_swizzle, + .setup = orion_pci_sys_setup, + .scan = orion_pci_sys_scan_bus, + .map_irq = dns323_pci_map_irq, +}; + +static int __init dns323_pci_init(void) +{ + if (machine_is_dns323()) + pci_common_init(&dns323_pci); + + return 0; +} + +subsys_initcall(dns323_pci_init); + +/**************************************************************************** + * Ethernet + */ + +static struct mv643xx_eth_platform_data dns323_eth_data = { + .phy_addr = 8, + .force_phy_addr = 1, +}; + +/**************************************************************************** + * 8MiB NOR flash (Spansion S29GL064M90TFIR4) + * + * Layout as used by D-Link: + * 0x00000000-0x00010000 : "MTD1" + * 0x00010000-0x00020000 : "MTD2" + * 0x00020000-0x001a0000 : "Linux Kernel" + * 0x001a0000-0x007d0000 : "File System" + * 0x007d0000-0x00800000 : "u-boot" + */ + +#define DNS323_NOR_BOOT_BASE 0xf4000000 +#define DNS323_NOR_BOOT_SIZE SZ_8M + +static struct mtd_partition dns323_partitions[] = { + { + .name = "MTD1", + .size = 0x00010000, + .offset = 0, + }, { + .name = "MTD2", + .size = 0x00010000, + .offset = 0x00010000, + }, { + .name = "Linux Kernel", + .size = 0x00180000, + .offset = 0x00020000, + }, { + .name = "File System", + .size = 0x00630000, + .offset = 0x001A0000, + }, { + .name = "u-boot", + .size = 0x00030000, + .offset = 0x007d0000, + } +}; + +static struct physmap_flash_data dns323_nor_flash_data = { + .width = 1, + .parts = dns323_partitions, + .nr_parts = ARRAY_SIZE(dns323_partitions) +}; + +static struct resource dns323_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = DNS323_NOR_BOOT_BASE, + .end = DNS323_NOR_BOOT_BASE + DNS323_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device dns323_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { .platform_data = &dns323_nor_flash_data, }, + .resource = &dns323_nor_flash_resource, + .num_resources = 1, +}; + +/**************************************************************************** + * GPIO LEDs (simple - doesn't use hardware blinking support) + */ + +static struct gpio_led dns323_leds[] = { + { + .name = "power:blue", + .gpio = DNS323_GPIO_LED_POWER, + .active_low = 1, + }, { + .name = "right:amber", + .gpio = DNS323_GPIO_LED_RIGHT_AMBER, + .active_low = 1, + }, { + .name = "left:amber", + .gpio = DNS323_GPIO_LED_LEFT_AMBER, + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data dns323_led_data = { + .num_leds = ARRAY_SIZE(dns323_leds), + .leds = dns323_leds, +}; + +static struct platform_device dns323_gpio_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { .platform_data = &dns323_led_data, }, +}; + +/**************************************************************************** + * GPIO Attached Keys + */ + +static struct gpio_keys_button dns323_buttons[] = { + { + .code = KEY_RESTART, + .gpio = DNS323_GPIO_KEY_RESET, + .desc = "Reset Button", + .active_low = 1, + }, + { + .code = KEY_POWER, + .gpio = DNS323_GPIO_KEY_POWER, + .desc = "Power Button", + .active_low = 1, + } +}; + +static struct gpio_keys_platform_data dns323_button_data = { + .buttons = dns323_buttons, + .nbuttons = ARRAY_SIZE(dns323_buttons), +}; + +static struct platform_device dns323_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { .platform_data = &dns323_button_data, }, +}; + +/**************************************************************************** + * General Setup + */ + +static struct platform_device *dns323_plat_devices[] __initdata = { + &dns323_nor_flash, + &dns323_gpio_leds, + &dns323_button_device, +}; + +/* + * On the DNS-323 the following devices are attached via I2C: + * + * i2c addr | chip | description + * 0x3e | GMT G760Af | fan speed PWM controller + * 0x48 | GMT G751-2f | temp. sensor and therm. watchdog (LM75 compatible) + * 0x68 | ST M41T80 | RTC w/ alarm + */ +static struct i2c_board_info __initdata dns323_i2c_devices[] = { + { + I2C_BOARD_INFO("g760a", 0x3e), + .type = "g760a", + }, +#if 0 + /* this entry requires the new-style driver model lm75 driver, + * for the meantime "insmod lm75.ko force_lm75=0,0x48" is needed */ + { + I2C_BOARD_INFO("lm75", 0x48), + .type = "g751", + }, +#endif + { + I2C_BOARD_INFO("rtc-m41t80", 0x68), + .type = "m41t80", + } +}; + +/* DNS-323 specific power off method */ +static void dns323_power_off(void) +{ + pr_info("%s: triggering power-off...\n", __func__); + gpio_set_value(DNS323_GPIO_POWER_OFF, 1); +} + +static void __init dns323_init(void) +{ + /* Setup basic Orion functions. Need to be called early. */ + orion_init(); + + /* setup flash mapping + * CS3 holds a 8 MB Spansion S29GL064M90TFIR4 + */ + orion_setup_cpu_win(ORION_DEV_BOOT, DNS323_NOR_BOOT_BASE, + DNS323_NOR_BOOT_SIZE, -1); + + /* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIE + * + * Open a special address decode windows for the PCIE WA. + */ + orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); + orion_write(ORION_REGS_BASE | 0x20070, + (0x7941 | (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); + + /* set MPP to 0 as D-Link's 2.6.12.6 kernel did */ + orion_write(MPP_0_7_CTRL, 0); + orion_write(MPP_8_15_CTRL, 0); + orion_write(MPP_16_19_CTRL, 0); + orion_write(MPP_DEV_CTRL, 0); + + /* Define used GPIO pins + + GPIO Map: + + | 0 | | PEX_RST_OUT (not controlled by GPIO) + | 1 | Out | right amber LED (= sata ch0 LED) (low-active) + | 2 | Out | left amber LED (= sata ch1 LED) (low-active) + | 3 | Out | //unknown// + | 4 | Out | power button LED (low-active, together with pin #5) + | 5 | Out | power button LED (low-active, together with pin #4) + | 6 | In | GMT G751-2f overtemp. shutdown signal (low-active) + | 7 | In | M41T80 nIRQ/OUT/SQW signal + | 8 | Out | triggers power off (high-active) + | 9 | In | power button switch (low-active) + | 10 | In | reset button switch (low-active) + | 11 | Out | //unknown// + | 12 | Out | //unknown// + | 13 | Out | //unknown// + | 14 | Out | //unknown// + | 15 | Out | //unknown// + */ + orion_gpio_set_valid_pins(0x07f6); + + /* register dns323 specific power-off method */ + if ((gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0) + || (gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)) + pr_err("DNS323: failed to setup power-off GPIO\n"); + + pm_power_off = dns323_power_off; + + /* register flash and other platform devices */ + platform_add_devices(dns323_plat_devices, + ARRAY_SIZE(dns323_plat_devices)); + + i2c_register_board_info(0, dns323_i2c_devices, + ARRAY_SIZE(dns323_i2c_devices)); + + orion_eth_init(&dns323_eth_data); +} + +/* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */ +MACHINE_START(DNS323, "D-Link DNS-323") + /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */ + .phys_io = ORION_REGS_BASE, + .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = dns323_init, + .map_io = orion_map_io, + .init_irq = orion_init_irq, + .timer = &orion_timer, +MACHINE_END diff --git a/arch/arm/mach-orion/gpio.c b/arch/arm/mach-orion/gpio.c new file mode 100644 index 000000000000..d5f00c86d616 --- /dev/null +++ b/arch/arm/mach-orion/gpio.c @@ -0,0 +1,225 @@ +/* + * arch/arm/mach-orion/gpio.c + * + * GPIO functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein <tzachi@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/spinlock.h> +#include <linux/bitops.h> +#include <asm/gpio.h> +#include <asm/arch/orion.h> +#include "common.h" + +static DEFINE_SPINLOCK(gpio_lock); +static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)]; +static const char *gpio_label[GPIO_MAX]; /* non null for allocated GPIOs */ + +void __init orion_gpio_set_valid_pins(u32 pins) +{ + gpio_valid[0] = pins; +} + +/* + * GENERIC_GPIO primitives + */ +int gpio_direction_input(unsigned pin) +{ + unsigned long flags; + + if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { + pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); + return -EINVAL; + } + + spin_lock_irqsave(&gpio_lock, flags); + + /* + * Some callers might have not used the gpio_request(), + * so flag this pin as requested now. + */ + if (!gpio_label[pin]) + gpio_label[pin] = "?"; + + orion_setbits(GPIO_IO_CONF, 1 << pin); + + spin_unlock_irqrestore(&gpio_lock, flags); + return 0; +} +EXPORT_SYMBOL(gpio_direction_input); + +int gpio_direction_output(unsigned pin, int value) +{ + unsigned long flags; + int mask; + + if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { + pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); + return -EINVAL; + } + + spin_lock_irqsave(&gpio_lock, flags); + + /* + * Some callers might have not used the gpio_request(), + * so flag this pin as requested now. + */ + if (!gpio_label[pin]) + gpio_label[pin] = "?"; + + mask = 1 << pin; + orion_clrbits(GPIO_BLINK_EN, mask); + if (value) + orion_setbits(GPIO_OUT, mask); + else + orion_clrbits(GPIO_OUT, mask); + orion_clrbits(GPIO_IO_CONF, mask); + + spin_unlock_irqrestore(&gpio_lock, flags); + return 0; +} +EXPORT_SYMBOL(gpio_direction_output); + +int gpio_get_value(unsigned pin) +{ + int val, mask = 1 << pin; + + if (orion_read(GPIO_IO_CONF) & mask) + val = orion_read(GPIO_DATA_IN) ^ orion_read(GPIO_IN_POL); + else + val = orion_read(GPIO_OUT); + + return val & mask; +} +EXPORT_SYMBOL(gpio_get_value); + +void gpio_set_value(unsigned pin, int value) +{ + unsigned long flags; + int mask = 1 << pin; + + spin_lock_irqsave(&gpio_lock, flags); + + orion_clrbits(GPIO_BLINK_EN, mask); + if (value) + orion_setbits(GPIO_OUT, mask); + else + orion_clrbits(GPIO_OUT, mask); + + spin_unlock_irqrestore(&gpio_lock, flags); +} +EXPORT_SYMBOL(gpio_set_value); + +void orion_gpio_set_blink(unsigned pin, int blink) +{ + unsigned long flags; + int mask = 1 << pin; + + spin_lock_irqsave(&gpio_lock, flags); + + orion_clrbits(GPIO_OUT, mask); + if (blink) + orion_setbits(GPIO_BLINK_EN, mask); + else + orion_clrbits(GPIO_BLINK_EN, mask); + + spin_unlock_irqrestore(&gpio_lock, flags); +} +EXPORT_SYMBOL(orion_gpio_set_blink); + +int gpio_request(unsigned pin, const char *label) +{ + int ret = 0; + unsigned long flags; + + if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { + pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); + return -EINVAL; + } + + spin_lock_irqsave(&gpio_lock, flags); + + if (gpio_label[pin]) { + pr_debug("%s: GPIO %d already used as %s\n", + __FUNCTION__, pin, gpio_label[pin]); + ret = -EBUSY; + } else + gpio_label[pin] = label ? label : "?"; + + spin_unlock_irqrestore(&gpio_lock, flags); + return ret; +} +EXPORT_SYMBOL(gpio_request); + +void gpio_free(unsigned pin) +{ + if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { + pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); + return; + } + + if (!gpio_label[pin]) + pr_warning("%s: GPIO %d already freed\n", __FUNCTION__, pin); + else + gpio_label[pin] = NULL; +} +EXPORT_SYMBOL(gpio_free); + +/* Debug helper */ +void gpio_display(void) +{ + int i; + + for (i = 0; i < GPIO_MAX; i++) { + printk(KERN_DEBUG "Pin-%d: ", i); + + if (!test_bit(i, gpio_valid)) { + printk("non-GPIO\n"); + } else if (!gpio_label[i]) { + printk("GPIO, free\n"); + } else { + printk("GPIO, used by %s, ", gpio_label[i]); + if (orion_read(GPIO_IO_CONF) & (1 << i)) { + printk("input, active %s, level %s, edge %s\n", + ((orion_read(GPIO_IN_POL) >> i) & 1) ? "low" : "high", + ((orion_read(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked", + ((orion_read(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked"); + } else { + printk("output, val=%d\n", (orion_read(GPIO_OUT) >> i) & 1); + } + } + } + + printk(KERN_DEBUG "MPP_0_7_CTRL (0x%08x) = 0x%08x\n", + MPP_0_7_CTRL, orion_read(MPP_0_7_CTRL)); + printk(KERN_DEBUG "MPP_8_15_CTRL (0x%08x) = 0x%08x\n", + MPP_8_15_CTRL, orion_read(MPP_8_15_CTRL)); + printk(KERN_DEBUG "MPP_16_19_CTRL (0x%08x) = 0x%08x\n", + MPP_16_19_CTRL, orion_read(MPP_16_19_CTRL)); + printk(KERN_DEBUG "MPP_DEV_CTRL (0x%08x) = 0x%08x\n", + MPP_DEV_CTRL, orion_read(MPP_DEV_CTRL)); + printk(KERN_DEBUG "GPIO_OUT (0x%08x) = 0x%08x\n", + GPIO_OUT, orion_read(GPIO_OUT)); + printk(KERN_DEBUG "GPIO_IO_CONF (0x%08x) = 0x%08x\n", + GPIO_IO_CONF, orion_read(GPIO_IO_CONF)); + printk(KERN_DEBUG "GPIO_BLINK_EN (0x%08x) = 0x%08x\n", + GPIO_BLINK_EN, orion_read(GPIO_BLINK_EN)); + printk(KERN_DEBUG "GPIO_IN_POL (0x%08x) = 0x%08x\n", + GPIO_IN_POL, orion_read(GPIO_IN_POL)); + printk(KERN_DEBUG "GPIO_DATA_IN (0x%08x) = 0x%08x\n", + GPIO_DATA_IN, orion_read(GPIO_DATA_IN)); + printk(KERN_DEBUG "GPIO_LEVEL_MASK (0x%08x) = 0x%08x\n", + GPIO_LEVEL_MASK, orion_read(GPIO_LEVEL_MASK)); + printk(KERN_DEBUG "GPIO_EDGE_CAUSE (0x%08x) = 0x%08x\n", + GPIO_EDGE_CAUSE, orion_read(GPIO_EDGE_CAUSE)); + printk(KERN_DEBUG "GPIO_EDGE_MASK (0x%08x) = 0x%08x\n", + GPIO_EDGE_MASK, orion_read(GPIO_EDGE_MASK)); +} diff --git a/arch/arm/mach-orion/irq.c b/arch/arm/mach-orion/irq.c new file mode 100644 index 000000000000..df7e12ad378b --- /dev/null +++ b/arch/arm/mach-orion/irq.c @@ -0,0 +1,241 @@ +/* + * arch/arm/mach-orion/irq.c + * + * Core IRQ functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein <tzachi@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <asm/gpio.h> +#include <asm/arch/orion.h> +#include "common.h" + +/***************************************************************************** + * Orion GPIO IRQ + * + * GPIO_IN_POL register controlls whether GPIO_DATA_IN will hold the same + * value of the line or the opposite value. + * + * Level IRQ handlers: DATA_IN is used directly as cause register. + * Interrupt are masked by LEVEL_MASK registers. + * Edge IRQ handlers: Change in DATA_IN are latched in EDGE_CAUSE. + * Interrupt are masked by EDGE_MASK registers. + * Both-edge handlers: Similar to regular Edge handlers, but also swaps + * the polarity to catch the next line transaction. + * This is a race condition that might not perfectly + * work on some use cases. + * + * Every eight GPIO lines are grouped (OR'ed) before going up to main + * cause register. + * + * EDGE cause mask + * data-in /--------| |-----| |----\ + * -----| |----- ---- to main cause reg + * X \----------------| |----/ + * polarity LEVEL mask + * + ****************************************************************************/ +static void orion_gpio_irq_ack(u32 irq) +{ + int pin = irq_to_gpio(irq); + if (irq_desc[irq].status & IRQ_LEVEL) + /* + * Mask bit for level interrupt + */ + orion_clrbits(GPIO_LEVEL_MASK, 1 << pin); + else + /* + * Clear casue bit for egde interrupt + */ + orion_clrbits(GPIO_EDGE_CAUSE, 1 << pin); +} + +static void orion_gpio_irq_mask(u32 irq) +{ + int pin = irq_to_gpio(irq); + if (irq_desc[irq].status & IRQ_LEVEL) + orion_clrbits(GPIO_LEVEL_MASK, 1 << pin); + else + orion_clrbits(GPIO_EDGE_MASK, 1 << pin); +} + +static void orion_gpio_irq_unmask(u32 irq) +{ + int pin = irq_to_gpio(irq); + if (irq_desc[irq].status & IRQ_LEVEL) + orion_setbits(GPIO_LEVEL_MASK, 1 << pin); + else + orion_setbits(GPIO_EDGE_MASK, 1 << pin); +} + +static int orion_gpio_set_irq_type(u32 irq, u32 type) +{ + int pin = irq_to_gpio(irq); + struct irq_desc *desc; + + if ((orion_read(GPIO_IO_CONF) & (1 << pin)) == 0) { + printk(KERN_ERR "orion_gpio_set_irq_type failed " + "(irq %d, pin %d).\n", irq, pin); + return -EINVAL; + } + + desc = irq_desc + irq; + + switch (type) { + case IRQT_HIGH: + desc->handle_irq = handle_level_irq; + desc->status |= IRQ_LEVEL; + orion_clrbits(GPIO_IN_POL, (1 << pin)); + break; + case IRQT_LOW: + desc->handle_irq = handle_level_irq; + desc->status |= IRQ_LEVEL; + orion_setbits(GPIO_IN_POL, (1 << pin)); + break; + case IRQT_RISING: + desc->handle_irq = handle_edge_irq; + desc->status &= ~IRQ_LEVEL; + orion_clrbits(GPIO_IN_POL, (1 << pin)); + break; + case IRQT_FALLING: + desc->handle_irq = handle_edge_irq; + desc->status &= ~IRQ_LEVEL; + orion_setbits(GPIO_IN_POL, (1 << pin)); + break; + case IRQT_BOTHEDGE: + desc->handle_irq = handle_edge_irq; + desc->status &= ~IRQ_LEVEL; + /* + * set initial polarity based on current input level + */ + if ((orion_read(GPIO_IN_POL) ^ orion_read(GPIO_DATA_IN)) + & (1 << pin)) + orion_setbits(GPIO_IN_POL, (1 << pin)); /* falling */ + else + orion_clrbits(GPIO_IN_POL, (1 << pin)); /* rising */ + + break; + default: + printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type); + return -EINVAL; + } + + desc->status &= ~IRQ_TYPE_SENSE_MASK; + desc->status |= type & IRQ_TYPE_SENSE_MASK; + + return 0; +} + +static struct irq_chip orion_gpio_irq_chip = { + .name = "Orion-IRQ-GPIO", + .ack = orion_gpio_irq_ack, + .mask = orion_gpio_irq_mask, + .unmask = orion_gpio_irq_unmask, + .set_type = orion_gpio_set_irq_type, +}; + +static void orion_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + u32 cause, offs, pin; + + BUG_ON(irq < IRQ_ORION_GPIO_0_7 || irq > IRQ_ORION_GPIO_24_31); + offs = (irq - IRQ_ORION_GPIO_0_7) * 8; + cause = (orion_read(GPIO_DATA_IN) & orion_read(GPIO_LEVEL_MASK)) | + (orion_read(GPIO_EDGE_CAUSE) & orion_read(GPIO_EDGE_MASK)); + + for (pin = offs; pin < offs + 8; pin++) { + if (cause & (1 << pin)) { + irq = gpio_to_irq(pin); + desc = irq_desc + irq; + if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { + /* Swap polarity (race with GPIO line) */ + u32 polarity = orion_read(GPIO_IN_POL); + polarity ^= 1 << pin; + orion_write(GPIO_IN_POL, polarity); + } + desc_handle_irq(irq, desc); + } + } +} + +static void __init orion_init_gpio_irq(void) +{ + int i; + struct irq_desc *desc; + + /* + * Mask and clear GPIO IRQ interrupts + */ + orion_write(GPIO_LEVEL_MASK, 0x0); + orion_write(GPIO_EDGE_MASK, 0x0); + orion_write(GPIO_EDGE_CAUSE, 0x0); + + /* + * Register chained level handlers for GPIO IRQs by default. + * User can use set_type() if he wants to use edge types handlers. + */ + for (i = IRQ_ORION_GPIO_START; i < NR_IRQS; i++) { + set_irq_chip(i, &orion_gpio_irq_chip); + set_irq_handler(i, handle_level_irq); + desc = irq_desc + i; + desc->status |= IRQ_LEVEL; + set_irq_flags(i, IRQF_VALID); + } + set_irq_chained_handler(IRQ_ORION_GPIO_0_7, orion_gpio_irq_handler); + set_irq_chained_handler(IRQ_ORION_GPIO_8_15, orion_gpio_irq_handler); + set_irq_chained_handler(IRQ_ORION_GPIO_16_23, orion_gpio_irq_handler); + set_irq_chained_handler(IRQ_ORION_GPIO_24_31, orion_gpio_irq_handler); +} + +/***************************************************************************** + * Orion Main IRQ + ****************************************************************************/ +static void orion_main_irq_mask(u32 irq) +{ + orion_clrbits(MAIN_IRQ_MASK, 1 << irq); +} + +static void orion_main_irq_unmask(u32 irq) +{ + orion_setbits(MAIN_IRQ_MASK, 1 << irq); +} + +static struct irq_chip orion_main_irq_chip = { + .name = "Orion-IRQ-Main", + .ack = orion_main_irq_mask, + .mask = orion_main_irq_mask, + .unmask = orion_main_irq_unmask, +}; + +static void __init orion_init_main_irq(void) +{ + int i; + + /* + * Mask and clear Main IRQ interrupts + */ + orion_write(MAIN_IRQ_MASK, 0x0); + orion_write(MAIN_IRQ_CAUSE, 0x0); + + /* + * Register level handler for Main IRQs + */ + for (i = 0; i < IRQ_ORION_GPIO_START; i++) { + set_irq_chip(i, &orion_main_irq_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } +} + +void __init orion_init_irq(void) +{ + orion_init_main_irq(); + orion_init_gpio_irq(); +} diff --git a/arch/arm/mach-orion/kurobox_pro-setup.c b/arch/arm/mach-orion/kurobox_pro-setup.c new file mode 100644 index 000000000000..2d812ed6b5c7 --- /dev/null +++ b/arch/arm/mach-orion/kurobox_pro-setup.c @@ -0,0 +1,234 @@ +/* + * arch/arm/mach-orion/kurobox_pro-setup.c + * + * Maintainer: Ronen Shitrit <rshitrit@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/mtd/physmap.h> +#include <linux/mtd/nand.h> +#include <linux/mv643xx_eth.h> +#include <linux/i2c.h> +#include <asm/mach-types.h> +#include <asm/gpio.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <asm/arch/orion.h> +#include <asm/arch/platform.h> +#include "common.h" + +/***************************************************************************** + * KUROBOX-PRO Info + ****************************************************************************/ + +/* + * 256K NOR flash Device bus boot chip select + */ + +#define KUROBOX_PRO_NOR_BOOT_BASE 0xf4000000 +#define KUROBOX_PRO_NOR_BOOT_SIZE SZ_256K + +/* + * 256M NAND flash on Device bus chip select 1 + */ + +#define KUROBOX_PRO_NAND_BASE 0xfc000000 +#define KUROBOX_PRO_NAND_SIZE SZ_2M + +/***************************************************************************** + * 256MB NAND Flash on Device bus CS0 + ****************************************************************************/ + +static struct mtd_partition kurobox_pro_nand_parts[] = { + { + .name = "uImage", + .offset = 0, + .size = SZ_4M, + }, + { + .name = "rootfs", + .offset = SZ_4M, + .size = SZ_64M, + }, + { + .name = "extra", + .offset = SZ_4M + SZ_64M, + .size = SZ_256M - (SZ_4M + SZ_64M), + }, +}; + +static struct resource kurobox_pro_nand_resource = { + .flags = IORESOURCE_MEM, + .start = KUROBOX_PRO_NAND_BASE, + .end = KUROBOX_PRO_NAND_BASE + KUROBOX_PRO_NAND_SIZE - 1, +}; + +static struct orion_nand_data kurobox_pro_nand_data = { + .parts = kurobox_pro_nand_parts, + .nr_parts = ARRAY_SIZE(kurobox_pro_nand_parts), + .cle = 0, + .ale = 1, + .width = 8, +}; + +static struct platform_device kurobox_pro_nand_flash = { + .name = "orion_nand", + .id = -1, + .dev = { + .platform_data = &kurobox_pro_nand_data, + }, + .resource = &kurobox_pro_nand_resource, + .num_resources = 1, +}; + +/***************************************************************************** + * 256KB NOR Flash on BOOT Device + ****************************************************************************/ + +static struct physmap_flash_data kurobox_pro_nor_flash_data = { + .width = 1, +}; + +static struct resource kurobox_pro_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = KUROBOX_PRO_NOR_BOOT_BASE, + .end = KUROBOX_PRO_NOR_BOOT_BASE + KUROBOX_PRO_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device kurobox_pro_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &kurobox_pro_nor_flash_data, + }, + .num_resources = 1, + .resource = &kurobox_pro_nor_flash_resource, +}; + +/***************************************************************************** + * PCI + ****************************************************************************/ + +static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + /* + * PCI isn't used on the Kuro + */ + if (dev->bus->number == orion_pcie_local_bus_nr()) + return IRQ_ORION_PCIE0_INT; + else + printk(KERN_ERR "kurobox_pro_pci_map_irq failed, unknown bus\n"); + + return -1; +} + +static struct hw_pci kurobox_pro_pci __initdata = { + .nr_controllers = 1, + .swizzle = pci_std_swizzle, + .setup = orion_pci_sys_setup, + .scan = orion_pci_sys_scan_bus, + .map_irq = kurobox_pro_pci_map_irq, +}; + +static int __init kurobox_pro_pci_init(void) +{ + if (machine_is_kurobox_pro()) + pci_common_init(&kurobox_pro_pci); + + return 0; +} + +subsys_initcall(kurobox_pro_pci_init); + +/***************************************************************************** + * Ethernet + ****************************************************************************/ + +static struct mv643xx_eth_platform_data kurobox_pro_eth_data = { + .phy_addr = 8, + .force_phy_addr = 1, +}; + +/***************************************************************************** + * RTC 5C372a on I2C bus + ****************************************************************************/ +static struct i2c_board_info __initdata kurobox_pro_i2c_rtc = { + .driver_name = "rtc-rs5c372", + .type = "rs5c372a", + .addr = 0x32, +}; + +/***************************************************************************** + * General Setup + ****************************************************************************/ + +static struct platform_device *kurobox_pro_devices[] __initdata = { + &kurobox_pro_nor_flash, + &kurobox_pro_nand_flash, +}; + +static void __init kurobox_pro_init(void) +{ + /* + * Setup basic Orion functions. Need to be called early. + */ + orion_init(); + + /* + * Setup the CPU address decode windows for our devices + */ + orion_setup_cpu_win(ORION_DEV_BOOT, KUROBOX_PRO_NOR_BOOT_BASE, + KUROBOX_PRO_NOR_BOOT_SIZE, -1); + orion_setup_cpu_win(ORION_DEV0, KUROBOX_PRO_NAND_BASE, + KUROBOX_PRO_NAND_SIZE, -1); + /* + * Open a special address decode windows for the PCIE WA. + */ + orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); + orion_write(ORION_REGS_BASE | 0x20070, (0x7941 | + (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); + + /* + * Setup Multiplexing Pins -- + * MPP[0-1] Not used + * MPP[2] GPIO Micon + * MPP[3] GPIO RTC + * MPP[4-5] Not used + * MPP[6] Nand Flash REn + * MPP[7] Nand Flash WEn + * MPP[8-11] Not used + * MPP[12] SATA 0 presence Indication + * MPP[13] SATA 1 presence Indication + * MPP[14] SATA 0 active Indication + * MPP[15] SATA 1 active indication + * MPP[16-19] Not used + */ + orion_write(MPP_0_7_CTRL, 0x44220003); + orion_write(MPP_8_15_CTRL, 0x55550000); + orion_write(MPP_16_19_CTRL, 0x0); + + orion_gpio_set_valid_pins(0x0000000c); + + platform_add_devices(kurobox_pro_devices, ARRAY_SIZE(kurobox_pro_devices)); + i2c_register_board_info(0, &kurobox_pro_i2c_rtc, 1); + orion_eth_init(&kurobox_pro_eth_data); +} + +MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") + /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ + .phys_io = ORION_REGS_BASE, + .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = kurobox_pro_init, + .map_io = orion_map_io, + .init_irq = orion_init_irq, + .timer = &orion_timer, +MACHINE_END diff --git a/arch/arm/mach-orion/pci.c b/arch/arm/mach-orion/pci.c new file mode 100644 index 000000000000..0498d7c69b30 --- /dev/null +++ b/arch/arm/mach-orion/pci.c @@ -0,0 +1,557 @@ +/* + * arch/arm/mach-orion/pci.c + * + * PCI and PCIE functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein <tzachi@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/pci.h> +#include <asm/mach/pci.h> +#include "common.h" + +/***************************************************************************** + * Orion has one PCIE controller and one PCI controller. + * + * Note1: The local PCIE bus number is '0'. The local PCI bus number + * follows the scanned PCIE bridged busses, if any. + * + * Note2: It is possible for PCI/PCIE agents to access many subsystem's + * space, by configuring BARs and Address Decode Windows, e.g. flashes on + * device bus, Orion registers, etc. However this code only enable the + * access to DDR banks. + ****************************************************************************/ + + +/***************************************************************************** + * PCIE controller + ****************************************************************************/ +#define PCIE_CTRL ORION_PCIE_REG(0x1a00) +#define PCIE_STAT ORION_PCIE_REG(0x1a04) +#define PCIE_DEV_ID ORION_PCIE_REG(0x0000) +#define PCIE_CMD_STAT ORION_PCIE_REG(0x0004) +#define PCIE_DEV_REV ORION_PCIE_REG(0x0008) +#define PCIE_MASK ORION_PCIE_REG(0x1910) +#define PCIE_CONF_ADDR ORION_PCIE_REG(0x18f8) +#define PCIE_CONF_DATA ORION_PCIE_REG(0x18fc) + +/* + * PCIE_STAT bits + */ +#define PCIE_STAT_LINK_DOWN 1 +#define PCIE_STAT_BUS_OFFS 8 +#define PCIE_STAT_BUS_MASK (0xff << PCIE_STAT_BUS_OFFS) +#define PCIE_STAT_DEV_OFFS 20 +#define PCIE_STAT_DEV_MASK (0x1f << PCIE_STAT_DEV_OFFS) + +/* + * PCIE_CONF_ADDR bits + */ +#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 24) | ((r) & 0xfc)) +#define PCIE_CONF_FUNC(f) (((f) & 0x3) << 8) +#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) +#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) +#define PCIE_CONF_ADDR_EN (1 << 31) + +/* + * PCIE config cycles are done by programming the PCIE_CONF_ADDR register + * and then reading the PCIE_CONF_DATA register. Need to make sure these + * transactions are atomic. + */ +static DEFINE_SPINLOCK(orion_pcie_lock); + +void orion_pcie_id(u32 *dev, u32 *rev) +{ + *dev = orion_read(PCIE_DEV_ID) >> 16; + *rev = orion_read(PCIE_DEV_REV) & 0xff; +} + +u32 orion_pcie_local_bus_nr(void) +{ + u32 stat = orion_read(PCIE_STAT); + return((stat & PCIE_STAT_BUS_MASK) >> PCIE_STAT_BUS_OFFS); +} + +static u32 orion_pcie_local_dev_nr(void) +{ + u32 stat = orion_read(PCIE_STAT); + return((stat & PCIE_STAT_DEV_MASK) >> PCIE_STAT_DEV_OFFS); +} + +static u32 orion_pcie_no_link(void) +{ + u32 stat = orion_read(PCIE_STAT); + return(stat & PCIE_STAT_LINK_DOWN); +} + +static void orion_pcie_set_bus_nr(int nr) +{ + orion_clrbits(PCIE_STAT, PCIE_STAT_BUS_MASK); + orion_setbits(PCIE_STAT, nr << PCIE_STAT_BUS_OFFS); +} + +static void orion_pcie_master_slave_enable(void) +{ + orion_setbits(PCIE_CMD_STAT, PCI_COMMAND_MASTER | + PCI_COMMAND_IO | + PCI_COMMAND_MEMORY); +} + +static void orion_pcie_enable_interrupts(void) +{ + /* + * Enable interrupts lines + * INTA[24] INTB[25] INTC[26] INTD[27] + */ + orion_setbits(PCIE_MASK, 0xf<<24); +} + +static int orion_pcie_valid_config(u32 bus, u32 dev) +{ + /* + * Don't go out when trying to access -- + * 1. our own device + * 2. where there's no device connected (no link) + * 3. nonexisting devices on local bus + */ + + if ((orion_pcie_local_bus_nr() == bus) && + (orion_pcie_local_dev_nr() == dev)) + return 0; + + if (orion_pcie_no_link()) + return 0; + + if (bus == orion_pcie_local_bus_nr()) + if (((orion_pcie_local_dev_nr() == 0) && (dev != 1)) || + ((orion_pcie_local_dev_nr() != 0) && (dev != 0))) + return 0; + + return 1; +} + +static int orion_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, + int size, u32 *val) +{ + unsigned long flags; + unsigned int dev, rev, pcie_addr; + + if (orion_pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) { + *val = 0xffffffff; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + spin_lock_irqsave(&orion_pcie_lock, flags); + + orion_write(PCIE_CONF_ADDR, PCIE_CONF_BUS(bus->number) | + PCIE_CONF_DEV(PCI_SLOT(devfn)) | + PCIE_CONF_FUNC(PCI_FUNC(devfn)) | + PCIE_CONF_REG(where) | PCIE_CONF_ADDR_EN); + + orion_pcie_id(&dev, &rev); + if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) { + /* extended register space */ + pcie_addr = ORION_PCIE_WA_BASE; + pcie_addr |= PCIE_CONF_BUS(bus->number) | + PCIE_CONF_DEV(PCI_SLOT(devfn)) | + PCIE_CONF_FUNC(PCI_FUNC(devfn)) | + PCIE_CONF_REG(where); + *val = orion_read(pcie_addr); + } else + *val = orion_read(PCIE_CONF_DATA); + + if (size == 1) + *val = (*val >> (8*(where & 0x3))) & 0xff; + else if (size == 2) + *val = (*val >> (8*(where & 0x3))) & 0xffff; + + spin_unlock_irqrestore(&orion_pcie_lock, flags); + + return PCIBIOS_SUCCESSFUL; +} + + +static int orion_pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, + int size, u32 val) +{ + unsigned long flags; + int ret; + + if (orion_pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) + return PCIBIOS_DEVICE_NOT_FOUND; + + spin_lock_irqsave(&orion_pcie_lock, flags); + + ret = PCIBIOS_SUCCESSFUL; + + orion_write(PCIE_CONF_ADDR, PCIE_CONF_BUS(bus->number) | + PCIE_CONF_DEV(PCI_SLOT(devfn)) | + PCIE_CONF_FUNC(PCI_FUNC(devfn)) | + PCIE_CONF_REG(where) | PCIE_CONF_ADDR_EN); + + if (size == 4) { + __raw_writel(val, PCIE_CONF_DATA); + } else if (size == 2) { + __raw_writew(val, PCIE_CONF_DATA + (where & 0x3)); + } else if (size == 1) { + __raw_writeb(val, PCIE_CONF_DATA + (where & 0x3)); + } else { + ret = PCIBIOS_BAD_REGISTER_NUMBER; + } + + spin_unlock_irqrestore(&orion_pcie_lock, flags); + + return ret; +} + +struct pci_ops orion_pcie_ops = { + .read = orion_pcie_rd_conf, + .write = orion_pcie_wr_conf, +}; + + +static int orion_pcie_setup(struct pci_sys_data *sys) +{ + struct resource *res; + + /* + * Master + Slave enable + */ + orion_pcie_master_slave_enable(); + + /* + * Enable interrupts lines A-D + */ + orion_pcie_enable_interrupts(); + + /* + * Request resource + */ + res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); + if (!res) + panic("orion_pci_setup unable to alloc resources"); + + /* + * IORESOURCE_IO + */ + res[0].name = "PCI-EX I/O Space"; + res[0].flags = IORESOURCE_IO; + res[0].start = ORION_PCIE_IO_REMAP; + res[0].end = res[0].start + ORION_PCIE_IO_SIZE - 1; + if (request_resource(&ioport_resource, &res[0])) + panic("Request PCIE IO resource failed\n"); + sys->resource[0] = &res[0]; + + /* + * IORESOURCE_MEM + */ + res[1].name = "PCI-EX Memory Space"; + res[1].flags = IORESOURCE_MEM; + res[1].start = ORION_PCIE_MEM_BASE; + res[1].end = res[1].start + ORION_PCIE_MEM_SIZE - 1; + if (request_resource(&iomem_resource, &res[1])) + panic("Request PCIE Memory resource failed\n"); + sys->resource[1] = &res[1]; + + sys->resource[2] = NULL; + sys->io_offset = 0; + + return 1; +} + +/***************************************************************************** + * PCI controller + ****************************************************************************/ +#define PCI_MODE ORION_PCI_REG(0xd00) +#define PCI_CMD ORION_PCI_REG(0xc00) +#define PCI_P2P_CONF ORION_PCI_REG(0x1d14) +#define PCI_CONF_ADDR ORION_PCI_REG(0xc78) +#define PCI_CONF_DATA ORION_PCI_REG(0xc7c) + +/* + * PCI_MODE bits + */ +#define PCI_MODE_64BIT (1 << 2) +#define PCI_MODE_PCIX ((1 << 4) | (1 << 5)) + +/* + * PCI_CMD bits + */ +#define PCI_CMD_HOST_REORDER (1 << 29) + +/* + * PCI_P2P_CONF bits + */ +#define PCI_P2P_BUS_OFFS 16 +#define PCI_P2P_BUS_MASK (0xff << PCI_P2P_BUS_OFFS) +#define PCI_P2P_DEV_OFFS 24 +#define PCI_P2P_DEV_MASK (0x1f << PCI_P2P_DEV_OFFS) + +/* + * PCI_CONF_ADDR bits + */ +#define PCI_CONF_REG(reg) ((reg) & 0xfc) +#define PCI_CONF_FUNC(func) (((func) & 0x3) << 8) +#define PCI_CONF_DEV(dev) (((dev) & 0x1f) << 11) +#define PCI_CONF_BUS(bus) (((bus) & 0xff) << 16) +#define PCI_CONF_ADDR_EN (1 << 31) + +/* + * Internal configuration space + */ +#define PCI_CONF_FUNC_STAT_CMD 0 +#define PCI_CONF_REG_STAT_CMD 4 +#define PCIX_STAT 0x64 +#define PCIX_STAT_BUS_OFFS 8 +#define PCIX_STAT_BUS_MASK (0xff << PCIX_STAT_BUS_OFFS) + +/* + * PCI config cycles are done by programming the PCI_CONF_ADDR register + * and then reading the PCI_CONF_DATA register. Need to make sure these + * transactions are atomic. + */ +static DEFINE_SPINLOCK(orion_pci_lock); + +u32 orion_pci_local_bus_nr(void) +{ + u32 conf = orion_read(PCI_P2P_CONF); + return((conf & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS); +} + +u32 orion_pci_local_dev_nr(void) +{ + u32 conf = orion_read(PCI_P2P_CONF); + return((conf & PCI_P2P_DEV_MASK) >> PCI_P2P_DEV_OFFS); +} + +int orion_pci_hw_rd_conf(u32 bus, u32 dev, u32 func, + u32 where, u32 size, u32 *val) +{ + unsigned long flags; + spin_lock_irqsave(&orion_pci_lock, flags); + + orion_write(PCI_CONF_ADDR, PCI_CONF_BUS(bus) | + PCI_CONF_DEV(dev) | PCI_CONF_REG(where) | + PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN); + + *val = orion_read(PCI_CONF_DATA); + + if (size == 1) + *val = (*val >> (8*(where & 0x3))) & 0xff; + else if (size == 2) + *val = (*val >> (8*(where & 0x3))) & 0xffff; + + spin_unlock_irqrestore(&orion_pci_lock, flags); + + return PCIBIOS_SUCCESSFUL; +} + +int orion_pci_hw_wr_conf(u32 bus, u32 dev, u32 func, + u32 where, u32 size, u32 val) +{ + unsigned long flags; + int ret = PCIBIOS_SUCCESSFUL; + + spin_lock_irqsave(&orion_pci_lock, flags); + + orion_write(PCI_CONF_ADDR, PCI_CONF_BUS(bus) | + PCI_CONF_DEV(dev) | PCI_CONF_REG(where) | + PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN); + + if (size == 4) { + __raw_writel(val, PCI_CONF_DATA); + } else if (size == 2) { + __raw_writew(val, PCI_CONF_DATA + (where & 0x3)); + } else if (size == 1) { + __raw_writeb(val, PCI_CONF_DATA + (where & 0x3)); + } else { + ret = PCIBIOS_BAD_REGISTER_NUMBER; + } + + spin_unlock_irqrestore(&orion_pci_lock, flags); + + return ret; +} + +static int orion_pci_rd_conf(struct pci_bus *bus, u32 devfn, + int where, int size, u32 *val) +{ + /* + * Don't go out for local device + */ + if ((orion_pci_local_bus_nr() == bus->number) && + (orion_pci_local_dev_nr() == PCI_SLOT(devfn))) { + *val = 0xffffffff; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + return orion_pci_hw_rd_conf(bus->number, PCI_SLOT(devfn), + PCI_FUNC(devfn), where, size, val); +} + +static int orion_pci_wr_conf(struct pci_bus *bus, u32 devfn, + int where, int size, u32 val) +{ + /* + * Don't go out for local device + */ + if ((orion_pci_local_bus_nr() == bus->number) && + (orion_pci_local_dev_nr() == PCI_SLOT(devfn))) + return PCIBIOS_DEVICE_NOT_FOUND; + + return orion_pci_hw_wr_conf(bus->number, PCI_SLOT(devfn), + PCI_FUNC(devfn), where, size, val); +} + +struct pci_ops orion_pci_ops = { + .read = orion_pci_rd_conf, + .write = orion_pci_wr_conf, +}; + +static void orion_pci_set_bus_nr(int nr) +{ + u32 p2p = orion_read(PCI_P2P_CONF); + + if (orion_read(PCI_MODE) & PCI_MODE_PCIX) { + /* + * PCI-X mode + */ + u32 pcix_status, bus, dev; + bus = (p2p & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS; + dev = (p2p & PCI_P2P_DEV_MASK) >> PCI_P2P_DEV_OFFS; + orion_pci_hw_rd_conf(bus, dev, 0, PCIX_STAT, 4, &pcix_status); + pcix_status &= ~PCIX_STAT_BUS_MASK; + pcix_status |= (nr << PCIX_STAT_BUS_OFFS); + orion_pci_hw_wr_conf(bus, dev, 0, PCIX_STAT, 4, pcix_status); + } else { + /* + * PCI Conventional mode + */ + p2p &= ~PCI_P2P_BUS_MASK; + p2p |= (nr << PCI_P2P_BUS_OFFS); + orion_write(PCI_P2P_CONF, p2p); + } +} + +static void orion_pci_master_slave_enable(void) +{ + u32 bus_nr, dev_nr, func, reg, val; + + bus_nr = orion_pci_local_bus_nr(); + dev_nr = orion_pci_local_dev_nr(); + func = PCI_CONF_FUNC_STAT_CMD; + reg = PCI_CONF_REG_STAT_CMD; + orion_pci_hw_rd_conf(bus_nr, dev_nr, func, reg, 4, &val); + val |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + orion_pci_hw_wr_conf(bus_nr, dev_nr, func, reg, 4, val | 0x7); +} + +static int orion_pci_setup(struct pci_sys_data *sys) +{ + struct resource *res; + + /* + * Master + Slave enable + */ + orion_pci_master_slave_enable(); + + /* + * Force ordering + */ + orion_setbits(PCI_CMD, PCI_CMD_HOST_REORDER); + + /* + * Request resources + */ + res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); + if (!res) + panic("orion_pci_setup unable to alloc resources"); + + /* + * IORESOURCE_IO + */ + res[0].name = "PCI I/O Space"; + res[0].flags = IORESOURCE_IO; + res[0].start = ORION_PCI_IO_REMAP; + res[0].end = res[0].start + ORION_PCI_IO_SIZE - 1; + if (request_resource(&ioport_resource, &res[0])) + panic("Request PCI IO resource failed\n"); + sys->resource[0] = &res[0]; + + /* + * IORESOURCE_MEM + */ + res[1].name = "PCI Memory Space"; + res[1].flags = IORESOURCE_MEM; + res[1].start = ORION_PCI_MEM_BASE; + res[1].end = res[1].start + ORION_PCI_MEM_SIZE - 1; + if (request_resource(&iomem_resource, &res[1])) + panic("Request PCI Memory resource failed\n"); + sys->resource[1] = &res[1]; + + sys->resource[2] = NULL; + sys->io_offset = 0; + + return 1; +} + + +/***************************************************************************** + * General PCIE + PCI + ****************************************************************************/ +int orion_pci_sys_setup(int nr, struct pci_sys_data *sys) +{ + int ret = 0; + + if (nr == 0) { + /* + * PCIE setup + */ + orion_pcie_set_bus_nr(0); + ret = orion_pcie_setup(sys); + } else if (nr == 1) { + /* + * PCI setup + */ + ret = orion_pci_setup(sys); + } + + return ret; +} + +struct pci_bus *orion_pci_sys_scan_bus(int nr, struct pci_sys_data *sys) +{ + struct pci_ops *ops; + struct pci_bus *bus; + + + if (nr == 0) { + u32 pci_bus; + /* + * PCIE scan + */ + ops = &orion_pcie_ops; + bus = pci_scan_bus(sys->busnr, ops, sys); + /* + * Set local PCI bus number to follow PCIE bridges (if any) + */ + pci_bus = bus->number + bus->subordinate - bus->secondary + 1; + orion_pci_set_bus_nr(pci_bus); + } else if (nr == 1) { + /* + * PCI scan + */ + ops = &orion_pci_ops; + bus = pci_scan_bus(sys->busnr, ops, sys); + } else { + BUG(); + bus = NULL; + } + + return bus; +} diff --git a/arch/arm/mach-orion/rd88f5182-setup.c b/arch/arm/mach-orion/rd88f5182-setup.c new file mode 100644 index 000000000000..026d74325d01 --- /dev/null +++ b/arch/arm/mach-orion/rd88f5182-setup.c @@ -0,0 +1,306 @@ +/* + * arch/arm/mach-orion/rd88f5182-setup.c + * + * Marvell Orion-NAS Reference Design Setup + * + * Maintainer: Ronen Shitrit <rshitrit@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/mtd/physmap.h> +#include <linux/mv643xx_eth.h> +#include <linux/i2c.h> +#include <asm/mach-types.h> +#include <asm/gpio.h> +#include <asm/leds.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <asm/arch/orion.h> +#include <asm/arch/platform.h> +#include "common.h" + +/***************************************************************************** + * RD-88F5182 Info + ****************************************************************************/ + +/* + * 512K NOR flash Device bus boot chip select + */ + +#define RD88F5182_NOR_BOOT_BASE 0xf4000000 +#define RD88F5182_NOR_BOOT_SIZE SZ_512K + +/* + * 16M NOR flash on Device bus chip select 1 + */ + +#define RD88F5182_NOR_BASE 0xfc000000 +#define RD88F5182_NOR_SIZE SZ_16M + +/* + * PCI + */ + +#define RD88F5182_PCI_SLOT0_OFFS 7 +#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7 +#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6 + +/* + * GPIO Debug LED + */ + +#define RD88F5182_GPIO_DBG_LED 0 + +/***************************************************************************** + * 16M NOR Flash on Device bus CS1 + ****************************************************************************/ + +static struct physmap_flash_data rd88f5182_nor_flash_data = { + .width = 1, +}; + +static struct resource rd88f5182_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = RD88F5182_NOR_BASE, + .end = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1, +}; + +static struct platform_device rd88f5182_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &rd88f5182_nor_flash_data, + }, + .num_resources = 1, + .resource = &rd88f5182_nor_flash_resource, +}; + +#ifdef CONFIG_LEDS + +/***************************************************************************** + * Use GPIO debug led as CPU active indication + ****************************************************************************/ + +static void rd88f5182_dbgled_event(led_event_t evt) +{ + int val; + + if (evt == led_idle_end) + val = 1; + else if (evt == led_idle_start) + val = 0; + else + return; + + gpio_set_value(RD88F5182_GPIO_DBG_LED, val); +} + +static int __init rd88f5182_dbgled_init(void) +{ + int pin; + + if (machine_is_rd88f5182()) { + pin = RD88F5182_GPIO_DBG_LED; + + if (gpio_request(pin, "DBGLED") == 0) { + if (gpio_direction_output(pin, 0) != 0) { + printk(KERN_ERR "rd88f5182_dbgled_init failed " + "to set output pin %d\n", pin); + gpio_free(pin); + return 0; + } + } else { + printk(KERN_ERR "rd88f5182_dbgled_init failed " + "to request gpio %d\n", pin); + return 0; + } + + leds_event = rd88f5182_dbgled_event; + } + return 0; +} + +__initcall(rd88f5182_dbgled_init); + +#endif + +/***************************************************************************** + * PCI + ****************************************************************************/ + +void __init rd88f5182_pci_preinit(void) +{ + int pin; + + /* + * Configure PCI GPIO IRQ pins + */ + pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; + if (gpio_request(pin, "PCI IntA") == 0) { + if (gpio_direction_input(pin) == 0) { + set_irq_type(gpio_to_irq(pin), IRQT_LOW); + } else { + printk(KERN_ERR "rd88f5182_pci_preinit faield to " + "set_irq_type pin %d\n", pin); + gpio_free(pin); + } + } else { + printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); + } + + pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; + if (gpio_request(pin, "PCI IntB") == 0) { + if (gpio_direction_input(pin) == 0) { + set_irq_type(gpio_to_irq(pin), IRQT_LOW); + } else { + printk(KERN_ERR "rd88f5182_pci_preinit faield to " + "set_irq_type pin %d\n", pin); + gpio_free(pin); + } + } else { + printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin); + } +} + +static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + /* + * PCI-E isn't used on the RD2 + */ + if (dev->bus->number == orion_pcie_local_bus_nr()) + return IRQ_ORION_PCIE0_INT; + + /* + * PCI IRQs are connected via GPIOs + */ + switch (slot - RD88F5182_PCI_SLOT0_OFFS) { + case 0: + if (pin == 1) + return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN); + else + return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN); + default: + return -1; + } +} + +static struct hw_pci rd88f5182_pci __initdata = { + .nr_controllers = 2, + .preinit = rd88f5182_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = orion_pci_sys_setup, + .scan = orion_pci_sys_scan_bus, + .map_irq = rd88f5182_pci_map_irq, +}; + +static int __init rd88f5182_pci_init(void) +{ + if (machine_is_rd88f5182()) + pci_common_init(&rd88f5182_pci); + + return 0; +} + +subsys_initcall(rd88f5182_pci_init); + +/***************************************************************************** + * Ethernet + ****************************************************************************/ + +static struct mv643xx_eth_platform_data rd88f5182_eth_data = { + .phy_addr = 8, + .force_phy_addr = 1, +}; + +/***************************************************************************** + * RTC DS1338 on I2C bus + ****************************************************************************/ +static struct i2c_board_info __initdata rd88f5182_i2c_rtc = { + .driver_name = "rtc-ds1307", + .type = "ds1338", + .addr = 0x68, +}; + +/***************************************************************************** + * General Setup + ****************************************************************************/ + +static struct platform_device *rd88f5182_devices[] __initdata = { + &rd88f5182_nor_flash, +}; + +static void __init rd88f5182_init(void) +{ + /* + * Setup basic Orion functions. Need to be called early. + */ + orion_init(); + + /* + * Setup the CPU address decode windows for our devices + */ + orion_setup_cpu_win(ORION_DEV_BOOT, RD88F5182_NOR_BOOT_BASE, + RD88F5182_NOR_BOOT_SIZE, -1); + orion_setup_cpu_win(ORION_DEV1, RD88F5182_NOR_BASE, + RD88F5182_NOR_SIZE, -1); + + /* + * Open a special address decode windows for the PCIE WA. + */ + orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); + orion_write(ORION_REGS_BASE | 0x20070, (0x7941 | + (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); + + /* + * Setup Multiplexing Pins -- + * MPP[0] Debug Led (GPIO - Out) + * MPP[1] Debug Led (GPIO - Out) + * MPP[2] N/A + * MPP[3] RTC_Int (GPIO - In) + * MPP[4] GPIO + * MPP[5] GPIO + * MPP[6] PCI_intA (GPIO - In) + * MPP[7] PCI_intB (GPIO - In) + * MPP[8-11] N/A + * MPP[12] SATA 0 presence Indication + * MPP[13] SATA 1 presence Indication + * MPP[14] SATA 0 active Indication + * MPP[15] SATA 1 active indication + * MPP[16-19] Not used + * MPP[20] PCI Clock to MV88F5182 + * MPP[21] PCI Clock to mini PCI CON11 + * MPP[22] USB 0 over current indication + * MPP[23] USB 1 over current indication + * MPP[24] USB 1 over current enable + * MPP[25] USB 0 over current enable + */ + + orion_write(MPP_0_7_CTRL, 0x00000003); + orion_write(MPP_8_15_CTRL, 0x55550000); + orion_write(MPP_16_19_CTRL, 0x5555); + + orion_gpio_set_valid_pins(0x000000fb); + + platform_add_devices(rd88f5182_devices, ARRAY_SIZE(rd88f5182_devices)); + i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1); + orion_eth_init(&rd88f5182_eth_data); +} + +MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") + /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ + .phys_io = ORION_REGS_BASE, + .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = rd88f5182_init, + .map_io = orion_map_io, + .init_irq = orion_init_irq, + .timer = &orion_timer, +MACHINE_END diff --git a/arch/arm/mach-orion/time.c b/arch/arm/mach-orion/time.c new file mode 100644 index 000000000000..bd4262da4f40 --- /dev/null +++ b/arch/arm/mach-orion/time.c @@ -0,0 +1,181 @@ +/* + * arch/arm/mach-orion/time.c + * + * Core time functions for Marvell Orion System On Chip + * + * Maintainer: Tzachi Perelstein <tzachi@marvell.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/clockchips.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <asm/mach/time.h> +#include <asm/arch/orion.h> +#include "common.h" + +/* + * Timer0: clock_event_device, Tick. + * Timer1: clocksource, Free running. + * WatchDog: Not used. + * + * Timers are counting down. + */ +#define CLOCKEVENT 0 +#define CLOCKSOURCE 1 + +/* + * Timers bits + */ +#define BRIDGE_INT_TIMER(x) (1 << ((x) + 1)) +#define TIMER_EN(x) (1 << ((x) * 2)) +#define TIMER_RELOAD_EN(x) (1 << (((x) * 2) + 1)) +#define BRIDGE_INT_TIMER_WD (1 << 3) +#define TIMER_WD_EN (1 << 4) +#define TIMER_WD_RELOAD_EN (1 << 5) + +static cycle_t orion_clksrc_read(void) +{ + return (0xffffffff - orion_read(TIMER_VAL(CLOCKSOURCE))); +} + +static struct clocksource orion_clksrc = { + .name = "orion_clocksource", + .shift = 20, + .rating = 300, + .read = orion_clksrc_read, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static int +orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev) +{ + unsigned long flags; + + if (delta == 0) + return -ETIME; + + local_irq_save(flags); + + /* + * Clear and enable timer interrupt bit + */ + orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT)); + orion_setbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT)); + + /* + * Setup new timer value + */ + orion_write(TIMER_VAL(CLOCKEVENT), delta); + + /* + * Disable auto reload and kickoff the timer + */ + orion_clrbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT)); + orion_setbits(TIMER_CTRL, TIMER_EN(CLOCKEVENT)); + + local_irq_restore(flags); + + return 0; +} + +static void +orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) +{ + unsigned long flags; + + local_irq_save(flags); + + if (mode == CLOCK_EVT_MODE_PERIODIC) { + /* + * Setup latch cycles in timer and enable reload interrupt. + */ + orion_write(TIMER_VAL_RELOAD(CLOCKEVENT), LATCH); + orion_write(TIMER_VAL(CLOCKEVENT), LATCH); + orion_setbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT)); + orion_setbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT) | + TIMER_EN(CLOCKEVENT)); + } else { + /* + * Disable timer and interrupt + */ + orion_clrbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT)); + orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT)); + orion_clrbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT) | + TIMER_EN(CLOCKEVENT)); + } + + local_irq_restore(flags); +} + +static struct clock_event_device orion_clkevt = { + .name = "orion_tick", + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, + .rating = 300, + .cpumask = CPU_MASK_CPU0, + .set_next_event = orion_clkevt_next_event, + .set_mode = orion_clkevt_mode, +}; + +static irqreturn_t orion_timer_interrupt(int irq, void *dev_id) +{ + /* + * Clear cause bit and do event + */ + orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT)); + orion_clkevt.event_handler(&orion_clkevt); + return IRQ_HANDLED; +} + +static struct irqaction orion_timer_irq = { + .name = "orion_tick", + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = orion_timer_interrupt +}; + +static void orion_timer_init(void) +{ + /* + * Setup clocksource free running timer (no interrupt on reload) + */ + orion_write(TIMER_VAL(CLOCKSOURCE), 0xffffffff); + orion_write(TIMER_VAL_RELOAD(CLOCKSOURCE), 0xffffffff); + orion_clrbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKSOURCE)); + orion_setbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKSOURCE) | + TIMER_EN(CLOCKSOURCE)); + + /* + * Register clocksource + */ + orion_clksrc.mult = + clocksource_hz2mult(CLOCK_TICK_RATE, orion_clksrc.shift); + + clocksource_register(&orion_clksrc); + + /* + * Connect and enable tick handler + */ + setup_irq(IRQ_ORION_BRIDGE, &orion_timer_irq); + + /* + * Register clockevent + */ + orion_clkevt.mult = + div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, orion_clkevt.shift); + orion_clkevt.max_delta_ns = + clockevent_delta2ns(0xfffffffe, &orion_clkevt); + orion_clkevt.min_delta_ns = + clockevent_delta2ns(1, &orion_clkevt); + + clockevents_register_device(&orion_clkevt); +} + +struct sys_timer orion_timer = { + .init = orion_timer_init, +}; diff --git a/arch/arm/mach-orion/ts209-setup.c b/arch/arm/mach-orion/ts209-setup.c new file mode 100644 index 000000000000..e3e930efd155 --- /dev/null +++ b/arch/arm/mach-orion/ts209-setup.c @@ -0,0 +1,335 @@ +/* + * QNAP TS-109/TS-209 Board Setup + * + * Maintainer: Byron Bradley <byron.bbradley@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/pci.h> +#include <linux/irq.h> +#include <linux/mtd/physmap.h> +#include <linux/mtd/nand.h> +#include <linux/mv643xx_eth.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> +#include <linux/i2c.h> +#include <linux/serial_reg.h> +#include <asm/mach-types.h> +#include <asm/gpio.h> +#include <asm/mach/arch.h> +#include <asm/mach/pci.h> +#include <asm/arch/orion.h> +#include <asm/arch/platform.h> +#include "common.h" + +#define QNAP_TS209_NOR_BOOT_BASE 0xf4000000 +#define QNAP_TS209_NOR_BOOT_SIZE SZ_8M + +/**************************************************************************** + * 8MiB NOR flash. The struct mtd_partition is not in the same order as the + * partitions on the device because we want to keep compatability with + * existing QNAP firmware. + * + * Layout as used by QNAP: + * [2] 0x00000000-0x00200000 : "Kernel" + * [3] 0x00200000-0x00600000 : "RootFS1" + * [4] 0x00600000-0x00700000 : "RootFS2" + * [6] 0x00700000-0x00760000 : "NAS Config" (read-only) + * [5] 0x00760000-0x00780000 : "U-Boot Config" + * [1] 0x00780000-0x00800000 : "U-Boot" (read-only) + ***************************************************************************/ +static struct mtd_partition qnap_ts209_partitions[] = { + { + .name = "U-Boot", + .size = 0x00080000, + .offset = 0x00780000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "Kernel", + .size = 0x00200000, + .offset = 0, + }, { + .name = "RootFS1", + .size = 0x00400000, + .offset = 0x00200000, + }, { + .name = "RootFS2", + .size = 0x00100000, + .offset = 0x00600000, + }, { + .name = "U-Boot Config", + .size = 0x00020000, + .offset = 0x00760000, + }, { + .name = "NAS Config", + .size = 0x00060000, + .offset = 0x00700000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct physmap_flash_data qnap_ts209_nor_flash_data = { + .width = 1, + .parts = qnap_ts209_partitions, + .nr_parts = ARRAY_SIZE(qnap_ts209_partitions) +}; + +static struct resource qnap_ts209_nor_flash_resource = { + .flags = IORESOURCE_MEM, + .start = QNAP_TS209_NOR_BOOT_BASE, + .end = QNAP_TS209_NOR_BOOT_BASE + QNAP_TS209_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device qnap_ts209_nor_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { .platform_data = &qnap_ts209_nor_flash_data, }, + .resource = &qnap_ts209_nor_flash_resource, + .num_resources = 1, +}; + +/***************************************************************************** + * PCI + ****************************************************************************/ + +#define QNAP_TS209_PCI_SLOT0_OFFS 7 +#define QNAP_TS209_PCI_SLOT0_IRQ_PIN 6 +#define QNAP_TS209_PCI_SLOT1_IRQ_PIN 7 + +void __init qnap_ts209_pci_preinit(void) +{ + int pin; + + /* + * Configure PCI GPIO IRQ pins + */ + pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; + if (gpio_request(pin, "PCI Int1") == 0) { + if (gpio_direction_input(pin) == 0) { + set_irq_type(gpio_to_irq(pin), IRQT_LOW); + } else { + printk(KERN_ERR "qnap_ts209_pci_preinit failed to " + "set_irq_type pin %d\n", pin); + gpio_free(pin); + } + } else { + printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request " + "%d\n", pin); + } + + pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; + if (gpio_request(pin, "PCI Int2") == 0) { + if (gpio_direction_input(pin) == 0) { + set_irq_type(gpio_to_irq(pin), IRQT_LOW); + } else { + printk(KERN_ERR "qnap_ts209_pci_preinit failed " + "to set_irq_type pin %d\n", pin); + gpio_free(pin); + } + } else { + printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request " + "%d\n", pin); + } +} + +static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + /* + * PCIE IRQ is connected internally (not GPIO) + */ + if (dev->bus->number == orion_pcie_local_bus_nr()) + return IRQ_ORION_PCIE0_INT; + + /* + * PCI IRQs are connected via GPIOs + */ + switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) { + case 0: + return gpio_to_irq(QNAP_TS209_PCI_SLOT0_IRQ_PIN); + case 1: + return gpio_to_irq(QNAP_TS209_PCI_SLOT1_IRQ_PIN); + default: + return -1; + } +} + +static struct hw_pci qnap_ts209_pci __initdata = { + .nr_controllers = 2, + .preinit = qnap_ts209_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = orion_pci_sys_setup, + .scan = orion_pci_sys_scan_bus, + .map_irq = qnap_ts209_pci_map_irq, +}; + +static int __init qnap_ts209_pci_init(void) +{ + if (machine_is_ts_x09()) + pci_common_init(&qnap_ts209_pci); + + return 0; +} + +subsys_initcall(qnap_ts209_pci_init); + +/***************************************************************************** + * Ethernet + ****************************************************************************/ + +static struct mv643xx_eth_platform_data qnap_ts209_eth_data = { + .phy_addr = 8, + .force_phy_addr = 1, +}; + +/***************************************************************************** + * RTC S35390A on I2C bus + ****************************************************************************/ +static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = { + .driver_name = "rtc-s35390a", + .addr = 0x30, +}; + +/**************************************************************************** + * GPIO Attached Keys + * Power button is attached to the PIC microcontroller + ****************************************************************************/ + +#define QNAP_TS209_GPIO_KEY_MEDIA 1 +#define QNAP_TS209_GPIO_KEY_RESET 2 + +static struct gpio_keys_button qnap_ts209_buttons[] = { + { + .code = KEY_RESTART, + .gpio = QNAP_TS209_GPIO_KEY_MEDIA, + .desc = "USB Copy Button", + .active_low = 1, + }, + { + .code = KEY_POWER, + .gpio = QNAP_TS209_GPIO_KEY_RESET, + .desc = "Reset Button", + .active_low = 1, + } +}; + +static struct gpio_keys_platform_data qnap_ts209_button_data = { + .buttons = qnap_ts209_buttons, + .nbuttons = ARRAY_SIZE(qnap_ts209_buttons), +}; + +static struct platform_device qnap_ts209_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { .platform_data = &qnap_ts209_button_data, }, +}; + +/***************************************************************************** + * General Setup + ****************************************************************************/ + +static struct platform_device *qnap_ts209_devices[] __initdata = { + &qnap_ts209_nor_flash, + &qnap_ts209_button_device, +}; + +/* + * QNAP TS-[12]09 specific power off method via UART1-attached PIC + */ + +#define UART1_REG(x) (UART1_BASE + ((UART_##x) << 2)) + +static void qnap_ts209_power_off(void) +{ + /* 19200 baud divisor */ + const unsigned divisor = ((ORION_TCLK + (8 * 19200)) / (16 * 19200)); + + pr_info("%s: triggering power-off...\n", __func__); + + /* hijack uart1 and reset into sane state (19200,8n1) */ + orion_write(UART1_REG(LCR), 0x83); + orion_write(UART1_REG(DLL), divisor & 0xff); + orion_write(UART1_REG(DLM), (divisor >> 8) & 0xff); + orion_write(UART1_REG(LCR), 0x03); + orion_write(UART1_REG(IER), 0x00); + orion_write(UART1_REG(FCR), 0x00); + orion_write(UART1_REG(MCR), 0x00); + + /* send the power-off command 'A' to PIC */ + orion_write(UART1_REG(TX), 'A'); +} + +static void __init qnap_ts209_init(void) +{ + /* + * Setup basic Orion functions. Need to be called early. + */ + orion_init(); + + /* + * Setup flash mapping + */ + orion_setup_cpu_win(ORION_DEV_BOOT, QNAP_TS209_NOR_BOOT_BASE, + QNAP_TS209_NOR_BOOT_SIZE, -1); + + /* + * Open a special address decode windows for the PCIE WA. + */ + orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); + orion_write(ORION_REGS_BASE | 0x20070, (0x7941 | + (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); + + /* + * Setup Multiplexing Pins -- + * MPP[0] Reserved + * MPP[1] USB copy button (0 active) + * MPP[2] Load defaults button (0 active) + * MPP[3] GPIO RTC + * MPP[4-5] Reserved + * MPP[6] PCI Int A + * MPP[7] PCI Int B + * MPP[8-11] Reserved + * MPP[12] SATA 0 presence + * MPP[13] SATA 1 presence + * MPP[14] SATA 0 active + * MPP[15] SATA 1 active + * MPP[16] UART1 RXD + * MPP[17] UART1 TXD + * MPP[18] SW_RST (0 active) + * MPP[19] Reserved + * MPP[20] PCI clock 0 + * MPP[21] PCI clock 1 + * MPP[22] USB 0 over current + * MPP[23-25] Reserved + */ + orion_write(MPP_0_7_CTRL, 0x3); + orion_write(MPP_8_15_CTRL, 0x55550000); + orion_write(MPP_16_19_CTRL, 0x5500); + orion_gpio_set_valid_pins(0x3cc0fff); + + /* register ts209 specific power-off method */ + pm_power_off = qnap_ts209_power_off; + + platform_add_devices(qnap_ts209_devices, + ARRAY_SIZE(qnap_ts209_devices)); + i2c_register_board_info(0, &qnap_ts209_i2c_rtc, 1); + orion_eth_init(&qnap_ts209_eth_data); +} + +MACHINE_START(TS209, "QNAP TS-109/TS-209") + /* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */ + .phys_io = ORION_REGS_BASE, + .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .init_machine = qnap_ts209_init, + .map_io = orion_map_io, + .init_irq = orion_init_irq, + .timer = &orion_timer, +MACHINE_END diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c index 67e05f005a6b..6d4ca8fc0cb4 100644 --- a/arch/arm/mach-pnx4008/time.c +++ b/arch/arm/mach-pnx4008/time.c @@ -51,8 +51,6 @@ static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id) { if (__raw_readl(HSTIM_INT) & MATCH0_INT) { - write_seqlock(&xtime_lock); - do { timer_tick(); @@ -73,8 +71,6 @@ static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id) } while ((signed) (__raw_readl(HSTIM_MATCH0) - __raw_readl(HSTIM_COUNTER)) < 0); - - write_sequnlock(&xtime_lock); } return IRQ_HANDLED; diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 656d49661a29..0908bea0f609 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -51,6 +51,50 @@ config PXA_SHARPSL SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) handheld computer. +config ARCH_PXA_ESERIES + bool "PXA based Toshiba e-series PDAs" + select PXA25x + +config MACH_E330 + bool "Toshiba e330" + default y + depends on ARCH_PXA_ESERIES + help + Say Y here if you intend to run this kernel on a Toshiba + e330 family PDA. + +config MACH_E740 + bool "Toshiba e740" + default y + depends on ARCH_PXA_ESERIES + help + Say Y here if you intend to run this kernel on a Toshiba + e740 family PDA. + +config MACH_E750 + bool "Toshiba e750" + default y + depends on ARCH_PXA_ESERIES + help + Say Y here if you intend to run this kernel on a Toshiba + e750 family PDA. + +config MACH_E400 + bool "Toshiba e400" + default y + depends on ARCH_PXA_ESERIES + help + Say Y here if you intend to run this kernel on a Toshiba + e400 family PDA. + +config MACH_E800 + bool "Toshiba e800" + default y + depends on ARCH_PXA_ESERIES + help + Say Y here if you intend to run this kernel on a Toshiba + e800 family PDA. + config MACH_TRIZEPS4 bool "Keith und Koep Trizeps4 DIMM-Module" select PXA27x @@ -59,15 +103,44 @@ config MACH_EM_X270 bool "CompuLab EM-x270 platform" select PXA27x +config MACH_COLIBRI + bool "Toradex Colibri PX27x" + select PXA27x + config MACH_ZYLONITE bool "PXA3xx Development Platform" select PXA3xx +config MACH_LITTLETON + bool "PXA3xx Form Factor Platform (aka Littleton)" + select PXA3xx + select PXA_SSP + config MACH_ARMCORE bool "CompuLab CM-X270 modules" select PXA27x select IWMMXT +config MACH_MAGICIAN + bool "Enable HTC Magician Support" + depends on ARCH_PXA + select PXA27x + select IWMMXT + +config MACH_PCM027 + bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" + select PXA27x + select IWMMXT + +endchoice + +choice + prompt "Used baseboard" + depends on MACH_PCM027 + +config MACH_PCM990_BASEBOARD + bool "PHYTEC PCM-990 development board" + endchoice if PXA_SHARPSL diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 4263527e5123..b5c916c0747d 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -3,7 +3,7 @@ # # Common support (must be linked before board specific support) -obj-y += clock.o generic.o irq.o dma.o time.o +obj-y += clock.o devices.o generic.o irq.o dma.o time.o obj-$(CONFIG_PXA25x) += pxa25x.o obj-$(CONFIG_PXA27x) += pxa27x.o obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o @@ -16,18 +16,24 @@ obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o +obj-$(CONFIG_MACH_COLIBRI) += colibri.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o +obj-$(CONFIG_MACH_PCM027) += pcm027.o +obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o obj-$(CONFIG_MACH_TOSA) += tosa.o obj-$(CONFIG_MACH_EM_X270) += em-x270.o +obj-$(CONFIG_MACH_MAGICIAN) += magician.o +obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o ifeq ($(CONFIG_MACH_ZYLONITE),y) obj-y += zylonite.o obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o endif +obj-$(CONFIG_MACH_LITTLETON) += littleton.o obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o @@ -41,13 +47,10 @@ led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o obj-$(CONFIG_LEDS) += $(led-y) # Misc features -obj-$(CONFIG_PM) += pm.o sleep.o +obj-$(CONFIG_PM) += pm.o sleep.o standby.o +obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o obj-$(CONFIG_PXA_SSP) += ssp.o -ifeq ($(CONFIG_PXA27x),y) -obj-$(CONFIG_PM) += standby.o -endif - ifeq ($(CONFIG_PCI),y) obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o endif diff --git a/arch/arm/mach-pxa/akita-ioexp.c b/arch/arm/mach-pxa/akita-ioexp.c index 12d2fe0ceff6..254892ac30cd 100644 --- a/arch/arm/mach-pxa/akita-ioexp.c +++ b/arch/arm/mach-pxa/akita-ioexp.c @@ -29,7 +29,7 @@ #define MAX7310_TIMEOUT 0x04 /* Addresses to scan */ -static unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END }; +static const unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END }; /* I2C Magic */ I2C_CLIENT_INSMOD; diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index a16349272f54..28cfd71c032d 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c @@ -487,18 +487,15 @@ static int cmx270_mci_init(struct device *dev, /* card detect IRQ on GPIO 83 */ pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ)); - set_irq_type(CMX270_MMC_IRQ, IRQT_FALLING); err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "MMC card detect", data); - if (err) { + if (err) printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't" " request MMC card detect IRQ\n"); - return -1; - } - return 0; + return err; } static void cmx270_mci_setpower(struct device *dev, unsigned int vdd) diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c new file mode 100644 index 000000000000..6db54e31c397 --- /dev/null +++ b/arch/arm/mach-pxa/colibri.c @@ -0,0 +1,134 @@ +/* + * linux/arch/arm/mach-pxa/colibri.c + * + * Support for Toradex PXA27x based Colibri module + * Daniel Mack <daniel@caiaq.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/sysdev.h> +#include <linux/interrupt.h> +#include <linux/bitops.h> +#include <linux/ioport.h> +#include <linux/delay.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> +#include <asm/mach-types.h> +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/sizes.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> +#include <asm/mach/flash.h> +#include <asm/arch/pxa-regs.h> +#include <asm/arch/colibri.h> + +#include "generic.h" +#include "devices.h" + +/* + * Flash + */ +static struct mtd_partition colibri_partitions[] = { + { + .name = "Bootloader", + .offset = 0x00000000, + .size = 0x00040000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, { + .name = "Kernel", + .offset = 0x00040000, + .size = 0x00400000, + .mask_flags = 0 + }, { + .name = "Rootfs", + .offset = 0x00440000, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0 + } +}; + +static struct physmap_flash_data colibri_flash_data[] = { + { + .width = 4, /* bankwidth in bytes */ + .parts = colibri_partitions, + .nr_parts = ARRAY_SIZE(colibri_partitions) + } +}; + +static struct resource flash_resource = { + .start = PXA_CS0_PHYS, + .end = PXA_CS0_PHYS + SZ_32M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = colibri_flash_data, + }, + .resource = &flash_resource, + .num_resources = 1, +}; + +/* + * DM9000 Ethernet + */ +static struct resource dm9000_resources[] = { + [0] = { + .start = COLIBRI_ETH_PHYS, + .end = COLIBRI_ETH_PHYS + 3, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = COLIBRI_ETH_PHYS + 4, + .end = COLIBRI_ETH_PHYS + 4 + 500, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = COLIBRI_ETH_IRQ, + .end = COLIBRI_ETH_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device dm9000_device = { + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(dm9000_resources), + .resource = dm9000_resources, +}; + +static struct platform_device *colibri_devices[] __initdata = { + &flash_device, + &dm9000_device, +}; + +static void __init colibri_init(void) +{ + /* DM9000 LAN */ + pxa_gpio_mode(GPIO78_nCS_2_MD); + pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); + set_irq_type(COLIBRI_ETH_IRQ, IRQT_FALLING); + + platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); +} + +MACHINE_START(COLIBRI, "Toradex Colibri PXA27x") + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = COLIBRI_SDRAM_BASE + 0x100, + .init_machine = colibri_init, + .map_io = pxa_map_io, + .init_irq = pxa27x_init_irq, + .timer = &pxa_timer, +MACHINE_END diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 2363cc64fe07..9292576b83b3 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -21,6 +21,7 @@ #include <linux/mmc/host.h> #include <linux/pm.h> #include <linux/backlight.h> +#include <video/w100fb.h> #include <asm/setup.h> #include <asm/memory.h> @@ -141,6 +142,136 @@ struct corgissp_machinfo corgi_ssp_machinfo = { /* + * LCD/Framebuffer + */ +static void w100_lcdtg_suspend(struct w100fb_par *par) +{ + corgi_lcdtg_suspend(); +} + +static void w100_lcdtg_init(struct w100fb_par *par) +{ + corgi_lcdtg_hw_init(par->xres); +} + + +static struct w100_tg_info corgi_lcdtg_info = { + .change = w100_lcdtg_init, + .suspend = w100_lcdtg_suspend, + .resume = w100_lcdtg_init, +}; + +static struct w100_mem_info corgi_fb_mem = { + .ext_cntl = 0x00040003, + .sdram_mode_reg = 0x00650021, + .ext_timing_cntl = 0x10002a4a, + .io_cntl = 0x7ff87012, + .size = 0x1fffff, +}; + +static struct w100_gen_regs corgi_fb_regs = { + .lcd_format = 0x00000003, + .lcdd_cntl1 = 0x01CC0000, + .lcdd_cntl2 = 0x0003FFFF, + .genlcd_cntl1 = 0x00FFFF0D, + .genlcd_cntl2 = 0x003F3003, + .genlcd_cntl3 = 0x000102aa, +}; + +static struct w100_gpio_regs corgi_fb_gpio = { + .init_data1 = 0x000000bf, + .init_data2 = 0x00000000, + .gpio_dir1 = 0x00000000, + .gpio_oe1 = 0x03c0feff, + .gpio_dir2 = 0x00000000, + .gpio_oe2 = 0x00000000, +}; + +static struct w100_mode corgi_fb_modes[] = { +{ + .xres = 480, + .yres = 640, + .left_margin = 0x56, + .right_margin = 0x55, + .upper_margin = 0x03, + .lower_margin = 0x00, + .crtc_ss = 0x82360056, + .crtc_ls = 0xA0280000, + .crtc_gs = 0x80280028, + .crtc_vpos_gs = 0x02830002, + .crtc_rev = 0x00400008, + .crtc_dclk = 0xA0000000, + .crtc_gclk = 0x8015010F, + .crtc_goe = 0x80100110, + .crtc_ps1_active = 0x41060010, + .pll_freq = 75, + .fast_pll_freq = 100, + .sysclk_src = CLK_SRC_PLL, + .sysclk_divider = 0, + .pixclk_src = CLK_SRC_PLL, + .pixclk_divider = 2, + .pixclk_divider_rotated = 6, +},{ + .xres = 240, + .yres = 320, + .left_margin = 0x27, + .right_margin = 0x2e, + .upper_margin = 0x01, + .lower_margin = 0x00, + .crtc_ss = 0x81170027, + .crtc_ls = 0xA0140000, + .crtc_gs = 0xC0140014, + .crtc_vpos_gs = 0x00010141, + .crtc_rev = 0x00400008, + .crtc_dclk = 0xA0000000, + .crtc_gclk = 0x8015010F, + .crtc_goe = 0x80100110, + .crtc_ps1_active = 0x41060010, + .pll_freq = 0, + .fast_pll_freq = 0, + .sysclk_src = CLK_SRC_XTAL, + .sysclk_divider = 0, + .pixclk_src = CLK_SRC_XTAL, + .pixclk_divider = 1, + .pixclk_divider_rotated = 1, +}, + +}; + +static struct w100fb_mach_info corgi_fb_info = { + .tg = &corgi_lcdtg_info, + .init_mode = INIT_MODE_ROTATED, + .mem = &corgi_fb_mem, + .regs = &corgi_fb_regs, + .modelist = &corgi_fb_modes[0], + .num_modes = 2, + .gpio = &corgi_fb_gpio, + .xtal_freq = 12500000, + .xtal_dbl = 0, +}; + +static struct resource corgi_fb_resources[] = { + [0] = { + .start = 0x08000000, + .end = 0x08ffffff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device corgifb_device = { + .name = "w100fb", + .id = -1, + .num_resources = ARRAY_SIZE(corgi_fb_resources), + .resource = corgi_fb_resources, + .dev = { + .platform_data = &corgi_fb_info, + .parent = &corgissp_device.dev, + }, + +}; + + +/* * Corgi Backlight Device */ static void corgi_bl_kick_battery(void) @@ -154,6 +285,21 @@ static void corgi_bl_kick_battery(void) } } +static void corgi_bl_set_intensity(int intensity) +{ + if (intensity > 0x10) + intensity += 0x10; + + /* Bits 0-4 are accessed via the SSP interface */ + corgi_ssp_blduty_set(intensity & 0x1f); + + /* Bit 5 is via SCOOP */ + if (intensity & 0x0020) + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); + else + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); +} + static struct generic_bl_info corgi_bl_machinfo = { .name = "corgi-bl", .max_intensity = 0x2f, @@ -190,9 +336,40 @@ static struct platform_device corgiled_device = { .id = -1, }; + /* * Corgi Touch Screen Device */ +static unsigned long (*get_hsync_invperiod)(struct device *dev); + +static void inline sharpsl_wait_sync(int gpio) +{ + while((GPLR(gpio) & GPIO_bit(gpio)) == 0); + while((GPLR(gpio) & GPIO_bit(gpio)) != 0); +} + +static unsigned long corgi_get_hsync_invperiod(void) +{ + if (!get_hsync_invperiod) + get_hsync_invperiod = symbol_get(w100fb_get_hsynclen); + if (!get_hsync_invperiod) + return 0; + + return get_hsync_invperiod(&corgifb_device.dev); +} + +static void corgi_put_hsync(void) +{ + if (get_hsync_invperiod) + symbol_put(w100fb_get_hsynclen); + get_hsync_invperiod = NULL; +} + +static void corgi_wait_hsync(void) +{ + sharpsl_wait_sync(CORGI_GPIO_HSYNC); +} + static struct resource corgits_resources[] = { [0] = { .start = CORGI_IRQ_GPIO_TP_INT, @@ -202,9 +379,9 @@ static struct resource corgits_resources[] = { }; static struct corgits_machinfo corgi_ts_machinfo = { - .get_hsync_len = corgi_get_hsync_len, - .put_hsync = corgi_put_hsync, - .wait_hsync = corgi_wait_hsync, + .get_hsync_invperiod = corgi_get_hsync_invperiod, + .put_hsync = corgi_put_hsync, + .wait_hsync = corgi_wait_hsync, }; static struct platform_device corgits_device = { @@ -242,12 +419,10 @@ static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, vo err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC card detect", data); - if (err) { + if (err) printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - return -1; - } - return 0; + return err; } static void corgi_mci_setpower(struct device *dev, unsigned int vdd) diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c index 365b9435f748..9328df37afd1 100644 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ b/arch/arm/mach-pxa/corgi_lcd.c @@ -173,7 +173,7 @@ static void lcdtg_set_phadadj(int mode) static int lcd_inited; -static void lcdtg_hw_init(int mode) +void corgi_lcdtg_hw_init(int mode) { if (!lcd_inited) { int comadj; @@ -254,7 +254,7 @@ static void lcdtg_hw_init(int mode) } } -static void lcdtg_suspend(void) +void corgi_lcdtg_suspend(void) { /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */ mdelay(34); @@ -288,298 +288,3 @@ static void lcdtg_suspend(void) lcd_inited = 0; } - -/* - * Corgi w100 Frame Buffer Device - */ -#ifdef CONFIG_PXA_SHARP_C7xx - -#include <video/w100fb.h> - -static void w100_lcdtg_suspend(struct w100fb_par *par) -{ - lcdtg_suspend(); -} - -static void w100_lcdtg_init(struct w100fb_par *par) -{ - lcdtg_hw_init(par->xres); -} - - -static struct w100_tg_info corgi_lcdtg_info = { - .change = w100_lcdtg_init, - .suspend = w100_lcdtg_suspend, - .resume = w100_lcdtg_init, -}; - -static struct w100_mem_info corgi_fb_mem = { - .ext_cntl = 0x00040003, - .sdram_mode_reg = 0x00650021, - .ext_timing_cntl = 0x10002a4a, - .io_cntl = 0x7ff87012, - .size = 0x1fffff, -}; - -static struct w100_gen_regs corgi_fb_regs = { - .lcd_format = 0x00000003, - .lcdd_cntl1 = 0x01CC0000, - .lcdd_cntl2 = 0x0003FFFF, - .genlcd_cntl1 = 0x00FFFF0D, - .genlcd_cntl2 = 0x003F3003, - .genlcd_cntl3 = 0x000102aa, -}; - -static struct w100_gpio_regs corgi_fb_gpio = { - .init_data1 = 0x000000bf, - .init_data2 = 0x00000000, - .gpio_dir1 = 0x00000000, - .gpio_oe1 = 0x03c0feff, - .gpio_dir2 = 0x00000000, - .gpio_oe2 = 0x00000000, -}; - -static struct w100_mode corgi_fb_modes[] = { -{ - .xres = 480, - .yres = 640, - .left_margin = 0x56, - .right_margin = 0x55, - .upper_margin = 0x03, - .lower_margin = 0x00, - .crtc_ss = 0x82360056, - .crtc_ls = 0xA0280000, - .crtc_gs = 0x80280028, - .crtc_vpos_gs = 0x02830002, - .crtc_rev = 0x00400008, - .crtc_dclk = 0xA0000000, - .crtc_gclk = 0x8015010F, - .crtc_goe = 0x80100110, - .crtc_ps1_active = 0x41060010, - .pll_freq = 75, - .fast_pll_freq = 100, - .sysclk_src = CLK_SRC_PLL, - .sysclk_divider = 0, - .pixclk_src = CLK_SRC_PLL, - .pixclk_divider = 2, - .pixclk_divider_rotated = 6, -},{ - .xres = 240, - .yres = 320, - .left_margin = 0x27, - .right_margin = 0x2e, - .upper_margin = 0x01, - .lower_margin = 0x00, - .crtc_ss = 0x81170027, - .crtc_ls = 0xA0140000, - .crtc_gs = 0xC0140014, - .crtc_vpos_gs = 0x00010141, - .crtc_rev = 0x00400008, - .crtc_dclk = 0xA0000000, - .crtc_gclk = 0x8015010F, - .crtc_goe = 0x80100110, - .crtc_ps1_active = 0x41060010, - .pll_freq = 0, - .fast_pll_freq = 0, - .sysclk_src = CLK_SRC_XTAL, - .sysclk_divider = 0, - .pixclk_src = CLK_SRC_XTAL, - .pixclk_divider = 1, - .pixclk_divider_rotated = 1, -}, - -}; - -static struct w100fb_mach_info corgi_fb_info = { - .tg = &corgi_lcdtg_info, - .init_mode = INIT_MODE_ROTATED, - .mem = &corgi_fb_mem, - .regs = &corgi_fb_regs, - .modelist = &corgi_fb_modes[0], - .num_modes = 2, - .gpio = &corgi_fb_gpio, - .xtal_freq = 12500000, - .xtal_dbl = 0, -}; - -static struct resource corgi_fb_resources[] = { - [0] = { - .start = 0x08000000, - .end = 0x08ffffff, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device corgifb_device = { - .name = "w100fb", - .id = -1, - .num_resources = ARRAY_SIZE(corgi_fb_resources), - .resource = corgi_fb_resources, - .dev = { - .platform_data = &corgi_fb_info, - .parent = &corgissp_device.dev, - }, - -}; -#endif - - -/* - * Spitz PXA Frame Buffer Device - */ -#ifdef CONFIG_PXA_SHARP_Cxx00 - -#include <asm/arch/pxafb.h> - -void spitz_lcd_power(int on, struct fb_var_screeninfo *var) -{ - if (on) - lcdtg_hw_init(var->xres); - else - lcdtg_suspend(); -} - -#endif - - -/* - * Corgi/Spitz Touchscreen to LCD interface - */ -static unsigned long (*get_hsync_time)(struct device *dev); - -static void inline sharpsl_wait_sync(int gpio) -{ - while((GPLR(gpio) & GPIO_bit(gpio)) == 0); - while((GPLR(gpio) & GPIO_bit(gpio)) != 0); -} - -#ifdef CONFIG_PXA_SHARP_C7xx -unsigned long corgi_get_hsync_len(void) -{ - if (!get_hsync_time) - get_hsync_time = symbol_get(w100fb_get_hsynclen); - if (!get_hsync_time) - return 0; - - return get_hsync_time(&corgifb_device.dev); -} - -void corgi_put_hsync(void) -{ - if (get_hsync_time) - symbol_put(w100fb_get_hsynclen); - get_hsync_time = NULL; -} - -void corgi_wait_hsync(void) -{ - sharpsl_wait_sync(CORGI_GPIO_HSYNC); -} -#endif - -#ifdef CONFIG_PXA_SHARP_Cxx00 -static struct device *spitz_pxafb_dev; - -static int is_pxafb_device(struct device * dev, void * data) -{ - struct platform_device *pdev = container_of(dev, struct platform_device, dev); - - return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0); -} - -unsigned long spitz_get_hsync_len(void) -{ -#ifdef CONFIG_FB_PXA - if (!spitz_pxafb_dev) { - spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device); - if (!spitz_pxafb_dev) - return 0; - } - if (!get_hsync_time) - get_hsync_time = symbol_get(pxafb_get_hsync_time); - if (!get_hsync_time) -#endif - return 0; - - return pxafb_get_hsync_time(spitz_pxafb_dev); -} - -void spitz_put_hsync(void) -{ - put_device(spitz_pxafb_dev); - if (get_hsync_time) - symbol_put(pxafb_get_hsync_time); - spitz_pxafb_dev = NULL; - get_hsync_time = NULL; -} - -void spitz_wait_hsync(void) -{ - sharpsl_wait_sync(SPITZ_GPIO_HSYNC); -} -#endif - -/* - * Corgi/Spitz Backlight Power - */ -#ifdef CONFIG_PXA_SHARP_C7xx -void corgi_bl_set_intensity(int intensity) -{ - if (intensity > 0x10) - intensity += 0x10; - - /* Bits 0-4 are accessed via the SSP interface */ - corgi_ssp_blduty_set(intensity & 0x1f); - - /* Bit 5 is via SCOOP */ - if (intensity & 0x0020) - set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); - else - reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); -} -#endif - - -#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) -void spitz_bl_set_intensity(int intensity) -{ - if (intensity > 0x10) - intensity += 0x10; - - /* Bits 0-4 are accessed via the SSP interface */ - corgi_ssp_blduty_set(intensity & 0x1f); - - /* Bit 5 is via SCOOP */ - if (intensity & 0x0020) - reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); - else - set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); - - if (intensity) - set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); - else - reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); -} -#endif - -#ifdef CONFIG_MACH_AKITA -void akita_bl_set_intensity(int intensity) -{ - if (intensity > 0x10) - intensity += 0x10; - - /* Bits 0-4 are accessed via the SSP interface */ - corgi_ssp_blduty_set(intensity & 0x1f); - - /* Bit 5 is via IO-Expander */ - if (intensity & 0x0020) - akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); - else - akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); - - if (intensity) - akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); - else - akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); -} -#endif diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index 40dea3d5142b..efba65edcd51 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c @@ -21,6 +21,7 @@ #include <asm/arch/ssp.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/regs-ssp.h> #include "sharpsl.h" static DEFINE_SPINLOCK(corgi_ssp_lock); diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c new file mode 100644 index 000000000000..cbc583beedc8 --- /dev/null +++ b/arch/arm/mach-pxa/cpu-pxa.c @@ -0,0 +1,294 @@ +/* + * linux/arch/arm/mach-pxa/cpu-pxa.c + * + * Copyright (C) 2002,2003 Intrinsyc Software + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * History: + * 31-Jul-2002 : Initial version [FB] + * 29-Jan-2003 : added PXA255 support [FB] + * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.) + * + * Note: + * This driver may change the memory bus clock rate, but will not do any + * platform specific access timing changes... for example if you have flash + * memory connected to CS0, you will need to register a platform specific + * notifier which will adjust the memory access strobes to maintain a + * minimum strobe width. + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/sched.h> +#include <linux/init.h> +#include <linux/cpufreq.h> + +#include <asm/hardware.h> +#include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> + +#ifdef DEBUG +static unsigned int freq_debug; +MODULE_PARM(freq_debug, "i"); +MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0"); +#else +#define freq_debug 0 +#endif + +typedef struct { + unsigned int khz; + unsigned int membus; + unsigned int cccr; + unsigned int div2; +} pxa_freqs_t; + +/* Define the refresh period in mSec for the SDRAM and the number of rows */ +#define SDRAM_TREF 64 /* standard 64ms SDRAM */ +#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ +#define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32)) + +#define CCLKCFG_TURBO 0x1 +#define CCLKCFG_FCS 0x2 +#define PXA25x_MIN_FREQ 99500 +#define PXA25x_MAX_FREQ 398100 +#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2) +#define MDREFR_DRI_MASK 0xFFF + + +/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */ +static pxa_freqs_t pxa255_run_freqs[] = +{ + /* CPU MEMBUS CCCR DIV2*/ + { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */ + {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */ + {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */ + {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */ + {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */ + {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */ + {0,} +}; +#define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) + +static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1]; + +/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ +static pxa_freqs_t pxa255_turbo_freqs[] = +{ + /* CPU MEMBUS CCCR DIV2*/ + { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */ + {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */ + {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */ + {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */ + {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */ + {0,} +}; +#define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs) + +static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1]; + +extern unsigned get_clk_frequency_khz(int info); + +/* find a valid frequency point */ +static int pxa_verify_policy(struct cpufreq_policy *policy) +{ + struct cpufreq_frequency_table *pxa_freqs_table; + int ret; + + if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { + pxa_freqs_table = pxa255_run_freq_table; + } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { + pxa_freqs_table = pxa255_turbo_freq_table; + } else { + printk("CPU PXA: Unknown policy found. " + "Using CPUFREQ_POLICY_PERFORMANCE\n"); + pxa_freqs_table = pxa255_run_freq_table; + } + + ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table); + + if (freq_debug) + pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n", + policy->min, policy->max); + + return ret; +} + +static int pxa_set_target(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + struct cpufreq_frequency_table *pxa_freqs_table; + pxa_freqs_t *pxa_freq_settings; + struct cpufreq_freqs freqs; + int idx; + unsigned long flags; + unsigned int unused, preset_mdrefr, postset_mdrefr; + void *ramstart = phys_to_virt(0xa0000000); + + /* Get the current policy */ + if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { + pxa_freq_settings = pxa255_run_freqs; + pxa_freqs_table = pxa255_run_freq_table; + } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { + pxa_freq_settings = pxa255_turbo_freqs; + pxa_freqs_table = pxa255_turbo_freq_table; + } else { + printk("CPU PXA: Unknown policy found. " + "Using CPUFREQ_POLICY_PERFORMANCE\n"); + pxa_freq_settings = pxa255_run_freqs; + pxa_freqs_table = pxa255_run_freq_table; + } + + /* Lookup the next frequency */ + if (cpufreq_frequency_table_target(policy, pxa_freqs_table, + target_freq, relation, &idx)) { + return -EINVAL; + } + + freqs.old = policy->cur; + freqs.new = pxa_freq_settings[idx].khz; + freqs.cpu = policy->cpu; + + if (freq_debug) + pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", + freqs.new / 1000, (pxa_freq_settings[idx].div2) ? + (pxa_freq_settings[idx].membus / 2000) : + (pxa_freq_settings[idx].membus / 1000)); + + /* + * Tell everyone what we're about to do... + * you should add a notify client with any platform specific + * Vcc changing capability + */ + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + /* Calculate the next MDREFR. If we're slowing down the SDRAM clock + * we need to preset the smaller DRI before the change. If we're speeding + * up we need to set the larger DRI value after the change. + */ + preset_mdrefr = postset_mdrefr = MDREFR; + if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) { + preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) | + MDREFR_DRI(pxa_freq_settings[idx].membus); + } + postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) | + MDREFR_DRI(pxa_freq_settings[idx].membus); + + /* If we're dividing the memory clock by two for the SDRAM clock, this + * must be set prior to the change. Clearing the divide must be done + * after the change. + */ + if (pxa_freq_settings[idx].div2) { + preset_mdrefr |= MDREFR_DB2_MASK; + postset_mdrefr |= MDREFR_DB2_MASK; + } else { + postset_mdrefr &= ~MDREFR_DB2_MASK; + } + + local_irq_save(flags); + + /* Set new the CCCR */ + CCCR = pxa_freq_settings[idx].cccr; + + asm volatile(" \n\ + ldr r4, [%1] /* load MDREFR */ \n\ + b 2f \n\ + .align 5 \n\ +1: \n\ + str %4, [%1] /* preset the MDREFR */ \n\ + mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\ + str %5, [%1] /* postset the MDREFR */ \n\ + \n\ + b 3f \n\ +2: b 1b \n\ +3: nop \n\ + " + : "=&r" (unused) + : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), + "r" (preset_mdrefr), "r" (postset_mdrefr) + : "r4", "r5"); + local_irq_restore(flags); + + /* + * Tell everyone what we've just done... + * you should add a notify client with any platform specific + * SDRAM refresh timer adjustments + */ + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return 0; +} + +static int pxa_cpufreq_init(struct cpufreq_policy *policy) +{ + int i; + + /* set default policy and cpuinfo */ + policy->governor = CPUFREQ_DEFAULT_GOVERNOR; + policy->policy = CPUFREQ_POLICY_PERFORMANCE; + policy->cpuinfo.max_freq = PXA25x_MAX_FREQ; + policy->cpuinfo.min_freq = PXA25x_MIN_FREQ; + policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ + policy->cur = get_clk_frequency_khz(0); /* current freq */ + policy->min = policy->max = policy->cur; + + /* Generate the run cpufreq_frequency_table struct */ + for (i = 0; i < NUM_RUN_FREQS; i++) { + pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; + pxa255_run_freq_table[i].index = i; + } + + pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; + /* Generate the turbo cpufreq_frequency_table struct */ + for (i = 0; i < NUM_TURBO_FREQS; i++) { + pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz; + pxa255_turbo_freq_table[i].index = i; + } + pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; + + printk(KERN_INFO "PXA CPU frequency change support initialized\n"); + + return 0; +} + +static struct cpufreq_driver pxa_cpufreq_driver = { + .verify = pxa_verify_policy, + .target = pxa_set_target, + .init = pxa_cpufreq_init, + .name = "PXA25x", +}; + +static int __init pxa_cpu_init(void) +{ + int ret = -ENODEV; + if (cpu_is_pxa25x()) + ret = cpufreq_register_driver(&pxa_cpufreq_driver); + return ret; +} + +static void __exit pxa_cpu_exit(void) +{ + if (cpu_is_pxa25x()) + cpufreq_unregister_driver(&pxa_cpufreq_driver); +} + + +MODULE_AUTHOR ("Intrinsyc Software Inc."); +MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture"); +MODULE_LICENSE("GPL"); +module_init(pxa_cpu_init); +module_exit(pxa_cpu_exit); diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c new file mode 100644 index 000000000000..50ff453ad370 --- /dev/null +++ b/arch/arm/mach-pxa/devices.c @@ -0,0 +1,662 @@ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> + +#include <asm/arch/gpio.h> +#include <asm/arch/udc.h> +#include <asm/arch/pxafb.h> +#include <asm/arch/mmc.h> +#include <asm/arch/irda.h> +#include <asm/arch/i2c.h> + +#include "devices.h" + +void __init pxa_register_device(struct platform_device *dev, void *data) +{ + int ret; + + dev->dev.platform_data = data; + + ret = platform_device_register(dev); + if (ret) + dev_err(&dev->dev, "unable to register device: %d\n", ret); +} + +static struct resource pxamci_resources[] = { + [0] = { + .start = 0x41100000, + .end = 0x41100fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_MMC, + .end = IRQ_MMC, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 21, + .end = 21, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = 22, + .end = 22, + .flags = IORESOURCE_DMA, + }, +}; + +static u64 pxamci_dmamask = 0xffffffffUL; + +struct platform_device pxa_device_mci = { + .name = "pxa2xx-mci", + .id = 0, + .dev = { + .dma_mask = &pxamci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(pxamci_resources), + .resource = pxamci_resources, +}; + +void __init pxa_set_mci_info(struct pxamci_platform_data *info) +{ + pxa_register_device(&pxa_device_mci, info); +} + + +static struct pxa2xx_udc_mach_info pxa_udc_info; + +void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) +{ + memcpy(&pxa_udc_info, info, sizeof *info); +} + +static struct resource pxa2xx_udc_resources[] = { + [0] = { + .start = 0x40600000, + .end = 0x4060ffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_USB, + .end = IRQ_USB, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 udc_dma_mask = ~(u32)0; + +struct platform_device pxa_device_udc = { + .name = "pxa2xx-udc", + .id = -1, + .resource = pxa2xx_udc_resources, + .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), + .dev = { + .platform_data = &pxa_udc_info, + .dma_mask = &udc_dma_mask, + } +}; + +static struct resource pxafb_resources[] = { + [0] = { + .start = 0x44000000, + .end = 0x4400ffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_LCD, + .end = IRQ_LCD, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 fb_dma_mask = ~(u64)0; + +struct platform_device pxa_device_fb = { + .name = "pxa2xx-fb", + .id = -1, + .dev = { + .dma_mask = &fb_dma_mask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(pxafb_resources), + .resource = pxafb_resources, +}; + +void __init set_pxa_fb_info(struct pxafb_mach_info *info) +{ + pxa_register_device(&pxa_device_fb, info); +} + +void __init set_pxa_fb_parent(struct device *parent_dev) +{ + pxa_device_fb.dev.parent = parent_dev; +} + +static struct resource pxa_resource_ffuart[] = { + { + .start = __PREG(FFUART), + .end = __PREG(FFUART) + 35, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_FFUART, + .end = IRQ_FFUART, + .flags = IORESOURCE_IRQ, + } +}; + +struct platform_device pxa_device_ffuart= { + .name = "pxa2xx-uart", + .id = 0, + .resource = pxa_resource_ffuart, + .num_resources = ARRAY_SIZE(pxa_resource_ffuart), +}; + +static struct resource pxa_resource_btuart[] = { + { + .start = __PREG(BTUART), + .end = __PREG(BTUART) + 35, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_BTUART, + .end = IRQ_BTUART, + .flags = IORESOURCE_IRQ, + } +}; + +struct platform_device pxa_device_btuart = { + .name = "pxa2xx-uart", + .id = 1, + .resource = pxa_resource_btuart, + .num_resources = ARRAY_SIZE(pxa_resource_btuart), +}; + +static struct resource pxa_resource_stuart[] = { + { + .start = __PREG(STUART), + .end = __PREG(STUART) + 35, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_STUART, + .end = IRQ_STUART, + .flags = IORESOURCE_IRQ, + } +}; + +struct platform_device pxa_device_stuart = { + .name = "pxa2xx-uart", + .id = 2, + .resource = pxa_resource_stuart, + .num_resources = ARRAY_SIZE(pxa_resource_stuart), +}; + +static struct resource pxa_resource_hwuart[] = { + { + .start = __PREG(HWUART), + .end = __PREG(HWUART) + 47, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_HWUART, + .end = IRQ_HWUART, + .flags = IORESOURCE_IRQ, + } +}; + +struct platform_device pxa_device_hwuart = { + .name = "pxa2xx-uart", + .id = 3, + .resource = pxa_resource_hwuart, + .num_resources = ARRAY_SIZE(pxa_resource_hwuart), +}; + +static struct resource pxai2c_resources[] = { + { + .start = 0x40301680, + .end = 0x403016a3, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_I2C, + .end = IRQ_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device pxa_device_i2c = { + .name = "pxa2xx-i2c", + .id = 0, + .resource = pxai2c_resources, + .num_resources = ARRAY_SIZE(pxai2c_resources), +}; + +void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) +{ + pxa_register_device(&pxa_device_i2c, info); +} + +static struct resource pxai2s_resources[] = { + { + .start = 0x40400000, + .end = 0x40400083, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_I2S, + .end = IRQ_I2S, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device pxa_device_i2s = { + .name = "pxa2xx-i2s", + .id = -1, + .resource = pxai2s_resources, + .num_resources = ARRAY_SIZE(pxai2s_resources), +}; + +static u64 pxaficp_dmamask = ~(u32)0; + +struct platform_device pxa_device_ficp = { + .name = "pxa2xx-ir", + .id = -1, + .dev = { + .dma_mask = &pxaficp_dmamask, + .coherent_dma_mask = 0xffffffff, + }, +}; + +void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) +{ + pxa_register_device(&pxa_device_ficp, info); +} + +struct platform_device pxa_device_rtc = { + .name = "sa1100-rtc", + .id = -1, +}; + +#ifdef CONFIG_PXA25x + +static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa25x_resource_ssp[] = { + [0] = { + .start = 0x41000000, + .end = 0x4100001f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SSP, + .end = IRQ_SSP, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for RX */ + .start = 13, + .end = 13, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for TX */ + .start = 14, + .end = 14, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa25x_device_ssp = { + .name = "pxa25x-ssp", + .id = 0, + .dev = { + .dma_mask = &pxa25x_ssp_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = pxa25x_resource_ssp, + .num_resources = ARRAY_SIZE(pxa25x_resource_ssp), +}; + +static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa25x_resource_nssp[] = { + [0] = { + .start = 0x41400000, + .end = 0x4140002f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_NSSP, + .end = IRQ_NSSP, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for RX */ + .start = 15, + .end = 15, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for TX */ + .start = 16, + .end = 16, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa25x_device_nssp = { + .name = "pxa25x-nssp", + .id = 1, + .dev = { + .dma_mask = &pxa25x_nssp_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = pxa25x_resource_nssp, + .num_resources = ARRAY_SIZE(pxa25x_resource_nssp), +}; + +static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa25x_resource_assp[] = { + [0] = { + .start = 0x41500000, + .end = 0x4150002f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_ASSP, + .end = IRQ_ASSP, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for RX */ + .start = 23, + .end = 23, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for TX */ + .start = 24, + .end = 24, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa25x_device_assp = { + /* ASSP is basically equivalent to NSSP */ + .name = "pxa25x-nssp", + .id = 2, + .dev = { + .dma_mask = &pxa25x_assp_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = pxa25x_resource_assp, + .num_resources = ARRAY_SIZE(pxa25x_resource_assp), +}; +#endif /* CONFIG_PXA25x */ + +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) + +static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa27x_resource_ohci[] = { + [0] = { + .start = 0x4C000000, + .end = 0x4C00ff6f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_USBH1, + .end = IRQ_USBH1, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device pxa27x_device_ohci = { + .name = "pxa27x-ohci", + .id = -1, + .dev = { + .dma_mask = &pxa27x_ohci_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(pxa27x_resource_ohci), + .resource = pxa27x_resource_ohci, +}; + +void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) +{ + pxa_register_device(&pxa27x_device_ohci, info); +} + +static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa27x_resource_ssp1[] = { + [0] = { + .start = 0x41000000, + .end = 0x4100003f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SSP, + .end = IRQ_SSP, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for RX */ + .start = 13, + .end = 13, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for TX */ + .start = 14, + .end = 14, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa27x_device_ssp1 = { + .name = "pxa27x-ssp", + .id = 0, + .dev = { + .dma_mask = &pxa27x_ssp1_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = pxa27x_resource_ssp1, + .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), +}; + +static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa27x_resource_ssp2[] = { + [0] = { + .start = 0x41700000, + .end = 0x4170003f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SSP2, + .end = IRQ_SSP2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for RX */ + .start = 15, + .end = 15, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for TX */ + .start = 16, + .end = 16, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa27x_device_ssp2 = { + .name = "pxa27x-ssp", + .id = 1, + .dev = { + .dma_mask = &pxa27x_ssp2_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = pxa27x_resource_ssp2, + .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), +}; + +static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa27x_resource_ssp3[] = { + [0] = { + .start = 0x41900000, + .end = 0x4190003f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SSP3, + .end = IRQ_SSP3, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for RX */ + .start = 66, + .end = 66, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for TX */ + .start = 67, + .end = 67, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa27x_device_ssp3 = { + .name = "pxa27x-ssp", + .id = 2, + .dev = { + .dma_mask = &pxa27x_ssp3_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = pxa27x_resource_ssp3, + .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), +}; +#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ + +#ifdef CONFIG_PXA3xx +static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32); + +static struct resource pxa3xx_resource_ssp4[] = { + [0] = { + .start = 0x41a00000, + .end = 0x41a0003f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SSP4, + .end = IRQ_SSP4, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for RX */ + .start = 2, + .end = 2, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for TX */ + .start = 3, + .end = 3, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa3xx_device_ssp4 = { + /* PXA3xx SSP is basically equivalent to PXA27x */ + .name = "pxa27x-ssp", + .id = 3, + .dev = { + .dma_mask = &pxa3xx_ssp4_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .resource = pxa3xx_resource_ssp4, + .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), +}; + +static struct resource pxa3xx_resources_mci2[] = { + [0] = { + .start = 0x42000000, + .end = 0x42000fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_MMC2, + .end = IRQ_MMC2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 93, + .end = 93, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = 94, + .end = 94, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa3xx_device_mci2 = { + .name = "pxa2xx-mci", + .id = 1, + .dev = { + .dma_mask = &pxamci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2), + .resource = pxa3xx_resources_mci2, +}; + +void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info) +{ + pxa_register_device(&pxa3xx_device_mci2, info); +} + +static struct resource pxa3xx_resources_mci3[] = { + [0] = { + .start = 0x42500000, + .end = 0x42500fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_MMC3, + .end = IRQ_MMC3, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 100, + .end = 100, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = 101, + .end = 101, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device pxa3xx_device_mci3 = { + .name = "pxa2xx-mci", + .id = 2, + .dev = { + .dma_mask = &pxamci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3), + .resource = pxa3xx_resources_mci3, +}; + +void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) +{ + pxa_register_device(&pxa3xx_device_mci3, info); +} + +#endif /* CONFIG_PXA3xx */ diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 94c8d5cdd60a..96c7c8909068 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -1,4 +1,6 @@ extern struct platform_device pxa_device_mci; +extern struct platform_device pxa3xx_device_mci2; +extern struct platform_device pxa3xx_device_mci3; extern struct platform_device pxa_device_udc; extern struct platform_device pxa_device_fb; extern struct platform_device pxa_device_ffuart; @@ -12,3 +14,13 @@ extern struct platform_device pxa_device_rtc; extern struct platform_device pxa27x_device_i2c_power; extern struct platform_device pxa27x_device_ohci; + +extern struct platform_device pxa25x_device_ssp; +extern struct platform_device pxa25x_device_nssp; +extern struct platform_device pxa25x_device_assp; +extern struct platform_device pxa27x_device_ssp1; +extern struct platform_device pxa27x_device_ssp2; +extern struct platform_device pxa27x_device_ssp3; +extern struct platform_device pxa3xx_device_ssp4; + +void __init pxa_register_device(struct platform_device *dev, void *data); diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c new file mode 100644 index 000000000000..ee0ae93c876a --- /dev/null +++ b/arch/arm/mach-pxa/eseries.c @@ -0,0 +1,101 @@ +/* + * Hardware definitions for the Toshiba eseries PDAs + * + * Copyright (c) 2003 Ian Molton <spyro@f2s.com> + * + * This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + */ + +#include <linux/init.h> + +#include <asm/setup.h> +#include <asm/mach/arch.h> +#include <asm/arch/hardware.h> +#include <asm/mach-types.h> + +#include <generic.h> + +/* Only e800 has 128MB RAM */ +static void __init eseries_fixup(struct machine_desc *desc, + struct tag *tags, char **cmdline, struct meminfo *mi) +{ + mi->nr_banks=1; + mi->bank[0].start = 0xa0000000; + mi->bank[0].node = 0; + if (machine_is_e800()) + mi->bank[0].size = (128*1024*1024); + else + mi->bank[0].size = (64*1024*1024); +} + +/* e-series machine definitions */ + +#ifdef CONFIG_MACH_E330 +MACHINE_START(E330, "Toshiba e330") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .timer = &pxa_timer, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_E740 +MACHINE_START(E740, "Toshiba e740") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .timer = &pxa_timer, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_E750 +MACHINE_START(E750, "Toshiba e750") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .timer = &pxa_timer, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_E400 +MACHINE_START(E400, "Toshiba e400") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .timer = &pxa_timer, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_E800 +MACHINE_START(E800, "Toshiba e800") + /* Maintainer: Ian Molton (spyro@f2s.com) */ + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa25x_init_irq, + .fixup = eseries_fixup, + .timer = &pxa_timer, +MACHINE_END +#endif + diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 1c34946ee16e..698aeec52961 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -20,7 +20,6 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> -#include <linux/platform_device.h> #include <linux/ioport.h> #include <linux/pm.h> #include <linux/string.h> @@ -33,13 +32,7 @@ #include <asm/arch/pxa-regs.h> #include <asm/arch/gpio.h> -#include <asm/arch/udc.h> -#include <asm/arch/pxafb.h> -#include <asm/arch/mmc.h> -#include <asm/arch/irda.h> -#include <asm/arch/i2c.h> -#include "devices.h" #include "generic.h" /* @@ -203,7 +196,7 @@ static struct map_desc standard_io_desc[] __initdata = { }, { /* Mem Ctl */ .virtual = 0xf6000000, .pfn = __phys_to_pfn(0x48000000), - .length = 0x00100000, + .length = 0x00200000, .type = MT_DEVICE }, { /* USB host */ .virtual = 0xf8000000, @@ -233,245 +226,3 @@ void __init pxa_map_io(void) iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); get_clk_frequency_khz(1); } - - -static struct resource pxamci_resources[] = { - [0] = { - .start = 0x41100000, - .end = 0x41100fff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_MMC, - .end = IRQ_MMC, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 pxamci_dmamask = 0xffffffffUL; - -struct platform_device pxa_device_mci = { - .name = "pxa2xx-mci", - .id = -1, - .dev = { - .dma_mask = &pxamci_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(pxamci_resources), - .resource = pxamci_resources, -}; - -void __init pxa_set_mci_info(struct pxamci_platform_data *info) -{ - pxa_device_mci.dev.platform_data = info; -} - - -static struct pxa2xx_udc_mach_info pxa_udc_info; - -void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) -{ - memcpy(&pxa_udc_info, info, sizeof *info); -} - -static struct resource pxa2xx_udc_resources[] = { - [0] = { - .start = 0x40600000, - .end = 0x4060ffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_USB, - .end = IRQ_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 udc_dma_mask = ~(u32)0; - -struct platform_device pxa_device_udc = { - .name = "pxa2xx-udc", - .id = -1, - .resource = pxa2xx_udc_resources, - .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), - .dev = { - .platform_data = &pxa_udc_info, - .dma_mask = &udc_dma_mask, - } -}; - -static struct resource pxafb_resources[] = { - [0] = { - .start = 0x44000000, - .end = 0x4400ffff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_LCD, - .end = IRQ_LCD, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 fb_dma_mask = ~(u64)0; - -struct platform_device pxa_device_fb = { - .name = "pxa2xx-fb", - .id = -1, - .dev = { - .dma_mask = &fb_dma_mask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(pxafb_resources), - .resource = pxafb_resources, -}; - -void __init set_pxa_fb_info(struct pxafb_mach_info *info) -{ - pxa_device_fb.dev.platform_data = info; -} - -void __init set_pxa_fb_parent(struct device *parent_dev) -{ - pxa_device_fb.dev.parent = parent_dev; -} - -static struct resource pxa_resource_ffuart[] = { - { - .start = __PREG(FFUART), - .end = __PREG(FFUART) + 35, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_FFUART, - .end = IRQ_FFUART, - .flags = IORESOURCE_IRQ, - } -}; - -struct platform_device pxa_device_ffuart= { - .name = "pxa2xx-uart", - .id = 0, - .resource = pxa_resource_ffuart, - .num_resources = ARRAY_SIZE(pxa_resource_ffuart), -}; - -static struct resource pxa_resource_btuart[] = { - { - .start = __PREG(BTUART), - .end = __PREG(BTUART) + 35, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_BTUART, - .end = IRQ_BTUART, - .flags = IORESOURCE_IRQ, - } -}; - -struct platform_device pxa_device_btuart = { - .name = "pxa2xx-uart", - .id = 1, - .resource = pxa_resource_btuart, - .num_resources = ARRAY_SIZE(pxa_resource_btuart), -}; - -static struct resource pxa_resource_stuart[] = { - { - .start = __PREG(STUART), - .end = __PREG(STUART) + 35, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_STUART, - .end = IRQ_STUART, - .flags = IORESOURCE_IRQ, - } -}; - -struct platform_device pxa_device_stuart = { - .name = "pxa2xx-uart", - .id = 2, - .resource = pxa_resource_stuart, - .num_resources = ARRAY_SIZE(pxa_resource_stuart), -}; - -static struct resource pxa_resource_hwuart[] = { - { - .start = __PREG(HWUART), - .end = __PREG(HWUART) + 47, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_HWUART, - .end = IRQ_HWUART, - .flags = IORESOURCE_IRQ, - } -}; - -struct platform_device pxa_device_hwuart = { - .name = "pxa2xx-uart", - .id = 3, - .resource = pxa_resource_hwuart, - .num_resources = ARRAY_SIZE(pxa_resource_hwuart), -}; - -static struct resource pxai2c_resources[] = { - { - .start = 0x40301680, - .end = 0x403016a3, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_I2C, - .end = IRQ_I2C, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa_device_i2c = { - .name = "pxa2xx-i2c", - .id = 0, - .resource = pxai2c_resources, - .num_resources = ARRAY_SIZE(pxai2c_resources), -}; - -void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) -{ - pxa_device_i2c.dev.platform_data = info; -} - -static struct resource pxai2s_resources[] = { - { - .start = 0x40400000, - .end = 0x40400083, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_I2S, - .end = IRQ_I2S, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa_device_i2s = { - .name = "pxa2xx-i2s", - .id = -1, - .resource = pxai2s_resources, - .num_resources = ARRAY_SIZE(pxai2s_resources), -}; - -static u64 pxaficp_dmamask = ~(u32)0; - -struct platform_device pxa_device_ficp = { - .name = "pxa2xx-ir", - .id = -1, - .dev = { - .dma_mask = &pxaficp_dmamask, - .coherent_dma_mask = 0xffffffff, - }, -}; - -void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) -{ - pxa_device_ficp.dev.platform_data = info; -} - -struct platform_device pxa_device_rtc = { - .name = "sa1100-rtc", - .id = -1, -}; diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 465108da2851..0a9434432c55 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -54,7 +54,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = IRQ_GPIO(4), .end = IRQ_GPIO(4), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } }; diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c new file mode 100644 index 000000000000..0a4b54c21314 --- /dev/null +++ b/arch/arm/mach-pxa/littleton.c @@ -0,0 +1,325 @@ +/* + * linux/arch/arm/mach-pxa/littleton.c + * + * Support for the Marvell Littleton Development Platform. + * + * Author: Jason Chagas (largely modified code) + * Created: Nov 20, 2006 + * Copyright: (C) Copyright 2006 Marvell International Ltd. + * + * 2007-11-22 modified to align with latest kernel + * eric miao <eric.miao@marvell.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/delay.h> +#include <linux/platform_device.h> +#include <linux/clk.h> + +#include <asm/types.h> +#include <asm/setup.h> +#include <asm/memory.h> +#include <asm/mach-types.h> +#include <asm/hardware.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/arch/pxa-regs.h> +#include <asm/arch/mfp-pxa300.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pxafb.h> +#include <asm/arch/ssp.h> +#include <asm/arch/littleton.h> + +#include "generic.h" + +#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) + +/* Littleton MFP configurations */ +static mfp_cfg_t littleton_mfp_cfg[] __initdata = { + /* LCD */ + GPIO54_LCD_LDD_0, + GPIO55_LCD_LDD_1, + GPIO56_LCD_LDD_2, + GPIO57_LCD_LDD_3, + GPIO58_LCD_LDD_4, + GPIO59_LCD_LDD_5, + GPIO60_LCD_LDD_6, + GPIO61_LCD_LDD_7, + GPIO62_LCD_LDD_8, + GPIO63_LCD_LDD_9, + GPIO64_LCD_LDD_10, + GPIO65_LCD_LDD_11, + GPIO66_LCD_LDD_12, + GPIO67_LCD_LDD_13, + GPIO68_LCD_LDD_14, + GPIO69_LCD_LDD_15, + GPIO70_LCD_LDD_16, + GPIO71_LCD_LDD_17, + GPIO72_LCD_FCLK, + GPIO73_LCD_LCLK, + GPIO74_LCD_PCLK, + GPIO75_LCD_BIAS, + + /* SSP2 */ + GPIO25_SSP2_SCLK, + GPIO17_SSP2_FRM, + GPIO27_SSP2_TXD, + + /* Debug Ethernet */ + GPIO90_GPIO, +}; + +static struct resource smc91x_resources[] = { + [0] = { + .start = (LITTLETON_ETH_PHYS + 0x300), + .end = (LITTLETON_ETH_PHYS + 0xfffff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), + .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, + } +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULES) +/* use bit 30, 31 as the indicator of command parameter number */ +#define CMD0(x) ((0x00000000) | ((x) << 9)) +#define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1)) +#define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\ + ((x1) << 9) | 0x100 | (x2)) + +static uint32_t lcd_panel_reset[] = { + CMD0(0x1), /* reset */ + CMD0(0x0), /* nop */ + CMD0(0x0), /* nop */ + CMD0(0x0), /* nop */ +}; + +static uint32_t lcd_panel_on[] = { + CMD0(0x29), /* Display ON */ + CMD2(0xB8, 0xFF, 0xF9), /* Output Control */ + CMD0(0x11), /* Sleep out */ + CMD1(0xB0, 0x16), /* Wake */ +}; + +static uint32_t lcd_panel_off[] = { + CMD0(0x28), /* Display OFF */ + CMD2(0xB8, 0x80, 0x02), /* Output Control */ + CMD0(0x10), /* Sleep in */ + CMD1(0xB0, 0x00), /* Deep stand by in */ +}; + +static uint32_t lcd_vga_pass_through[] = { + CMD1(0xB0, 0x16), + CMD1(0xBC, 0x80), + CMD1(0xE1, 0x00), + CMD1(0x36, 0x50), + CMD1(0x3B, 0x00), +}; + +static uint32_t lcd_qvga_pass_through[] = { + CMD1(0xB0, 0x16), + CMD1(0xBC, 0x81), + CMD1(0xE1, 0x00), + CMD1(0x36, 0x50), + CMD1(0x3B, 0x22), +}; + +static uint32_t lcd_vga_transfer[] = { + CMD1(0xcf, 0x02), /* Blanking period control (1) */ + CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */ + CMD1(0xd1, 0x01), /* CKV timing control on/off */ + CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */ + CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */ + CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */ + CMD1(0xd5, 0x14), /* ASW timing control (2) */ + CMD0(0x21), /* Invert for normally black display */ + CMD0(0x29), /* Display on */ +}; + +static uint32_t lcd_qvga_transfer[] = { + CMD1(0xd6, 0x02), /* Blanking period control (1) */ + CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */ + CMD1(0xd8, 0x01), /* CKV timing control on/off */ + CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */ + CMD2(0xde, 0x05, 0x0a), /* OEV timing control */ + CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */ + CMD1(0xe0, 0x0a), /* ASW timing control (2) */ + CMD0(0x21), /* Invert for normally black display */ + CMD0(0x29), /* Display on */ +}; + +static uint32_t lcd_panel_config[] = { + CMD2(0xb8, 0xff, 0xf9), /* Output control */ + CMD0(0x11), /* sleep out */ + CMD1(0xba, 0x01), /* Display mode (1) */ + CMD1(0xbb, 0x00), /* Display mode (2) */ + CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */ + CMD1(0xbf, 0x10), /* Drive system change control */ + CMD1(0xb1, 0x56), /* Booster operation setup */ + CMD1(0xb2, 0x33), /* Booster mode setup */ + CMD1(0xb3, 0x11), /* Booster frequency setup */ + CMD1(0xb4, 0x02), /* Op amp/system clock */ + CMD1(0xb5, 0x35), /* VCS voltage */ + CMD1(0xb6, 0x40), /* VCOM voltage */ + CMD1(0xb7, 0x03), /* External display signal */ + CMD1(0xbd, 0x00), /* ASW slew rate */ + CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */ + CMD1(0xc0, 0x11), /* Sleep out FR count (A) */ + CMD1(0xc1, 0x11), /* Sleep out FR count (B) */ + CMD1(0xc2, 0x11), /* Sleep out FR count (C) */ + CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */ + CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */ + CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */ + CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */ + CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */ + CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */ + CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */ + CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */ + CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */ +}; + +static void ssp_reconfig(struct ssp_dev *dev, int nparam) +{ + static int last_nparam = -1; + + /* check if it is necessary to re-config SSP */ + if (nparam == last_nparam) + return; + + ssp_disable(dev); + ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0); + + last_nparam = nparam; +} + +static void ssp_send_cmd(uint32_t *cmd, int num) +{ + static int ssp_initialized; + static struct ssp_dev ssp2; + + int i; + + if (!ssp_initialized) { + ssp_init(&ssp2, 2, SSP_NO_IRQ); + ssp_initialized = 1; + } + + clk_enable(ssp2.ssp->clk); + for (i = 0; i < num; i++, cmd++) { + ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3); + ssp_write_word(&ssp2, *cmd & 0x3fffffff); + + /* FIXME: ssp_flush() is mandatory here to work */ + ssp_flush(&ssp2); + } + clk_disable(ssp2.ssp->clk); +} + +static void littleton_lcd_power(int on, struct fb_var_screeninfo *var) +{ + if (on) { + ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on)); + ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset)); + if (var->xres > 240) { + /* VGA */ + ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through)); + ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); + ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer)); + } else { + /* QVGA */ + ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through)); + ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); + ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer)); + } + } else + ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off)); +} + +static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { + [0] = { + /* VGA */ + .pixclock = 38250, + .xres = 480, + .yres = 640, + .bpp = 16, + .hsync_len = 8, + .left_margin = 8, + .right_margin = 24, + .vsync_len = 2, + .upper_margin = 2, + .lower_margin = 4, + .sync = 0, + }, + [1] = { + /* QVGA */ + .pixclock = 153000, + .xres = 240, + .yres = 320, + .bpp = 16, + .hsync_len = 8, + .left_margin = 8, + .right_margin = 88, + .vsync_len = 2, + .upper_margin = 2, + .lower_margin = 2, + .sync = 0, + }, +}; + +static struct pxafb_mach_info littleton_lcd_info = { + .modes = tpo_tdo24mtea1_modes, + .num_modes = 2, + .lccr0 = LCCR0_Act, + .lccr3 = LCCR3_HSP | LCCR3_VSP, + .pxafb_lcd_power = littleton_lcd_power, +}; + +static void littleton_init_lcd(void) +{ + set_pxa_fb_info(&littleton_lcd_info); +} +#else +static inline void littleton_init_lcd(void) {}; +#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULES */ + +static void __init littleton_init(void) +{ + /* initialize MFP configurations */ + pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg)); + + /* + * Note: we depend bootloader set the correct + * value to MSC register for SMC91x. + */ + platform_device_register(&smc91x_device); + + littleton_init_lcd(); +} + +MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") + .phys_io = 0x40000000, + .boot_params = 0xa0000100, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .map_io = pxa_map_io, + .init_irq = pxa3xx_init_irq, + .timer = &pxa_timer, + .init_machine = littleton_init, +MACHINE_END diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 78ebad063cba..afa62ffe3ad5 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -38,6 +38,7 @@ #include <asm/mach/flash.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/lpd270.h> #include <asm/arch/audio.h> #include <asm/arch/pxafb.h> diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 1d3112dc629e..e7ae4bb3e361 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -41,6 +41,7 @@ #include <asm/hardware/sa1111.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/lubbock.h> #include <asm/arch/udc.h> #include <asm/arch/irda.h> @@ -136,9 +137,13 @@ static struct sys_device lubbock_irq_device = { static int __init lubbock_irq_device_init(void) { - int ret = sysdev_class_register(&lubbock_irq_sysclass); - if (ret == 0) - ret = sysdev_register(&lubbock_irq_device); + int ret = -ENODEV; + + if (machine_is_lubbock()) { + ret = sysdev_class_register(&lubbock_irq_sysclass); + if (ret == 0) + ret = sysdev_register(&lubbock_irq_device); + } return ret; } @@ -191,7 +196,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = LUBBOCK_ETH_IRQ, .end = LUBBOCK_ETH_IRQ, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, [2] = { .name = "smc91x-attrib", @@ -206,30 +211,13 @@ static struct resource smc91x_resources[] = { * (to J5) and poking board registers (as done below). Else it's only useful * for the temperature sensors. */ -static struct resource pxa_ssp_resources[] = { - [0] = { - .start = __PREG(SSCR0_P(1)), - .end = __PREG(SSCR0_P(1)) + 0x14, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_SSP, - .end = IRQ_SSP, - .flags = IORESOURCE_IRQ, - }, -}; - static struct pxa2xx_spi_master pxa_ssp_master_info = { - .ssp_type = PXA25x_SSP, - .clock_enable = CKEN_SSP, .num_chipselect = 0, }; static struct platform_device pxa_ssp = { .name = "pxa2xx-spi", .id = 1, - .resource = pxa_ssp_resources, - .num_resources = ARRAY_SIZE(pxa_ssp_resources), .dev = { .platform_data = &pxa_ssp_master_info, }, diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c new file mode 100644 index 000000000000..d98ef7ada2f8 --- /dev/null +++ b/arch/arm/mach-pxa/magician.c @@ -0,0 +1,218 @@ +/* + * Support for HTC Magician PDA phones: + * i-mate JAM, O2 Xda mini, Orange SPV M500, Qtek s100, Qtek s110 + * and T-Mobile MDA Compact. + * + * Copyright (c) 2006-2007 Philipp Zabel + * + * Based on hx4700.c, spitz.c and others. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/map.h> +#include <linux/mtd/physmap.h> + +#include <asm/gpio.h> +#include <asm/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/arch/magician.h> +#include <asm/arch/pxa-regs.h> +#include <asm/arch/pxafb.h> +#include <asm/arch/irda.h> +#include <asm/arch/ohci.h> + +#include "generic.h" + +/* + * IRDA + */ + +static void magician_irda_transceiver_mode(struct device *dev, int mode) +{ + gpio_set_value(GPIO83_MAGICIAN_nIR_EN, mode & IR_OFF); +} + +static struct pxaficp_platform_data magician_ficp_info = { + .transceiver_cap = IR_SIRMODE | IR_OFF, + .transceiver_mode = magician_irda_transceiver_mode, +}; + +/* + * GPIO Keys + */ + +static struct gpio_keys_button magician_button_table[] = { + {KEY_POWER, GPIO0_MAGICIAN_KEY_POWER, 0, "Power button"}, + {KEY_ESC, GPIO37_MAGICIAN_KEY_HANGUP, 0, "Hangup button"}, + {KEY_F10, GPIO38_MAGICIAN_KEY_CONTACTS, 0, "Contacts button"}, + {KEY_CALENDAR, GPIO90_MAGICIAN_KEY_CALENDAR, 0, "Calendar button"}, + {KEY_CAMERA, GPIO91_MAGICIAN_KEY_CAMERA, 0, "Camera button"}, + {KEY_UP, GPIO93_MAGICIAN_KEY_UP, 0, "Up button"}, + {KEY_DOWN, GPIO94_MAGICIAN_KEY_DOWN, 0, "Down button"}, + {KEY_LEFT, GPIO95_MAGICIAN_KEY_LEFT, 0, "Left button"}, + {KEY_RIGHT, GPIO96_MAGICIAN_KEY_RIGHT, 0, "Right button"}, + {KEY_KPENTER, GPIO97_MAGICIAN_KEY_ENTER, 0, "Action button"}, + {KEY_RECORD, GPIO98_MAGICIAN_KEY_RECORD, 0, "Record button"}, + {KEY_VOLUMEUP, GPIO100_MAGICIAN_KEY_VOL_UP, 0, "Volume up"}, + {KEY_VOLUMEDOWN, GPIO101_MAGICIAN_KEY_VOL_DOWN, 0, "Volume down"}, + {KEY_PHONE, GPIO102_MAGICIAN_KEY_PHONE, 0, "Phone button"}, + {KEY_PLAY, GPIO99_MAGICIAN_HEADPHONE_IN, 0, "Headset button"}, +}; + +static struct gpio_keys_platform_data gpio_keys_data = { + .buttons = magician_button_table, + .nbuttons = ARRAY_SIZE(magician_button_table), +}; + +static struct platform_device gpio_keys = { + .name = "gpio-keys", + .dev = { + .platform_data = &gpio_keys_data, + }, + .id = -1, +}; + +/* + * LCD - Toppoly TD028STEB1 + */ + +static struct pxafb_mode_info toppoly_modes[] = { + { + .pixclock = 96153, + .bpp = 16, + .xres = 240, + .yres = 320, + .hsync_len = 11, + .vsync_len = 3, + .left_margin = 19, + .upper_margin = 2, + .right_margin = 10, + .lower_margin = 2, + .sync = 0, + }, +}; + +static struct pxafb_mach_info toppoly_info = { + .modes = toppoly_modes, + .num_modes = 1, + .fixed_modes = 1, + .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, + .lccr3 = LCCR3_PixRsEdg, +}; + +/* + * Backlight + */ + +static void magician_set_bl_intensity(int intensity) +{ + if (intensity) { + PWM_CTRL0 = 1; + PWM_PERVAL0 = 0xc8; + PWM_PWDUTY0 = intensity; + pxa_set_cken(CKEN_PWM0, 1); + } else { + pxa_set_cken(CKEN_PWM0, 0); + } +} + +static struct generic_bl_info backlight_info = { + .default_intensity = 0x64, + .limit_mask = 0x0b, + .max_intensity = 0xc7, + .set_bl_intensity = magician_set_bl_intensity, +}; + +static struct platform_device backlight = { + .name = "corgi-bl", + .dev = { + .platform_data = &backlight_info, + }, + .id = -1, +}; + + +/* + * USB OHCI + */ + +static int magician_ohci_init(struct device *dev) +{ + UHCHR = (UHCHR | UHCHR_SSEP2 | UHCHR_PCPL | UHCHR_CGR) & + ~(UHCHR_SSEP1 | UHCHR_SSEP3 | UHCHR_SSE); + + return 0; +} + +static struct pxaohci_platform_data magician_ohci_info = { + .port_mode = PMM_PERPORT_MODE, + .init = magician_ohci_init, + .power_budget = 0, +}; + + +/* + * StrataFlash + */ + +#define PXA_CS_SIZE 0x04000000 + +static struct resource strataflash_resource = { + .start = PXA_CS0_PHYS, + .end = PXA_CS0_PHYS + PXA_CS_SIZE - 1, + .flags = IORESOURCE_MEM, +}; + +static struct physmap_flash_data strataflash_data = { + .width = 4, +}; + +static struct platform_device strataflash = { + .name = "physmap-flash", + .id = -1, + .num_resources = 1, + .resource = &strataflash_resource, + .dev = { + .platform_data = &strataflash_data, + }, +}; + +/* + * Platform devices + */ + +static struct platform_device *devices[] __initdata = { + &gpio_keys, + &backlight, + &strataflash, +}; + +static void __init magician_init(void) +{ + platform_add_devices(devices, ARRAY_SIZE(devices)); + pxa_set_ohci_info(&magician_ohci_info); + pxa_set_ficp_info(&magician_ficp_info); + set_pxa_fb_info(&toppoly_info); +} + + +MACHINE_START(MAGICIAN, "HTC Magician") + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .boot_params = 0xa0000100, + .map_io = pxa_map_io, + .init_irq = pxa27x_init_irq, + .init_machine = magician_init, + .timer = &pxa_timer, +MACHINE_END diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 41d8c6cea62b..345c3deeb02e 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -23,6 +23,7 @@ #include <linux/ioport.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/backlight.h> #include <asm/types.h> #include <asm/setup.h> @@ -38,6 +39,7 @@ #include <asm/mach/flash.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/mainstone.h> #include <asm/arch/audio.h> #include <asm/arch/pxafb.h> @@ -130,9 +132,13 @@ static struct sys_device mainstone_irq_device = { static int __init mainstone_irq_device_init(void) { - int ret = sysdev_class_register(&mainstone_irq_sysclass); - if (ret == 0) - ret = sysdev_register(&mainstone_irq_device); + int ret = -ENODEV; + + if (machine_is_mainstone()) { + ret = sysdev_class_register(&mainstone_irq_sysclass); + if (ret == 0) + ret = sysdev_register(&mainstone_irq_device); + } return ret; } @@ -150,7 +156,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = MAINSTONE_IRQ(3), .end = MAINSTONE_IRQ(3), - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } }; @@ -263,21 +269,60 @@ static struct platform_device mst_flash_device[2] = { }, }; -static void mainstone_backlight_power(int on) +#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE +static int mainstone_backlight_update_status(struct backlight_device *bl) { - if (on) { + int brightness = bl->props.brightness; + + if (bl->props.power != FB_BLANK_UNBLANK || + bl->props.fb_blank != FB_BLANK_UNBLANK) + brightness = 0; + + if (brightness != 0) { pxa_gpio_mode(GPIO16_PWM0_MD); pxa_set_cken(CKEN_PWM0, 1); - PWM_CTRL0 = 0; - PWM_PWDUTY0 = 0x3ff; - PWM_PERVAL0 = 0x3ff; - } else { - PWM_CTRL0 = 0; - PWM_PWDUTY0 = 0x0; - PWM_PERVAL0 = 0x3FF; + } + PWM_CTRL0 = 0; + PWM_PWDUTY0 = brightness; + PWM_PERVAL0 = bl->props.max_brightness; + if (brightness == 0) pxa_set_cken(CKEN_PWM0, 0); + return 0; /* pointless return value */ +} + +static int mainstone_backlight_get_brightness(struct backlight_device *bl) +{ + return PWM_PWDUTY0; +} + +static /*const*/ struct backlight_ops mainstone_backlight_ops = { + .update_status = mainstone_backlight_update_status, + .get_brightness = mainstone_backlight_get_brightness, +}; + +static void __init mainstone_backlight_register(void) +{ + struct backlight_device *bl; + + bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev, + NULL, &mainstone_backlight_ops); + if (IS_ERR(bl)) { + printk(KERN_ERR "mainstone: unable to register backlight: %ld\n", + PTR_ERR(bl)); + return; } + + /* + * broken design - register-then-setup interfaces are + * utterly broken by definition. + */ + bl->props.max_brightness = 1023; + bl->props.brightness = 1023; + backlight_update_status(bl); } +#else +#define mainstone_backlight_register() do { } while (0) +#endif static struct pxafb_mode_info toshiba_ltm04c380k_mode = { .pixclock = 50000, @@ -311,7 +356,6 @@ static struct pxafb_mach_info mainstone_pxafb_info = { .num_modes = 1, .lccr0 = LCCR0_Act, .lccr3 = LCCR3_PCP, - .pxafb_backlight_power = mainstone_backlight_power, }; static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) @@ -335,12 +379,10 @@ static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_in err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, "MMC card detect", data); - if (err) { + if (err) printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - return -1; - } - return 0; + return err; } static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) @@ -473,6 +515,7 @@ static void __init mainstone_init(void) mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; set_pxa_fb_info(&mainstone_pxafb_info); + mainstone_backlight_register(); pxa_set_mci_info(&mainstone_mci_platform_data); pxa_set_ficp_info(&mainstone_ficp_platform_data); diff --git a/arch/arm/mach-pxa/mfp.c b/arch/arm/mach-pxa/mfp.c index 436f96574964..ec1b2d8f61c4 100644 --- a/arch/arm/mach-pxa/mfp.c +++ b/arch/arm/mach-pxa/mfp.c @@ -17,9 +17,11 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/sysdev.h> #include <asm/hardware.h> #include <asm/arch/mfp.h> +#include <asm/arch/mfp-pxa3xx.h> /* mfp_spin_lock is used to ensure that MFP register configuration * (most likely a read-modify-write operation) is atomic, and that @@ -28,43 +30,110 @@ static DEFINE_SPINLOCK(mfp_spin_lock); static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE); + +struct pxa3xx_mfp_pin { + unsigned long config; /* -1 for not configured */ + unsigned long mfpr_off; /* MFPRxx Register offset */ + unsigned long mfpr_run; /* Run-Mode Register Value */ + unsigned long mfpr_lpm; /* Low Power Mode Register Value */ +}; + static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX]; +/* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */ +const static unsigned long mfpr_lpm[] = { + MFPR_LPM_INPUT, + MFPR_LPM_DRIVE_LOW, + MFPR_LPM_DRIVE_HIGH, + MFPR_LPM_PULL_LOW, + MFPR_LPM_PULL_HIGH, + MFPR_LPM_FLOAT, +}; + +/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */ +const static unsigned long mfpr_pull[] = { + MFPR_PULL_NONE, + MFPR_PULL_LOW, + MFPR_PULL_HIGH, + MFPR_PULL_BOTH, +}; + +/* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */ +const static unsigned long mfpr_edge[] = { + MFPR_EDGE_NONE, + MFPR_EDGE_RISE, + MFPR_EDGE_FALL, + MFPR_EDGE_BOTH, +}; + #define mfpr_readl(off) \ __raw_readl(mfpr_mmio_base + (off)) #define mfpr_writel(off, val) \ __raw_writel(val, mfpr_mmio_base + (off)) +#define mfp_configured(p) ((p)->config != -1) + /* * perform a read-back of any MFPR register to make sure the * previous writings are finished */ #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0) -static inline void __mfp_config(int pin, unsigned long val) +static inline void __mfp_config_run(struct pxa3xx_mfp_pin *p) { - unsigned long off = mfp_table[pin].mfpr_off; + if (mfp_configured(p)) + mfpr_writel(p->mfpr_off, p->mfpr_run); +} - mfp_table[pin].mfpr_val = val; - mfpr_writel(off, val); +static inline void __mfp_config_lpm(struct pxa3xx_mfp_pin *p) +{ + if (mfp_configured(p)) { + unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR; + if (mfpr_clr != p->mfpr_run) + mfpr_writel(p->mfpr_off, mfpr_clr); + if (p->mfpr_lpm != mfpr_clr) + mfpr_writel(p->mfpr_off, p->mfpr_lpm); + } } -void pxa3xx_mfp_config(mfp_cfg_t *mfp_cfgs, int num) +void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num) { - int i, pin; - unsigned long val, flags; - mfp_cfg_t *mfp_cfg = mfp_cfgs; + unsigned long flags; + int i; spin_lock_irqsave(&mfp_spin_lock, flags); - for (i = 0; i < num; i++, mfp_cfg++) { - pin = MFP_CFG_PIN(*mfp_cfg); - val = MFP_CFG_VAL(*mfp_cfg); + for (i = 0; i < num; i++, mfp_cfgs++) { + unsigned long tmp, c = *mfp_cfgs; + struct pxa3xx_mfp_pin *p; + int pin, af, drv, lpm, edge, pull; + pin = MFP_PIN(c); BUG_ON(pin >= MFP_PIN_MAX); - - __mfp_config(pin, val); + p = &mfp_table[pin]; + + af = MFP_AF(c); + drv = MFP_DS(c); + lpm = MFP_LPM_STATE(c); + edge = MFP_LPM_EDGE(c); + pull = MFP_PULL(c); + + /* run-mode pull settings will conflict with MFPR bits of + * low power mode state, calculate mfpr_run and mfpr_lpm + * individually if pull != MFP_PULL_NONE + */ + tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv); + + if (likely(pull == MFP_PULL_NONE)) { + p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge]; + p->mfpr_lpm = p->mfpr_run; + } else { + p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge]; + p->mfpr_run = tmp | mfpr_pull[pull]; + } + + p->config = c; __mfp_config_run(p); } mfpr_sync(); @@ -96,140 +165,82 @@ void pxa3xx_mfp_write(int mfp, unsigned long val) spin_unlock_irqrestore(&mfp_spin_lock, flags); } -void pxa3xx_mfp_set_afds(int mfp, int af, int ds) -{ - uint32_t mfpr_off, mfpr_val; - unsigned long flags; - - BUG_ON(mfp >= MFP_PIN_MAX); - - spin_lock_irqsave(&mfp_spin_lock, flags); - mfpr_off = mfp_table[mfp].mfpr_off; - - mfpr_val = mfpr_readl(mfpr_off); - mfpr_val &= ~(MFPR_AF_MASK | MFPR_DRV_MASK); - mfpr_val |= (((af & 0x7) << MFPR_ALT_OFFSET) | - ((ds & 0x7) << MFPR_DRV_OFFSET)); - - mfpr_writel(mfpr_off, mfpr_val); - mfpr_sync(); - - spin_unlock_irqrestore(&mfp_spin_lock, flags); -} - -void pxa3xx_mfp_set_rdh(int mfp, int rdh) +void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map) { - uint32_t mfpr_off, mfpr_val; - unsigned long flags; - - BUG_ON(mfp >= MFP_PIN_MAX); + struct pxa3xx_mfp_addr_map *p; + unsigned long offset, flags; + int i; spin_lock_irqsave(&mfp_spin_lock, flags); - mfpr_off = mfp_table[mfp].mfpr_off; - - mfpr_val = mfpr_readl(mfpr_off); - mfpr_val &= ~MFPR_RDH_MASK; - - if (likely(rdh)) - mfpr_val |= (1u << MFPR_SS_OFFSET); + for (p = map; p->start != MFP_PIN_INVALID; p++) { + offset = p->offset; + i = p->start; - mfpr_writel(mfpr_off, mfpr_val); - mfpr_sync(); + do { + mfp_table[i].mfpr_off = offset; + mfp_table[i].mfpr_run = 0; + mfp_table[i].mfpr_lpm = 0; + offset += 4; i++; + } while ((i <= p->end) && (p->end != -1)); + } spin_unlock_irqrestore(&mfp_spin_lock, flags); } -void pxa3xx_mfp_set_lpm(int mfp, int lpm) +void __init pxa3xx_init_mfp(void) { - uint32_t mfpr_off, mfpr_val; - unsigned long flags; - - BUG_ON(mfp >= MFP_PIN_MAX); - - spin_lock_irqsave(&mfp_spin_lock, flags); - - mfpr_off = mfp_table[mfp].mfpr_off; - mfpr_val = mfpr_readl(mfpr_off); - mfpr_val &= ~MFPR_LPM_MASK; - - if (lpm & 0x1) mfpr_val |= 1u << MFPR_SON_OFFSET; - if (lpm & 0x2) mfpr_val |= 1u << MFPR_SD_OFFSET; - if (lpm & 0x4) mfpr_val |= 1u << MFPR_PU_OFFSET; - if (lpm & 0x8) mfpr_val |= 1u << MFPR_PD_OFFSET; - if (lpm &0x10) mfpr_val |= 1u << MFPR_PS_OFFSET; - - mfpr_writel(mfpr_off, mfpr_val); - mfpr_sync(); + int i; - spin_unlock_irqrestore(&mfp_spin_lock, flags); + for (i = 0; i < ARRAY_SIZE(mfp_table); i++) + mfp_table[i].config = -1; } -void pxa3xx_mfp_set_pull(int mfp, int pull) +#ifdef CONFIG_PM +/* + * Configure the MFPs appropriately for suspend/resume. + * FIXME: this should probably depend on which system state we're + * entering - for instance, we might not want to place MFP pins in + * a pull-down mode if they're an active low chip select, and we're + * just entering standby. + */ +static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state) { - uint32_t mfpr_off, mfpr_val; - unsigned long flags; - - BUG_ON(mfp >= MFP_PIN_MAX); - - spin_lock_irqsave(&mfp_spin_lock, flags); + int pin; - mfpr_off = mfp_table[mfp].mfpr_off; - mfpr_val = mfpr_readl(mfpr_off); - mfpr_val &= ~MFPR_PULL_MASK; - mfpr_val |= ((pull & 0x7u) << MFPR_PD_OFFSET); - - mfpr_writel(mfpr_off, mfpr_val); - mfpr_sync(); - - spin_unlock_irqrestore(&mfp_spin_lock, flags); + for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) { + struct pxa3xx_mfp_pin *p = &mfp_table[pin]; + __mfp_config_lpm(p); + } + return 0; } -void pxa3xx_mfp_set_edge(int mfp, int edge) +static int pxa3xx_mfp_resume(struct sys_device *d) { - uint32_t mfpr_off, mfpr_val; - unsigned long flags; - - BUG_ON(mfp >= MFP_PIN_MAX); - - spin_lock_irqsave(&mfp_spin_lock, flags); - - mfpr_off = mfp_table[mfp].mfpr_off; - mfpr_val = mfpr_readl(mfpr_off); - - mfpr_val &= ~MFPR_EDGE_MASK; - mfpr_val |= (edge & 0x3u) << MFPR_ERE_OFFSET; - mfpr_val |= (!edge & 0x1) << MFPR_EC_OFFSET; + int pin; - mfpr_writel(mfpr_off, mfpr_val); - mfpr_sync(); - - spin_unlock_irqrestore(&mfp_spin_lock, flags); + for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) { + struct pxa3xx_mfp_pin *p = &mfp_table[pin]; + __mfp_config_run(p); + } + return 0; } -void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map) -{ - struct pxa3xx_mfp_addr_map *p; - unsigned long offset, flags; - int i; - - spin_lock_irqsave(&mfp_spin_lock, flags); - - for (p = map; p->start != MFP_PIN_INVALID; p++) { - offset = p->offset; - i = p->start; - - do { - mfp_table[i].mfpr_off = offset; - mfp_table[i].mfpr_val = 0; - offset += 4; i++; - } while ((i <= p->end) && (p->end != -1)); - } +static struct sysdev_class mfp_sysclass = { + set_kset_name("mfp"), + .suspend = pxa3xx_mfp_suspend, + .resume = pxa3xx_mfp_resume, +}; - spin_unlock_irqrestore(&mfp_spin_lock, flags); -} +static struct sys_device mfp_device = { + .id = 0, + .cls = &mfp_sysclass, +}; -void __init pxa3xx_init_mfp(void) +static int __init mfp_init_devicefs(void) { - memset(mfp_table, 0, sizeof(mfp_table)); + sysdev_class_register(&mfp_sysclass); + return sysdev_register(&mfp_device); } +device_initcall(mfp_init_devicefs); +#endif diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c new file mode 100644 index 000000000000..540c3bba5f9a --- /dev/null +++ b/arch/arm/mach-pxa/pcm027.c @@ -0,0 +1,216 @@ +/* + * linux/arch/arm/mach-pxa/pcm027.c + * Support for the Phytec phyCORE-PXA270 CPU card (aka PCM-027). + * + * Refer + * http://www.phytec.com/products/sbc/ARM-XScale/phyCORE-XScale-PXA270.html + * for additional hardware info + * + * Author: Juergen Kilb + * Created: April 05, 2005 + * Copyright: Phytec Messtechnik GmbH + * e-Mail: armlinux@phytec.de + * + * based on Intel Mainstone Board + * + * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/irq.h> +#include <linux/platform_device.h> +#include <linux/mtd/physmap.h> +#include <linux/spi/spi.h> +#include <linux/leds.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/arch/hardware.h> +#include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx_spi.h> +#include <asm/arch/pcm027.h> +#include "generic.h" + +/* + * ABSTRACT: + * + * The PXA270 processor comes with a bunch of hardware on its silicon. + * Not all of this hardware can be used at the same time and not all + * is routed to module's connectors. Also it depends on the baseboard, what + * kind of hardware can be used in which way. + * -> So this file supports the main devices on the CPU card only! + * Refer pcm990-baseboard.c how to extend this features to get a full + * blown system with many common interfaces. + * + * The PCM-027 supports the following interfaces through its connectors and + * will be used in pcm990-baseboard.c: + * + * - LCD support + * - MMC support + * - IDE/CF card + * - FFUART + * - BTUART + * - IRUART + * - AC97 + * - SSP + * - SSP3 + * + * Claimed GPIOs: + * GPIO0 -> IRQ input from RTC + * GPIO2 -> SYS_ENA*) + * GPIO3 -> PWR_SCL + * GPIO4 -> PWR_SDA + * GPIO5 -> PowerCap0*) + * GPIO6 -> PowerCap1*) + * GPIO7 -> PowerCap2*) + * GPIO8 -> PowerCap3*) + * GPIO15 -> /CS1 + * GPIO20 -> /CS2 + * GPIO21 -> /CS3 + * GPIO33 -> /CS5 network controller select + * GPIO52 -> IRQ from network controller + * GPIO78 -> /CS2 + * GPIO80 -> /CS4 + * GPIO90 -> LED0 + * GPIO91 -> LED1 + * GPIO114 -> IRQ from CAN controller + * GPIO117 -> SCL + * GPIO118 -> SDA + * + * *) CPU internal use only + */ + +/* + * SMC91x network controller specific stuff + */ +static struct resource smc91x_resources[] = { + [0] = { + .start = PCM027_ETH_PHYS + 0x300, + .end = PCM027_ETH_PHYS + PCM027_ETH_SIZE, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PCM027_ETH_IRQ, + .end = PCM027_ETH_IRQ, + /* note: smc91x's driver doesn't use the trigger bits yet */ + .flags = IORESOURCE_IRQ | PCM027_ETH_IRQ_EDGE, + } +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +static struct physmap_flash_data pcm027_flash_data = { + .width = 4, +}; + +static struct resource pcm027_flash_resource = { + .start = PCM027_FLASH_PHYS, + .end = PCM027_FLASH_PHYS + PCM027_FLASH_SIZE - 1 , + .flags = IORESOURCE_MEM, +}; + +static struct platform_device pcm027_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &pcm027_flash_data, + }, + .resource = &pcm027_flash_resource, + .num_resources = 1, +}; + +#ifdef CONFIG_LEDS_GPIO + +static struct gpio_led pcm027_led[] = { + { + .name = "led0:red", /* FIXME */ + .gpio = PCM027_LED_CPU + }, + { + .name = "led1:green", /* FIXME */ + .gpio = PCM027_LED_HEARD_BEAT + }, +}; + +static struct gpio_led_platform_data pcm027_led_data = { + .num_leds = ARRAY_SIZE(pcm027_led), + .leds = pcm027_led +}; + +static struct platform_device pcm027_led_dev = { + .name = "leds-gpio", + .id = 0, + .dev = { + .platform_data = &pcm027_led_data, + }, +}; + +#endif /* CONFIG_LEDS_GPIO */ + +/* + * declare the available device resources on this board + */ +static struct platform_device *devices[] __initdata = { + &smc91x_device, + &pcm027_flash, +#ifdef CONFIG_LEDS_GPIO + &pcm027_led_dev +#endif +}; + +/* + * pcm027_init - breath some life into the board + */ +static void __init pcm027_init(void) +{ + /* system bus arbiter setting + * - Core_Park + * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 + */ + ARB_CNTRL = ARB_CORE_PARK | 0x234; + + platform_add_devices(devices, ARRAY_SIZE(devices)); + + /* LEDs (on demand only) */ +#ifdef CONFIG_LEDS_GPIO + pxa_gpio_mode(PCM027_LED_CPU | GPIO_OUT); + pxa_gpio_mode(PCM027_LED_HEARD_BEAT | GPIO_OUT); +#endif /* CONFIG_LEDS_GPIO */ + + /* at last call the baseboard to initialize itself */ +#ifdef CONFIG_MACH_PCM990_BASEBOARD + pcm990_baseboard_init(); +#endif +} + +static void __init pcm027_map_io(void) +{ + pxa_map_io(); + + /* initialize sleep mode regs (wake-up sources, etc) */ + PGSR0 = 0x01308000; + PGSR1 = 0x00CF0002; + PGSR2 = 0x0E294000; + PGSR3 = 0x0000C000; + PWER = 0x40000000 | PWER_GPIO0 | PWER_GPIO1; + PRER = 0x00000000; + PFER = 0x00000003; +} + +MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") + /* Maintainer: Pengutronix */ + .boot_params = 0xa0000100, + .phys_io = 0x40000000, + .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, + .map_io = pcm027_map_io, + .init_irq = pxa27x_init_irq, + .timer = &pxa_timer, + .init_machine = pcm027_init, +MACHINE_END diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c new file mode 100644 index 000000000000..3dda16a20049 --- /dev/null +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -0,0 +1,330 @@ +/* + * arch/arm/mach-pxa/pcm990-baseboard.c + * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990). + * + * Refer + * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html + * for additional hardware info + * + * Author: Juergen Kilb + * Created: April 05, 2005 + * Copyright: Phytec Messtechnik GmbH + * e-Mail: armlinux@phytec.de + * + * based on Intel Mainstone Board + * + * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/irq.h> +#include <linux/platform_device.h> +#include <linux/ide.h> +#include <asm/mach/map.h> +#include <asm/arch/pxa-regs.h> +#include <asm/arch/mmc.h> +#include <asm/arch/ohci.h> +#include <asm/arch/pcm990_baseboard.h> + +/* + * The PCM-990 development baseboard uses PCM-027's hardeware in the + * following way: + * + * - LCD support is in use + * - GPIO16 is output for back light on/off with PWM + * - GPIO58 ... GPIO73 are outputs for display data + * - GPIO74 is output output for LCDFCLK + * - GPIO75 is output for LCDLCLK + * - GPIO76 is output for LCDPCLK + * - GPIO77 is output for LCDBIAS + * - MMC support is in use + * - GPIO32 is output for MMCCLK + * - GPIO92 is MMDAT0 + * - GPIO109 is MMDAT1 + * - GPIO110 is MMCS0 + * - GPIO111 is MMCS1 + * - GPIO112 is MMCMD + * - IDE/CF card is in use + * - GPIO48 is output /POE + * - GPIO49 is output /PWE + * - GPIO50 is output /PIOR + * - GPIO51 is output /PIOW + * - GPIO54 is output /PCE2 + * - GPIO55 is output /PREG + * - GPIO56 is input /PWAIT + * - GPIO57 is output /PIOS16 + * - GPIO79 is output PSKTSEL + * - GPIO85 is output /PCE1 + * - FFUART is in use + * - GPIO34 is input FFRXD + * - GPIO35 is input FFCTS + * - GPIO36 is input FFDCD + * - GPIO37 is input FFDSR + * - GPIO38 is input FFRI + * - GPIO39 is output FFTXD + * - GPIO40 is output FFDTR + * - GPIO41 is output FFRTS + * - BTUART is in use + * - GPIO42 is input BTRXD + * - GPIO43 is output BTTXD + * - GPIO44 is input BTCTS + * - GPIO45 is output BTRTS + * - IRUART is in use + * - GPIO46 is input STDRXD + * - GPIO47 is output STDTXD + * - AC97 is in use*) + * - GPIO28 is input AC97CLK + * - GPIO29 is input AC97DatIn + * - GPIO30 is output AC97DatO + * - GPIO31 is output AC97SYNC + * - GPIO113 is output AC97_RESET + * - SSP is in use + * - GPIO23 is output SSPSCLK + * - GPIO24 is output chip select to Max7301 + * - GPIO25 is output SSPTXD + * - GPIO26 is input SSPRXD + * - GPIO27 is input for Max7301 IRQ + * - GPIO53 is input SSPSYSCLK + * - SSP3 is in use + * - GPIO81 is output SSPTXD3 + * - GPIO82 is input SSPRXD3 + * - GPIO83 is output SSPSFRM + * - GPIO84 is output SSPCLK3 + * + * Otherwise claimed GPIOs: + * GPIO1 -> IRQ from user switch + * GPIO9 -> IRQ from power management + * GPIO10 -> IRQ from WML9712 AC97 controller + * GPIO11 -> IRQ from IDE controller + * GPIO12 -> IRQ from CF controller + * GPIO13 -> IRQ from CF controller + * GPIO14 -> GPIO free + * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path) + * GPIO19 -> GPIO free + * GPIO20 -> /SDCS2 + * GPIO21 -> /CS3 PC card socket select + * GPIO33 -> /CS5 network controller select + * GPIO78 -> /CS2 (16 bit wide data path) + * GPIO80 -> /CS4 (16 bit wide data path) + * GPIO86 -> GPIO free + * GPIO87 -> GPIO free + * GPIO90 -> LED0 on CPU module + * GPIO91 -> LED1 on CPI module + * GPIO117 -> SCL + * GPIO118 -> SDA + */ + +static unsigned long pcm990_irq_enabled; + +static void pcm990_mask_ack_irq(unsigned int irq) +{ + int pcm990_irq = (irq - PCM027_IRQ(0)); + PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); +} + +static void pcm990_unmask_irq(unsigned int irq) +{ + int pcm990_irq = (irq - PCM027_IRQ(0)); + /* the irq can be acknowledged only if deasserted, so it's done here */ + PCM990_INTSETCLR |= 1 << pcm990_irq; + PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); +} + +static struct irq_chip pcm990_irq_chip = { + .mask_ack = pcm990_mask_ack_irq, + .unmask = pcm990_unmask_irq, +}; + +static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; + + do { + GEDR(PCM990_CTRL_INT_IRQ_GPIO) = + GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO); + if (likely(pending)) { + irq = PCM027_IRQ(0) + __ffs(pending); + desc = irq_desc + irq; + desc_handle_irq(irq, desc); + } + pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; + } while (pending); +} + +static void __init pcm990_init_irq(void) +{ + int irq; + + /* setup extra PCM990 irqs */ + for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { + set_irq_chip(irq, &pcm990_irq_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + + PCM990_INTMSKENA = 0x00; /* disable all Interrupts */ + PCM990_INTSETCLR = 0xFF; + + set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); + set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); +} + +static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int, + void *data) +{ + int err; + + /* + * enable GPIO for PXA27x MMC controller + */ + pxa_gpio_mode(GPIO32_MMCCLK_MD); + pxa_gpio_mode(GPIO112_MMCCMD_MD); + pxa_gpio_mode(GPIO92_MMCDAT0_MD); + pxa_gpio_mode(GPIO109_MMCDAT1_MD); + pxa_gpio_mode(GPIO110_MMCDAT2_MD); + pxa_gpio_mode(GPIO111_MMCDAT3_MD); + + err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED, + "MMC card detect", data); + if (err) + printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC " + "card detect IRQ\n"); + + return err; +} + +static void pcm990_mci_setpower(struct device *dev, unsigned int vdd) +{ + struct pxamci_platform_data *p_d = dev->platform_data; + + if ((1 << vdd) & p_d->ocr_mask) + __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = + PCM990_CTRL_MMC2PWR; + else + __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = + ~PCM990_CTRL_MMC2PWR; +} + +static void pcm990_mci_exit(struct device *dev, void *data) +{ + free_irq(PCM027_MMCDET_IRQ, data); +} + +#define MSECS_PER_JIFFY (1000/HZ) + +static struct pxamci_platform_data pcm990_mci_platform_data = { + .detect_delay = 250 / MSECS_PER_JIFFY, + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .init = pcm990_mci_init, + .setpower = pcm990_mci_setpower, + .exit = pcm990_mci_exit, +}; + +/* + * init OHCI hardware to work with + * + * Note: Only USB port 1 (host only) is connected + * + * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low + * GPIO89 (USBHPEN#1): power-on out, on when low + */ +static int pcm990_ohci_init(struct device *dev) +{ + pxa_gpio_mode(PCM990_USB_OVERCURRENT); + pxa_gpio_mode(PCM990_USB_PWR_EN); + /* + * disable USB port 2 and 3 + * power sense is active low + */ + UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 | + UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE); + /* + * wait 10ms after Power on + * overcurrent per port + * power switch per port + */ + UHCRHDA = (5<<24) | (1<<11) | (1<<8); /* FIXME: Required? */ + + return 0; +} + +static struct pxaohci_platform_data pcm990_ohci_platform_data = { + .port_mode = PMM_PERPORT_MODE, + .init = pcm990_ohci_init, + .exit = NULL, +}; + +/* + * AC97 support + * Note: The connected AC97 mixer also reports interrupts at PCM990_AC97_IRQ + */ +static struct resource pxa27x_ac97_resources[] = { + [0] = { + .start = 0x40500000, + .end = 0x40500000 + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_AC97, + .end = IRQ_AC97, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 pxa_ac97_dmamask = 0xffffffffUL; + +static struct platform_device pxa27x_device_ac97 = { + .name = "pxa2xx-ac97", + .id = -1, + .dev = { + .dma_mask = &pxa_ac97_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(pxa27x_ac97_resources), + .resource = pxa27x_ac97_resources, +}; + +/* + * enable generic access to the base board control CPLDs U6 and U7 + */ +static struct map_desc pcm990_io_desc[] __initdata = { + { + .virtual = PCM990_CTRL_BASE, + .pfn = __phys_to_pfn(PCM990_CTRL_PHYS), + .length = PCM990_CTRL_SIZE, + .type = MT_DEVICE /* CPLD */ + }, { + .virtual = PCM990_CF_PLD_BASE, + .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS), + .length = PCM990_CF_PLD_SIZE, + .type = MT_DEVICE /* CPLD */ + } +}; + +/* + * system init for baseboard usage. Will be called by pcm027 init. + * + * Add platform devices present on this baseboard and init + * them from CPU side as far as required to use them later on + */ +void __init pcm990_baseboard_init(void) +{ + /* register CPLD access */ + iotable_init(pcm990_io_desc, ARRAY_SIZE(pcm990_io_desc)); + + /* register CPLD's IRQ controller */ + pcm990_init_irq(); + + platform_device_register(&pxa27x_device_ac97); + + /* MMC */ + pxa_set_mci_info(&pcm990_mci_platform_data); + + /* USB host */ + pxa_set_ohci_info(&pcm990_ohci_platform_data); + + printk(KERN_INFO"PCM-990 Evaluation baseboard initialized\n"); +} diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index a941c71c7d06..039194cbe477 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -38,34 +38,37 @@ int pxa_pm_enter(suspend_state_t state) iwmmxt_task_disable(NULL); #endif - pxa_cpu_pm_fns->save(sleep_save); + /* skip registers saving for standby */ + if (state != PM_SUSPEND_STANDBY) { + pxa_cpu_pm_fns->save(sleep_save); + /* before sleeping, calculate and save a checksum */ + for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) + sleep_save_checksum += sleep_save[i]; + } /* Clear sleep reset status */ RCSR = RCSR_SMR; - /* before sleeping, calculate and save a checksum */ - for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) - sleep_save_checksum += sleep_save[i]; - /* *** go zzz *** */ pxa_cpu_pm_fns->enter(state); cpu_init(); - /* after sleeping, validate the checksum */ - for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) - checksum += sleep_save[i]; + if (state != PM_SUSPEND_STANDBY) { + /* after sleeping, validate the checksum */ + for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) + checksum += sleep_save[i]; - /* if invalid, display message and wait for a hardware reset */ - if (checksum != sleep_save_checksum) { + /* if invalid, display message and wait for a hardware reset */ + if (checksum != sleep_save_checksum) { #ifdef CONFIG_ARCH_LUBBOCK - LUB_HEXLED = 0xbadbadc5; + LUB_HEXLED = 0xbadbadc5; #endif - while (1) - pxa_cpu_pm_fns->enter(state); + while (1) + pxa_cpu_pm_fns->enter(state); + } + pxa_cpu_pm_fns->restore(sleep_save); } - pxa_cpu_pm_fns->restore(sleep_save); - pr_debug("*** made it back from resume\n"); return 0; diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 655668d4d0e9..dd54496083cb 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -215,12 +215,10 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC card detect", data); - if (err) { + if (err) printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - return -1; - } - return 0; + return err; } static void poodle_mci_setpower(struct device *dev, unsigned int vdd) diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 9732d5d9466b..ddd05bf78e02 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -111,21 +111,27 @@ static const struct clkops clk_pxa25x_lcd_ops = { * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) */ +static struct clk pxa25x_hwuart_clk = + INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev) +; + static struct clk pxa25x_clks[] = { INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), - INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev), INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), + + INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev), + INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev), + INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev), + /* INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), - INIT_CKEN("SSPCLK", SSP, 3686400, 0, NULL), INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), - INIT_CKEN("NSSPCLK", NSSP, 3686400, 0, NULL), */ INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), }; @@ -213,8 +219,6 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) static void pxa25x_cpu_pm_enter(suspend_state_t state) { - CKEN = 0; - switch (state) { case PM_SUSPEND_MEM: /* set resume return address */ @@ -236,6 +240,8 @@ static void __init pxa25x_init_pm(void) { pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns; } +#else +static inline void pxa25x_init_pm(void) {} #endif /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm @@ -287,30 +293,33 @@ void __init pxa25x_init_irq(void) } static struct platform_device *pxa25x_devices[] __initdata = { - &pxa_device_mci, &pxa_device_udc, - &pxa_device_fb, &pxa_device_ffuart, &pxa_device_btuart, &pxa_device_stuart, - &pxa_device_i2c, &pxa_device_i2s, - &pxa_device_ficp, &pxa_device_rtc, + &pxa25x_device_ssp, + &pxa25x_device_nssp, + &pxa25x_device_assp, }; static int __init pxa25x_init(void) { int ret = 0; + /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ + if (cpu_is_pxa25x()) + clks_register(&pxa25x_hwuart_clk, 1); + if (cpu_is_pxa21x() || cpu_is_pxa25x()) { clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); if ((ret = pxa_init_dma(16))) return ret; -#ifdef CONFIG_PM + pxa25x_init_pm(); -#endif + ret = platform_add_devices(pxa25x_devices, ARRAY_SIZE(pxa25x_devices)); } diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 8e126e6b74c3..96cf274ec7cb 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -21,9 +21,11 @@ #include <asm/irq.h> #include <asm/arch/irqs.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #include <asm/arch/ohci.h> #include <asm/arch/pm.h> #include <asm/arch/dma.h> +#include <asm/arch/i2c.h> #include "generic.h" #include "devices.h" @@ -150,11 +152,12 @@ static struct clk pxa27x_clks[] = { INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL), + INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), + INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), + INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), + /* INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL), - INIT_CKEN("SSPCLK", SSP1, 13000000, 0, NULL), - INIT_CKEN("SSPCLK", SSP2, 13000000, 0, NULL), - INIT_CKEN("SSPCLK", SSP3, 13000000, 0, NULL), INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), @@ -263,12 +266,6 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) { extern void pxa_cpu_standby(void); - if (state == PM_SUSPEND_STANDBY) - CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER) | - (1 << CKEN_LCD) | (1 << CKEN_PWM0); - else - CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER); - /* ensure voltage-change sequencer not initiated, which hangs */ PCFR &= ~PCFR_FVC; @@ -304,6 +301,8 @@ static void __init pxa27x_init_pm(void) { pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns; } +#else +static inline void pxa27x_init_pm(void) {} #endif /* PXA27x: Various gpios can issue wakeup events. This logic only @@ -373,37 +372,6 @@ void __init pxa27x_init_irq(void) * device registration specific to PXA27x. */ -static u64 pxa27x_dmamask = 0xffffffffUL; - -static struct resource pxa27x_ohci_resources[] = { - [0] = { - .start = 0x4C000000, - .end = 0x4C00ff6f, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_USBH1, - .end = IRQ_USBH1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device pxa27x_device_ohci = { - .name = "pxa27x-ohci", - .id = -1, - .dev = { - .dma_mask = &pxa27x_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(pxa27x_ohci_resources), - .resource = pxa27x_ohci_resources, -}; - -void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) -{ - pxa27x_device_ohci.dev.platform_data = info; -} - static struct resource i2c_power_resources[] = { { .start = 0x40f00180, @@ -423,19 +391,22 @@ struct platform_device pxa27x_device_i2c_power = { .num_resources = ARRAY_SIZE(i2c_power_resources), }; +void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) +{ + pxa27x_device_i2c_power.dev.platform_data = info; +} + static struct platform_device *devices[] __initdata = { - &pxa_device_mci, &pxa_device_udc, - &pxa_device_fb, &pxa_device_ffuart, &pxa_device_btuart, &pxa_device_stuart, - &pxa_device_i2c, &pxa_device_i2s, - &pxa_device_ficp, &pxa_device_rtc, &pxa27x_device_i2c_power, - &pxa27x_device_ohci, + &pxa27x_device_ssp1, + &pxa27x_device_ssp2, + &pxa27x_device_ssp3, }; static int __init pxa27x_init(void) @@ -446,9 +417,9 @@ static int __init pxa27x_init(void) if ((ret = pxa_init_dma(32))) return ret; -#ifdef CONFIG_PM + pxa27x_init_pm(); -#endif + ret = platform_add_devices(devices, ARRAY_SIZE(devices)); } return ret; diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 61d9c9d69e6b..5cbf057a1b32 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -19,6 +19,7 @@ #include <linux/pm.h> #include <linux/platform_device.h> #include <linux/irq.h> +#include <linux/io.h> #include <asm/hardware.h> #include <asm/arch/pxa3xx-regs.h> @@ -86,7 +87,7 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info) HSS / 1000000, (HSS % 1000000) / 10000); } - return CLK; + return CLK / 1000; } /* @@ -189,8 +190,237 @@ static struct clk pxa3xx_clks[] = { PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev), + PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev), + + PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), + PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), + PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), + PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev), + + PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), + PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), + PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), +}; + +#ifdef CONFIG_PM +#define SLEEP_SAVE_SIZE 4 + +#define ISRAM_START 0x5c000000 +#define ISRAM_SIZE SZ_256K + +static void __iomem *sram; +static unsigned long wakeup_src; + +static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) +{ + pr_debug("PM: CKENA=%08x CKENB=%08x\n", CKENA, CKENB); + + if (CKENA & (1 << CKEN_USBH)) { + printk(KERN_ERR "PM: USB host clock not stopped?\n"); + CKENA &= ~(1 << CKEN_USBH); + } +// CKENA |= 1 << (CKEN_ISC & 31); + + /* + * Low power modes require the HSIO2 clock to be enabled. + */ + CKENB |= 1 << (CKEN_HSIO2 & 31); +} + +static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save) +{ + CKENB &= ~(1 << (CKEN_HSIO2 & 31)); +} + +/* + * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic + * memory controller has to be reinitialised, so we place some code + * in the SRAM to perform this function. + * + * We disable FIQs across the standby - otherwise, we might receive a + * FIQ while the SDRAM is unavailable. + */ +static void pxa3xx_cpu_standby(unsigned int pwrmode) +{ + extern const char pm_enter_standby_start[], pm_enter_standby_end[]; + void (*fn)(unsigned int) = (void __force *)(sram + 0x8000); + + memcpy_toio(sram + 0x8000, pm_enter_standby_start, + pm_enter_standby_end - pm_enter_standby_start); + + AD2D0SR = ~0; + AD2D1SR = ~0; + AD2D0ER = wakeup_src; + AD2D1ER = 0; + ASCR = ASCR; + ARSR = ARSR; + + local_fiq_disable(); + fn(pwrmode); + local_fiq_enable(); + + AD2D0ER = 0; + AD2D1ER = 0; + + printk("PM: AD2D0SR=%08x ASCR=%08x\n", AD2D0SR, ASCR); +} + +static void pxa3xx_cpu_pm_enter(suspend_state_t state) +{ + /* + * Don't sleep if no wakeup sources are defined + */ + if (wakeup_src == 0) + return; + + switch (state) { + case PM_SUSPEND_STANDBY: + pxa3xx_cpu_standby(PXA3xx_PM_S0D2C2); + break; + + case PM_SUSPEND_MEM: + break; + } +} + +static int pxa3xx_cpu_pm_valid(suspend_state_t state) +{ + return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; +} + +static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { + .save_size = SLEEP_SAVE_SIZE, + .save = pxa3xx_cpu_pm_save, + .restore = pxa3xx_cpu_pm_restore, + .valid = pxa3xx_cpu_pm_valid, + .enter = pxa3xx_cpu_pm_enter, }; +static void __init pxa3xx_init_pm(void) +{ + sram = ioremap(ISRAM_START, ISRAM_SIZE); + if (!sram) { + printk(KERN_ERR "Unable to map ISRAM: disabling standby/suspend\n"); + return; + } + + /* + * Since we copy wakeup code into the SRAM, we need to ensure + * that it is preserved over the low power modes. Note: bit 8 + * is undocumented in the developer manual, but must be set. + */ + AD1R |= ADXR_L2 | ADXR_R0; + AD2R |= ADXR_L2 | ADXR_R0; + AD3R |= ADXR_L2 | ADXR_R0; + + /* + * Clear the resume enable registers. + */ + AD1D0ER = 0; + AD2D0ER = 0; + AD2D1ER = 0; + AD3ER = 0; + + pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns; +} + +static int pxa3xx_set_wake(unsigned int irq, unsigned int on) +{ + unsigned long flags, mask = 0; + + switch (irq) { + case IRQ_SSP3: + mask = ADXER_MFP_WSSP3; + break; + case IRQ_MSL: + mask = ADXER_WMSL0; + break; + case IRQ_USBH2: + case IRQ_USBH1: + mask = ADXER_WUSBH; + break; + case IRQ_KEYPAD: + mask = ADXER_WKP; + break; + case IRQ_AC97: + mask = ADXER_MFP_WAC97; + break; + case IRQ_USIM: + mask = ADXER_WUSIM0; + break; + case IRQ_SSP2: + mask = ADXER_MFP_WSSP2; + break; + case IRQ_I2C: + mask = ADXER_MFP_WI2C; + break; + case IRQ_STUART: + mask = ADXER_MFP_WUART3; + break; + case IRQ_BTUART: + mask = ADXER_MFP_WUART2; + break; + case IRQ_FFUART: + mask = ADXER_MFP_WUART1; + break; + case IRQ_MMC: + mask = ADXER_MFP_WMMC1; + break; + case IRQ_SSP: + mask = ADXER_MFP_WSSP1; + break; + case IRQ_RTCAlrm: + mask = ADXER_WRTC; + break; + case IRQ_SSP4: + mask = ADXER_MFP_WSSP4; + break; + case IRQ_TSI: + mask = ADXER_WTSI; + break; + case IRQ_USIM2: + mask = ADXER_WUSIM1; + break; + case IRQ_MMC2: + mask = ADXER_MFP_WMMC2; + break; + case IRQ_NAND: + mask = ADXER_MFP_WFLASH; + break; + case IRQ_USB2: + mask = ADXER_WUSB2; + break; + case IRQ_WAKEUP0: + mask = ADXER_WEXTWAKE0; + break; + case IRQ_WAKEUP1: + mask = ADXER_WEXTWAKE1; + break; + case IRQ_MMC3: + mask = ADXER_MFP_GEN12; + break; + } + + local_irq_save(flags); + if (on) + wakeup_src |= mask; + else + wakeup_src &= ~mask; + local_irq_restore(flags); + + return 0; +} + +static void pxa3xx_init_irq_pm(void) +{ + pxa_init_irq_set_wake(pxa3xx_set_wake); +} + +#else +static inline void pxa3xx_init_pm(void) {} +static inline void pxa3xx_init_irq_pm(void) {} +#endif + void __init pxa3xx_init_irq(void) { /* enable CP6 access */ @@ -202,6 +432,7 @@ void __init pxa3xx_init_irq(void) pxa_init_irq_low(); pxa_init_irq_high(); pxa_init_irq_gpio(128); + pxa3xx_init_irq_pm(); } /* @@ -209,16 +440,16 @@ void __init pxa3xx_init_irq(void) */ static struct platform_device *devices[] __initdata = { - &pxa_device_mci, &pxa_device_udc, - &pxa_device_fb, &pxa_device_ffuart, &pxa_device_btuart, &pxa_device_stuart, - &pxa_device_i2c, &pxa_device_i2s, - &pxa_device_ficp, &pxa_device_rtc, + &pxa27x_device_ssp1, + &pxa27x_device_ssp2, + &pxa27x_device_ssp3, + &pxa3xx_device_ssp4, }; static int __init pxa3xx_init(void) @@ -231,6 +462,8 @@ static int __init pxa3xx_init(void) if ((ret = pxa_init_dma(32))) return ret; + pxa3xx_init_pm(); + return platform_add_devices(devices, ARRAY_SIZE(devices)); } return 0; diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h index da4769caaf72..047909a76651 100644 --- a/arch/arm/mach-pxa/sharpsl.h +++ b/arch/arm/mach-pxa/sharpsl.h @@ -26,28 +26,15 @@ void corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo); /* - * SharpSL Backlight + * SharpSL/Corgi LCD Driver */ -void corgi_bl_set_intensity(int intensity); -void spitz_bl_set_intensity(int intensity); -void akita_bl_set_intensity(int intensity); - - -/* - * SharpSL Touchscreen Driver - */ -unsigned long corgi_get_hsync_len(void); -unsigned long spitz_get_hsync_len(void); -void corgi_put_hsync(void); -void spitz_put_hsync(void); -void corgi_wait_hsync(void); -void spitz_wait_hsync(void); +void corgi_lcdtg_suspend(void); +void corgi_lcdtg_hw_init(int mode); /* * SharpSL Battery/PM Driver */ - #define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x)) /* MAX1111 Channel Definitions */ diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index d0447723b73a..14bb4a93ea52 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S @@ -16,6 +16,7 @@ #include <asm/hardware.h> #include <asm/arch/pxa-regs.h> +#include <asm/arch/pxa2xx-regs.h> #define MDREFR_KDIV 0x200a4000 // all banks #define CCCR_SLEEP 0x00000107 // L=7 2N=2 A=0 PPDIS=0 CPDIS=0 @@ -49,6 +50,7 @@ pxa_cpu_save_sp: str r0, [r1] ldr pc, [sp], #4 +#ifdef CONFIG_PXA27x /* * pxa27x_cpu_suspend() * @@ -104,9 +106,11 @@ ENTRY(pxa27x_cpu_suspend) @ align execution to a cache line b pxa_cpu_do_suspend +#endif +#ifdef CONFIG_PXA25x /* - * pxa27x_cpu_suspend() + * pxa25x_cpu_suspend() * * Forces CPU into sleep state. * @@ -169,6 +173,7 @@ ENTRY(pxa25x_cpu_suspend) mcr p14, 0, r0, c6, c0, 0 orr r0, r0, #2 @ initiate change bit b pxa_cpu_do_suspend +#endif .ltorg .align 5 @@ -208,7 +213,7 @@ pxa_cpu_do_suspend: 20: b 20b @ loop waiting for sleep /* - * cpu_pxa_resume() + * pxa_cpu_resume() * * entry point from bootloader into kernel during resume * diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 2d78199d24af..5078edeadf96 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -271,6 +271,55 @@ static struct platform_device spitzled_device = { /* * Spitz Touch Screen Device */ + +static unsigned long (*get_hsync_invperiod)(struct device *dev); + +static void inline sharpsl_wait_sync(int gpio) +{ + while((GPLR(gpio) & GPIO_bit(gpio)) == 0); + while((GPLR(gpio) & GPIO_bit(gpio)) != 0); +} + +static struct device *spitz_pxafb_dev; + +static int is_pxafb_device(struct device * dev, void * data) +{ + struct platform_device *pdev = container_of(dev, struct platform_device, dev); + + return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0); +} + +static unsigned long spitz_get_hsync_invperiod(void) +{ +#ifdef CONFIG_FB_PXA + if (!spitz_pxafb_dev) { + spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device); + if (!spitz_pxafb_dev) + return 0; + } + if (!get_hsync_invperiod) + get_hsync_invperiod = symbol_get(pxafb_get_hsync_time); + if (!get_hsync_invperiod) +#endif + return 0; + + return get_hsync_invperiod(spitz_pxafb_dev); +} + +static void spitz_put_hsync(void) +{ + put_device(spitz_pxafb_dev); + if (get_hsync_invperiod) + symbol_put(pxafb_get_hsync_time); + spitz_pxafb_dev = NULL; + get_hsync_invperiod = NULL; +} + +static void spitz_wait_hsync(void) +{ + sharpsl_wait_sync(SPITZ_GPIO_HSYNC); +} + static struct resource spitzts_resources[] = { [0] = { .start = SPITZ_IRQ_GPIO_TP_INT, @@ -280,9 +329,9 @@ static struct resource spitzts_resources[] = { }; static struct corgits_machinfo spitz_ts_machinfo = { - .get_hsync_len = spitz_get_hsync_len, - .put_hsync = spitz_put_hsync, - .wait_hsync = spitz_wait_hsync, + .get_hsync_invperiod = spitz_get_hsync_invperiod, + .put_hsync = spitz_put_hsync, + .wait_hsync = spitz_wait_hsync, }; static struct platform_device spitzts_device = { @@ -325,12 +374,10 @@ static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, vo err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC card detect", data); - if (err) { + if (err) printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - return -1; - } - return 0; + return err; } static void spitz_mci_setpower(struct device *dev, unsigned int vdd) @@ -423,6 +470,14 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = { * Spitz PXA Framebuffer */ +static void spitz_lcd_power(int on, struct fb_var_screeninfo *var) +{ + if (on) + corgi_lcdtg_hw_init(var->xres); + else + corgi_lcdtg_suspend(); +} + static struct pxafb_mode_info spitz_pxafb_modes[] = { { .pixclock = 19231, @@ -520,6 +575,27 @@ static void __init common_init(void) set_pxa_fb_info(&spitz_pxafb_info); } +#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) +static void spitz_bl_set_intensity(int intensity) +{ + if (intensity > 0x10) + intensity += 0x10; + + /* Bits 0-4 are accessed via the SSP interface */ + corgi_ssp_blduty_set(intensity & 0x1f); + + /* Bit 5 is via SCOOP */ + if (intensity & 0x0020) + reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); + else + set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); + + if (intensity) + set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); + else + reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); +} + static void __init spitz_init(void) { platform_scoop_config = &spitz_pcmcia_config; @@ -530,6 +606,7 @@ static void __init spitz_init(void) platform_device_register(&spitzscoop2_device); } +#endif #ifdef CONFIG_MACH_AKITA /* @@ -542,6 +619,26 @@ struct platform_device akitaioexp_device = { EXPORT_SYMBOL_GPL(akitaioexp_device); +static void akita_bl_set_intensity(int intensity) +{ + if (intensity > 0x10) + intensity += 0x10; + + /* Bits 0-4 are accessed via the SSP interface */ + corgi_ssp_blduty_set(intensity & 0x1f); + + /* Bit 5 is via IO-Expander */ + if (intensity & 0x0020) + akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); + else + akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); + + if (intensity) + akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); + else + akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); +} + static void __init akita_init(void) { spitz_ficp_platform_data.transceiver_mode = akita_irda_transceiver_mode; @@ -558,7 +655,6 @@ static void __init akita_init(void) } #endif - static void __init fixup_spitz(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi) { diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 422afee88169..00af7f2fed66 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c @@ -32,45 +32,27 @@ #include <linux/ioport.h> #include <linux/init.h> #include <linux/mutex.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/platform_device.h> + #include <asm/io.h> #include <asm/irq.h> #include <asm/hardware.h> #include <asm/arch/ssp.h> #include <asm/arch/pxa-regs.h> - -#define PXA_SSP_PORTS 3 +#include <asm/arch/regs-ssp.h> #define TIMEOUT 100000 -struct ssp_info_ { - int irq; - u32 clock; -}; - -/* - * SSP port clock and IRQ settings - */ -static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = { -#if defined (CONFIG_PXA27x) - {IRQ_SSP, CKEN_SSP1}, - {IRQ_SSP2, CKEN_SSP2}, - {IRQ_SSP3, CKEN_SSP3}, -#else - {IRQ_SSP, CKEN_SSP}, - {IRQ_NSSP, CKEN_NSSP}, - {IRQ_ASSP, CKEN_ASSP}, -#endif -}; - -static DEFINE_MUTEX(mutex); -static int use_count[PXA_SSP_PORTS] = {0, 0, 0}; - static irqreturn_t ssp_interrupt(int irq, void *dev_id) { - struct ssp_dev *dev = (struct ssp_dev*) dev_id; - unsigned int status = SSSR_P(dev->port); + struct ssp_dev *dev = dev_id; + struct ssp_device *ssp = dev->ssp; + unsigned int status; - SSSR_P(dev->port) = status; /* clear status bits */ + status = __raw_readl(ssp->mmio_base + SSSR); + __raw_writel(status, ssp->mmio_base + SSSR); if (status & SSSR_ROR) printk(KERN_WARNING "SSP(%d): receiver overrun\n", dev->port); @@ -99,15 +81,16 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id) */ int ssp_write_word(struct ssp_dev *dev, u32 data) { + struct ssp_device *ssp = dev->ssp; int timeout = TIMEOUT; - while (!(SSSR_P(dev->port) & SSSR_TNF)) { + while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_TNF)) { if (!--timeout) return -ETIMEDOUT; cpu_relax(); } - SSDR_P(dev->port) = data; + __raw_writel(data, ssp->mmio_base + SSDR); return 0; } @@ -129,15 +112,16 @@ int ssp_write_word(struct ssp_dev *dev, u32 data) */ int ssp_read_word(struct ssp_dev *dev, u32 *data) { + struct ssp_device *ssp = dev->ssp; int timeout = TIMEOUT; - while (!(SSSR_P(dev->port) & SSSR_RNE)) { + while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE)) { if (!--timeout) return -ETIMEDOUT; cpu_relax(); } - *data = SSDR_P(dev->port); + *data = __raw_readl(ssp->mmio_base + SSDR); return 0; } @@ -151,17 +135,28 @@ int ssp_read_word(struct ssp_dev *dev, u32 *data) */ int ssp_flush(struct ssp_dev *dev) { + struct ssp_device *ssp = dev->ssp; int timeout = TIMEOUT * 2; + /* ensure TX FIFO is empty instead of not full */ + if (cpu_is_pxa3xx()) { + while (__raw_readl(ssp->mmio_base + SSSR) & 0xf00) { + if (!--timeout) + return -ETIMEDOUT; + cpu_relax(); + } + timeout = TIMEOUT * 2; + } + do { - while (SSSR_P(dev->port) & SSSR_RNE) { + while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE) { if (!--timeout) return -ETIMEDOUT; - (void) SSDR_P(dev->port); + (void)__raw_readl(ssp->mmio_base + SSDR); } if (!--timeout) return -ETIMEDOUT; - } while (SSSR_P(dev->port) & SSSR_BSY); + } while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_BSY); return 0; } @@ -173,7 +168,12 @@ int ssp_flush(struct ssp_dev *dev) */ void ssp_enable(struct ssp_dev *dev) { - SSCR0_P(dev->port) |= SSCR0_SSE; + struct ssp_device *ssp = dev->ssp; + uint32_t sscr0; + + sscr0 = __raw_readl(ssp->mmio_base + SSCR0); + sscr0 |= SSCR0_SSE; + __raw_writel(sscr0, ssp->mmio_base + SSCR0); } /** @@ -183,7 +183,12 @@ void ssp_enable(struct ssp_dev *dev) */ void ssp_disable(struct ssp_dev *dev) { - SSCR0_P(dev->port) &= ~SSCR0_SSE; + struct ssp_device *ssp = dev->ssp; + uint32_t sscr0; + + sscr0 = __raw_readl(ssp->mmio_base + SSCR0); + sscr0 &= ~SSCR0_SSE; + __raw_writel(sscr0, ssp->mmio_base + SSCR0); } /** @@ -192,14 +197,16 @@ void ssp_disable(struct ssp_dev *dev) * * Save the configured SSP state for suspend. */ -void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp) +void ssp_save_state(struct ssp_dev *dev, struct ssp_state *state) { - ssp->cr0 = SSCR0_P(dev->port); - ssp->cr1 = SSCR1_P(dev->port); - ssp->to = SSTO_P(dev->port); - ssp->psp = SSPSP_P(dev->port); + struct ssp_device *ssp = dev->ssp; + + state->cr0 = __raw_readl(ssp->mmio_base + SSCR0); + state->cr1 = __raw_readl(ssp->mmio_base + SSCR1); + state->to = __raw_readl(ssp->mmio_base + SSTO); + state->psp = __raw_readl(ssp->mmio_base + SSPSP); - SSCR0_P(dev->port) &= ~SSCR0_SSE; + ssp_disable(dev); } /** @@ -208,16 +215,18 @@ void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp) * * Restore the SSP configuration saved previously by ssp_save_state. */ -void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp) +void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *state) { - SSSR_P(dev->port) = SSSR_ROR | SSSR_TUR | SSSR_BCE; + struct ssp_device *ssp = dev->ssp; + uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE; - SSCR0_P(dev->port) = ssp->cr0 & ~SSCR0_SSE; - SSCR1_P(dev->port) = ssp->cr1; - SSTO_P(dev->port) = ssp->to; - SSPSP_P(dev->port) = ssp->psp; + __raw_writel(sssr, ssp->mmio_base + SSSR); - SSCR0_P(dev->port) = ssp->cr0; + __raw_writel(state->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0); + __raw_writel(state->cr1, ssp->mmio_base + SSCR1); + __raw_writel(state->to, ssp->mmio_base + SSTO); + __raw_writel(state->psp, ssp->mmio_base + SSPSP); + __raw_writel(state->cr0, ssp->mmio_base + SSCR0); } /** @@ -231,15 +240,17 @@ void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp) */ int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed) { + struct ssp_device *ssp = dev->ssp; + dev->mode = mode; dev->flags = flags; dev->psp_flags = psp_flags; dev->speed = speed; /* set up port type, speed, port settings */ - SSCR0_P(dev->port) = (dev->speed | dev->mode); - SSCR1_P(dev->port) = dev->flags; - SSPSP_P(dev->port) = dev->psp_flags; + __raw_writel((dev->speed | dev->mode), ssp->mmio_base + SSCR0); + __raw_writel(dev->flags, ssp->mmio_base + SSCR1); + __raw_writel(dev->psp_flags, ssp->mmio_base + SSPSP); return 0; } @@ -256,44 +267,32 @@ int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 spee */ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags) { + struct ssp_device *ssp; int ret; - if (port > PXA_SSP_PORTS || port == 0) + ssp = ssp_request(port, "SSP"); + if (ssp == NULL) return -ENODEV; - mutex_lock(&mutex); - if (use_count[port - 1]) { - mutex_unlock(&mutex); - return -EBUSY; - } - use_count[port - 1]++; - - if (!request_mem_region(__PREG(SSCR0_P(port)), 0x2c, "SSP")) { - use_count[port - 1]--; - mutex_unlock(&mutex); - return -EBUSY; - } + dev->ssp = ssp; dev->port = port; /* do we need to get irq */ if (!(init_flags & SSP_NO_IRQ)) { - ret = request_irq(ssp_info[port-1].irq, ssp_interrupt, + ret = request_irq(ssp->irq, ssp_interrupt, 0, "SSP", dev); if (ret) goto out_region; - dev->irq = ssp_info[port-1].irq; + dev->irq = ssp->irq; } else dev->irq = 0; /* turn on SSP port clock */ - pxa_set_cken(ssp_info[port-1].clock, 1); - mutex_unlock(&mutex); + clk_enable(ssp->clk); return 0; out_region: - release_mem_region(__PREG(SSCR0_P(port)), 0x2c); - use_count[port - 1]--; - mutex_unlock(&mutex); + ssp_free(ssp); return ret; } @@ -304,23 +303,240 @@ out_region: */ void ssp_exit(struct ssp_dev *dev) { - mutex_lock(&mutex); - SSCR0_P(dev->port) &= ~SSCR0_SSE; + struct ssp_device *ssp = dev->ssp; + + ssp_disable(dev); + free_irq(dev->irq, dev); + clk_disable(ssp->clk); + ssp_free(ssp); +} + +static DEFINE_MUTEX(ssp_lock); +static LIST_HEAD(ssp_list); + +struct ssp_device *ssp_request(int port, const char *label) +{ + struct ssp_device *ssp = NULL; + + mutex_lock(&ssp_lock); + + list_for_each_entry(ssp, &ssp_list, node) { + if (ssp->port_id == port && ssp->use_count == 0) { + ssp->use_count++; + ssp->label = label; + break; + } + } + + mutex_unlock(&ssp_lock); + + if (ssp->port_id != port) + return NULL; + + return ssp; +} +EXPORT_SYMBOL(ssp_request); + +void ssp_free(struct ssp_device *ssp) +{ + mutex_lock(&ssp_lock); + if (ssp->use_count) { + ssp->use_count--; + ssp->label = NULL; + } else + dev_err(&ssp->pdev->dev, "device already free\n"); + mutex_unlock(&ssp_lock); +} +EXPORT_SYMBOL(ssp_free); + +static int __devinit ssp_probe(struct platform_device *pdev, int type) +{ + struct resource *res; + struct ssp_device *ssp; + int ret = 0; + + ssp = kzalloc(sizeof(struct ssp_device), GFP_KERNEL); + if (ssp == NULL) { + dev_err(&pdev->dev, "failed to allocate memory"); + return -ENOMEM; + } + + ssp->clk = clk_get(&pdev->dev, "SSPCLK"); + if (IS_ERR(ssp->clk)) { + ret = PTR_ERR(ssp->clk); + goto err_free; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + dev_err(&pdev->dev, "no memory resource defined\n"); + ret = -ENODEV; + goto err_free_clk; + } + + res = request_mem_region(res->start, res->end - res->start + 1, + pdev->name); + if (res == NULL) { + dev_err(&pdev->dev, "failed to request memory resource\n"); + ret = -EBUSY; + goto err_free_clk; + } + + ssp->phys_base = res->start; + + ssp->mmio_base = ioremap(res->start, res->end - res->start + 1); + if (ssp->mmio_base == NULL) { + dev_err(&pdev->dev, "failed to ioremap() registers\n"); + ret = -ENODEV; + goto err_free_mem; + } + + ssp->irq = platform_get_irq(pdev, 0); + if (ssp->irq < 0) { + dev_err(&pdev->dev, "no IRQ resource defined\n"); + ret = -ENODEV; + goto err_free_io; + } + + res = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (res == NULL) { + dev_err(&pdev->dev, "no SSP RX DRCMR defined\n"); + ret = -ENODEV; + goto err_free_io; + } + ssp->drcmr_rx = res->start; + + res = platform_get_resource(pdev, IORESOURCE_DMA, 1); + if (res == NULL) { + dev_err(&pdev->dev, "no SSP TX DRCMR defined\n"); + ret = -ENODEV; + goto err_free_io; + } + ssp->drcmr_tx = res->start; + + /* PXA2xx/3xx SSP ports starts from 1 and the internal pdev->id + * starts from 0, do a translation here + */ + ssp->port_id = pdev->id + 1; + ssp->use_count = 0; + ssp->type = type; + + mutex_lock(&ssp_lock); + list_add(&ssp->node, &ssp_list); + mutex_unlock(&ssp_lock); + + platform_set_drvdata(pdev, ssp); + return 0; + +err_free_io: + iounmap(ssp->mmio_base); +err_free_mem: + release_mem_region(res->start, res->end - res->start + 1); +err_free_clk: + clk_put(ssp->clk); +err_free: + kfree(ssp); + return ret; +} + +static int __devexit ssp_remove(struct platform_device *pdev) +{ + struct resource *res; + struct ssp_device *ssp; + + ssp = platform_get_drvdata(pdev); + if (ssp == NULL) + return -ENODEV; + + iounmap(ssp->mmio_base); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(res->start, res->end - res->start + 1); + + clk_put(ssp->clk); - if (dev->port > PXA_SSP_PORTS || dev->port == 0) { - printk(KERN_WARNING "SSP: tried to close invalid port\n"); - mutex_unlock(&mutex); - return; + mutex_lock(&ssp_lock); + list_del(&ssp->node); + mutex_unlock(&ssp_lock); + + kfree(ssp); + return 0; +} + +static int __devinit pxa25x_ssp_probe(struct platform_device *pdev) +{ + return ssp_probe(pdev, PXA25x_SSP); +} + +static int __devinit pxa25x_nssp_probe(struct platform_device *pdev) +{ + return ssp_probe(pdev, PXA25x_NSSP); +} + +static int __devinit pxa27x_ssp_probe(struct platform_device *pdev) +{ + return ssp_probe(pdev, PXA27x_SSP); +} + +static struct platform_driver pxa25x_ssp_driver = { + .driver = { + .name = "pxa25x-ssp", + }, + .probe = pxa25x_ssp_probe, + .remove = __devexit_p(ssp_remove), +}; + +static struct platform_driver pxa25x_nssp_driver = { + .driver = { + .name = "pxa25x-nssp", + }, + .probe = pxa25x_nssp_probe, + .remove = __devexit_p(ssp_remove), +}; + +static struct platform_driver pxa27x_ssp_driver = { + .driver = { + .name = "pxa27x-ssp", + }, + .probe = pxa27x_ssp_probe, + .remove = __devexit_p(ssp_remove), +}; + +static int __init pxa_ssp_init(void) +{ + int ret = 0; + + ret = platform_driver_register(&pxa25x_ssp_driver); + if (ret) { + printk(KERN_ERR "failed to register pxa25x_ssp_driver"); + return ret; + } + + ret = platform_driver_register(&pxa25x_nssp_driver); + if (ret) { + printk(KERN_ERR "failed to register pxa25x_nssp_driver"); + return ret; + } + + ret = platform_driver_register(&pxa27x_ssp_driver); + if (ret) { + printk(KERN_ERR "failed to register pxa27x_ssp_driver"); + return ret; } - pxa_set_cken(ssp_info[dev->port-1].clock, 0); - if (dev->irq) - free_irq(dev->irq, dev); - release_mem_region(__PREG(SSCR0_P(dev->port)), 0x2c); - use_count[dev->port - 1]--; - mutex_unlock(&mutex); + return ret; +} + +static void __exit pxa_ssp_exit(void) +{ + platform_driver_unregister(&pxa25x_ssp_driver); + platform_driver_unregister(&pxa25x_nssp_driver); + platform_driver_unregister(&pxa27x_ssp_driver); } +arch_initcall(pxa_ssp_init); +module_exit(pxa_ssp_exit); + EXPORT_SYMBOL(ssp_write_word); EXPORT_SYMBOL(ssp_read_word); EXPORT_SYMBOL(ssp_flush); diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index d774430d02c0..167412e6bec8 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S @@ -17,6 +17,7 @@ .text +#ifdef CONFIG_PXA27x ENTRY(pxa_cpu_standby) ldr r0, =PSSR mov r1, #(PSSR_PH | PSSR_STS) @@ -29,3 +30,85 @@ ENTRY(pxa_cpu_standby) 1: mcr p14, 0, r2, c7, c0, 0 @ put the system into Standby str r1, [r0] @ make sure PSSR_PH/STS are clear mov pc, lr + +#endif + +#ifdef CONFIG_PXA3xx + +#define MDCNFG 0x0000 +#define MDCNFG_DMCEN (1 << 30) +#define DDR_HCAL 0x0060 +#define DDR_HCAL_HCRNG 0x1f +#define DDR_HCAL_HCPROG (1 << 28) +#define DDR_HCAL_HCEN (1 << 31) +#define DMCIER 0x0070 +#define DMCIER_EDLP (1 << 29) +#define DMCISR 0x0078 +#define RCOMP 0x0100 +#define RCOMP_SWEVAL (1 << 31) + +ENTRY(pm_enter_standby_start) + mov r1, #0xf6000000 @ DMEMC_REG_BASE (MDCNFG) + add r1, r1, #0x00100000 + + /* + * Preload the TLB entry for accessing the dynamic memory + * controller registers. Note that page table lookups will + * fail until the dynamic memory controller has been + * reinitialised - and that includes MMU page table walks. + * This also means that only the dynamic memory controller + * can be reliably accessed in the code following standby. + */ + ldr r2, [r1] @ Dummy read MDCNFG + + mcr p14, 0, r0, c7, c0, 0 + .rept 8 + nop + .endr + + ldr r0, [r1, #DDR_HCAL] @ Clear (and wait for) HCEN + bic r0, r0, #DDR_HCAL_HCEN + str r0, [r1, #DDR_HCAL] +1: ldr r0, [r1, #DDR_HCAL] + tst r0, #DDR_HCAL_HCEN + bne 1b + + ldr r0, [r1, #RCOMP] @ Initiate RCOMP + orr r0, r0, #RCOMP_SWEVAL + str r0, [r1, #RCOMP] + + mov r0, #~0 @ Clear interrupts + str r0, [r1, #DMCISR] + + ldr r0, [r1, #DMCIER] @ set DMIER[EDLP] + orr r0, r0, #DMCIER_EDLP + str r0, [r1, #DMCIER] + + ldr r0, [r1, #DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN + bic r0, r0, #DDR_HCAL_HCRNG + orr r0, r0, #DDR_HCAL_HCEN | DDR_HCAL_HCPROG + str r0, [r1, #DDR_HCAL] + +1: ldr r0, [r1, #DMCISR] + tst r0, #DMCIER_EDLP + beq 1b + + ldr r0, [r1, #MDCNFG] @ set MDCNFG[DMCEN] + orr r0, r0, #MDCNFG_DMCEN + str r0, [r1, #MDCNFG] +1: ldr r0, [r1, #MDCNFG] + tst r0, #MDCNFG_DMCEN + beq 1b + + ldr r0, [r1, #DDR_HCAL] @ set DDR_HCAL[HCRNG] + orr r0, r0, #2 @ HCRNG + str r0, [r1, #DDR_HCAL] + + ldr r0, [r1, #DMCIER] @ Clear the interrupt + bic r0, r0, #0x20000000 + str r0, [r1, #DMCIER] + + mov pc, lr +ENTRY(pm_enter_standby_end) + +#endif diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index fbfa1920353d..7b7c0179795b 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c @@ -59,55 +59,17 @@ unsigned long long sched_clock(void) } +#define MIN_OSCR_DELTA 16 + static irqreturn_t pxa_ost0_interrupt(int irq, void *dev_id) { - int next_match; struct clock_event_device *c = dev_id; - if (c->mode == CLOCK_EVT_MODE_ONESHOT) { - /* Disarm the compare/match, signal the event. */ - OIER &= ~OIER_E0; - OSSR = OSSR_M0; - c->event_handler(c); - } else if (c->mode == CLOCK_EVT_MODE_PERIODIC) { - /* Call the event handler as many times as necessary - * to recover missed events, if any (if we update - * OSMR0 and OSCR0 is still ahead of us, we've missed - * the event). As we're dealing with that, re-arm the - * compare/match for the next event. - * - * HACK ALERT: - * - * There's a latency between the instruction that - * writes to OSMR0 and the actual commit to the - * physical hardware, because the CPU doesn't (have - * to) run at bus speed, there's a write buffer - * between the CPU and the bus, etc. etc. So if the - * target OSCR0 is "very close", to the OSMR0 load - * value, the update to OSMR0 might not get to the - * hardware in time and we'll miss that interrupt. - * - * To be safe, if the new OSMR0 is "very close" to the - * target OSCR0 value, we call the event_handler as - * though the event actually happened. According to - * Nico's comment in the previous version of this - * code, experience has shown that 6 OSCR ticks is - * "very close" but he went with 8. We will use 16, - * based on the results of testing on PXA270. - * - * To be doubly sure, we also tell clkevt via - * clockevents_register_device() not to ask for - * anything that might put us "very close". - */ -#define MIN_OSCR_DELTA 16 - do { - OSSR = OSSR_M0; - next_match = (OSMR0 += LATCH); - c->event_handler(c); - } while (((signed long)(next_match - OSCR) <= MIN_OSCR_DELTA) - && (c->mode == CLOCK_EVT_MODE_PERIODIC)); - } + /* Disarm the compare/match, signal the event. */ + OIER &= ~OIER_E0; + OSSR = OSSR_M0; + c->event_handler(c); return IRQ_HANDLED; } @@ -133,14 +95,6 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) unsigned long irqflags; switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - raw_local_irq_save(irqflags); - OSSR = OSSR_M0; - OIER |= OIER_E0; - OSMR0 = OSCR + LATCH; - raw_local_irq_restore(irqflags); - break; - case CLOCK_EVT_MODE_ONESHOT: raw_local_irq_save(irqflags); OIER &= ~OIER_E0; @@ -158,13 +112,14 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) break; case CLOCK_EVT_MODE_RESUME: + case CLOCK_EVT_MODE_PERIODIC: break; } } static struct clock_event_device ckevt_pxa_osmr0 = { .name = "osmr0", - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .features = CLOCK_EVT_FEAT_ONESHOT, .shift = 32, .rating = 200, .cpumask = CPU_MASK_CPU0, @@ -214,7 +169,7 @@ static void __init pxa_timer_init(void) ckevt_pxa_osmr0.max_delta_ns = clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); ckevt_pxa_osmr0.min_delta_ns = - clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1; + clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1; cksrc_pxa_oscr0.mult = clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift); @@ -226,7 +181,7 @@ static void __init pxa_timer_init(void) } #ifdef CONFIG_PM -static unsigned long osmr[4], oier; +static unsigned long osmr[4], oier, oscr; static void pxa_timer_suspend(void) { @@ -235,23 +190,26 @@ static void pxa_timer_suspend(void) osmr[2] = OSMR2; osmr[3] = OSMR3; oier = OIER; + oscr = OSCR; } static void pxa_timer_resume(void) { + /* + * Ensure that we have at least MIN_OSCR_DELTA between match + * register 0 and the OSCR, to guarantee that we will receive + * the one-shot timer interrupt. We adjust OSMR0 in preference + * to OSCR to guarantee that OSCR is monotonically incrementing. + */ + if (osmr[0] - oscr < MIN_OSCR_DELTA) + osmr[0] += MIN_OSCR_DELTA; + OSMR0 = osmr[0]; OSMR1 = osmr[1]; OSMR2 = osmr[2]; OSMR3 = osmr[3]; OIER = oier; - - /* - * OSCR0 is the system timer, which has to increase - * monotonically until it rolls over in hardware. The value - * (OSMR0 - LATCH) is OSCR0 at the most recent system tick, - * which is a handy value to restore to OSCR0. - */ - OSCR = OSMR0 - LATCH; + OSCR = oscr; } #else #define pxa_timer_suspend NULL diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 240fd042083d..1919756900f4 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -184,16 +184,13 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250); - err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, IRQF_DISABLED, + err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, + IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "MMC/SD card detect", data); - if (err) { + if (err) printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - return -1; - } - - set_irq_type(TOSA_IRQ_GPIO_nSD_DETECT, IRQT_BOTHEDGE); - return 0; + return err; } static void tosa_mci_setpower(struct device *dev, unsigned int vdd) diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index e4ba43bdf85d..853fc9433750 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -296,11 +296,10 @@ static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, v err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, IRQF_DISABLED | IRQF_TRIGGER_RISING, "MMC card detect", data); - if (err) { + if (err) printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); - return -1; - } - return 0; + + return err; } static void trizeps4_mci_exit(struct device *dev, void *data) diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 743a87b2faa1..7731d50dd86c 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -25,9 +25,13 @@ #include <asm/arch/gpio.h> #include <asm/arch/pxafb.h> #include <asm/arch/zylonite.h> +#include <asm/arch/mmc.h> #include "generic.h" +#define MAX_SLOTS 3 +struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS]; + int gpio_backlight; int gpio_eth_irq; @@ -43,7 +47,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = -1, /* for run-time assignment */ .end = -1, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } }; @@ -156,6 +160,95 @@ static void __init zylonite_init_lcd(void) static inline void zylonite_init_lcd(void) {} #endif +#if defined(CONFIG_MMC) +static int zylonite_mci_ro(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + + return gpio_get_value(zylonite_mmc_slot[pdev->id].gpio_wp); +} + +static int zylonite_mci_init(struct device *dev, + irq_handler_t zylonite_detect_int, + void *data) +{ + struct platform_device *pdev = to_platform_device(dev); + int err, cd_irq, gpio_cd, gpio_wp; + + cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); + gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; + gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; + + /* + * setup GPIO for Zylonite MMC controller + */ + err = gpio_request(gpio_cd, "mmc card detect"); + if (err) + goto err_request_cd; + gpio_direction_input(gpio_cd); + + err = gpio_request(gpio_wp, "mmc write protect"); + if (err) + goto err_request_wp; + gpio_direction_input(gpio_wp); + + err = request_irq(cd_irq, zylonite_detect_int, + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, + "MMC card detect", data); + if (err) { + printk(KERN_ERR "%s: MMC/SD/SDIO: " + "can't request card detect IRQ\n", __func__); + goto err_request_irq; + } + + return 0; + +err_request_irq: + gpio_free(gpio_wp); +err_request_wp: + gpio_free(gpio_cd); +err_request_cd: + return err; +} + +static void zylonite_mci_exit(struct device *dev, void *data) +{ + struct platform_device *pdev = to_platform_device(dev); + int cd_irq, gpio_cd, gpio_wp; + + cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); + gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; + gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; + + free_irq(cd_irq, data); + gpio_free(gpio_cd); + gpio_free(gpio_wp); +} + +static struct pxamci_platform_data zylonite_mci_platform_data = { + .detect_delay = 20, + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .init = zylonite_mci_init, + .exit = zylonite_mci_exit, + .get_ro = zylonite_mci_ro, +}; + +static struct pxamci_platform_data zylonite_mci2_platform_data = { + .detect_delay = 20, + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, +}; + +static void __init zylonite_init_mmc(void) +{ + pxa_set_mci_info(&zylonite_mci_platform_data); + pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); + if (cpu_is_pxa310()) + pxa3xx_set_mci3_info(&zylonite_mci_platform_data); +} +#else +static inline void zylonite_init_mmc(void) {} +#endif + static void __init zylonite_init(void) { /* board-processor specific initialization */ @@ -171,6 +264,7 @@ static void __init zylonite_init(void) platform_device_register(&smc91x_device); zylonite_init_lcd(); + zylonite_init_mmc(); } MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 1832bc316501..6ac04c09b0e9 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c @@ -53,13 +53,13 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { /* BTUART */ GPIO111_UART2_RTS, - GPIO112_UART2_RXD, + GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, GPIO113_UART2_TXD, - GPIO114_UART2_CTS, + GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, /* STUART */ GPIO109_UART3_TXD, - GPIO110_UART3_RXD, + GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, /* AC97 */ GPIO23_AC97_nACRESET, @@ -70,16 +70,16 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { GPIO28_AC97_SYNC, /* Keypad */ - GPIO107_KP_DKIN_0, - GPIO108_KP_DKIN_1, - GPIO115_KP_MKIN_0, - GPIO116_KP_MKIN_1, - GPIO117_KP_MKIN_2, - GPIO118_KP_MKIN_3, - GPIO119_KP_MKIN_4, - GPIO120_KP_MKIN_5, - GPIO2_2_KP_MKIN_6, - GPIO3_2_KP_MKIN_7, + GPIO107_KP_DKIN_0 | MFP_LPM_EDGE_BOTH, + GPIO108_KP_DKIN_1 | MFP_LPM_EDGE_BOTH, + GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, + GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, + GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, + GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, + GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, + GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, + GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, + GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, GPIO121_KP_MKOUT_0, GPIO122_KP_MKOUT_1, GPIO123_KP_MKOUT_2, @@ -88,16 +88,33 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { GPIO4_2_KP_MKOUT_5, GPIO5_2_KP_MKOUT_6, GPIO6_2_KP_MKOUT_7, + + /* MMC1 */ + GPIO3_MMC1_DAT0, + GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO5_MMC1_DAT2, + GPIO6_MMC1_DAT3, + GPIO7_MMC1_CLK, + GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ + GPIO15_GPIO, /* CMD1 default as GPIO for slot 0 */ + + /* MMC2 */ + GPIO9_MMC2_DAT0, + GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO11_MMC2_DAT2, + GPIO12_MMC2_DAT3, + GPIO13_MMC2_CLK, + GPIO14_MMC2_CMD, }; static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { /* FFUART */ - GPIO30_UART1_RXD, + GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, GPIO31_UART1_TXD, GPIO32_UART1_CTS, GPIO37_UART1_RTS, GPIO33_UART1_DCD, - GPIO34_UART1_DSR, + GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, GPIO35_UART1_RI, GPIO36_UART1_DTR, @@ -108,7 +125,7 @@ static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { static mfp_cfg_t pxa310_mfp_cfg[] __initdata = { /* FFUART */ - GPIO99_UART1_RXD, + GPIO99_UART1_RXD | MFP_LPM_EDGE_FALL, GPIO100_UART1_TXD, GPIO101_UART1_CTS, GPIO106_UART1_RTS, @@ -116,6 +133,14 @@ static mfp_cfg_t pxa310_mfp_cfg[] __initdata = { /* Ethernet */ GPIO2_nCS3, GPIO102_GPIO, + + /* MMC3 */ + GPIO7_2_MMC3_DAT0, + GPIO8_2_MMC3_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO9_2_MMC3_DAT2, + GPIO10_2_MMC3_DAT3, + GPIO103_MMC3_CLK, + GPIO105_MMC3_CMD, }; #define NUM_LCD_DETECT_PINS 7 @@ -174,6 +199,10 @@ void __init zylonite_pxa300_init(void) /* GPIO pin assignment */ gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO20); + + /* MMC card detect & write protect for controller 0 */ + zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0); + zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2); } if (cpu_is_pxa300()) { @@ -184,5 +213,9 @@ void __init zylonite_pxa300_init(void) if (cpu_is_pxa310()) { pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); + + /* MMC card detect & write protect for controller 2 */ + zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30); + zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31); } } diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 94c715808b59..dfa79992b8ab 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c @@ -51,11 +51,11 @@ static mfp_cfg_t mfp_cfg[] __initdata = { GPIO17_2_LCD_BIAS, /* FFUART */ - GPIO41_UART1_RXD, + GPIO41_UART1_RXD | MFP_LPM_EDGE_FALL, GPIO42_UART1_TXD, GPIO43_UART1_CTS, GPIO44_UART1_DCD, - GPIO45_UART1_DSR, + GPIO45_UART1_DSR | MFP_LPM_EDGE_FALL, GPIO46_UART1_RI, GPIO47_UART1_DTR, GPIO48_UART1_RTS, @@ -73,16 +73,16 @@ static mfp_cfg_t mfp_cfg[] __initdata = { GPIO33_I2C_SDA, /* Keypad */ - GPIO105_KP_DKIN_0, - GPIO106_KP_DKIN_1, - GPIO113_KP_MKIN_0, - GPIO114_KP_MKIN_1, - GPIO115_KP_MKIN_2, - GPIO116_KP_MKIN_3, - GPIO117_KP_MKIN_4, - GPIO118_KP_MKIN_5, - GPIO119_KP_MKIN_6, - GPIO120_KP_MKIN_7, + GPIO105_KP_DKIN_0 | MFP_LPM_EDGE_BOTH, + GPIO106_KP_DKIN_1 | MFP_LPM_EDGE_BOTH, + GPIO113_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, + GPIO114_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, + GPIO115_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, + GPIO116_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, + GPIO117_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, + GPIO118_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, + GPIO119_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, + GPIO120_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, GPIO121_KP_MKOUT_0, GPIO122_KP_MKOUT_1, GPIO123_KP_MKOUT_2, @@ -95,6 +95,23 @@ static mfp_cfg_t mfp_cfg[] __initdata = { /* Ethernet */ GPIO4_nCS3, GPIO90_GPIO, + + /* MMC1 */ + GPIO18_MMC1_DAT0, + GPIO19_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO20_MMC1_DAT2, + GPIO21_MMC1_DAT3, + GPIO22_MMC1_CLK, + GPIO23_MMC1_CMD,/* CMD0 for slot 0 */ + GPIO31_GPIO, /* CMD1 default as GPIO for slot 0 */ + + /* MMC2 */ + GPIO24_MMC2_DAT0, + GPIO25_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, + GPIO26_MMC2_DAT2, + GPIO27_MMC2_DAT3, + GPIO28_MMC2_CLK, + GPIO29_MMC2_CMD, }; #define NUM_LCD_DETECT_PINS 7 @@ -169,5 +186,9 @@ void __init zylonite_pxa320_init(void) /* GPIO pin assignment */ gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO14); gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); + + /* MMC card detect & write protect for controller 0 */ + zylonite_mmc_slot[0].gpio_cd = mfp_to_gpio(MFP_PIN_GPIO1); + zylonite_mmc_slot[0].gpio_wp = mfp_to_gpio(MFP_PIN_GPIO5); } } diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index c7f1b44da40d..61d70218f1e8 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -530,8 +530,6 @@ static unsigned long realview_gettimeoffset(void) */ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - // ...clear the interrupt writel(1, TIMER0_VA_BASE + TIMER_INTCLR); @@ -542,8 +540,6 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id) update_process_times(user_mode(get_irq_regs())); #endif - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 587864fe25fb..66175471fff3 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -530,7 +530,7 @@ static struct s3c2410fb_mach_info __initdata bast_fb_info = { .displays = bast_lcd_info, .num_displays = ARRAY_SIZE(bast_lcd_info), - .default_display = 4, + .default_display = 1, }; /* Standard BAST devices */ @@ -540,7 +540,6 @@ static struct platform_device *bast_devices[] __initdata = { &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c, - &s3c_device_iis, &s3c_device_rtc, &s3c_device_nand, &bast_device_nor, diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index 9f43f3f124f5..3aade7b78fe5 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -365,7 +365,6 @@ static struct platform_device *vr1000_devices[] __initdata = { &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c, - &s3c_device_iis, &s3c_device_adc, &serial_device, &vr1000_nor, diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c index bcd562ac1d3d..6aec86a5da56 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c2410/usb-simtec.c @@ -60,7 +60,7 @@ usb_simtec_powercontrol(int port, int to) static irqreturn_t usb_simtec_ocirq(int irq, void *pw) { - struct s3c2410_hcd_info *info = (struct s3c2410_hcd_info *)pw; + struct s3c2410_hcd_info *info = pw; if (s3c2410_gpio_getpin(S3C2410_GPG10) == 0) { pr_debug("usb_simtec: over-current irq (oc detected)\n"); diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig index 8e8fe48ea47f..0b43431d4b75 100644 --- a/arch/arm/mach-s3c2412/Kconfig +++ b/arch/arm/mach-s3c2412/Kconfig @@ -10,6 +10,7 @@ config CPU_S3C2412 select CPU_LLSERIAL_S3C2440 select S3C2412_PM if PM select S3C2412_DMA if S3C2410_DMA + select S3C2410_GPIO help Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile index f8e011691b31..267f3348301e 100644 --- a/arch/arm/mach-s3c2412/Makefile +++ b/arch/arm/mach-s3c2412/Makefile @@ -12,8 +12,9 @@ obj- := obj-$(CONFIG_CPU_S3C2412) += s3c2412.o obj-$(CONFIG_CPU_S3C2412) += irq.o obj-$(CONFIG_CPU_S3C2412) += clock.o +obj-$(CONFIG_CPU_S3C2412) += gpio.o obj-$(CONFIG_S3C2412_DMA) += dma.o -obj-$(CONFIG_S3C2412_PM) += pm.o +obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o # Machine support diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index 458993601897..2697a65ba727 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c @@ -217,7 +217,7 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) if (parent == &clk_mdivclk) clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL; - else if (parent == &clk_upll) + else if (parent == &clk_mpll) clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL; else return -EINVAL; @@ -234,6 +234,45 @@ static struct clk clk_msysclk = { .set_parent = s3c2412_setparent_msysclk, }; +static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent) +{ + unsigned long flags; + unsigned long clkdiv; + unsigned long dvs; + + /* Note, we current equate fclk andf msysclk for S3C2412 */ + + if (parent == &clk_msysclk || parent == &clk_f) + dvs = 0; + else if (parent == &clk_h) + dvs = S3C2412_CLKDIVN_DVSEN; + else + return -EINVAL; + + clk->parent = parent; + + /* update this under irq lockdown, clkdivn is not protected + * by the clock system. */ + + local_irq_save(flags); + + clkdiv = __raw_readl(S3C2410_CLKDIVN); + clkdiv &= ~S3C2412_CLKDIVN_DVSEN; + clkdiv |= dvs; + __raw_writel(clkdiv, S3C2410_CLKDIVN); + + local_irq_restore(flags); + + return 0; +} + +static struct clk clk_armclk = { + .name = "armclk", + .id = -1, + .parent = &clk_msysclk, + .set_parent = s3c2412_setparent_armclk, +}; + /* these next clocks have an divider immediately after them, * so we can register them with their divider and leave out the * intermediate clock stage @@ -630,11 +669,13 @@ static struct clk *clks[] __initdata = { &clk_erefclk, &clk_urefclk, &clk_mrefclk, + &clk_armclk, }; int __init s3c2412_baseclk_add(void) { unsigned long clkcon = __raw_readl(S3C2410_CLKCON); + unsigned int dvs; struct clk *clkp; int ret; int ptr; @@ -643,6 +684,8 @@ int __init s3c2412_baseclk_add(void) clk_usb_bus.parent = &clk_usbsrc; clk_usb_bus.rate = 0x0; + clk_f.parent = &clk_msysclk; + s3c2412_clk_initparents(); for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { @@ -655,6 +698,15 @@ int __init s3c2412_baseclk_add(void) } } + /* set the dvs state according to what we got at boot time */ + + dvs = __raw_readl(S3C2410_CLKDIVN) & S3C2412_CLKDIVN_DVSEN; + + if (dvs) + clk_armclk.parent = &clk_h; + + printk(KERN_INFO "S3C2412: DVS is %s\n", dvs ? "on" : "off"); + /* ensure usb bus clock is within correct rate of 48MHz */ if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) { diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 53c1d5bbce19..1dd864993566 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c @@ -30,6 +30,7 @@ #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> #include <asm/arch/regs-sdi.h> +#include <asm/plat-s3c24xx/regs-s3c2412-iis.h> #include <asm/plat-s3c24xx/regs-iis.h> #include <asm/plat-s3c24xx/regs-spi.h> @@ -39,106 +40,141 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { [DMACH_XD0] = { .name = "xdreq0", .channels = MAP(S3C2412_DMAREQSEL_XDREQ0), + .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0), }, [DMACH_XD1] = { .name = "xdreq1", .channels = MAP(S3C2412_DMAREQSEL_XDREQ1), + .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1), }, [DMACH_SDI] = { .name = "sdi", .channels = MAP(S3C2412_DMAREQSEL_SDI), - .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, - .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, + .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), + .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA, + .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA, }, [DMACH_SPI0] = { .name = "spi0", .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), + .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT, .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT, }, [DMACH_SPI1] = { .name = "spi1", .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), + .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT, .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT, }, [DMACH_UART0] = { .name = "uart0", .channels = MAP(S3C2412_DMAREQSEL_UART0_0), + .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0), .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, }, [DMACH_UART1] = { .name = "uart1", .channels = MAP(S3C2412_DMAREQSEL_UART1_0), + .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0), .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, }, [DMACH_UART2] = { .name = "uart2", .channels = MAP(S3C2412_DMAREQSEL_UART2_0), + .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0), .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, }, [DMACH_UART0_SRC2] = { .name = "uart0", .channels = MAP(S3C2412_DMAREQSEL_UART0_1), + .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1), .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, }, [DMACH_UART1_SRC2] = { .name = "uart1", .channels = MAP(S3C2412_DMAREQSEL_UART1_1), + .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1), .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, }, [DMACH_UART2_SRC2] = { .name = "uart2", .channels = MAP(S3C2412_DMAREQSEL_UART2_1), + .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1), .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, }, [DMACH_TIMER] = { .name = "timer", .channels = MAP(S3C2412_DMAREQSEL_TIMER), + .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER), }, [DMACH_I2S_IN] = { .name = "i2s-sdi", .channels = MAP(S3C2412_DMAREQSEL_I2SRX), - .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, + .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX), + .hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD, }, [DMACH_I2S_OUT] = { .name = "i2s-sdo", .channels = MAP(S3C2412_DMAREQSEL_I2STX), - .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, + .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX), + .hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD, }, [DMACH_USB_EP1] = { .name = "usb-ep1", .channels = MAP(S3C2412_DMAREQSEL_USBEP1), + .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1), }, [DMACH_USB_EP2] = { .name = "usb-ep2", .channels = MAP(S3C2412_DMAREQSEL_USBEP2), + .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2), }, [DMACH_USB_EP3] = { .name = "usb-ep3", .channels = MAP(S3C2412_DMAREQSEL_USBEP3), + .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3), }, [DMACH_USB_EP4] = { .name = "usb-ep4", .channels = MAP(S3C2412_DMAREQSEL_USBEP4), + .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4), }, }; +static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan, + struct s3c24xx_dma_map *map, + enum s3c2410_dmasrc dir) +{ + unsigned long chsel; + + if (dir == S3C2410_DMASRC_HW) + chsel = map->channels_rx[0]; + else + chsel = map->channels[0]; + + chsel &= ~DMA_CH_VALID; + chsel |= S3C2412_DMAREQSEL_HW; + + writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL); +} + static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, struct s3c24xx_dma_map *map) { - writel(map->channels[0] | S3C2412_DMAREQSEL_HW, - chan->regs + S3C2412_DMA_DMAREQSEL); + s3c2412_dma_direction(chan, map, chan->source); } static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { .select = s3c2412_dma_select, + .direction = s3c2412_dma_direction, .dcon_mask = 0, .map = s3c2412_dma_mappings, .map_size = ARRAY_SIZE(s3c2412_dma_mappings), diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c new file mode 100644 index 000000000000..8e55c3a2eab8 --- /dev/null +++ b/arch/arm/mach-s3c2412/gpio.c @@ -0,0 +1,60 @@ +/* linux/arch/arm/mach-s3c2412/gpio.c + * + * Copyright (c) 2007 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * http://armlinux.simtec.co.uk/. + * + * S3C2412/S3C2413 specific GPIO support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/module.h> +#include <linux/interrupt.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <asm/arch/regs-gpio.h> + +#include <asm/hardware.h> + +int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state) +{ + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long offs = S3C2410_GPIO_OFFSET(pin); + unsigned long flags; + unsigned long slpcon; + + offs *= 2; + + if (pin < S3C2410_GPIO_BANKB) + return -EINVAL; + + if (pin >= S3C2410_GPIO_BANKF && + pin <= S3C2410_GPIO_BANKG) + return -EINVAL; + + if (pin > (S3C2410_GPIO_BANKH + 32)) + return -EINVAL; + + local_irq_save(flags); + + slpcon = __raw_readl(base + 0x0C); + + slpcon &= ~(3 << offs); + slpcon |= state << offs; + + __raw_writel(slpcon, base + 0x0C); + + local_irq_restore(flags); + + return 0; +} + +EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg); diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index e9d0c769f5da..cc1917bf952a 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c @@ -33,6 +33,7 @@ #include <asm/arch/regs-irq.h> #include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-power.h> #include <asm/plat-s3c24xx/cpu.h> #include <asm/plat-s3c24xx/irq.h> @@ -153,6 +154,22 @@ static struct irq_chip s3c2412_irq_cfsdi = { .unmask = s3c2412_irq_cfsdi_unmask, }; +static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state) +{ + unsigned long pwrcfg; + + pwrcfg = __raw_readl(S3C2412_PWRCFG); + if (state) + pwrcfg &= ~S3C2412_PWRCFG_RTC_MASKIRQ; + else + pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ; + __raw_writel(pwrcfg, S3C2412_PWRCFG); + + return s3c_irq_chip.set_wake(irqno, state); +} + +static struct irq_chip s3c2412_irq_rtc_chip; + static int s3c2412_irq_add(struct sys_device *sysdev) { unsigned int irqno; @@ -173,6 +190,13 @@ static int s3c2412_irq_add(struct sys_device *sysdev) set_irq_flags(irqno, IRQF_VALID); } + /* change RTC IRQ's set wake method */ + + s3c2412_irq_rtc_chip = s3c_irq_chip; + s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake; + + set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); + return 0; } diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c index 8988dac388a9..d4ffb2d98076 100644 --- a/arch/arm/mach-s3c2412/pm.c +++ b/arch/arm/mach-s3c2412/pm.c @@ -33,6 +33,8 @@ #include <asm/plat-s3c24xx/s3c2412.h> +extern void s3c2412_sleep_enter(void); + static void s3c2412_cpu_suspend(void) { unsigned long tmp; @@ -43,20 +45,7 @@ static void s3c2412_cpu_suspend(void) tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP; __raw_writel(tmp, S3C2412_PWRCFG); - /* issue the standby signal into the pm unit. Note, we - * issue a write-buffer drain just in case */ - - tmp = 0; - - asm("b 1f\n\t" - ".align 5\n\t" - "1:\n\t" - "mcr p15, 0, %0, c7, c10, 4\n\t" - "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp)); - - /* we should never get past here */ - - panic("sleep resumed to originator?"); + s3c2412_sleep_enter(); } static void s3c2412_pm_prepare(void) @@ -88,7 +77,6 @@ static struct sleep_save s3c2412_sleep[] = { SAVE_ITEM(S3C2412_GPBSLPCON), SAVE_ITEM(S3C2412_GPCSLPCON), SAVE_ITEM(S3C2412_GPDSLPCON), - SAVE_ITEM(S3C2412_GPESLPCON), SAVE_ITEM(S3C2412_GPFSLPCON), SAVE_ITEM(S3C2412_GPGSLPCON), SAVE_ITEM(S3C2412_GPHSLPCON), diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 265cd3f567a3..abf1599c9f97 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -168,6 +168,8 @@ void __init s3c2412_init_clocks(int xtal) fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); + clk_mpll.rate = fclk; + tmp = __raw_readl(S3C2410_CLKDIVN); /* work out clock scalings */ diff --git a/arch/arm/mach-s3c2412/sleep.S b/arch/arm/mach-s3c2412/sleep.S new file mode 100644 index 000000000000..db32cac4199a --- /dev/null +++ b/arch/arm/mach-s3c2412/sleep.S @@ -0,0 +1,68 @@ +/* linux/arch/arm/mach-s3c2412/sleep.S + * + * Copyright (c) 2007 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2412 Power Manager low-level sleep support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <asm/hardware.h> +#include <asm/arch/map.h> + +#include <asm/arch/regs-irq.h> + + .text + + .global s3c2412_sleep_enter + +s3c2412_sleep_enter: + mov r0, #0 /* argument for coprocessors */ + ldr r1, =S3C2410_INTPND + ldr r2, =S3C2410_SRCPND + ldr r3, =S3C2410_EINTPEND + + teq r0, r0 + bl s3c2412_sleep_enter1 + teq pc, r0 + bl s3c2412_sleep_enter1 + + .align 5 + + /* this is called twice, first with the Z flag to ensure that the + * instructions have been loaded into the cache, and the second + * time to try and suspend the system. + */ +s3c2412_sleep_enter1: + mcr p15, 0, r0, c7, c10, 4 + mcrne p15, 0, r0, c7, c0, 4 + + /* if we return from here, it is because an interrupt was + * active when we tried to shutdown. Try and ack the IRQ and + * retry, as simply returning causes the system to lock. + */ + + ldrne r9, [ r1 ] + strne r9, [ r1 ] + ldrne r9, [ r2 ] + strne r9, [ r2 ] + ldrne r9, [ r3 ] + strne r9, [ r3 ] + bne s3c2412_sleep_enter1 + + mov pc, r14 diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c index 79e2ea4adaf3..184d804934c9 100644 --- a/arch/arm/mach-s3c2440/clock.c +++ b/arch/arm/mach-s3c2440/clock.c @@ -111,14 +111,9 @@ static struct clk s3c2440_clk_ac97 = { static int s3c2440_clk_add(struct sys_device *sysdev) { - unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); - unsigned long clkdivn; + struct clk *clock_upll; struct clk *clock_h; struct clk *clock_p; - struct clk *clock_upll; - - printk("S3C2440: Clock Support, DVS %s\n", - (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); clock_p = clk_get(NULL, "pclk"); clock_h = clk_get(NULL, "hclk"); @@ -129,21 +124,6 @@ static int s3c2440_clk_add(struct sys_device *sysdev) return -EINVAL; } - /* check rate of UPLL, and if it is near 96MHz, then change - * to using half the UPLL rate for the system */ - - if (clk_get_rate(clock_upll) > (94 * MHZ)) { - clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; - - mutex_lock(&clocks_mutex); - - clkdivn = __raw_readl(S3C2410_CLKDIVN); - clkdivn |= S3C2440_CLKDIVN_UCLK; - __raw_writel(clkdivn, S3C2410_CLKDIVN); - - mutex_unlock(&clocks_mutex); - } - s3c2440_clk_cam.parent = clock_h; s3c2440_clk_ac97.parent = clock_p; s3c2440_clk_cam_upll.parent = clock_upll; diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c index 5b9e830ac4d3..2d030d439fe9 100644 --- a/arch/arm/mach-s3c2442/clock.c +++ b/arch/arm/mach-s3c2442/clock.c @@ -115,14 +115,9 @@ static struct clk s3c2442_clk_cam_upll = { static int s3c2442_clk_add(struct sys_device *sysdev) { - unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); - unsigned long clkdivn; + struct clk *clock_upll; struct clk *clock_h; struct clk *clock_p; - struct clk *clock_upll; - - printk("S3C2442: Clock Support, DVS %s\n", - (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); clock_p = clk_get(NULL, "pclk"); clock_h = clk_get(NULL, "hclk"); @@ -133,21 +128,6 @@ static int s3c2442_clk_add(struct sys_device *sysdev) return -EINVAL; } - /* check rate of UPLL, and if it is near 96MHz, then change - * to using half the UPLL rate for the system */ - - if (clk_get_rate(clock_upll) > (94 * MHZ)) { - clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; - - mutex_lock(&clocks_mutex); - - clkdivn = __raw_readl(S3C2410_CLKDIVN); - clkdivn |= S3C2440_CLKDIVN_UCLK; - __raw_writel(clkdivn, S3C2410_CLKDIVN); - - mutex_unlock(&clocks_mutex); - } - s3c2442_clk_cam.parent = clock_h; s3c2442_clk_cam_upll.parent = clock_upll; diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c index 59703c6fb29b..06206ceb312e 100644 --- a/arch/arm/mach-sa1100/ssp.c +++ b/arch/arm/mach-sa1100/ssp.c @@ -29,9 +29,8 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id) { unsigned int status = Ser4SSSR; - if (status & SSSR_ROR) { + if (status & SSSR_ROR) printk(KERN_WARNING "SSP: receiver overrun\n"); - } Ser4SSSR = SSSR_ROR; diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index fdf7b016e7ad..c2677368d6af 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -14,6 +14,7 @@ #include <linux/irq.h> #include <linux/timex.h> #include <linux/signal.h> +#include <linux/clocksource.h> #include <asm/mach/time.h> #include <asm/hardware.h> @@ -35,23 +36,6 @@ static int sa1100_set_rtc(void) return 0; } -/* IRQs are disabled before entering here from do_gettimeofday() */ -static unsigned long sa1100_gettimeoffset (void) -{ - unsigned long ticks_to_match, elapsed, usec; - - /* Get ticks before next timer match */ - ticks_to_match = OSMR0 - OSCR; - - /* We need elapsed ticks since last match */ - elapsed = LATCH - ticks_to_match; - - /* Now convert them to usec */ - usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; - - return usec; -} - #ifdef CONFIG_NO_IDLE_HZ static unsigned long initial_match; static int match_posponed; @@ -62,8 +46,6 @@ sa1100_timer_interrupt(int irq, void *dev_id) { unsigned int next_match; - write_seqlock(&xtime_lock); - #ifdef CONFIG_NO_IDLE_HZ if (match_posponed) { match_posponed = 0; @@ -85,8 +67,6 @@ sa1100_timer_interrupt(int irq, void *dev_id) next_match = (OSMR0 += LATCH); } while ((signed long)(next_match - OSCR) <= 0); - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } @@ -96,6 +76,20 @@ static struct irqaction sa1100_timer_irq = { .handler = sa1100_timer_interrupt, }; +static cycle_t sa1100_read_oscr(void) +{ + return OSCR; +} + +static struct clocksource cksrc_sa1100_oscr = { + .name = "oscr", + .rating = 200, + .read = sa1100_read_oscr, + .mask = CLOCKSOURCE_MASK(32), + .shift = 20, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + static void __init sa1100_timer_init(void) { unsigned long flags; @@ -109,6 +103,11 @@ static void __init sa1100_timer_init(void) OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ OSMR0 = OSCR + LATCH; /* set initial match */ local_irq_restore(flags); + + cksrc_sa1100_oscr.mult = + clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift); + + clocksource_register(&cksrc_sa1100_oscr); } #ifdef CONFIG_NO_IDLE_HZ @@ -182,7 +181,6 @@ struct sys_timer sa1100_timer = { .init = sa1100_timer_init, .suspend = sa1100_timer_suspend, .resume = sa1100_timer_resume, - .offset = sa1100_gettimeoffset, #ifdef CONFIG_NO_IDLE_HZ .dyn_tick = &sa1100_dyn_tick, #endif diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index a0545db2a34f..09d9f33d4072 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -82,9 +82,7 @@ static void __init shark_map_io(void) static irqreturn_t shark_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); timer_tick(); - write_sequnlock(&xtime_lock); return IRQ_HANDLED; } diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 7868f4dc1d00..76348f060f27 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -171,8 +171,8 @@ config CPU_ARM925T # ARM926T config CPU_ARM926T bool "Support ARM926T processor" - depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI - default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI + depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI + default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI select CPU_32v5 select CPU_ABRT_EV5TJ select CPU_CACHE_VIVT @@ -342,11 +342,33 @@ config CPU_XSC3 select CPU_TLB_V4WBI if MMU select IO_36 +# Feroceon +config CPU_FEROCEON + bool + depends on ARCH_ORION + default y + select CPU_32v5 + select CPU_ABRT_EV5T + select CPU_CACHE_VIVT + select CPU_CP15_MMU + select CPU_COPY_V4WB if MMU + select CPU_TLB_V4WBI if MMU + +config CPU_FEROCEON_OLD_ID + bool "Accept early Feroceon cores with an ARM926 ID" + depends on CPU_FEROCEON && !CPU_ARM926T + default y + help + This enables the usage of some old Feroceon cores + for which the CPU ID is equal to the ARM926 ID. + Relevant for Feroceon-1850 and early Feroceon-2850. + # ARMv6 config CPU_V6 bool "Support ARM V6 processor" - depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 + depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM7X00A default y if ARCH_MX3 + default y if ARCH_MSM7X00A select CPU_32v6 select CPU_ABRT_EV6 select CPU_CACHE_V6 @@ -538,7 +560,7 @@ comment "Processor Features" config ARM_THUMB bool "Support Thumb user binaries" - depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6 || CPU_V7 + depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6 || CPU_V7 || CPU_FEROCEON default y help Say Y if you want to include kernel support for running user space @@ -600,7 +622,7 @@ config CPU_DCACHE_SIZE config CPU_DCACHE_WRITETHROUGH bool "Force write through D-cache" - depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020) && !CPU_DCACHE_DISABLE + depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_FEROCEON) && !CPU_DCACHE_DISABLE default y if CPU_ARM925T help Say Y here to use the data cache in writethrough mode. Unless you diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 762702765fc3..44536a0b995a 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -68,6 +68,7 @@ obj-$(CONFIG_CPU_SA110) += proc-sa110.o obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o +obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o obj-$(CONFIG_CPU_V6) += proc-v6.o obj-$(CONFIG_CPU_V7) += proc-v7.o diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index a8a7dab757eb..28ad7ab1c0cd 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -12,6 +12,7 @@ #include <linux/signal.h> #include <linux/mm.h> #include <linux/init.h> +#include <linux/kprobes.h> #include <asm/system.h> #include <asm/pgtable.h> @@ -20,6 +21,29 @@ #include "fault.h" + +#ifdef CONFIG_KPROBES +static inline int notify_page_fault(struct pt_regs *regs, unsigned int fsr) +{ + int ret = 0; + + if (!user_mode(regs)) { + /* kprobe_running() needs smp_processor_id() */ + preempt_disable(); + if (kprobe_running() && kprobe_fault_handler(regs, fsr)) + ret = 1; + preempt_enable(); + } + + return ret; +} +#else +static inline int notify_page_fault(struct pt_regs *regs, unsigned int fsr) +{ + return 0; +} +#endif + /* * This is useful to dump out the page tables associated with * 'addr' in mm 'mm'. @@ -215,13 +239,16 @@ out: return fault; } -static int +static int __kprobes do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) { struct task_struct *tsk; struct mm_struct *mm; int fault, sig, code; + if (notify_page_fault(regs, fsr)) + return 0; + tsk = current; mm = tsk->mm; @@ -311,7 +338,7 @@ no_context: * interrupt or a critical region, and should only copy the information * from the master page table, nothing more. */ -static int +static int __kprobes do_translation_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) { diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S new file mode 100644 index 000000000000..fa0dc7e6f0ea --- /dev/null +++ b/arch/arm/mm/proc-feroceon.S @@ -0,0 +1,506 @@ +/* + * linux/arch/arm/mm/proc-feroceon.S: MMU functions for Feroceon + * + * Heavily based on proc-arm926.S + * Maintainer: Assaf Hoffman <hoffman@marvell.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/linkage.h> +#include <linux/init.h> +#include <asm/assembler.h> +#include <asm/elf.h> +#include <asm/pgtable-hwdef.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/ptrace.h> +#include "proc-macros.S" + +/* + * This is the maximum size of an area which will be invalidated + * using the single invalidate entry instructions. Anything larger + * than this, and we go for the whole cache. + * + * This value should be chosen such that we choose the cheapest + * alternative. + */ +#define CACHE_DLIMIT 16384 + +/* + * the cache line size of the I and D cache + */ +#define CACHE_DLINESIZE 32 + + .text +/* + * cpu_feroceon_proc_init() + */ +ENTRY(cpu_feroceon_proc_init) + mov pc, lr + +/* + * cpu_feroceon_proc_fin() + */ +ENTRY(cpu_feroceon_proc_fin) + stmfd sp!, {lr} + mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE + msr cpsr_c, ip + bl feroceon_flush_kern_cache_all + mrc p15, 0, r0, c1, c0, 0 @ ctrl register + bic r0, r0, #0x1000 @ ...i............ + bic r0, r0, #0x000e @ ............wca. + mcr p15, 0, r0, c1, c0, 0 @ disable caches + ldmfd sp!, {pc} + +/* + * cpu_feroceon_reset(loc) + * + * Perform a soft reset of the system. Put the CPU into the + * same state as it would be if it had been reset, and branch + * to what would be the reset vector. + * + * loc: location to jump to for soft reset + */ + .align 5 +ENTRY(cpu_feroceon_reset) + mov ip, #0 + mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches + mcr p15, 0, ip, c7, c10, 4 @ drain WB +#ifdef CONFIG_MMU + mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif + mrc p15, 0, ip, c1, c0, 0 @ ctrl register + bic ip, ip, #0x000f @ ............wcam + bic ip, ip, #0x1100 @ ...i...s........ + mcr p15, 0, ip, c1, c0, 0 @ ctrl register + mov pc, r0 + +/* + * cpu_feroceon_do_idle() + * + * Called with IRQs disabled + */ + .align 10 +ENTRY(cpu_feroceon_do_idle) + mov r0, #0 + mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer + mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt + mov pc, lr + +/* + * flush_user_cache_all() + * + * Clean and invalidate all cache entries in a particular + * address space. + */ +ENTRY(feroceon_flush_user_cache_all) + /* FALLTHROUGH */ + +/* + * flush_kern_cache_all() + * + * Clean and invalidate the entire cache. + */ +ENTRY(feroceon_flush_kern_cache_all) + mov r2, #VM_EXEC + mov ip, #0 +__flush_whole_cache: +#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache +#else +1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate + bne 1b +#endif + tst r2, #VM_EXEC + mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache + mcrne p15, 0, ip, c7, c10, 4 @ drain WB + mov pc, lr + +/* + * flush_user_cache_range(start, end, flags) + * + * Clean and invalidate a range of cache entries in the + * specified address range. + * + * - start - start address (inclusive) + * - end - end address (exclusive) + * - flags - vm_flags describing address space + */ +ENTRY(feroceon_flush_user_cache_range) + mov ip, #0 + sub r3, r1, r0 @ calculate total size + cmp r3, #CACHE_DLIMIT + bgt __flush_whole_cache +1: tst r2, #VM_EXEC +#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry + mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry + add r0, r0, #CACHE_DLINESIZE + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry + mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry + add r0, r0, #CACHE_DLINESIZE +#else + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry + mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry + add r0, r0, #CACHE_DLINESIZE + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry + mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry + add r0, r0, #CACHE_DLINESIZE +#endif + cmp r0, r1 + blo 1b + tst r2, #VM_EXEC + mcrne p15, 0, ip, c7, c10, 4 @ drain WB + mov pc, lr + +/* + * coherent_kern_range(start, end) + * + * Ensure coherency between the Icache and the Dcache in the + * region described by start, end. If you have non-snooping + * Harvard caches, you need to implement this function. + * + * - start - virtual start address + * - end - virtual end address + */ +ENTRY(feroceon_coherent_kern_range) + /* FALLTHROUGH */ + +/* + * coherent_user_range(start, end) + * + * Ensure coherency between the Icache and the Dcache in the + * region described by start, end. If you have non-snooping + * Harvard caches, you need to implement this function. + * + * - start - virtual start address + * - end - virtual end address + */ +ENTRY(feroceon_coherent_user_range) + bic r0, r0, #CACHE_DLINESIZE - 1 +1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry + add r0, r0, #CACHE_DLINESIZE + cmp r0, r1 + blo 1b + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + +/* + * flush_kern_dcache_page(void *page) + * + * Ensure no D cache aliasing occurs, either with itself or + * the I cache + * + * - addr - page aligned address + */ +ENTRY(feroceon_flush_kern_dcache_page) + add r1, r0, #PAGE_SZ +1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry + add r0, r0, #CACHE_DLINESIZE + cmp r0, r1 + blo 1b + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + +/* + * dma_inv_range(start, end) + * + * Invalidate (discard) the specified virtual address range. + * May not write back any entries. If 'start' or 'end' + * are not cache line aligned, those lines must be written + * back. + * + * - start - virtual start address + * - end - virtual end address + * + * (same as v4wb) + */ +ENTRY(feroceon_dma_inv_range) +#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH + tst r0, #CACHE_DLINESIZE - 1 + mcrne p15, 0, r0, c7, c10, 1 @ clean D entry + tst r1, #CACHE_DLINESIZE - 1 + mcrne p15, 0, r1, c7, c10, 1 @ clean D entry +#endif + bic r0, r0, #CACHE_DLINESIZE - 1 +1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry + add r0, r0, #CACHE_DLINESIZE + cmp r0, r1 + blo 1b + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + +/* + * dma_clean_range(start, end) + * + * Clean the specified virtual address range. + * + * - start - virtual start address + * - end - virtual end address + * + * (same as v4wb) + */ +ENTRY(feroceon_dma_clean_range) +#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH + bic r0, r0, #CACHE_DLINESIZE - 1 +1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry + add r0, r0, #CACHE_DLINESIZE + cmp r0, r1 + blo 1b +#endif + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + +/* + * dma_flush_range(start, end) + * + * Clean and invalidate the specified virtual address range. + * + * - start - virtual start address + * - end - virtual end address + */ +ENTRY(feroceon_dma_flush_range) + bic r0, r0, #CACHE_DLINESIZE - 1 +1: +#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH + mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry +#else + mcr p15, 0, r0, c7, c10, 1 @ clean D entry +#endif + add r0, r0, #CACHE_DLINESIZE + cmp r0, r1 + blo 1b + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + +ENTRY(feroceon_cache_fns) + .long feroceon_flush_kern_cache_all + .long feroceon_flush_user_cache_all + .long feroceon_flush_user_cache_range + .long feroceon_coherent_kern_range + .long feroceon_coherent_user_range + .long feroceon_flush_kern_dcache_page + .long feroceon_dma_inv_range + .long feroceon_dma_clean_range + .long feroceon_dma_flush_range + +ENTRY(cpu_feroceon_dcache_clean_area) +#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH +1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry + add r0, r0, #CACHE_DLINESIZE + subs r1, r1, #CACHE_DLINESIZE + bhi 1b +#endif + mcr p15, 0, r0, c7, c10, 4 @ drain WB + mov pc, lr + +/* =============================== PageTable ============================== */ + +/* + * cpu_feroceon_switch_mm(pgd) + * + * Set the translation base pointer to be as described by pgd. + * + * pgd: new page tables + */ + .align 5 +ENTRY(cpu_feroceon_switch_mm) +#ifdef CONFIG_MMU + mov ip, #0 +#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache +#else +@ && 'Clean & Invalidate whole DCache' +1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate + bne 1b +#endif + mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache + mcr p15, 0, ip, c7, c10, 4 @ drain WB + mcr p15, 0, r0, c2, c0, 0 @ load page table pointer + mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs +#endif + mov pc, lr + +/* + * cpu_feroceon_set_pte_ext(ptep, pte, ext) + * + * Set a PTE and flush it out + */ + .align 5 +ENTRY(cpu_feroceon_set_pte_ext) +#ifdef CONFIG_MMU + str r1, [r0], #-2048 @ linux version + + eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY + + bic r2, r1, #PTE_SMALL_AP_MASK + bic r2, r2, #PTE_TYPE_MASK + orr r2, r2, #PTE_TYPE_SMALL + + tst r1, #L_PTE_USER @ User? + orrne r2, r2, #PTE_SMALL_AP_URO_SRW + + tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? + orreq r2, r2, #PTE_SMALL_AP_UNO_SRW + + tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? + movne r2, #0 + +#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + eor r3, r2, #0x0a @ C & small page? + tst r3, #0x0b + biceq r2, r2, #4 +#endif + str r2, [r0] @ hardware version + mov r0, r0 +#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH + mcr p15, 0, r0, c7, c10, 1 @ clean D entry +#endif + mcr p15, 0, r0, c7, c10, 4 @ drain WB +#endif + mov pc, lr + + __INIT + + .type __feroceon_setup, #function +__feroceon_setup: + mov r0, #0 + mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 + mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 +#ifdef CONFIG_MMU + mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 +#endif + + +#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH + mov r0, #4 @ disable write-back on caches explicitly + mcr p15, 7, r0, c15, c0, 0 +#endif + + adr r5, feroceon_crval + ldmia r5, {r5, r6} + mrc p15, 0, r0, c1, c0 @ get control register v4 + bic r0, r0, r5 + orr r0, r0, r6 +#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN + orr r0, r0, #0x4000 @ .1.. .... .... .... +#endif + mov pc, lr + .size __feroceon_setup, . - __feroceon_setup + + /* + * R + * .RVI ZFRS BLDP WCAM + * .011 0001 ..11 0101 + * + */ + .type feroceon_crval, #object +feroceon_crval: + crval clear=0x00007f3f, mmuset=0x00003135, ucset=0x00001134 + + __INITDATA + +/* + * Purpose : Function pointers used to access above functions - all calls + * come through these + */ + .type feroceon_processor_functions, #object +feroceon_processor_functions: + .word v5t_early_abort + .word cpu_feroceon_proc_init + .word cpu_feroceon_proc_fin + .word cpu_feroceon_reset + .word cpu_feroceon_do_idle + .word cpu_feroceon_dcache_clean_area + .word cpu_feroceon_switch_mm + .word cpu_feroceon_set_pte_ext + .size feroceon_processor_functions, . - feroceon_processor_functions + + .section ".rodata" + + .type cpu_arch_name, #object +cpu_arch_name: + .asciz "armv5te" + .size cpu_arch_name, . - cpu_arch_name + + .type cpu_elf_name, #object +cpu_elf_name: + .asciz "v5" + .size cpu_elf_name, . - cpu_elf_name + + .type cpu_feroceon_name, #object +cpu_feroceon_name: + .asciz "Feroceon" + .size cpu_feroceon_name, . - cpu_feroceon_name + + .align + + .section ".proc.info.init", #alloc, #execinstr + +#ifdef CONFIG_CPU_FEROCEON_OLD_ID + .type __feroceon_old_id_proc_info,#object +__feroceon_old_id_proc_info: + .long 0x41069260 + .long 0xfffffff0 + .long PMD_TYPE_SECT | \ + PMD_SECT_BUFFERABLE | \ + PMD_SECT_CACHEABLE | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + b __feroceon_setup + .long cpu_arch_name + .long cpu_elf_name + .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP + .long cpu_feroceon_name + .long feroceon_processor_functions + .long v4wbi_tlb_fns + .long v4wb_user_fns + .long feroceon_cache_fns + .size __feroceon_old_id_proc_info, . - __feroceon_old_id_proc_info +#endif + + .type __feroceon_proc_info,#object +__feroceon_proc_info: + .long 0x56055310 + .long 0xfffffff0 + .long PMD_TYPE_SECT | \ + PMD_SECT_BUFFERABLE | \ + PMD_SECT_CACHEABLE | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ + b __feroceon_setup + .long cpu_arch_name + .long cpu_elf_name + .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP + .long cpu_feroceon_name + .long feroceon_processor_functions + .long v4wbi_tlb_fns + .long v4wb_user_fns + .long feroceon_cache_fns + .size __feroceon_proc_info, . - __feroceon_proc_info diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c index 83a5f8b91857..f455233af082 100644 --- a/arch/arm/plat-omap/debug-devices.c +++ b/arch/arm/plat-omap/debug-devices.c @@ -29,7 +29,7 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, }, }; diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 0360b1f14d11..1945ddfec18d 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c @@ -116,8 +116,8 @@ static void mbox_tx_work(struct work_struct *work) } spin_lock(q->queue_lock); - blkdev_dequeue_request(rq); - end_that_request_last(rq, 0); + if (__blk_end_request(rq, 0, 0)) + BUG(); spin_unlock(q->queue_lock); } } @@ -149,10 +149,8 @@ static void mbox_rx_work(struct work_struct *work) msg = (mbox_msg_t) rq->data; - spin_lock_irqsave(q->queue_lock, flags); - blkdev_dequeue_request(rq); - end_that_request_last(rq, 0); - spin_unlock_irqrestore(q->queue_lock, flags); + if (blk_end_request(rq, 0, 0)) + BUG(); mbox->rxq->callback((void *)msg); } @@ -212,7 +210,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox) static irqreturn_t mbox_interrupt(int irq, void *p) { - struct omap_mbox *mbox = (struct omap_mbox *)p; + struct omap_mbox *mbox = p; if (is_mbox_irq(mbox, IRQ_TX)) __mbox_tx_interrupt(mbox); @@ -263,10 +261,8 @@ omap_mbox_read(struct device *dev, struct device_attribute *attr, char *buf) *p = (mbox_msg_t) rq->data; - spin_lock_irqsave(q->queue_lock, flags); - blkdev_dequeue_request(rq); - end_that_request_last(rq, 0); - spin_unlock_irqrestore(q->queue_lock, flags); + if (blk_end_request(rq, 0, 0)) + BUG(); if (unlikely(mbox_seq_test(mbox, *p))) { pr_info("mbox: Illegal seq bit!(%08x) ignored\n", *p); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index f7b9ccdaacbc..2af5bd5a1344 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -98,9 +98,10 @@ static void omap_mcbsp_dump_reg(u8 id) static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) { - struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id); + struct omap_mcbsp *mcbsp_tx = dev_id; - DBG("TX IRQ callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2)); + DBG("TX IRQ callback : 0x%x\n", + OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2)); complete(&mcbsp_tx->tx_irq_completion); return IRQ_HANDLED; @@ -108,9 +109,10 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) { - struct omap_mcbsp * mcbsp_rx = (struct omap_mcbsp *)(dev_id); + struct omap_mcbsp *mcbsp_rx = dev_id; - DBG("RX IRQ callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2)); + DBG("RX IRQ callback : 0x%x\n", + OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2)); complete(&mcbsp_rx->rx_irq_completion); return IRQ_HANDLED; @@ -118,9 +120,10 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) { - struct omap_mcbsp * mcbsp_dma_tx = (struct omap_mcbsp *)(data); + struct omap_mcbsp *mcbsp_dma_tx = data; - DBG("TX DMA callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2)); + DBG("TX DMA callback : 0x%x\n", + OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2)); /* We can free the channels */ omap_free_dma(mcbsp_dma_tx->dma_tx_lch); @@ -131,9 +134,10 @@ static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) { - struct omap_mcbsp * mcbsp_dma_rx = (struct omap_mcbsp *)(data); + struct omap_mcbsp *mcbsp_dma_rx = data; - DBG("RX DMA callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2)); + DBG("RX DMA callback : 0x%x\n", + OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2)); /* We can free the channels */ omap_free_dma(mcbsp_dma_rx->dma_rx_lch); diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 8e5ccaa1f03c..131d20237dd7 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile @@ -23,6 +23,7 @@ obj-y += clock.o obj-$(CONFIG_CPU_S3C244X) += s3c244x.o obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o +obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += sleep.o diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index 79cda0faec86..99a44746f8f2 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c @@ -172,6 +172,15 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (IS_ERR(clk)) return -EINVAL; + /* We do not default just do a clk->rate = rate as + * the clock may have been made this way by choice. + */ + + WARN_ON(clk->set_rate == NULL); + + if (clk->set_rate == NULL) + return -EINVAL; + mutex_lock(&clocks_mutex); ret = (clk->set_rate)(clk, rate); mutex_unlock(&clocks_mutex); @@ -213,6 +222,12 @@ EXPORT_SYMBOL(clk_set_parent); /* base clocks */ +static int clk_default_setrate(struct clk *clk, unsigned long rate) +{ + clk->rate = rate; + return 0; +} + struct clk clk_xtal = { .name = "xtal", .id = -1, @@ -224,6 +239,7 @@ struct clk clk_xtal = { struct clk clk_mpll = { .name = "mpll", .id = -1, + .set_rate = clk_default_setrate, }; struct clk clk_upll = { @@ -239,6 +255,7 @@ struct clk clk_f = { .rate = 0, .parent = &clk_mpll, .ctrlbit = 0, + .set_rate = clk_default_setrate, }; struct clk clk_h = { @@ -247,6 +264,7 @@ struct clk clk_h = { .rate = 0, .parent = NULL, .ctrlbit = 0, + .set_rate = clk_default_setrate, }; struct clk clk_p = { @@ -255,6 +273,7 @@ struct clk clk_p = { .rate = 0, .parent = NULL, .ctrlbit = 0, + .set_rate = clk_default_setrate, }; struct clk clk_usb_bus = { diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index aae1b9cbaf44..ac9ff1666fcc 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -525,7 +525,8 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, } } else if (chan->state == S3C2410_DMA_IDLE) { if (chan->flags & S3C2410_DMAF_AUTOSTART) { - s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_START); + s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL, + S3C2410_DMAOP_START); } } @@ -787,7 +788,7 @@ int s3c2410_dma_request(unsigned int channel, pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan); - return 0; + return chan->number | DMACH_LOW_LEVEL; } EXPORT_SYMBOL(s3c2410_dma_request); @@ -1173,6 +1174,7 @@ int s3c2410_dma_devconfig(int channel, chan->source = source; chan->dev_addr = devaddr; + chan->hw_cfg = hwcfg; switch (source) { case S3C2410_DMASRC_HW: @@ -1184,7 +1186,7 @@ int s3c2410_dma_devconfig(int channel, dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0)); chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST); - return 0; + break; case S3C2410_DMASRC_MEM: /* source is memory */ @@ -1195,11 +1197,19 @@ int s3c2410_dma_devconfig(int channel, dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3); chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC); - return 0; + break; + + default: + printk(KERN_ERR "dma%d: invalid source type (%d)\n", + channel, source); + + return -EINVAL; } - printk(KERN_ERR "dma%d: invalid source type (%d)\n", channel, source); - return -EINVAL; + if (dma_sel.direction != NULL) + (dma_sel.direction)(chan, chan->map, source); + + return 0; } EXPORT_SYMBOL(s3c2410_dma_devconfig); @@ -1227,6 +1237,10 @@ int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) EXPORT_SYMBOL(s3c2410_dma_getposition); +static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) +{ + return container_of(dev, struct s3c2410_dma_chan, dev); +} /* system device class */ @@ -1234,7 +1248,7 @@ EXPORT_SYMBOL(s3c2410_dma_getposition); static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) { - struct s3c2410_dma_chan *cp = container_of(dev, struct s3c2410_dma_chan, dev); + struct s3c2410_dma_chan *cp = to_dma_chan(dev); printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); @@ -1256,6 +1270,24 @@ static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) static int s3c2410_dma_resume(struct sys_device *dev) { + struct s3c2410_dma_chan *cp = to_dma_chan(dev); + unsigned int no = cp->number | DMACH_LOW_LEVEL; + + /* restore channel's hardware configuration */ + + if (!cp->in_use) + return 0; + + printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); + + s3c2410_dma_config(no, cp->xfer_unit, cp->dcon); + s3c2410_dma_devconfig(no, cp->source, cp->hw_cfg, cp->dev_addr); + + /* re-select the dma source for this channel */ + + if (cp->map != NULL) + dma_sel.select(cp, cp->map); + return 0; } @@ -1445,6 +1477,7 @@ static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) found: dmach = &s3c2410_chans[ch]; + dmach->map = ch_map; dma_chan_map[channel] = dmach; /* select the channel */ diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c index ec3a09c4d181..ee99dcc7f0bd 100644 --- a/arch/arm/plat-s3c24xx/gpio.c +++ b/arch/arm/plat-s3c24xx/gpio.c @@ -122,6 +122,19 @@ void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) EXPORT_SYMBOL(s3c2410_gpio_pullup); +int s3c2410_gpio_getpull(unsigned int pin) +{ + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long offs = S3C2410_GPIO_OFFSET(pin); + + if (pin < S3C2410_GPIO_BANKB) + return -EINVAL; + + return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0; +} + +EXPORT_SYMBOL(s3c2410_gpio_getpull); + void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) { void __iomem *base = S3C24XX_GPIO_BASE(pin); @@ -186,3 +199,19 @@ int s3c2410_gpio_getirq(unsigned int pin) } EXPORT_SYMBOL(s3c2410_gpio_getirq); + +int s3c2410_gpio_irq2pin(unsigned int irq) +{ + if (irq >= IRQ_EINT0 && irq <= IRQ_EINT3) + return S3C2410_GPF0 + (irq - IRQ_EINT0); + + if (irq >= IRQ_EINT4 && irq <= IRQ_EINT7) + return S3C2410_GPF4 + (irq - IRQ_EINT4); + + if (irq >= IRQ_EINT8 && irq <= IRQ_EINT23) + return S3C2410_GPG0 + (irq - IRQ_EINT8); + + return -EINVAL; +} + +EXPORT_SYMBOL(s3c2410_gpio_irq2pin); diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 8fbc88470261..d486f5112569 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -187,7 +187,7 @@ struct irq_chip s3c_irq_level_chip = { .set_wake = s3c_irq_wake }; -static struct irq_chip s3c_irq_chip = { +struct irq_chip s3c_irq_chip = { .name = "s3c", .ack = s3c_irq_ack, .mask = s3c_irq_mask, diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 4fdb3117744f..bf5581a9aeea 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -83,38 +83,39 @@ static struct sleep_save core_save[] = { SAVE_ITEM(S3C2410_REFRESH), }; -static struct sleep_save gpio_save[] = { - SAVE_ITEM(S3C2410_GPACON), - SAVE_ITEM(S3C2410_GPADAT), - - SAVE_ITEM(S3C2410_GPBCON), - SAVE_ITEM(S3C2410_GPBDAT), - SAVE_ITEM(S3C2410_GPBUP), - - SAVE_ITEM(S3C2410_GPCCON), - SAVE_ITEM(S3C2410_GPCDAT), - SAVE_ITEM(S3C2410_GPCUP), - - SAVE_ITEM(S3C2410_GPDCON), - SAVE_ITEM(S3C2410_GPDDAT), - SAVE_ITEM(S3C2410_GPDUP), - - SAVE_ITEM(S3C2410_GPECON), - SAVE_ITEM(S3C2410_GPEDAT), - SAVE_ITEM(S3C2410_GPEUP), - - SAVE_ITEM(S3C2410_GPFCON), - SAVE_ITEM(S3C2410_GPFDAT), - SAVE_ITEM(S3C2410_GPFUP), - - SAVE_ITEM(S3C2410_GPGCON), - SAVE_ITEM(S3C2410_GPGDAT), - SAVE_ITEM(S3C2410_GPGUP), - - SAVE_ITEM(S3C2410_GPHCON), - SAVE_ITEM(S3C2410_GPHDAT), - SAVE_ITEM(S3C2410_GPHUP), +static struct gpio_sleep { + void __iomem *base; + unsigned int gpcon; + unsigned int gpdat; + unsigned int gpup; +} gpio_save[] = { + [0] = { + .base = S3C2410_GPACON, + }, + [1] = { + .base = S3C2410_GPBCON, + }, + [2] = { + .base = S3C2410_GPCCON, + }, + [3] = { + .base = S3C2410_GPDCON, + }, + [4] = { + .base = S3C2410_GPECON, + }, + [5] = { + .base = S3C2410_GPFCON, + }, + [6] = { + .base = S3C2410_GPGCON, + }, + [7] = { + .base = S3C2410_GPHCON, + }, +}; +static struct sleep_save misc_save[] = { SAVE_ITEM(S3C2410_DCLKCON), }; @@ -486,6 +487,184 @@ static void s3c2410_pm_configure_extint(void) } } +/* offsets for CON/DAT/UP registers */ + +#define OFFS_CON (S3C2410_GPACON - S3C2410_GPACON) +#define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) +#define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) + +/* s3c2410_pm_save_gpios() + * + * Save the state of the GPIOs + */ + +static void s3c2410_pm_save_gpios(void) +{ + struct gpio_sleep *gps = gpio_save; + unsigned int gpio; + + for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { + void __iomem *base = gps->base; + + gps->gpcon = __raw_readl(base + OFFS_CON); + gps->gpdat = __raw_readl(base + OFFS_DAT); + + if (gpio > 0) + gps->gpup = __raw_readl(base + OFFS_UP); + + } +} + +/* Test whether the given masked+shifted bits of an GPIO configuration + * are one of the SFN (special function) modes. */ + +static inline int is_sfn(unsigned long con) +{ + return (con == 2 || con == 3); +} + +/* Test if the given masked+shifted GPIO configuration is an input */ + +static inline int is_in(unsigned long con) +{ + return con == 0; +} + +/* Test if the given masked+shifted GPIO configuration is an output */ + +static inline int is_out(unsigned long con) +{ + return con == 1; +} + +/* s3c2410_pm_restore_gpio() + * + * Restore one of the GPIO banks that was saved during suspend. This is + * not as simple as once thought, due to the possibility of glitches + * from the order that the CON and DAT registers are set in. + * + * The three states the pin can be are {IN,OUT,SFN} which gives us 9 + * combinations of changes to check. Three of these, if the pin stays + * in the same configuration can be discounted. This leaves us with + * the following: + * + * { IN => OUT } Change DAT first + * { IN => SFN } Change CON first + * { OUT => SFN } Change CON first, so new data will not glitch + * { OUT => IN } Change CON first, so new data will not glitch + * { SFN => IN } Change CON first + * { SFN => OUT } Change DAT first, so new data will not glitch [1] + * + * We do not currently deal with the UP registers as these control + * weak resistors, so a small delay in change should not need to bring + * these into the calculations. + * + * [1] this assumes that writing to a pin DAT whilst in SFN will set the + * state for when it is next output. + */ + +static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps) +{ + void __iomem *base = gps->base; + unsigned long gps_gpcon = gps->gpcon; + unsigned long gps_gpdat = gps->gpdat; + unsigned long old_gpcon; + unsigned long old_gpdat; + unsigned long old_gpup = 0x0; + unsigned long gpcon; + int nr; + + old_gpcon = __raw_readl(base + OFFS_CON); + old_gpdat = __raw_readl(base + OFFS_DAT); + + if (base == S3C2410_GPACON) { + /* GPACON only has one bit per control / data and no PULLUPs. + * GPACON[x] = 0 => Output, 1 => SFN */ + + /* first set all SFN bits to SFN */ + + gpcon = old_gpcon | gps->gpcon; + __raw_writel(gpcon, base + OFFS_CON); + + /* now set all the other bits */ + + __raw_writel(gps_gpdat, base + OFFS_DAT); + __raw_writel(gps_gpcon, base + OFFS_CON); + } else { + unsigned long old, new, mask; + unsigned long change_mask = 0x0; + + old_gpup = __raw_readl(base + OFFS_UP); + + /* Create a change_mask of all the items that need to have + * their CON value changed before their DAT value, so that + * we minimise the work between the two settings. + */ + + for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) { + old = (old_gpcon & mask) >> nr; + new = (gps_gpcon & mask) >> nr; + + /* If there is no change, then skip */ + + if (old == new) + continue; + + /* If both are special function, then skip */ + + if (is_sfn(old) && is_sfn(new)) + continue; + + /* Change is IN => OUT, do not change now */ + + if (is_in(old) && is_out(new)) + continue; + + /* Change is SFN => OUT, do not change now */ + + if (is_sfn(old) && is_out(new)) + continue; + + /* We should now be at the case of IN=>SFN, + * OUT=>SFN, OUT=>IN, SFN=>IN. */ + + change_mask |= mask; + } + + /* Write the new CON settings */ + + gpcon = old_gpcon & ~change_mask; + gpcon |= gps_gpcon & change_mask; + + __raw_writel(gpcon, base + OFFS_CON); + + /* Now change any items that require DAT,CON */ + + __raw_writel(gps_gpdat, base + OFFS_DAT); + __raw_writel(gps_gpcon, base + OFFS_CON); + __raw_writel(gps->gpup, base + OFFS_UP); + } + + DBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", + index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); +} + + +/** s3c2410_pm_restore_gpios() + * + * Restore the state of the GPIOs + */ + +static void s3c2410_pm_restore_gpios(void) +{ + struct gpio_sleep *gps = gpio_save; + int gpio; + + for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { + s3c2410_pm_restore_gpio(gpio, gps); + } +} + void (*pm_cpu_prep)(void); void (*pm_cpu_sleep)(void); @@ -535,7 +714,8 @@ static int s3c2410_pm_enter(suspend_state_t state) /* save all necessary core registers not covered by the drivers */ - s3c2410_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save)); + s3c2410_pm_save_gpios(); + s3c2410_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save)); s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); @@ -585,8 +765,9 @@ static int s3c2410_pm_enter(suspend_state_t state) /* restore the system state */ s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); - s3c2410_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save)); + s3c2410_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); + s3c2410_pm_restore_gpios(); s3c2410_pm_debug_init(); diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c new file mode 100644 index 000000000000..faf3e0f9f4e2 --- /dev/null +++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c @@ -0,0 +1,137 @@ +/* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c + * + * Copyright (c) 2004-2005,2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2440/S3C2442 Common clock support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/device.h> +#include <linux/sysdev.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/mutex.h> +#include <linux/clk.h> + +#include <asm/hardware.h> +#include <asm/atomic.h> +#include <asm/irq.h> +#include <asm/io.h> + +#include <asm/arch/regs-clock.h> + +#include <asm/plat-s3c24xx/clock.h> +#include <asm/plat-s3c24xx/cpu.h> + +static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent) +{ + unsigned long camdivn; + unsigned long dvs; + + if (parent == &clk_f) + dvs = 0; + else if (parent == &clk_h) + dvs = S3C2440_CAMDIVN_DVSEN; + else + return -EINVAL; + + clk->parent = parent; + + camdivn = __raw_readl(S3C2440_CAMDIVN); + camdivn &= ~S3C2440_CAMDIVN_DVSEN; + camdivn |= dvs; + __raw_writel(camdivn, S3C2440_CAMDIVN); + + return 0; +} + +static struct clk clk_arm = { + .name = "armclk", + .id = -1, + .set_parent = s3c2440_setparent_armclk, +}; + +static int s3c244x_clk_add(struct sys_device *sysdev) +{ + unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); + unsigned long clkdivn; + struct clk *clock_upll; + int ret; + + printk("S3C244X: Clock Support, DVS %s\n", + (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); + + clk_arm.parent = (camdivn & S3C2440_CAMDIVN_DVSEN) ? &clk_h : &clk_f; + + ret = s3c24xx_register_clock(&clk_arm); + if (ret < 0) { + printk(KERN_ERR "S3C24XX: Failed to add armclk (%d)\n", ret); + return ret; + } + + clock_upll = clk_get(NULL, "upll"); + if (IS_ERR(clock_upll)) { + printk(KERN_ERR "S3C244X: Failed to get upll clock\n"); + return -ENOENT; + } + + /* check rate of UPLL, and if it is near 96MHz, then change + * to using half the UPLL rate for the system */ + + if (clk_get_rate(clock_upll) > (94 * MHZ)) { + clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; + + mutex_lock(&clocks_mutex); + + clkdivn = __raw_readl(S3C2410_CLKDIVN); + clkdivn |= S3C2440_CLKDIVN_UCLK; + __raw_writel(clkdivn, S3C2410_CLKDIVN); + + mutex_unlock(&clocks_mutex); + } + + return 0; +} + +static struct sysdev_driver s3c2440_clk_driver = { + .add = s3c244x_clk_add, +}; + +static int s3c2440_clk_init(void) +{ + return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver); +} + +arch_initcall(s3c2440_clk_init); + +static struct sysdev_driver s3c2442_clk_driver = { + .add = s3c244x_clk_add, +}; + +static int s3c2442_clk_init(void) +{ + return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver); +} + +arch_initcall(s3c2442_clk_init); diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 0a9a5e7f62e5..7ed58c0c24c2 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Fri May 11 19:53:41 2007 +# Last update: Sat Jan 26 14:45:34 2008 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -266,7 +266,7 @@ stork_egg ARCH_STORK_EGG STORK_EGG 248 wismo SA1100_WISMO WISMO 249 ezlinx ARCH_EZLINX EZLINX 250 at91rm9200 ARCH_AT91RM9200 AT91RM9200 251 -orion ARCH_ORION ORION 252 +adtech_orion ARCH_ADTECH_ORION ADTECH_ORION 252 neptune ARCH_NEPTUNE NEPTUNE 253 hackkit SA1100_HACKKIT HACKKIT 254 pxa_wins30 ARCH_PXA_WINS30 PXA_WINS30 255 @@ -661,7 +661,6 @@ a9200ec MACH_A9200EC A9200EC 645 pnx0105 MACH_PNX0105 PNX0105 646 adcpoecpu MACH_ADCPOECPU ADCPOECPU 647 csb637 MACH_CSB637 CSB637 648 -ml69q6203 MACH_ML69Q6203 ML69Q6203 649 mb9200 MACH_MB9200 MB9200 650 kulun MACH_KULUN KULUN 651 snapper MACH_SNAPPER SNAPPER 652 @@ -953,7 +952,6 @@ fred_jack MACH_FRED_JACK FRED_JACK 939 ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940 nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941 netdcu8 MACH_NETDCU8 NETDCU8 942 -ml675050_cpu_boa MACH_ML675050_CPU_BOA ML675050_CPU_BOA 943 ng_fvx538 MACH_NG_FVX538 NG_FVX538 944 ng_fvs338 MACH_NG_FVS338 NG_FVS338 945 pnx4103 MACH_PNX4103 PNX4103 946 @@ -1148,7 +1146,7 @@ aidx270 MACH_AIDX270 AIDX270 1134 rema MACH_REMA REMA 1135 bps1000 MACH_BPS1000 BPS1000 1136 hw90350 MACH_HW90350 HW90350 1137 -omap_sdp3430 MACH_OMAP_SDP3430 OMAP_SDP3430 1138 +omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138 bluetouch MACH_BLUETOUCH BLUETOUCH 1139 vstms MACH_VSTMS VSTMS 1140 xsbase270 MACH_XSBASE270 XSBASE270 1141 @@ -1214,7 +1212,7 @@ osstbox MACH_OSSTBOX OSSTBOX 1203 kbat9261 MACH_KBAT9261 KBAT9261 1204 ct1100 MACH_CT1100 CT1100 1205 akcppxa MACH_AKCPPXA AKCPPXA 1206 -zevio_1020 MACH_ZEVIO_1020 ZEVIO_1020 1207 +ochaya1020 MACH_OCHAYA1020 OCHAYA1020 1207 hitrack MACH_HITRACK HITRACK 1208 syme1 MACH_SYME1 SYME1 1209 syhl1 MACH_SYHL1 SYHL1 1210 @@ -1299,7 +1297,7 @@ xp179 MACH_XP179 XP179 1290 h4300 MACH_H4300 H4300 1291 goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292 mxc30020evb MACH_MXC30020EVB MXC30020EVB 1293 -adsbitsymx MACH_ADSBITSIMX ADSBITSIMX 1294 +adsbitsyg5 MACH_ADSBITSYG5 ADSBITSYG5 1294 adsportalplus MACH_ADSPORTALPLUS ADSPORTALPLUS 1295 mmsp2plus MACH_MMSP2PLUS MMSP2PLUS 1296 em_x270 MACH_EM_X270 EM_X270 1297 @@ -1367,3 +1365,249 @@ db88f5281 MACH_DB88F5281 DB88F5281 1358 csb726 MACH_CSB726 CSB726 1359 tik27 MACH_TIK27 TIK27 1360 mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361 +rirm3 MACH_RIRM3 RIRM3 1362 +pelco_odyssey MACH_PELCO_ODYSSEY PELCO_ODYSSEY 1363 +adx_abox MACH_ADX_ABOX ADX_ABOX 1365 +adx_tpid MACH_ADX_TPID ADX_TPID 1366 +minicheck MACH_MINICHECK MINICHECK 1367 +idam MACH_IDAM IDAM 1368 +mario_mx MACH_MARIO_MX MARIO_MX 1369 +vi1888 MACH_VI1888 VI1888 1370 +zr4230 MACH_ZR4230 ZR4230 1371 +t1_ix_blue MACH_T1_IX_BLUE T1_IX_BLUE 1372 +syhq2 MACH_SYHQ2 SYHQ2 1373 +computime_r3 MACH_COMPUTIME_R3 COMPUTIME_R3 1374 +oratis MACH_ORATIS ORATIS 1375 +mikko MACH_MIKKO MIKKO 1376 +holon MACH_HOLON HOLON 1377 +olip8 MACH_OLIP8 OLIP8 1378 +ghi270hg MACH_GHI270HG GHI270HG 1379 +davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380 +davinci_dm355_evm MACH_DAVINCI_DM350_EVM DAVINCI_DM350_EVM 1381 +blackriver MACH_BLACKRIVER BLACKRIVER 1383 +sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384 +cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385 +quark963 MACH_QUARK963 QUARK963 1386 +csb735 MACH_CSB735 CSB735 1387 +littleton MACH_LITTLETON LITTLETON 1388 +mio_p550 MACH_MIO_P550 MIO_P550 1389 +motion2440 MACH_MOTION2440 MOTION2440 1390 +imm500 MACH_IMM500 IMM500 1391 +homematic MACH_HOMEMATIC HOMEMATIC 1392 +ermine MACH_ERMINE ERMINE 1393 +kb9202b MACH_KB9202B KB9202B 1394 +hs1xx MACH_HS1XX HS1XX 1395 +studentmate2440 MACH_STUDENTMATE2440 STUDENTMATE2440 1396 +arvoo_l1_z1 MACH_ARVOO_L1_Z1 ARVOO_L1_Z1 1397 +dep2410k MACH_DEP2410K DEP2410K 1398 +xxsvideo MACH_XXSVIDEO XXSVIDEO 1399 +im4004 MACH_IM4004 IM4004 1400 +ochaya1050 MACH_OCHAYA1050 OCHAYA1050 1401 +lep9261 MACH_LEP9261 LEP9261 1402 +svenmeb MACH_SVENMEB SVENMEB 1403 +fortunet2ne MACH_FORTUNET2NE FORTUNET2NE 1404 +nxhx MACH_NXHX NXHX 1406 +realview_pb11mp MACH_REALVIEW_PB11MP REALVIEW_PB11MP 1407 +ids500 MACH_IDS500 IDS500 1408 +ors_n725 MACH_ORS_N725 ORS_N725 1409 +hsdarm MACH_HSDARM HSDARM 1410 +sha_pon003 MACH_SHA_PON003 SHA_PON003 1411 +sha_pon004 MACH_SHA_PON004 SHA_PON004 1412 +sha_pon007 MACH_SHA_PON007 SHA_PON007 1413 +sha_pon011 MACH_SHA_PON011 SHA_PON011 1414 +h6042 MACH_H6042 H6042 1415 +h6043 MACH_H6043 H6043 1416 +looxc550 MACH_LOOXC550 LOOXC550 1417 +cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418 +app3xx MACH_APP3XX APP3XX 1419 +sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420 +xscale_palmt700p MACH_XSCALE_PALMT700P XSCALE_PALMT700P 1421 +xscale_palmt700w MACH_XSCALE_PALMT700W XSCALE_PALMT700W 1422 +xscale_palmt750 MACH_XSCALE_PALMT750 XSCALE_PALMT750 1423 +xscale_palmt755p MACH_XSCALE_PALMT755P XSCALE_PALMT755P 1424 +ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425 +sarge MACH_SARGE SARGE 1426 +a696 MACH_A696 A696 1427 +turtle1916 MACH_TURTLE TURTLE 1428 +mx27_3ds MACH_MX27_3DS MX27_3DS 1430 +bishop MACH_BISHOP BISHOP 1431 +pxx MACH_PXX PXX 1432 +redwood MACH_REDWOOD REDWOOD 1433 +omap_2430dlp MACH_OMAP_2430DLP OMAP_2430DLP 1436 +omap_2430osk MACH_OMAP_2430OSK OMAP_2430OSK 1437 +sardine MACH_SARDINE SARDINE 1438 +halibut MACH_HALIBUT HALIBUT 1439 +trout MACH_TROUT TROUT 1440 +goldfish MACH_GOLDFISH GOLDFISH 1441 +gesbc2440 MACH_GESBC2440 GESBC2440 1442 +nomad MACH_NOMAD NOMAD 1443 +rosalind MACH_ROSALIND ROSALIND 1444 +cc9p9215 MACH_CC9P9215 CC9P9215 1445 +cc9p9210 MACH_CC9P9210 CC9P9210 1446 +cc9p9215js MACH_CC9P9215JS CC9P9215JS 1447 +cc9p9210js MACH_CC9P9210JS CC9P9210JS 1448 +nasffe MACH_NASFFE NASFFE 1449 +tn2x0bd MACH_TN2X0BD TN2X0BD 1450 +gwmpxa MACH_GWMPXA GWMPXA 1451 +exyplus MACH_EXYPLUS EXYPLUS 1452 +jadoo21 MACH_JADOO21 JADOO21 1453 +looxn560 MACH_LOOXN560 LOOXN560 1454 +bonsai MACH_BONSAI BONSAI 1455 +adsmilgato MACH_ADSMILGATO ADSMILGATO 1456 +gba MACH_GBA GBA 1457 +h6044 MACH_H6044 H6044 1458 +app MACH_APP APP 1459 +tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460 +herald MACH_HERMES HERMES 1461 +artemis MACH_ARTEMIS ARTEMIS 1462 +htctitan MACH_HTCTITAN HTCTITAN 1463 +qranium MACH_QRANIUM QRANIUM 1464 +adx_wsc2 MACH_ADX_WSC2 ADX_WSC2 1465 +adx_medinet MACH_ADX_MEDINET ADX_MEDINET 1466 +bboard MACH_BBOARD BBOARD 1467 +cambria MACH_CAMBRIA CAMBRIA 1468 +mt7xxx MACH_MT7XXX MT7XXX 1469 +matrix512 MACH_MATRIX512 MATRIX512 1470 +matrix522 MACH_MATRIX522 MATRIX522 1471 +ipac5010 MACH_IPAC5010 IPAC5010 1472 +sakura MACH_SAKURA SAKURA 1473 +grocx MACH_GROCX GROCX 1474 +pm9263 MACH_PM9263 PM9263 1475 +sim_one MACH_SIM_ONE SIM_ONE 1476 +acq132 MACH_ACQ132 ACQ132 1477 +datr MACH_DATR DATR 1478 +actux1 MACH_ACTUX1 ACTUX1 1479 +actux2 MACH_ACTUX2 ACTUX2 1480 +actux3 MACH_ACTUX3 ACTUX3 1481 +flexit MACH_FLEXIT FLEXIT 1482 +bh2x0bd MACH_BH2X0BD BH2X0BD 1483 +atb2002 MACH_ATB2002 ATB2002 1484 +xenon MACH_XENON XENON 1485 +fm607 MACH_FM607 FM607 1486 +matrix514 MACH_MATRIX514 MATRIX514 1487 +matrix524 MACH_MATRIX524 MATRIX524 1488 +inpod MACH_INPOD INPOD 1489 +jive MACH_JIVE JIVE 1490 +tll_mx21 MACH_TLL_MX21 TLL_MX21 1491 +sbc2800 MACH_SBC2800 SBC2800 1492 +cc7ucamry MACH_CC7UCAMRY CC7UCAMRY 1493 +ubisys_p9_sc15 MACH_UBISYS_P9_SC15 UBISYS_P9_SC15 1494 +ubisys_p9_ssc2d10 MACH_UBISYS_P9_SSC2D10 UBISYS_P9_SSC2D10 1495 +ubisys_p9_rcu3 MACH_UBISYS_P9_RCU3 UBISYS_P9_RCU3 1496 +aml_m8000 MACH_AML_M8000 AML_M8000 1497 +snapper_270 MACH_SNAPPER_270 SNAPPER_270 1498 +omap_bbx MACH_OMAP_BBX OMAP_BBX 1499 +ucn2410 MACH_UCN2410 UCN2410 1500 +sam9_l9260 MACH_SAM9_L9260 SAM9_L9260 1501 +eti_c2 MACH_ETI_C2 ETI_C2 1502 +avalanche MACH_AVALANCHE AVALANCHE 1503 +realview_pb1176 MACH_REALVIEW_PB1176 REALVIEW_PB1176 1504 +dp1500 MACH_DP1500 DP1500 1505 +apple_iphone MACH_APPLE_IPHONE APPLE_IPHONE 1506 +yl9200 MACH_YL9200 YL9200 1507 +rd88f5182 MACH_RD88F5182 RD88F5182 1508 +kurobox_pro MACH_KUROBOX_PRO KUROBOX_PRO 1509 +se_poet MACH_SE_POET SE_POET 1510 +mx31_3ds MACH_MX31_3DS MX31_3DS 1511 +r270 MACH_R270 R270 1512 +armour21 MACH_ARMOUR21 ARMOUR21 1513 +dt2 MACH_DT2 DT2 1514 +vt4 MACH_VT4 VT4 1515 +tyco320 MACH_TYCO320 TYCO320 1516 +adma MACH_ADMA ADMA 1517 +wp188 MACH_WP188 WP188 1518 +corsica MACH_CORSICA CORSICA 1519 +bigeye MACH_BIGEYE BIGEYE 1520 +tll5000 MACH_TLL5000 TLL5000 1522 +hni270 MACH_HNI_X270 HNI_X270 1523 +qong MACH_QONG QONG 1524 +tcompact MACH_TCOMPACT TCOMPACT 1525 +puma5 MACH_PUMA5 PUMA5 1526 +elara MACH_ELARA ELARA 1527 +ellington MACH_ELLINGTON ELLINGTON 1528 +xda_atom MACH_XDA_ATOM XDA_ATOM 1529 +energizer2 MACH_ENERGIZER2 ENERGIZER2 1530 +odin MACH_ODIN ODIN 1531 +actux4 MACH_ACTUX4 ACTUX4 1532 +esl_omap MACH_ESL_OMAP ESL_OMAP 1533 +omap2evm MACH_OMAP2EVM OMAP2EVM 1534 +omap3evm MACH_OMAP3EVM OMAP3EVM 1535 +adx_pcu57 MACH_ADX_PCU57 ADX_PCU57 1536 +monaco MACH_MONACO MONACO 1537 +levante MACH_LEVANTE LEVANTE 1538 +tmxipx425 MACH_TMXIPX425 TMXIPX425 1539 +leep MACH_LEEP LEEP 1540 +raad MACH_RAAD RAAD 1541 +dns323 MACH_DNS323 DNS323 1542 +ap1000 MACH_AP1000 AP1000 1543 +a9sam6432 MACH_A9SAM6432 A9SAM6432 1544 +shiny MACH_SHINY SHINY 1545 +omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 +csr_bdb2 MACH_CSR_BDB2 CSR_BDB2 1547 +nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 +c270 MACH_C270 C270 1549 +sentry MACH_SENTRY SENTRY 1550 +pcm038 MACH_PCM038 PCM038 1551 +anc300 MACH_ANC300 ANC300 1552 +htckaiser MACH_HTCKAISER HTCKAISER 1553 +sbat100 MACH_SBAT100 SBAT100 1554 +modunorm MACH_MODUNORM MODUNORM 1555 +pelos_twarm MACH_PELOS_TWARM PELOS_TWARM 1556 +flank MACH_FLANK FLANK 1557 +sirloin MACH_SIRLOIN SIRLOIN 1558 +brisket MACH_BRISKET BRISKET 1559 +chuck MACH_CHUCK CHUCK 1560 +otter MACH_OTTER OTTER 1561 +davinci_ldk MACH_DAVINCI_LDK DAVINCI_LDK 1562 +phreedom MACH_PHREEDOM PHREEDOM 1563 +sg310 MACH_SG310 SG310 1564 +ts_x09 MACH_TS209 TS209 1565 +at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 +tion9315 MACH_TION9315 TION9315 1567 +mast MACH_MAST MAST 1568 +pfw MACH_PFW PFW 1569 +yl_p2440 MACH_YL_P2440 YL_P2440 1570 +zsbc32 MACH_ZSBC32 ZSBC32 1571 +omap_pace2 MACH_OMAP_PACE2 OMAP_PACE2 1572 +imx_pace2 MACH_IMX_PACE2 IMX_PACE2 1573 +mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 +mx37_3ds MACH_MX37_3DS MX37_3DS 1575 +rcc MACH_RCC RCC 1576 +dmp MACH_ARM9 ARM9 1577 +vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 +scly1000 MACH_SCLY1000 SCLY1000 1579 +fontel_ep MACH_FONTEL_EP FONTEL_EP 1580 +voiceblue3g MACH_VOICEBLUE3G VOICEBLUE3G 1581 +tt9200 MACH_TT9200 TT9200 1582 +digi2410 MACH_DIGI2410 DIGI2410 1583 +terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584 +linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585 +motorola_a780 MACH_MOTOROLA_A780 MOTOROLA_A780 1587 +motorola_e6 MACH_MOTOROLA_E6 MOTOROLA_E6 1588 +motorola_e2 MACH_MOTOROLA_E2 MOTOROLA_E2 1589 +motorola_e680 MACH_MOTOROLA_E680 MOTOROLA_E680 1590 +ur2410 MACH_UR2410 UR2410 1591 +tas9261 MACH_TAS9261 TAS9261 1592 +davinci_hermes_hd MACH_HERMES_HD HERMES_HD 1593 +davinci_perseo_hd MACH_PERSEO_HD PERSEO_HD 1594 +stargazer2 MACH_STARGAZER2 STARGAZER2 1595 +e350 MACH_E350 E350 1596 +wpcm450 MACH_WPCM450 WPCM450 1597 +cartesio MACH_CARTESIO CARTESIO 1598 +toybox MACH_TOYBOX TOYBOX 1599 +tx27 MACH_TX27 TX27 1600 +ts409 MACH_TS409 TS409 1601 +p300 MACH_P300 P300 1602 +xdacomet MACH_XDACOMET XDACOMET 1603 +dexflex2 MACH_DEXFLEX2 DEXFLEX2 1604 +ow MACH_OW OW 1605 +armebs3 MACH_ARMEBS3 ARMEBS3 1606 +u3 MACH_U3 U3 1607 +smdk2450 MACH_SMDK2450 SMDK2450 1608 +rsi_ews MACH_RSI_EWS RSI_EWS 1609 +tnb MACH_TNB TNB 1610 +toepath MACH_TOEPATH TOEPATH 1611 +kb9263 MACH_KB9263 KB9263 1612 +mt7108 MACH_MT7108 MT7108 1613 +smtr2440 MACH_SMTR2440 SMTR2440 1614 +manao MACH_MANAO MANAO 1615 diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h index 791d0238c68f..c85860bad585 100644 --- a/arch/arm/vfp/vfp.h +++ b/arch/arm/vfp/vfp.h @@ -265,7 +265,11 @@ struct vfp_double { * which returns (double)0.0. This is useful for the compare with * zero instructions. */ +#ifdef CONFIG_VFPv3 +#define VFP_REG_ZERO 32 +#else #define VFP_REG_ZERO 16 +#endif extern u64 vfp_get_double(unsigned int reg); extern void vfp_put_double(u64 val, unsigned int reg); diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 0ac022f800a1..353f9e5c7919 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -99,12 +99,12 @@ vfp_support_entry: DBGSTR1 "save old state %p", r4 cmp r4, #0 beq no_old_VFP_process + VFPFSTMIA r4, r5 @ save the working registers VFPFMRX r5, FPSCR @ current status - VFPFMRX r6, FPINST @ FPINST (always there, rev0 onwards) - tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read? - VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading - @ nonexistant reg on rev0 - VFPFSTMIA r4 @ save the working registers + tst r1, #FPEXC_EX @ is there additional state to save? + VFPFMRX r6, FPINST, NE @ FPINST (only if FPEXC.EX is set) + tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? + VFPFMRX r8, FPINST2, NE @ FPINST2 if needed (and present) stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 @ and point r4 at the word at the @ start of the register dump @@ -114,13 +114,13 @@ no_old_VFP_process: DBGSTR1 "load state %p", r10 str r10, [r3, r11, lsl #2] @ update the last_VFP_context pointer @ Load the saved state back into the VFP - VFPFLDMIA r10 @ reload the working registers while + VFPFLDMIA r10, r5 @ reload the working registers while @ FPEXC is in a safe state ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 - tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write? - VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing - @ nonexistant reg on rev0 - VFPFMXR FPINST, r6 + tst r1, #FPEXC_EX @ is there additional state to restore? + VFPFMXR FPINST, r6, NE @ restore FPINST (only if FPEXC.EX is set) + tstne r1, #FPEXC_FP2V @ is there an FPINST2 to write? + VFPFMXR FPINST2, r8, NE @ FPINST2 if needed (and present) VFPFMXR FPSCR, r5 @ restore status check_for_exception: @@ -136,10 +136,14 @@ check_for_exception: look_for_VFP_exceptions: - tst r1, #FPEXC_EX + @ Check for synchronous or asynchronous exception + tst r1, #FPEXC_EX | FPEXC_DEX bne process_exception + @ On some implementations of the VFP subarch 1, setting FPSCR.IXE + @ causes all the CDP instructions to be bounced synchronously without + @ setting the FPEXC.EX bit VFPFMRX r5, FPSCR - tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EX ! + tst r5, #FPSCR_IXE bne process_exception @ Fall into hand on to next handler - appropriate coproc instr @@ -150,10 +154,6 @@ look_for_VFP_exceptions: process_exception: DBGSTR "bounce" - sub r2, r2, #4 - str r2, [sp, #S_PC] @ retry the instruction on exit from - @ the imprecise exception handling in - @ the support code mov r2, sp @ nothing stacked - regdump is at TOS mov lr, r9 @ setup for a return to the user code. @@ -161,7 +161,7 @@ process_exception: @ r0 holds the trigger instruction @ r1 holds the FPEXC value @ r2 pointer to register dump - b VFP9_bounce @ we have handled this - the support + b VFP_bounce @ we have handled this - the support @ code will raise an exception if @ required. If not, the user code will @ retry the faulted instruction @@ -174,12 +174,12 @@ vfp_save_state: @ r0 - save location @ r1 - FPEXC DBGSTR1 "save VFP state %p", r0 + VFPFSTMIA r0, r2 @ save the working registers VFPFMRX r2, FPSCR @ current status - VFPFMRX r3, FPINST @ FPINST (always there, rev0 onwards) - tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read? - VFPFMRX r12, FPINST2, NE @ FPINST2 if needed - avoids reading - @ nonexistant reg on rev0 - VFPFSTMIA r0 @ save the working registers + tst r1, #FPEXC_EX @ is there additional state to save? + VFPFMRX r3, FPINST, NE @ FPINST (only if FPEXC.EX is set) + tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? + VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 mov pc, lr #endif @@ -217,8 +217,15 @@ vfp_get_double: fmrrd r0, r1, d\dr mov pc, lr .endr +#ifdef CONFIG_VFPv3 + @ d16 - d31 registers + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 + mrrc p11, 3, r0, r1, c\dr @ fmrrd r0, r1, d\dr + mov pc, lr + .endr +#endif - @ virtual register 16 for compare with zero + @ virtual register 16 (or 32 if VFPv3) for compare with zero mov r0, #0 mov r1, #0 mov pc, lr @@ -231,3 +238,10 @@ vfp_put_double: fmdrr d\dr, r0, r1 mov pc, lr .endr +#ifdef CONFIG_VFPv3 + @ d16 - d31 registers + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 + mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr + mov pc, lr + .endr +#endif diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h index 7f343a4beca0..15b95b5ab97e 100644 --- a/arch/arm/vfp/vfpinstr.h +++ b/arch/arm/vfp/vfpinstr.h @@ -52,11 +52,11 @@ #define FEXT_TO_IDX(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) #define vfp_get_sd(inst) ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22) -#define vfp_get_dd(inst) ((inst & 0x0000f000) >> 12) +#define vfp_get_dd(inst) ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18) #define vfp_get_sm(inst) ((inst & 0x0000000f) << 1 | (inst & (1 << 5)) >> 5) -#define vfp_get_dm(inst) ((inst & 0x0000000f)) +#define vfp_get_dm(inst) ((inst & 0x0000000f) | (inst & (1 << 5)) >> 1) #define vfp_get_sn(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) -#define vfp_get_dn(inst) ((inst & 0x000f0000) >> 16) +#define vfp_get_dn(inst) ((inst & 0x000f0000) >> 16 | (inst & (1 << 7)) >> 3) #define vfp_single(inst) (((inst) & 0x0000f00) == 0xa00) diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index b4e210df92f2..32455c633f1c 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -125,13 +125,13 @@ void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs) send_sig_info(SIGFPE, &info, current); } -static void vfp_panic(char *reason) +static void vfp_panic(char *reason, u32 inst) { int i; printk(KERN_ERR "VFP: Error: %s\n", reason); printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", - fmrx(FPEXC), fmrx(FPSCR), fmrx(FPINST)); + fmrx(FPEXC), fmrx(FPSCR), inst); for (i = 0; i < 32; i += 2) printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n", i, vfp_get_float(i), i+1, vfp_get_float(i+1)); @@ -147,19 +147,16 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ pr_debug("VFP: raising exceptions %08x\n", exceptions); if (exceptions == VFP_EXCEPTION_ERROR) { - vfp_panic("unhandled bounce"); + vfp_panic("unhandled bounce", inst); vfp_raise_sigfpe(0, regs); return; } /* - * If any of the status flags are set, update the FPSCR. + * Update the FPSCR with the additional exception flags. * Comparison instructions always return at least one of * these flags set. */ - if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) - fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); - fpscr |= exceptions; fmxr(FPSCR, fpscr); @@ -220,35 +217,64 @@ static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) /* * Package up a bounce condition. */ -void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) +void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) { - u32 fpscr, orig_fpscr, exceptions, inst; + u32 fpscr, orig_fpscr, fpsid, exceptions; pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); /* - * Enable access to the VFP so we can handle the bounce. + * At this point, FPEXC can have the following configuration: + * + * EX DEX IXE + * 0 1 x - synchronous exception + * 1 x 0 - asynchronous exception + * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later + * 0 0 1 - synchronous on VFP9 (non-standard subarch 1 + * implementation), undefined otherwise + * + * Clear various bits and enable access to the VFP so we can + * handle the bounce. */ - fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_FPV2|FPEXC_INV|FPEXC_UFC|FPEXC_OFC|FPEXC_IOC)); + fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK)); + fpsid = fmrx(FPSID); orig_fpscr = fpscr = fmrx(FPSCR); /* - * If we are running with inexact exceptions enabled, we need to - * emulate the trigger instruction. Note that as we're emulating - * the trigger instruction, we need to increment PC. + * Check for the special VFP subarch 1 and FPSCR.IXE bit case */ - if (fpscr & FPSCR_IXE) { - regs->ARM_pc += 4; + if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT) + && (fpscr & FPSCR_IXE)) { + /* + * Synchronous exception, emulate the trigger instruction + */ goto emulate; } - barrier(); + if (fpexc & FPEXC_EX) { + /* + * Asynchronous exception. The instruction is read from FPINST + * and the interrupted instruction has to be restarted. + */ + trigger = fmrx(FPINST); + regs->ARM_pc -= 4; + } else if (!(fpexc & FPEXC_DEX)) { + /* + * Illegal combination of bits. It can be caused by an + * unallocated VFP instruction but with FPSCR.IXE set and not + * on VFP subarch 1. + */ + vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); + return; + } /* - * Modify fpscr to indicate the number of iterations remaining + * Modify fpscr to indicate the number of iterations remaining. + * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates + * whether FPEXC.VECITR or FPSCR.LEN is used. */ - if (fpexc & FPEXC_EX) { + if (fpexc & (FPEXC_EX | FPEXC_VV)) { u32 len; len = fpexc + (1 << FPEXC_LENGTH_BIT); @@ -262,15 +288,15 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) * FPEXC bounce reason, but this appears to be unreliable. * Emulate the bounced instruction instead. */ - inst = fmrx(FPINST); - exceptions = vfp_emulate_instruction(inst, fpscr, regs); + exceptions = vfp_emulate_instruction(trigger, fpscr, regs); if (exceptions) - vfp_raise_exceptions(exceptions, inst, orig_fpscr, regs); + vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); /* - * If there isn't a second FP instruction, exit now. + * If there isn't a second FP instruction, exit now. Note that + * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. */ - if (!(fpexc & FPEXC_FPV2)) + if (fpexc ^ (FPEXC_EX | FPEXC_FP2V)) return; /* @@ -279,10 +305,9 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) */ barrier(); trigger = fmrx(FPINST2); - orig_fpscr = fpscr = fmrx(FPSCR); emulate: - exceptions = vfp_emulate_instruction(trigger, fpscr, regs); + exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); if (exceptions) vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); } @@ -306,16 +331,9 @@ static int __init vfp_init(void) { unsigned int vfpsid; unsigned int cpu_arch = cpu_architecture(); - u32 access = 0; - if (cpu_arch >= CPU_ARCH_ARMv6) { - access = get_copro_access(); - - /* - * Enable full access to VFP (cp10 and cp11) - */ - set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); - } + if (cpu_arch >= CPU_ARCH_ARMv6) + vfp_enable(NULL); /* * First check that there is a VFP that we can use. @@ -329,15 +347,9 @@ static int __init vfp_init(void) vfp_vector = vfp_null_entry; printk(KERN_INFO "VFP support v0.3: "); - if (VFP_arch) { + if (VFP_arch) printk("not present\n"); - - /* - * Restore the copro access register. - */ - if (cpu_arch >= CPU_ARCH_ARMv6) - set_copro_access(access); - } else if (vfpsid & FPSID_NODOUBLE) { + else if (vfpsid & FPSID_NODOUBLE) { printk("no double precision support\n"); } else { smp_call_function(vfp_enable, NULL, 1, 1); diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 25232ba08119..fc7ca86ac8bf 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -85,11 +85,26 @@ config BF522 help BF522 Processor Support. +config BF523 + bool "BF523" + help + BF523 Processor Support. + +config BF524 + bool "BF524" + help + BF524 Processor Support. + config BF525 bool "BF525" help BF525 Processor Support. +config BF526 + bool "BF526" + help + BF526 Processor Support. + config BF527 bool "BF527" help @@ -198,7 +213,7 @@ endchoice config BF52x bool - depends on (BF522 || BF525 || BF527) + depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527) default y config BF53x @@ -253,11 +268,6 @@ config MEM_MT48LC32M16A2TG_75 depends on (BFIN527_EZKIT) default y -config BFIN_SHARED_FLASH_ENET - bool - depends on (BFIN533_STAMP) - default y - source "arch/blackfin/mach-bf527/Kconfig" source "arch/blackfin/mach-bf533/Kconfig" source "arch/blackfin/mach-bf561/Kconfig" @@ -317,7 +327,7 @@ config VCO_MULT range 1 64 default "22" if BFIN533_EZKIT default "45" if BFIN533_STAMP - default "20" if (BFIN537_STAMP || BFIN527_EZKIT) + default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT) default "22" if BFIN533_BLUETECHNIX_CM default "20" if BFIN537_BLUETECHNIX_CM default "20" if BFIN561_BLUETECHNIX_CM @@ -354,7 +364,7 @@ config SCLK_DIV range 1 15 default 5 if BFIN533_EZKIT default 5 if BFIN533_STAMP - default 4 if (BFIN537_STAMP || BFIN527_EZKIT) + default 4 if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT) default 5 if BFIN533_BLUETECHNIX_CM default 4 if BFIN537_BLUETECHNIX_CM default 4 if BFIN561_BLUETECHNIX_CM @@ -371,7 +381,10 @@ config SCLK_DIV config MAX_VCO_HZ int default 600000000 if BF522 + default 400000000 if BF523 + default 400000000 if BF524 default 600000000 if BF525 + default 400000000 if BF526 default 600000000 if BF527 default 400000000 if BF531 default 400000000 if BF532 @@ -383,6 +396,8 @@ config MAX_VCO_HZ default 533333333 if BF539 default 600000000 if BF542 default 533333333 if BF544 + default 600000000 if BF547 + default 600000000 if BF548 default 533333333 if BF549 default 600000000 if BF561 @@ -409,6 +424,7 @@ config MEM_SIZE default 32 if BFIN533_EZKIT default 64 if BFIN527_EZKIT default 64 if BFIN537_STAMP + default 64 if BFIN548_EZKIT default 64 if BFIN561_EZKIT default 128 if BFIN533_STAMP default 64 if PNAV10 @@ -416,6 +432,7 @@ config MEM_SIZE config MEM_ADD_WIDTH int "SDRAM Memory Address Width" + depends on (!BF54x) default 9 if BFIN533_EZKIT default 9 if BFIN561_EZKIT default 9 if H8606_HVSISTEMAS @@ -424,6 +441,19 @@ config MEM_ADD_WIDTH default 11 if BFIN533_STAMP default 10 if PNAV10 + +choice + prompt "DDR SDRAM Chip Type" + depends on BFIN548_EZKIT + default MEM_MT46V32M16_5B + +config MEM_MT46V32M16_6T + bool "MT46V32M16_6T" + +config MEM_MT46V32M16_5B + bool "MT46V32M16_5B" +endchoice + config ENET_FLASH_PIN int "PF port/pin used for flash and ethernet sharing" depends on (BFIN533_STAMP) @@ -448,40 +478,6 @@ config BOOT_LOAD memory region is used to capture NULL pointer references as well as some core kernel functions. -comment "LED Status Indicators" - depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM) - -config BFIN_ALIVE_LED - bool "Enable Board Alive" - depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM) - default n - help - Blink the LEDs you select when the kernel is running. Helps detect - a hung kernel. - -config BFIN_ALIVE_LED_NUM - int "LED" - depends on BFIN_ALIVE_LED - range 1 3 if BFIN533_STAMP - default "3" if BFIN533_STAMP - help - Select the LED (marked on the board) for you to blink. - -config BFIN_IDLE_LED - bool "Enable System Load/Idle LED" - depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM) - default n - help - Blinks the LED you select when to determine kernel load. - -config BFIN_IDLE_LED_NUM - int "LED" - depends on BFIN_IDLE_LED - range 1 3 if BFIN533_STAMP - default "2" if BFIN533_STAMP - help - Select the LED (marked on the board) for you to blink. - choice prompt "Blackfin Exception Scratch Register" default BFIN_SCRATCH_REG_RETN @@ -528,41 +524,6 @@ config BFIN_SCRATCH_REG_CYCLES endchoice -# -# Sorry - but you need to put the hex address here - -# - -# Flag Data register -config BFIN_ALIVE_LED_PORT - hex - default 0xFFC00700 if (BFIN533_STAMP) - -# Peripheral Flag Direction Register -config BFIN_ALIVE_LED_DPORT - hex - default 0xFFC00730 if (BFIN533_STAMP) - -config BFIN_ALIVE_LED_PIN - hex - default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1) - default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2) - default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3) - -config BFIN_IDLE_LED_PORT - hex - default 0xFFC00700 if (BFIN533_STAMP) - -# Peripheral Flag Direction Register -config BFIN_IDLE_LED_DPORT - hex - default 0xFFC00730 if (BFIN533_STAMP) - -config BFIN_IDLE_LED_PIN - hex - default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1) - default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2) - default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3) - endmenu @@ -799,6 +760,15 @@ config L1_MAX_PIECE Set the max memory pieces for the L1 SRAM allocation algorithm. Min value is 16. Max value is 1024. + +config MPU + bool "Enable the memory protection unit (EXPERIMENTAL)" + default n + help + Use the processor's MPU to protect applications from accessing + memory they do not own. This comes at a performance penalty + and is recommended only for debugging. + comment "Asynchonous Memory Configuration" menu "EBIU_AMGCTL Global Control" @@ -808,7 +778,6 @@ config C_AMCKEN config C_CDPRIO bool "DMA has priority over core for ext. accesses" - depends on !BF54x default n config C_B0PEN @@ -949,8 +918,10 @@ endchoice config PM_WAKEUP_SIC_IWR hex "Wakeup Events (SIC_IWR)" depends on PM_WAKEUP_GPIO_BY_SIC_IWR - default 0x80000000 if (BF537 || BF536 || BF534) - default 0x100000 if (BF533 || BF532 || BF531) + default 0x8 if (BF537 || BF536 || BF534) + default 0x80 if (BF533 || BF532 || BF531) + default 0x80 if (BF54x) + default 0x80 if (BF52x) config PM_WAKEUP_GPIO_NUMBER int "Wakeup GPIO number" diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile index c47e000f8324..0edc402fef54 100644 --- a/arch/blackfin/Makefile +++ b/arch/blackfin/Makefile @@ -21,7 +21,10 @@ KBUILD_DEFCONFIG := BF537-STAMP_defconfig # setup the machine name and the machine dependent settings machine-$(CONFIG_BF522) := bf527 +machine-$(CONFIG_BF523) := bf527 +machine-$(CONFIG_BF524) := bf527 machine-$(CONFIG_BF525) := bf527 +machine-$(CONFIG_BF526) := bf527 machine-$(CONFIG_BF527) := bf527 machine-$(CONFIG_BF531) := bf533 machine-$(CONFIG_BF532) := bf533 @@ -39,7 +42,10 @@ MACHINE := $(machine-y) export MACHINE cpu-$(CONFIG_BF522) := bf522 +cpu-$(CONFIG_BF523) := bf523 +cpu-$(CONFIG_BF524) := bf524 cpu-$(CONFIG_BF525) := bf525 +cpu-$(CONFIG_BF526) := bf526 cpu-$(CONFIG_BF527) := bf527 cpu-$(CONFIG_BF531) := bf531 cpu-$(CONFIG_BF532) := bf532 @@ -76,6 +82,12 @@ core-y += arch/$(ARCH)/mach-$(MACHINE)/ core-y += arch/$(ARCH)/mach-$(MACHINE)/boards/ endif +ifeq ($(CONFIG_MPU),y) +core-y += arch/$(ARCH)/kernel/cplb-mpu/ +else +core-y += arch/$(ARCH)/kernel/cplb-nompu/ +endif + libs-y += arch/$(ARCH)/lib/ drivers-$(CONFIG_OPROFILE) += arch/$(ARCH)/oprofile/ diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig index fa6eb4e00fae..d59ee1530bd4 100644 --- a/arch/blackfin/configs/BF527-EZKIT_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT_defconfig @@ -1,6 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22.12 +# Linux kernel version: 2.6.22.14 +# Thu Nov 29 17:32:47 2007 # # CONFIG_MMU is not set # CONFIG_FPU is not set @@ -153,8 +154,8 @@ CONFIG_BFIN527_EZKIT=y CONFIG_BF527_SPORT0_PORTG=y CONFIG_BF527_SPORT0_TSCLK_PG10=y # CONFIG_BF527_SPORT0_TSCLK_PG14 is not set -# CONFIG_BF527_UART1_PORTF is not set -CONFIG_BF527_UART1_PORTG=y +CONFIG_BF527_UART1_PORTF=y +# CONFIG_BF527_UART1_PORTG is not set # CONFIG_BF527_NAND_D_PORTF is not set CONFIG_BF527_NAND_D_PORTH=y @@ -232,7 +233,7 @@ CONFIG_CLKIN_HZ=25000000 # CONFIG_BFIN_KERNEL_CLOCK is not set CONFIG_MAX_VCO_HZ=600000000 CONFIG_MIN_VCO_HZ=50000000 -CONFIG_MAX_SCLK_HZ=133000000 +CONFIG_MAX_SCLK_HZ=133333333 CONFIG_MIN_SCLK_HZ=27000000 # @@ -626,8 +627,8 @@ CONFIG_BFIN_MAC_RMII=y # CONFIG_SMSC911X is not set # CONFIG_DM9000 is not set CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y # CONFIG_AX88180 is not set +CONFIG_NETDEV_10000=y # # Wireless LAN @@ -1183,7 +1184,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" # # CONFIG_PRINTK_TIME is not set CONFIG_ENABLE_MUST_CHECK=y -CONFIG_MAGIC_SYSRQ=y +# CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set @@ -1208,7 +1209,7 @@ CONFIG_ACCESS_CHECK=y # CONFIG_KEYS is not set CONFIG_SECURITY=y # CONFIG_SECURITY_NETWORK is not set -CONFIG_SECURITY_CAPABILITIES=y +CONFIG_SECURITY_CAPABILITIES=m # # Cryptographic options @@ -1219,7 +1220,7 @@ CONFIG_SECURITY_CAPABILITIES=y # Library routines # CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set +CONFIG_CRC_CCITT=m # CONFIG_CRC16 is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 4fdb49362ba3..811711f59a25 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22.12 +# Linux kernel version: 2.6.22.16 # # CONFIG_MMU is not set # CONFIG_FPU is not set @@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y # Processor and Board Settings # # CONFIG_BF522 is not set +# CONFIG_BF523 is not set +# CONFIG_BF524 is not set # CONFIG_BF525 is not set +# CONFIG_BF526 is not set # CONFIG_BF527 is not set # CONFIG_BF531 is not set # CONFIG_BF532 is not set @@ -194,7 +197,7 @@ CONFIG_CLKIN_HZ=27000000 # CONFIG_BFIN_KERNEL_CLOCK is not set CONFIG_MAX_VCO_HZ=750000000 CONFIG_MIN_VCO_HZ=50000000 -CONFIG_MAX_SCLK_HZ=133000000 +CONFIG_MAX_SCLK_HZ=133333333 CONFIG_MIN_SCLK_HZ=27000000 # @@ -267,6 +270,7 @@ CONFIG_BFIN_DCACHE=y # CONFIG_BFIN_WB is not set CONFIG_BFIN_WT=y CONFIG_L1_MAX_PIECE=16 +# CONFIG_MPU is not set # # Asynchonous Memory Configuration @@ -321,7 +325,7 @@ CONFIG_PM=y CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y # CONFIG_PM_WAKEUP_BY_GPIO is not set # CONFIG_PM_WAKEUP_GPIO_API is not set -CONFIG_PM_WAKEUP_SIC_IWR=0x100000 +CONFIG_PM_WAKEUP_SIC_IWR=0x80 # # CPU Frequency scaling @@ -510,7 +514,6 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_INTELEXT is not set # CONFIG_MTD_CFI_AMDSTD is not set # CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_MW320D=m CONFIG_MTD_RAM=y CONFIG_MTD_ROM=m # CONFIG_MTD_ABSENT is not set @@ -520,9 +523,6 @@ CONFIG_MTD_ROM=m # CONFIG_MTD_COMPLEX_MAPPINGS=y # CONFIG_MTD_PHYSMAP is not set -CONFIG_MTD_BF5xx=m -CONFIG_BFIN_FLASH_SIZE=0x400000 -CONFIG_EBIU_FLASH_BASE=0x20000000 # CONFIG_MTD_UCLINUX is not set # CONFIG_MTD_PLATRAM is not set @@ -610,8 +610,8 @@ CONFIG_SMC91X=y # CONFIG_SMSC911X is not set # CONFIG_DM9000 is not set CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y # CONFIG_AX88180 is not set +CONFIG_NETDEV_10000=y # # Wireless LAN @@ -680,7 +680,6 @@ CONFIG_INPUT_EVDEV=m CONFIG_BFIN_SPORT=y # CONFIG_BFIN_TIMER_LATENCY is not set # CONFIG_AD5304 is not set -# CONFIG_BF5xx_FBDMA is not set # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index b04e8e533e9a..9b7123cf27a3 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22.12 +# Linux kernel version: 2.6.22.16 # # CONFIG_MMU is not set # CONFIG_FPU is not set @@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y # Processor and Board Settings # # CONFIG_BF522 is not set +# CONFIG_BF523 is not set +# CONFIG_BF524 is not set # CONFIG_BF525 is not set +# CONFIG_BF526 is not set # CONFIG_BF527 is not set # CONFIG_BF531 is not set # CONFIG_BF532 is not set @@ -140,7 +143,6 @@ CONFIG_BF_REV_0_3=y CONFIG_BF53x=y CONFIG_BFIN_SINGLE_CORE=y CONFIG_MEM_MT48LC64M4A2FB_7E=y -CONFIG_BFIN_SHARED_FLASH_ENET=y # CONFIG_BFIN533_EZKIT is not set CONFIG_BFIN533_STAMP=y # CONFIG_BFIN533_BLUETECHNIX_CM is not set @@ -195,7 +197,7 @@ CONFIG_CLKIN_HZ=11059200 # CONFIG_BFIN_KERNEL_CLOCK is not set CONFIG_MAX_VCO_HZ=750000000 CONFIG_MIN_VCO_HZ=50000000 -CONFIG_MAX_SCLK_HZ=133000000 +CONFIG_MAX_SCLK_HZ=133333333 CONFIG_MIN_SCLK_HZ=27000000 # @@ -215,18 +217,10 @@ CONFIG_MEM_ADD_WIDTH=11 CONFIG_ENET_FLASH_PIN=0 CONFIG_BOOT_LOAD=0x1000 -# -# LED Status Indicators -# -# CONFIG_BFIN_ALIVE_LED is not set -# CONFIG_BFIN_IDLE_LED is not set + CONFIG_BFIN_SCRATCH_REG_RETN=y # CONFIG_BFIN_SCRATCH_REG_RETE is not set # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set -CONFIG_BFIN_ALIVE_LED_PORT=0xFFC00700 -CONFIG_BFIN_ALIVE_LED_DPORT=0xFFC00730 -CONFIG_BFIN_IDLE_LED_PORT=0xFFC00700 -CONFIG_BFIN_IDLE_LED_DPORT=0xFFC00730 # # Blackfin Kernel Optimizations @@ -279,6 +273,7 @@ CONFIG_BFIN_DCACHE=y # CONFIG_BFIN_WB is not set CONFIG_BFIN_WT=y CONFIG_L1_MAX_PIECE=16 +# CONFIG_MPU is not set # # Asynchonous Memory Configuration @@ -333,7 +328,7 @@ CONFIG_PM=y CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y # CONFIG_PM_WAKEUP_BY_GPIO is not set # CONFIG_PM_WAKEUP_GPIO_API is not set -CONFIG_PM_WAKEUP_SIC_IWR=0x100000 +CONFIG_PM_WAKEUP_SIC_IWR=0x80 # # CPU Frequency scaling @@ -522,7 +517,6 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_INTELEXT is not set # CONFIG_MTD_CFI_AMDSTD is not set # CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_MW320D=m CONFIG_MTD_RAM=y CONFIG_MTD_ROM=m # CONFIG_MTD_ABSENT is not set @@ -532,17 +526,6 @@ CONFIG_MTD_ROM=m # CONFIG_MTD_COMPLEX_MAPPINGS=y # CONFIG_MTD_PHYSMAP is not set -CONFIG_MTD_BF5xx=m -CONFIG_BFIN_FLASH_SIZE=0x400000 -CONFIG_EBIU_FLASH_BASE=0x20000000 - -# -# FLASH_EBIU_AMBCTL Control -# -CONFIG_BFIN_FLASH_BANK_0=0x7BB0 -CONFIG_BFIN_FLASH_BANK_1=0x7BB0 -CONFIG_BFIN_FLASH_BANK_2=0x7BB0 -CONFIG_BFIN_FLASH_BANK_3=0x7BB0 # CONFIG_MTD_UCLINUX is not set # CONFIG_MTD_PLATRAM is not set @@ -630,8 +613,8 @@ CONFIG_SMC91X=y # CONFIG_SMSC911X is not set # CONFIG_DM9000 is not set CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y # CONFIG_AX88180 is not set +CONFIG_NETDEV_10000=y # # Wireless LAN @@ -687,7 +670,6 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_POWERMATE is not set # CONFIG_INPUT_YEALINK is not set # CONFIG_INPUT_UINPUT is not set -# CONFIG_BF53X_PFBUTTONS is not set CONFIG_TWI_KEYPAD=m CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=39 @@ -711,8 +693,6 @@ CONFIG_BFIN_SPORT=y CONFIG_TWI_LCD=m CONFIG_TWI_LCD_SLAVE_ADDR=34 # CONFIG_AD5304 is not set -# CONFIG_BF5xx_TEA5764 is not set -# CONFIG_BF5xx_FBDMA is not set # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set @@ -778,7 +758,6 @@ CONFIG_I2C_ALGOBIT=m # # I2C Hardware Bus support # -# CONFIG_I2C_BLACKFIN_GPIO is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PARPORT_LIGHT is not set diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig index f812b66318b9..b37ccc681e7a 100644 --- a/arch/blackfin/configs/BF537-STAMP_defconfig +++ b/arch/blackfin/configs/BF537-STAMP_defconfig @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22.12 +# Linux kernel version: 2.6.22.16 # # CONFIG_MMU is not set # CONFIG_FPU is not set @@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y # Processor and Board Settings # # CONFIG_BF522 is not set +# CONFIG_BF523 is not set +# CONFIG_BF524 is not set # CONFIG_BF525 is not set +# CONFIG_BF526 is not set # CONFIG_BF527 is not set # CONFIG_BF531 is not set # CONFIG_BF532 is not set @@ -170,6 +173,7 @@ CONFIG_IRQ_WATCH=13 CONFIG_BFIN537_STAMP=y # CONFIG_BFIN537_BLUETECHNIX_CM is not set # CONFIG_PNAV10 is not set +# CONFIG_CAMSIG_MINOTAUR is not set # CONFIG_GENERIC_BF537_BOARD is not set # @@ -201,7 +205,7 @@ CONFIG_CLKIN_HZ=25000000 # CONFIG_BFIN_KERNEL_CLOCK is not set CONFIG_MAX_VCO_HZ=600000000 CONFIG_MIN_VCO_HZ=50000000 -CONFIG_MAX_SCLK_HZ=133000000 +CONFIG_MAX_SCLK_HZ=133333333 CONFIG_MIN_SCLK_HZ=27000000 # @@ -274,6 +278,7 @@ CONFIG_BFIN_DCACHE=y # CONFIG_BFIN_WB is not set CONFIG_BFIN_WT=y CONFIG_L1_MAX_PIECE=16 +# CONFIG_MPU is not set # # Asynchonous Memory Configuration @@ -328,7 +333,7 @@ CONFIG_PM=y CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y # CONFIG_PM_WAKEUP_BY_GPIO is not set # CONFIG_PM_WAKEUP_GPIO_API is not set -CONFIG_PM_WAKEUP_SIC_IWR=0x80000000 +CONFIG_PM_WAKEUP_SIC_IWR=0x8 # # CPU Frequency scaling @@ -483,7 +488,7 @@ CONFIG_MTD=y # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y # # User Modules And Translation Layers @@ -500,8 +505,8 @@ CONFIG_MTD_BLOCK=y # # RAM/ROM/Flash chip drivers # -# CONFIG_MTD_CFI is not set -CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_CFI=m +# CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_GEN_PROBE=m # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y @@ -515,9 +520,9 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_I4 is not set # CONFIG_MTD_CFI_I8 is not set # CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_CFI_AMDSTD is not set +CONFIG_MTD_CFI_AMDSTD=m # CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_MW320D=m +CONFIG_MTD_CFI_UTIL=m CONFIG_MTD_RAM=y CONFIG_MTD_ROM=m # CONFIG_MTD_ABSENT is not set @@ -525,11 +530,11 @@ CONFIG_MTD_ROM=m # # Mapping drivers for chip access # -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_PHYSMAP is not set -CONFIG_MTD_BF5xx=m -CONFIG_BFIN_FLASH_SIZE=0x400000 -CONFIG_EBIU_FLASH_BASE=0x20000000 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=m +CONFIG_MTD_PHYSMAP_START=0x20000000 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 # CONFIG_MTD_UCLINUX is not set # CONFIG_MTD_PLATRAM is not set @@ -647,8 +652,8 @@ CONFIG_BFIN_RX_DESC_NUM=20 # CONFIG_SMSC911X is not set # CONFIG_DM9000 is not set CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y # CONFIG_AX88180 is not set +CONFIG_NETDEV_10000=y # # Wireless LAN @@ -704,7 +709,6 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_POWERMATE is not set # CONFIG_INPUT_YEALINK is not set # CONFIG_INPUT_UINPUT is not set -# CONFIG_BF53X_PFBUTTONS is not set CONFIG_TWI_KEYPAD=m CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=72 @@ -728,8 +732,6 @@ CONFIG_BFIN_SPORT=y CONFIG_TWI_LCD=m CONFIG_TWI_LCD_SLAVE_ADDR=34 # CONFIG_AD5304 is not set -# CONFIG_BF5xx_TEA5764 is not set -# CONFIG_BF5xx_FBDMA is not set # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set @@ -802,7 +804,6 @@ CONFIG_I2C_CHARDEV=m # # I2C Hardware Bus support # -# CONFIG_I2C_BLACKFIN_GPIO is not set CONFIG_I2C_BLACKFIN_TWI=m CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50 # CONFIG_I2C_GPIO is not set @@ -957,6 +958,7 @@ CONFIG_LQ035_SLAVE_ADDR=0x58 # CONFIG_FB_BFIN_LANDSCAPE is not set # CONFIG_FB_BFIN_BGR is not set # CONFIG_FB_BFIN_T350MCQB is not set +# CONFIG_FB_HITACHI_TX09 is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_LOGO is not set @@ -1008,12 +1010,22 @@ CONFIG_SND_BFIN_AD73311_SE=4 # # System on Chip audio support # -# CONFIG_SND_SOC is not set +CONFIG_SND_SOC_AC97_BUS=y +CONFIG_SND_SOC=m +CONFIG_SND_BF5XX_SOC=m +CONFIG_SND_BF5XX_SOC_AC97=m +# CONFIG_SND_BF5XX_SOC_WM8750 is not set +# CONFIG_SND_BF5XX_SOC_WM8731 is not set +CONFIG_SND_BF5XX_SOC_BF5xx=m +CONFIG_SND_BF5XX_SPORT_NUM=0 +# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set +CONFIG_SND_SOC_AD1980=m # # Open Sound System # # CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m # # HID Devices diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig index 48367cc9fe35..fd702161ef59 100644 --- a/arch/blackfin/configs/BF548-EZKIT_defconfig +++ b/arch/blackfin/configs/BF548-EZKIT_defconfig @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22.12 +# Linux kernel version: 2.6.22.16 # # CONFIG_MMU is not set # CONFIG_FPU is not set @@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y # Processor and Board Settings # # CONFIG_BF522 is not set +# CONFIG_BF523 is not set +# CONFIG_BF524 is not set # CONFIG_BF525 is not set +# CONFIG_BF526 is not set # CONFIG_BF527 is not set # CONFIG_BF531 is not set # CONFIG_BF532 is not set @@ -126,8 +129,8 @@ CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_BF542 is not set # CONFIG_BF544 is not set # CONFIG_BF547 is not set -# CONFIG_BF548 is not set -CONFIG_BF549=y +CONFIG_BF548=y +# CONFIG_BF549 is not set # CONFIG_BF561 is not set CONFIG_BF_REV_0_0=y # CONFIG_BF_REV_0_1 is not set @@ -265,9 +268,9 @@ CONFIG_PINT3_ASSIGN=0x02020303 # CONFIG_CLKIN_HZ=25000000 # CONFIG_BFIN_KERNEL_CLOCK is not set -CONFIG_MAX_VCO_HZ=533000000 +CONFIG_MAX_VCO_HZ=600000000 CONFIG_MIN_VCO_HZ=50000000 -CONFIG_MAX_SCLK_HZ=133000000 +CONFIG_MAX_SCLK_HZ=133333333 CONFIG_MIN_SCLK_HZ=27000000 # @@ -283,7 +286,8 @@ CONFIG_HZ=250 # Memory Setup # CONFIG_MEM_SIZE=64 -CONFIG_MEM_ADD_WIDTH=10 +# CONFIG_MEM_MT46V32M16_6T is not set +CONFIG_MEM_MT46V32M16_5B=y CONFIG_BOOT_LOAD=0x1000 CONFIG_BFIN_SCRATCH_REG_RETN=y # CONFIG_BFIN_SCRATCH_REG_RETE is not set @@ -340,6 +344,7 @@ CONFIG_BFIN_DCACHE=y # CONFIG_BFIN_WB is not set CONFIG_BFIN_WT=y CONFIG_L1_MAX_PIECE=16 +# CONFIG_MPU is not set # # Asynchonous Memory Configuration @@ -349,6 +354,7 @@ CONFIG_L1_MAX_PIECE=16 # EBIU_AMGCTL Global Control # CONFIG_C_AMCKEN=y +# CONFIG_C_CDPRIO is not set # CONFIG_C_AMBEN is not set # CONFIG_C_AMBEN_B0 is not set # CONFIG_C_AMBEN_B0_B1 is not set @@ -362,9 +368,9 @@ CONFIG_BANK_0=0x7BB0 CONFIG_BANK_1=0x5554 CONFIG_BANK_2=0x7BB0 CONFIG_BANK_3=0x99B3 -CONFIG_EBUI_MBSCTLVAL=0x0 -CONFIG_EBUI_MODEVAL=0x1 -CONFIG_EBUI_FCTLVAL=0x6 +CONFIG_EBIU_MBSCTLVAL=0x0 +CONFIG_EBIU_MODEVAL=0x1 +CONFIG_EBIU_FCTLVAL=0x6 # # Bus options (PCI, PCMCIA, EISA, MCA, ISA) @@ -537,7 +543,6 @@ CONFIG_MTD_CFI_I2=y CONFIG_MTD_CFI_INTELEXT=y # CONFIG_MTD_CFI_AMDSTD is not set # CONFIG_MTD_CFI_STAA is not set -# CONFIG_MTD_MW320D is not set CONFIG_MTD_CFI_UTIL=y CONFIG_MTD_RAM=y # CONFIG_MTD_ROM is not set @@ -549,9 +554,8 @@ CONFIG_MTD_RAM=y CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_START=0x20000000 -CONFIG_MTD_PHYSMAP_LEN=0x400000 +CONFIG_MTD_PHYSMAP_LEN=0 CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -# CONFIG_MTD_BF5xx is not set # CONFIG_MTD_UCLINUX is not set # CONFIG_MTD_PLATRAM is not set @@ -690,8 +694,8 @@ CONFIG_MII=y CONFIG_SMSC911X=y # CONFIG_DM9000 is not set CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y # CONFIG_AX88180 is not set +CONFIG_NETDEV_10000=y # # Wireless LAN @@ -719,7 +723,7 @@ CONFIG_NETDEV_10000=y # # Input device support # -CONFIG_INPUT=m +CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_POLLDEV is not set @@ -745,7 +749,8 @@ CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_GPIO is not set -CONFIG_KEYBOARD_BFIN=m +CONFIG_KEYBOARD_BFIN=y +# CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set @@ -768,7 +773,6 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_POWERMATE is not set # CONFIG_INPUT_YEALINK is not set # CONFIG_INPUT_UINPUT is not set -# CONFIG_BF53X_PFBUTTONS is not set # CONFIG_TWI_KEYPAD is not set # @@ -786,13 +790,16 @@ CONFIG_INPUT_MISC=y # CONFIG_BF5xx_PPIFCD is not set # CONFIG_BFIN_SIMPLE_TIMER is not set # CONFIG_BF5xx_PPI is not set +CONFIG_BFIN_OTP=y +# CONFIG_BFIN_OTP_WRITE_ENABLE is not set # CONFIG_BFIN_SPORT is not set # CONFIG_BFIN_TIMER_LATENCY is not set # CONFIG_TWI_LCD is not set # CONFIG_AD5304 is not set -# CONFIG_BF5xx_TEA5764 is not set -# CONFIG_BF5xx_FBDMA is not set -# CONFIG_VT is not set +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set # CONFIG_SERIAL_NONSTANDARD is not set # @@ -858,7 +865,6 @@ CONFIG_I2C_CHARDEV=y # # I2C Hardware Bus support # -# CONFIG_I2C_BLACKFIN_GPIO is not set CONFIG_I2C_BLACKFIN_TWI=y CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50 # CONFIG_I2C_GPIO is not set @@ -976,12 +982,12 @@ CONFIG_DAB=y # # CONFIG_DISPLAY_SUPPORT is not set # CONFIG_VGASTATE is not set -CONFIG_FB=m +CONFIG_FB=y CONFIG_FIRMWARE_EDID=y # CONFIG_FB_DDC is not set -CONFIG_FB_CFB_FILLRECT=m -CONFIG_FB_CFB_COPYAREA=m -CONFIG_FB_CFB_IMAGEBLIT=m +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_SYS_FILLRECT is not set # CONFIG_FB_SYS_COPYAREA is not set # CONFIG_FB_SYS_IMAGEBLIT is not set @@ -998,11 +1004,34 @@ CONFIG_FB_DEFERRED_IO=y # # CONFIG_FB_BFIN_7171 is not set # CONFIG_FB_BFIN_7393 is not set -CONFIG_FB_BF54X_LQ043=m +CONFIG_FB_BF54X_LQ043=y # CONFIG_FB_BFIN_T350MCQB is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_VIRTUAL is not set -# CONFIG_LOGO is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +CONFIG_FONT_6x11=y +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +# CONFIG_LOGO_BLACKFIN_VGA16 is not set +CONFIG_LOGO_BLACKFIN_CLUT224=y # # Sound @@ -1051,7 +1080,8 @@ CONFIG_SND_BF5XX_SOC_BF548_EZKIT=y # CONFIG_SND_BF5XX_SOC_WM8750 is not set # CONFIG_SND_BF5XX_SOC_WM8731 is not set CONFIG_SND_BF5XX_SPORT_NUM=0 -# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set +CONFIG_SND_BF5XX_HAVE_COLD_RESET=y +CONFIG_SND_BF5XX_RESET_GPIO_NUM=19 CONFIG_SND_SOC_AD1980=y # @@ -1403,7 +1433,7 @@ CONFIG_NLS_UTF8=m # # CONFIG_PRINTK_TIME is not set CONFIG_ENABLE_MUST_CHECK=y -CONFIG_MAGIC_SYSRQ=y +# CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set @@ -1428,7 +1458,7 @@ CONFIG_ACCESS_CHECK=y # CONFIG_KEYS is not set CONFIG_SECURITY=y # CONFIG_SECURITY_NETWORK is not set -CONFIG_SECURITY_CAPABILITIES=y +CONFIG_SECURITY_CAPABILITIES=m # # Cryptographic options @@ -1439,7 +1469,7 @@ CONFIG_SECURITY_CAPABILITIES=y # Library routines # CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set +CONFIG_CRC_CCITT=m # CONFIG_CRC16 is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig index e9f100b45eb1..8546994939fb 100644 --- a/arch/blackfin/configs/BF561-EZKIT_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT_defconfig @@ -1,6 +1,6 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22.12 +# Linux kernel version: 2.6.22.16 # # CONFIG_MMU is not set # CONFIG_FPU is not set @@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y # Processor and Board Settings # # CONFIG_BF522 is not set +# CONFIG_BF523 is not set +# CONFIG_BF524 is not set # CONFIG_BF525 is not set +# CONFIG_BF526 is not set # CONFIG_BF527 is not set # CONFIG_BF531 is not set # CONFIG_BF532 is not set @@ -238,7 +241,7 @@ CONFIG_CLKIN_HZ=30000000 # CONFIG_BFIN_KERNEL_CLOCK is not set CONFIG_MAX_VCO_HZ=600000000 CONFIG_MIN_VCO_HZ=50000000 -CONFIG_MAX_SCLK_HZ=133000000 +CONFIG_MAX_SCLK_HZ=133333333 CONFIG_MIN_SCLK_HZ=27000000 # @@ -311,6 +314,7 @@ CONFIG_BFIN_DCACHE=y # CONFIG_BFIN_WB is not set CONFIG_BFIN_WT=y CONFIG_L1_MAX_PIECE=16 +# CONFIG_MPU is not set # # Asynchonous Memory Configuration @@ -512,7 +516,7 @@ CONFIG_MTD=y # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y # # User Modules And Translation Layers @@ -529,8 +533,8 @@ CONFIG_MTD_BLOCK=y # # RAM/ROM/Flash chip drivers # -# CONFIG_MTD_CFI is not set -CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_CFI=m +# CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_GEN_PROBE=m # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y @@ -544,9 +548,9 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_CFI_I4 is not set # CONFIG_MTD_CFI_I8 is not set # CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_CFI_AMDSTD is not set +CONFIG_MTD_CFI_AMDSTD=m # CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_MW320D=m +CONFIG_MTD_CFI_UTIL=m CONFIG_MTD_RAM=y CONFIG_MTD_ROM=m # CONFIG_MTD_ABSENT is not set @@ -554,12 +558,11 @@ CONFIG_MTD_ROM=m # # Mapping drivers for chip access # -CONFIG_MTD_COMPLEX_MAPPINGS=y -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_EZKIT561 is not set -CONFIG_MTD_BF5xx=m -CONFIG_BFIN_FLASH_SIZE=0x0400000 -CONFIG_EBIU_FLASH_BASE=0x20000000 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=m +CONFIG_MTD_PHYSMAP_START=0x20000000 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 # CONFIG_MTD_UCLINUX is not set # CONFIG_MTD_PLATRAM is not set @@ -647,8 +650,8 @@ CONFIG_SMC91X=y # CONFIG_SMSC911X is not set # CONFIG_DM9000 is not set CONFIG_NETDEV_1000=y -CONFIG_NETDEV_10000=y # CONFIG_AX88180 is not set +CONFIG_NETDEV_10000=y # # Wireless LAN @@ -717,7 +720,6 @@ CONFIG_INPUT_EVDEV=m # CONFIG_BFIN_SPORT is not set # CONFIG_BFIN_TIMER_LATENCY is not set # CONFIG_AD5304 is not set -# CONFIG_BF5xx_FBDMA is not set # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile index 8a4cfb293b27..318b9b692a48 100644 --- a/arch/blackfin/kernel/Makefile +++ b/arch/blackfin/kernel/Makefile @@ -7,7 +7,7 @@ extra-y := init_task.o vmlinux.lds obj-y := \ entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \ - fixed_code.o cplbinit.o cacheinit.o reboot.o bfin_gpio.o + fixed_code.o reboot.o bfin_gpio.o obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o obj-$(CONFIG_MODULES) += module.o diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index b54446055a43..fa9debe8d5f4 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c @@ -339,13 +339,13 @@ EXPORT_SYMBOL(set_dma_config); unsigned short set_bfin_dma_config(char direction, char flow_mode, - char intr_mode, char dma_mode, char width) + char intr_mode, char dma_mode, char width, char syncmode) { unsigned short config; config = ((direction << 1) | (width << 2) | (dma_mode << 4) | - (intr_mode << 6) | (flow_mode << 12) | RESTART); + (intr_mode << 6) | (flow_mode << 12) | (syncmode << 5)); return config; } EXPORT_SYMBOL(set_bfin_dma_config); diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index ce85d4bf34ca..6bbe0a2fccb8 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c @@ -7,7 +7,7 @@ * Description: GPIO Abstraction Layer * * Modified: - * Copyright 2007 Analog Devices Inc. + * Copyright 2008 Analog Devices Inc. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * @@ -83,6 +83,7 @@ #include <linux/delay.h> #include <linux/module.h> #include <linux/err.h> +#include <linux/proc_fs.h> #include <asm/blackfin.h> #include <asm/gpio.h> #include <asm/portmux.h> @@ -136,7 +137,6 @@ static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = { (unsigned short *) PORTG_FER, (unsigned short *) PORTH_FER, }; - #endif #ifdef BF527_FAMILY @@ -178,15 +178,13 @@ static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = { #endif static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; -static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)]; +static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)]; -#define MAX_RESOURCES 256 #define RESOURCE_LABEL_SIZE 16 -struct str_ident { +static struct str_ident { char name[RESOURCE_LABEL_SIZE]; -} *str_ident; - +} str_ident[MAX_RESOURCES]; #ifdef CONFIG_PM static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; @@ -212,7 +210,7 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INT #endif /* CONFIG_PM */ #if defined(BF548_FAMILY) -inline int check_gpio(unsigned short gpio) +inline int check_gpio(unsigned gpio) { if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 || gpio == GPIO_PH14 || gpio == GPIO_PH15 @@ -222,7 +220,7 @@ inline int check_gpio(unsigned short gpio) return 0; } #else -inline int check_gpio(unsigned short gpio) +inline int check_gpio(unsigned gpio) { if (gpio >= MAX_BLACKFIN_GPIOS) return -EINVAL; @@ -230,9 +228,13 @@ inline int check_gpio(unsigned short gpio) } #endif -static void set_label(unsigned short ident, const char *label) +void gpio_error(unsigned gpio) { + printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio); +} +static void set_label(unsigned short ident, const char *label) +{ if (label && str_ident) { strncpy(str_ident[ident].name, label, RESOURCE_LABEL_SIZE); @@ -250,6 +252,11 @@ static char *get_label(unsigned short ident) static int cmp_label(unsigned short ident, const char *label) { + if (label == NULL) { + dump_stack(); + printk(KERN_ERR "Please provide none-null label\n"); + } + if (label && str_ident) return strncmp(str_ident[ident].name, label, strlen(label)); @@ -258,7 +265,7 @@ static int cmp_label(unsigned short ident, const char *label) } #if defined(BF527_FAMILY) || defined(BF537_FAMILY) -static void port_setup(unsigned short gpio, unsigned short usage) +static void port_setup(unsigned gpio, unsigned short usage) { if (!check_gpio(gpio)) { if (usage == GPIO_USAGE) @@ -269,7 +276,7 @@ static void port_setup(unsigned short gpio, unsigned short usage) } } #elif defined(BF548_FAMILY) -static void port_setup(unsigned short gpio, unsigned short usage) +static void port_setup(unsigned gpio, unsigned short usage) { if (usage == GPIO_USAGE) gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); @@ -390,7 +397,7 @@ inline void portmux_setup(unsigned short portno, unsigned short function) #endif #ifndef BF548_FAMILY -static void default_gpio(unsigned short gpio) +static void default_gpio(unsigned gpio) { unsigned short bank, bitmask; unsigned long flags; @@ -410,7 +417,6 @@ static void default_gpio(unsigned short gpio) gpio_bankb[bank]->edge &= ~bitmask; AWA_DUMMY_READ(edge); local_irq_restore(flags); - } #else # define default_gpio(...) do { } while (0) @@ -418,12 +424,6 @@ static void default_gpio(unsigned short gpio) static int __init bfin_gpio_init(void) { - str_ident = kcalloc(MAX_RESOURCES, - sizeof(struct str_ident), GFP_KERNEL); - if (str_ident == NULL) - return -ENOMEM; - - memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident)); printk(KERN_INFO "Blackfin GPIO Controller\n"); @@ -454,10 +454,9 @@ arch_initcall(bfin_gpio_init); /* Set a specific bit */ #define SET_GPIO(name) \ -void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \ +void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ { \ unsigned long flags; \ - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \ local_irq_save(flags); \ if (arg) \ gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \ @@ -477,10 +476,9 @@ SET_GPIO(both) #if ANOMALY_05000311 || ANOMALY_05000323 #define SET_GPIO_SC(name) \ -void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \ +void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ { \ unsigned long flags; \ - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \ local_irq_save(flags); \ if (arg) \ gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ @@ -492,9 +490,8 @@ void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \ EXPORT_SYMBOL(set_gpio_ ## name); #else #define SET_GPIO_SC(name) \ -void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \ +void set_gpio_ ## name(unsigned gpio, unsigned short arg) \ { \ - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \ if (arg) \ gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \ else \ @@ -508,19 +505,17 @@ SET_GPIO_SC(maskb) SET_GPIO_SC(data) #if ANOMALY_05000311 || ANOMALY_05000323 -void set_gpio_toggle(unsigned short gpio) +void set_gpio_toggle(unsigned gpio) { unsigned long flags; - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); local_irq_save(flags); gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio); AWA_DUMMY_READ(toggle); local_irq_restore(flags); } #else -void set_gpio_toggle(unsigned short gpio) +void set_gpio_toggle(unsigned gpio) { - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio); } #endif @@ -531,7 +526,7 @@ EXPORT_SYMBOL(set_gpio_toggle); #if ANOMALY_05000311 || ANOMALY_05000323 #define SET_GPIO_P(name) \ -void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \ +void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ { \ unsigned long flags; \ local_irq_save(flags); \ @@ -542,7 +537,7 @@ void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \ EXPORT_SYMBOL(set_gpiop_ ## name); #else #define SET_GPIO_P(name) \ -void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \ +void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \ { \ gpio_bankb[gpio_bank(gpio)]->name = arg; \ } \ @@ -558,11 +553,10 @@ SET_GPIO_P(both) SET_GPIO_P(maska) SET_GPIO_P(maskb) - /* Get a specific bit */ #if ANOMALY_05000311 || ANOMALY_05000323 #define GET_GPIO(name) \ -unsigned short get_gpio_ ## name(unsigned short gpio) \ +unsigned short get_gpio_ ## name(unsigned gpio) \ { \ unsigned long flags; \ unsigned short ret; \ @@ -575,7 +569,7 @@ unsigned short get_gpio_ ## name(unsigned short gpio) \ EXPORT_SYMBOL(get_gpio_ ## name); #else #define GET_GPIO(name) \ -unsigned short get_gpio_ ## name(unsigned short gpio) \ +unsigned short get_gpio_ ## name(unsigned gpio) \ { \ return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \ } \ @@ -595,7 +589,7 @@ GET_GPIO(maskb) #if ANOMALY_05000311 || ANOMALY_05000323 #define GET_GPIO_P(name) \ -unsigned short get_gpiop_ ## name(unsigned short gpio) \ +unsigned short get_gpiop_ ## name(unsigned gpio) \ { \ unsigned long flags; \ unsigned short ret; \ @@ -608,7 +602,7 @@ unsigned short get_gpiop_ ## name(unsigned short gpio) \ EXPORT_SYMBOL(get_gpiop_ ## name); #else #define GET_GPIO_P(name) \ -unsigned short get_gpiop_ ## name(unsigned short gpio) \ +unsigned short get_gpiop_ ## name(unsigned gpio) \ { \ return (gpio_bankb[gpio_bank(gpio)]->name);\ } \ @@ -645,7 +639,7 @@ GET_GPIO_P(maskb) ************************************************************* * MODIFICATION HISTORY : **************************************************************/ -int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type) +int gpio_pm_wakeup_request(unsigned gpio, unsigned char type) { unsigned long flags; @@ -653,7 +647,6 @@ int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type) return -EINVAL; local_irq_save(flags); - wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio); wakeup_flags_map[gpio] = type; local_irq_restore(flags); @@ -662,7 +655,7 @@ int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type) } EXPORT_SYMBOL(gpio_pm_wakeup_request); -void gpio_pm_wakeup_free(unsigned short gpio) +void gpio_pm_wakeup_free(unsigned gpio) { unsigned long flags; @@ -677,7 +670,7 @@ void gpio_pm_wakeup_free(unsigned short gpio) } EXPORT_SYMBOL(gpio_pm_wakeup_free); -static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type) +static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type) { port_setup(gpio, GPIO_USAGE); set_gpio_dir(gpio, 0); @@ -784,6 +777,14 @@ void gpio_pm_restore(void) } #endif +#else /* BF548_FAMILY */ + +unsigned short get_gpio_dir(unsigned gpio) +{ + return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio))); +} +EXPORT_SYMBOL(get_gpio_dir); + #endif /* BF548_FAMILY */ /*********************************************************** @@ -1028,7 +1029,7 @@ EXPORT_SYMBOL(peripheral_free_list); * MODIFICATION HISTORY : **************************************************************/ -int gpio_request(unsigned short gpio, const char *label) +int gpio_request(unsigned gpio, const char *label) { unsigned long flags; @@ -1075,7 +1076,7 @@ int gpio_request(unsigned short gpio, const char *label) } EXPORT_SYMBOL(gpio_request); -void gpio_free(unsigned short gpio) +void gpio_free(unsigned gpio) { unsigned long flags; @@ -1085,7 +1086,7 @@ void gpio_free(unsigned short gpio) local_irq_save(flags); if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) { - printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio); + gpio_error(gpio); dump_stack(); local_irq_restore(flags); return; @@ -1101,44 +1102,55 @@ void gpio_free(unsigned short gpio) } EXPORT_SYMBOL(gpio_free); + #ifdef BF548_FAMILY -void gpio_direction_input(unsigned short gpio) +int gpio_direction_input(unsigned gpio) { unsigned long flags; - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); + if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + gpio_error(gpio); + return -EINVAL; + } local_irq_save(flags); gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio); gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio); local_irq_restore(flags); + + return 0; } EXPORT_SYMBOL(gpio_direction_input); -void gpio_direction_output(unsigned short gpio) +int gpio_direction_output(unsigned gpio, int value) { unsigned long flags; - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); + if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + gpio_error(gpio); + return -EINVAL; + } local_irq_save(flags); gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio); + gpio_set_value(gpio, value); gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio); local_irq_restore(flags); + + return 0; } EXPORT_SYMBOL(gpio_direction_output); -void gpio_set_value(unsigned short gpio, unsigned short arg) +void gpio_set_value(unsigned gpio, int arg) { if (arg) gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio); else gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio); - } EXPORT_SYMBOL(gpio_set_value); -unsigned short gpio_get_value(unsigned short gpio) +int gpio_get_value(unsigned gpio) { return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio))); } @@ -1146,31 +1158,47 @@ EXPORT_SYMBOL(gpio_get_value); #else -void gpio_direction_input(unsigned short gpio) +int gpio_direction_input(unsigned gpio) { unsigned long flags; - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); + if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + gpio_error(gpio); + return -EINVAL; + } local_irq_save(flags); gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio); AWA_DUMMY_READ(inen); local_irq_restore(flags); + + return 0; } EXPORT_SYMBOL(gpio_direction_input); -void gpio_direction_output(unsigned short gpio) +int gpio_direction_output(unsigned gpio, int value) { unsigned long flags; - BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); + if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { + gpio_error(gpio); + return -EINVAL; + } local_irq_save(flags); gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); + + if (value) + gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio); + else + gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); + gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio); AWA_DUMMY_READ(dir); local_irq_restore(flags); + + return 0; } EXPORT_SYMBOL(gpio_direction_output); @@ -1190,7 +1218,40 @@ void bfin_gpio_reset_spi0_ssel1(void) port_setup(gpio, GPIO_USAGE); gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio); + AWA_DUMMY_READ(data_set); udelay(1); } #endif /*BF548_FAMILY */ + +#if defined(CONFIG_PROC_FS) +static int gpio_proc_read(char *buf, char **start, off_t offset, + int len, int *unused_i, void *unused_v) +{ + int c, outlen = 0; + + for (c = 0; c < MAX_RESOURCES; c++) { + if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c))) + len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c, + get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT"); + else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c)) + len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c)); + else + continue; + buf += len; + outlen += len; + } + return outlen; +} + +static __init int gpio_register_proc(void) +{ + struct proc_dir_entry *proc_gpio; + + proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL); + if (proc_gpio) + proc_gpio->read_proc = gpio_proc_read; + return proc_gpio != NULL; +} +__initcall(gpio_register_proc); +#endif diff --git a/arch/blackfin/kernel/cplb-mpu/Makefile b/arch/blackfin/kernel/cplb-mpu/Makefile new file mode 100644 index 000000000000..286b69357f97 --- /dev/null +++ b/arch/blackfin/kernel/cplb-mpu/Makefile @@ -0,0 +1,8 @@ +# +# arch/blackfin/kernel/cplb-nompu/Makefile +# + +obj-y := cplbinit.o cacheinit.o cplbmgr.o + +obj-$(CONFIG_CPLB_INFO) += cplbinfo.o + diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c new file mode 100644 index 000000000000..9eecfa403187 --- /dev/null +++ b/arch/blackfin/kernel/cplb-mpu/cacheinit.c @@ -0,0 +1,62 @@ +/* + * Copyright 2004-2007 Analog Devices Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <linux/cpu.h> + +#include <asm/cacheflush.h> +#include <asm/blackfin.h> +#include <asm/cplb.h> +#include <asm/cplbinit.h> + +#if defined(CONFIG_BFIN_ICACHE) +void bfin_icache_init(void) +{ + unsigned long ctrl; + int i; + + SSYNC(); + for (i = 0; i < MAX_CPLBS; i++) { + bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr); + bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data); + } + ctrl = bfin_read_IMEM_CONTROL(); + ctrl |= IMC | ENICPLB; + bfin_write_IMEM_CONTROL(ctrl); + SSYNC(); +} +#endif + +#if defined(CONFIG_BFIN_DCACHE) +void bfin_dcache_init(void) +{ + unsigned long ctrl; + int i; + + SSYNC(); + for (i = 0; i < MAX_CPLBS; i++) { + bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr); + bfin_write32(DCPLB_DATA0 + i * 4, dcplb_tbl[i].data); + } + + ctrl = bfin_read_DMEM_CONTROL(); + ctrl |= DMEM_CNTR; + bfin_write_DMEM_CONTROL(ctrl); + SSYNC(); +} +#endif diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinfo.c b/arch/blackfin/kernel/cplb-mpu/cplbinfo.c new file mode 100644 index 000000000000..bd072299f7f2 --- /dev/null +++ b/arch/blackfin/kernel/cplb-mpu/cplbinfo.c @@ -0,0 +1,144 @@ +/* + * File: arch/blackfin/mach-common/cplbinfo.c + * Based on: + * Author: Sonic Zhang <sonic.zhang@analog.com> + * + * Created: Jan. 2005 + * Description: Display CPLB status + * + * Modified: + * Copyright 2004-2006 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/proc_fs.h> +#include <linux/uaccess.h> + +#include <asm/current.h> +#include <asm/system.h> +#include <asm/cplb.h> +#include <asm/cplbinit.h> +#include <asm/blackfin.h> + +#define CPLB_I 1 +#define CPLB_D 2 + +#define SYNC_SYS SSYNC() +#define SYNC_CORE CSYNC() + +#define CPLB_BIT_PAGESIZE 0x30000 + +static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" }; + +static char *cplb_print_entry(char *buf, struct cplb_entry *tbl, int switched) +{ + int i; + buf += sprintf(buf, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n"); + for (i = 0; i < MAX_CPLBS; i++) { + unsigned long data = tbl[i].data; + unsigned long addr = tbl[i].addr; + if (!(data & CPLB_VALID)) + continue; + + buf += + sprintf(buf, + "%d\t0x%08lx\t%06lx\t%s\t%c\t%c\t%c\t%c\n", + i, addr, data, + page_size_string_table[(data & 0x30000) >> 16], + (data & CPLB_USER_RD) ? 'Y' : 'N', + (data & CPLB_USER_WR) ? 'Y' : 'N', + (data & CPLB_SUPV_WR) ? 'Y' : 'N', + i < switched ? 'N' : 'Y'); + } + buf += sprintf(buf, "\n"); + + return buf; +} + +int cplbinfo_proc_output(char *buf) +{ + char *p; + + p = buf; + + p += sprintf(p, "------------------ CPLB Information ------------------\n\n"); + + if (bfin_read_IMEM_CONTROL() & ENICPLB) { + p += sprintf(p, "Instruction CPLB entry:\n"); + p = cplb_print_entry(p, icplb_tbl, first_switched_icplb); + } else + p += sprintf(p, "Instruction CPLB is disabled.\n\n"); + + if (1 || bfin_read_DMEM_CONTROL() & ENDCPLB) { + p += sprintf(p, "Data CPLB entry:\n"); + p = cplb_print_entry(p, dcplb_tbl, first_switched_dcplb); + } else + p += sprintf(p, "Data CPLB is disabled.\n"); + + p += sprintf(p, "ICPLB miss: %d\nICPLB supervisor miss: %d\n", + nr_icplb_miss, nr_icplb_supv_miss); + p += sprintf(p, "DCPLB miss: %d\nDCPLB protection fault:%d\n", + nr_dcplb_miss, nr_dcplb_prot); + p += sprintf(p, "CPLB flushes: %d\n", + nr_cplb_flush); + + return p - buf; +} + +static int cplbinfo_read_proc(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + int len; + + len = cplbinfo_proc_output(page); + if (len <= off + count) + *eof = 1; + *start = page + off; + len -= off; + if (len > count) + len = count; + if (len < 0) + len = 0; + return len; +} + +static int __init cplbinfo_init(void) +{ + struct proc_dir_entry *entry; + + entry = create_proc_entry("cplbinfo", 0, NULL); + if (!entry) + return -ENOMEM; + + entry->read_proc = cplbinfo_read_proc; + entry->data = NULL; + + return 0; +} + +static void __exit cplbinfo_exit(void) +{ + remove_proc_entry("cplbinfo", NULL); +} + +module_init(cplbinfo_init); +module_exit(cplbinfo_exit); diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c new file mode 100644 index 000000000000..e2e2b5079f5b --- /dev/null +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c @@ -0,0 +1,91 @@ +/* + * Blackfin CPLB initialization + * + * Copyright 2004-2007 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <linux/module.h> + +#include <asm/blackfin.h> +#include <asm/cplb.h> +#include <asm/cplbinit.h> + +struct cplb_entry icplb_tbl[MAX_CPLBS]; +struct cplb_entry dcplb_tbl[MAX_CPLBS]; + +int first_switched_icplb, first_switched_dcplb; +int first_mask_dcplb; + +void __init generate_cpl_tables(void) +{ + int i_d, i_i; + unsigned long addr; + unsigned long d_data, i_data; + unsigned long d_cache = 0, i_cache = 0; + +#ifdef CONFIG_BFIN_ICACHE + i_cache = CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; +#endif + +#ifdef CONFIG_BFIN_DCACHE + d_cache = CPLB_L1_CHBL; +#ifdef CONFIG_BLKFIN_WT + d_cache |= CPLB_L1_AOW | CPLB_WT; +#endif +#endif + i_d = i_i = 0; + + /* Set up the zero page. */ + dcplb_tbl[i_d].addr = 0; + dcplb_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; + +#if 0 + icplb_tbl[i_i].addr = 0; + icplb_tbl[i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB; +#endif + + /* Cover kernel memory with 4M pages. */ + addr = 0; + d_data = d_cache | CPLB_SUPV_WR | CPLB_VALID | PAGE_SIZE_4MB | CPLB_DIRTY; + i_data = i_cache | CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4MB; + + for (; addr < memory_start; addr += 4 * 1024 * 1024) { + dcplb_tbl[i_d].addr = addr; + dcplb_tbl[i_d++].data = d_data; + icplb_tbl[i_i].addr = addr; + icplb_tbl[i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0); + } + + /* Cover L1 memory. One 4M area for code and data each is enough. */ +#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0 + dcplb_tbl[i_d].addr = L1_DATA_A_START; + dcplb_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; +#endif + icplb_tbl[i_i].addr = L1_CODE_START; + icplb_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; + + first_mask_dcplb = i_d; + first_switched_dcplb = i_d + (1 << page_mask_order); + first_switched_icplb = i_i; + + while (i_d < MAX_CPLBS) + dcplb_tbl[i_d++].data = 0; + while (i_i < MAX_CPLBS) + icplb_tbl[i_i++].data = 0; +} diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c new file mode 100644 index 000000000000..c426a22f9907 --- /dev/null +++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c @@ -0,0 +1,338 @@ +/* + * Blackfin CPLB exception handling. + * Copyright 2004-2007 Analog Devices Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <linux/module.h> +#include <linux/mm.h> + +#include <asm/blackfin.h> +#include <asm/cplbinit.h> +#include <asm/mmu_context.h> + +#ifdef CONFIG_BFIN_ICACHE + +#define FAULT_RW (1 << 16) +#define FAULT_USERSUPV (1 << 17) + +int page_mask_nelts; +int page_mask_order; +unsigned long *current_rwx_mask; + +int nr_dcplb_miss, nr_icplb_miss, nr_icplb_supv_miss, nr_dcplb_prot; +int nr_cplb_flush; + +static inline void disable_dcplb(void) +{ + unsigned long ctrl; + SSYNC(); + ctrl = bfin_read_DMEM_CONTROL(); + ctrl &= ~ENDCPLB; + bfin_write_DMEM_CONTROL(ctrl); + SSYNC(); +} + +static inline void enable_dcplb(void) +{ + unsigned long ctrl; + SSYNC(); + ctrl = bfin_read_DMEM_CONTROL(); + ctrl |= ENDCPLB; + bfin_write_DMEM_CONTROL(ctrl); + SSYNC(); +} + +static inline void disable_icplb(void) +{ + unsigned long ctrl; + SSYNC(); + ctrl = bfin_read_IMEM_CONTROL(); + ctrl &= ~ENICPLB; + bfin_write_IMEM_CONTROL(ctrl); + SSYNC(); +} + +static inline void enable_icplb(void) +{ + unsigned long ctrl; + SSYNC(); + ctrl = bfin_read_IMEM_CONTROL(); + ctrl |= ENICPLB; + bfin_write_IMEM_CONTROL(ctrl); + SSYNC(); +} + +/* + * Given the contents of the status register, return the index of the + * CPLB that caused the fault. + */ +static inline int faulting_cplb_index(int status) +{ + int signbits = __builtin_bfin_norm_fr1x32(status & 0xFFFF); + return 30 - signbits; +} + +/* + * Given the contents of the status register and the DCPLB_DATA contents, + * return true if a write access should be permitted. + */ +static inline int write_permitted(int status, unsigned long data) +{ + if (status & FAULT_USERSUPV) + return !!(data & CPLB_SUPV_WR); + else + return !!(data & CPLB_USER_WR); +} + +/* Counters to implement round-robin replacement. */ +static int icplb_rr_index, dcplb_rr_index; + +/* + * Find an ICPLB entry to be evicted and return its index. + */ +static int evict_one_icplb(void) +{ + int i; + for (i = first_switched_icplb; i < MAX_CPLBS; i++) + if ((icplb_tbl[i].data & CPLB_VALID) == 0) + return i; + i = first_switched_icplb + icplb_rr_index; + if (i >= MAX_CPLBS) { + i -= MAX_CPLBS - first_switched_icplb; + icplb_rr_index -= MAX_CPLBS - first_switched_icplb; + } + icplb_rr_index++; + return i; +} + +static int evict_one_dcplb(void) +{ + int i; + for (i = first_switched_dcplb; i < MAX_CPLBS; i++) + if ((dcplb_tbl[i].data & CPLB_VALID) == 0) + return i; + i = first_switched_dcplb + dcplb_rr_index; + if (i >= MAX_CPLBS) { + i -= MAX_CPLBS - first_switched_dcplb; + dcplb_rr_index -= MAX_CPLBS - first_switched_dcplb; + } + dcplb_rr_index++; + return i; +} + +static noinline int dcplb_miss(void) +{ + unsigned long addr = bfin_read_DCPLB_FAULT_ADDR(); + int status = bfin_read_DCPLB_STATUS(); + unsigned long *mask; + int idx; + unsigned long d_data; + + nr_dcplb_miss++; + if (addr >= _ramend) + return CPLB_PROT_VIOL; + + d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; +#ifdef CONFIG_BFIN_DCACHE + d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; +#ifdef CONFIG_BLKFIN_WT + d_data |= CPLB_L1_AOW | CPLB_WT; +#endif +#endif + mask = current_rwx_mask; + if (mask) { + int page = addr >> PAGE_SHIFT; + int offs = page >> 5; + int bit = 1 << (page & 31); + + if (mask[offs] & bit) + d_data |= CPLB_USER_RD; + + mask += page_mask_nelts; + if (mask[offs] & bit) + d_data |= CPLB_USER_WR; + } + + idx = evict_one_dcplb(); + + addr &= PAGE_MASK; + dcplb_tbl[idx].addr = addr; + dcplb_tbl[idx].data = d_data; + + disable_dcplb(); + bfin_write32(DCPLB_DATA0 + idx * 4, d_data); + bfin_write32(DCPLB_ADDR0 + idx * 4, addr); + enable_dcplb(); + + return 0; +} + +static noinline int icplb_miss(void) +{ + unsigned long addr = bfin_read_ICPLB_FAULT_ADDR(); + int status = bfin_read_ICPLB_STATUS(); + int idx; + unsigned long i_data; + + nr_icplb_miss++; + if (status & FAULT_USERSUPV) + nr_icplb_supv_miss++; + + if (addr >= _ramend) + return CPLB_PROT_VIOL; + + /* + * First, try to find a CPLB that matches this address. If we + * find one, then the fact that we're in the miss handler means + * that the instruction crosses a page boundary. + */ + for (idx = first_switched_icplb; idx < MAX_CPLBS; idx++) { + if (icplb_tbl[idx].data & CPLB_VALID) { + unsigned long this_addr = icplb_tbl[idx].addr; + if (this_addr <= addr && this_addr + PAGE_SIZE > addr) { + addr += PAGE_SIZE; + break; + } + } + } + + i_data = CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4KB; +#ifdef CONFIG_BFIN_ICACHE + i_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; +#endif + + /* + * Two cases to distinguish - a supervisor access must necessarily + * be for a module page; we grant it unconditionally (could do better + * here in the future). Otherwise, check the x bitmap of the current + * process. + */ + if (!(status & FAULT_USERSUPV)) { + unsigned long *mask = current_rwx_mask; + + if (mask) { + int page = addr >> PAGE_SHIFT; + int offs = page >> 5; + int bit = 1 << (page & 31); + + mask += 2 * page_mask_nelts; + if (mask[offs] & bit) + i_data |= CPLB_USER_RD; + } + } + + idx = evict_one_icplb(); + addr &= PAGE_MASK; + icplb_tbl[idx].addr = addr; + icplb_tbl[idx].data = i_data; + + disable_icplb(); + bfin_write32(ICPLB_DATA0 + idx * 4, i_data); + bfin_write32(ICPLB_ADDR0 + idx * 4, addr); + enable_icplb(); + + return 0; +} + +static noinline int dcplb_protection_fault(void) +{ + unsigned long addr = bfin_read_DCPLB_FAULT_ADDR(); + int status = bfin_read_DCPLB_STATUS(); + + nr_dcplb_prot++; + + if (status & FAULT_RW) { + int idx = faulting_cplb_index(status); + unsigned long data = dcplb_tbl[idx].data; + if (!(data & CPLB_WT) && !(data & CPLB_DIRTY) && + write_permitted(status, data)) { + data |= CPLB_DIRTY; + dcplb_tbl[idx].data = data; + bfin_write32(DCPLB_DATA0 + idx * 4, data); + return 0; + } + } + return CPLB_PROT_VIOL; +} + +int cplb_hdr(int seqstat, struct pt_regs *regs) +{ + int cause = seqstat & 0x3f; + switch (cause) { + case 0x23: + return dcplb_protection_fault(); + case 0x2C: + return icplb_miss(); + case 0x26: + return dcplb_miss(); + default: + return 1; + panic_cplb_error(seqstat, regs); + } +} + +void flush_switched_cplbs(void) +{ + int i; + + nr_cplb_flush++; + + disable_icplb(); + for (i = first_switched_icplb; i < MAX_CPLBS; i++) { + icplb_tbl[i].data = 0; + bfin_write32(ICPLB_DATA0 + i * 4, 0); + } + enable_icplb(); + + disable_dcplb(); + for (i = first_mask_dcplb; i < MAX_CPLBS; i++) { + dcplb_tbl[i].data = 0; + bfin_write32(DCPLB_DATA0 + i * 4, 0); + } + enable_dcplb(); +} + +void set_mask_dcplbs(unsigned long *masks) +{ + int i; + unsigned long addr = (unsigned long)masks; + unsigned long d_data; + current_rwx_mask = masks; + + if (!masks) + return; + + d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; +#ifdef CONFIG_BFIN_DCACHE + d_data |= CPLB_L1_CHBL; +#ifdef CONFIG_BLKFIN_WT + d_data |= CPLB_L1_AOW | CPLB_WT; +#endif +#endif + + disable_dcplb(); + for (i = first_mask_dcplb; i < first_switched_dcplb; i++) { + dcplb_tbl[i].addr = addr; + dcplb_tbl[i].data = d_data; + bfin_write32(DCPLB_DATA0 + i * 4, d_data); + bfin_write32(DCPLB_ADDR0 + i * 4, addr); + addr += PAGE_SIZE; + } + enable_dcplb(); +} + +#endif diff --git a/arch/blackfin/kernel/cplb-nompu/Makefile b/arch/blackfin/kernel/cplb-nompu/Makefile new file mode 100644 index 000000000000..d36ea9b5382e --- /dev/null +++ b/arch/blackfin/kernel/cplb-nompu/Makefile @@ -0,0 +1,8 @@ +# +# arch/blackfin/kernel/cplb-nompu/Makefile +# + +obj-y := cplbinit.o cacheinit.o cplbhdlr.o cplbmgr.o + +obj-$(CONFIG_CPLB_INFO) += cplbinfo.o + diff --git a/arch/blackfin/kernel/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c index 62cbba7364b0..8a18399f6072 100644 --- a/arch/blackfin/kernel/cacheinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cacheinit.c @@ -42,6 +42,7 @@ void bfin_icache_init(void) ctrl = bfin_read_IMEM_CONTROL(); ctrl |= IMC | ENICPLB; bfin_write_IMEM_CONTROL(ctrl); + SSYNC(); } #endif @@ -63,5 +64,6 @@ void bfin_dcache_init(void) ctrl = bfin_read_DMEM_CONTROL(); ctrl |= DMEM_CNTR; bfin_write_DMEM_CONTROL(ctrl); + SSYNC(); } #endif diff --git a/arch/blackfin/mach-common/cplbhdlr.S b/arch/blackfin/kernel/cplb-nompu/cplbhdlr.S index 2788532de72b..2788532de72b 100644 --- a/arch/blackfin/mach-common/cplbhdlr.S +++ b/arch/blackfin/kernel/cplb-nompu/cplbhdlr.S diff --git a/arch/blackfin/mach-common/cplbinfo.c b/arch/blackfin/kernel/cplb-nompu/cplbinfo.c index a4f0b428a34d..a4f0b428a34d 100644 --- a/arch/blackfin/mach-common/cplbinfo.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinfo.c diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 6320bc45fbba..6320bc45fbba 100644 --- a/arch/blackfin/kernel/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/kernel/cplb-nompu/cplbmgr.S index 6f909cbfac7b..f5cf3accef37 100644 --- a/arch/blackfin/mach-common/cplbmgr.S +++ b/arch/blackfin/kernel/cplb-nompu/cplbmgr.S @@ -75,6 +75,15 @@ ENTRY(_cplb_mgr) * from the configuration table. */ + /* A multi-word instruction can cross a page boundary. This means the + * first part of the instruction can be in a valid page, but the + * second part is not, and hence generates the instruction miss. + * However, the fault address is for the start of the instruction, + * not the part that's in the bad page. Therefore, we have to check + * whether the fault address applies to a page that is already present + * in the table. + */ + P4.L = LO(ICPLB_FAULT_ADDR); P4.H = HI(ICPLB_FAULT_ADDR); @@ -87,7 +96,7 @@ ENTRY(_cplb_mgr) R4 = [P4]; /* Get faulting address*/ R6 = 64; /* Advance past the fault address, which*/ R6 = R6 + R4; /* we'll use if we find a match*/ - R3 = ((16 << 8) | 2); /* Extract mask, bits 16 and 17.*/ + R3 = ((16 << 8) | 2); /* Extract mask, two bits at posn 16 */ R5 = 0; .Lisearch: @@ -125,7 +134,9 @@ ENTRY(_cplb_mgr) P4.L = LO(IMEM_CONTROL); P4.H = HI(IMEM_CONTROL); - /* disable cplbs */ + /* Turn off CPLBs while we work, necessary according to HRM before + * modifying CPLB descriptors + */ R5 = [P4]; /* Control Register*/ BITCLR(R5,ENICPLB_P); CLI R1; @@ -179,7 +190,14 @@ ENTRY(_cplb_mgr) [P0 - 4] = R0; R0 = [P0 - 0x100]; [P0-0x104] = R0; -.Lie_move:P0+=4; +.Lie_move: + P0+=4; + + /* Clear ICPLB_DATA15, in case we don't find a replacement + * otherwise, we would have a duplicate entry, and will crash + */ + R0 = 0; + [P0 - 4] = R0; /* We've made space in the ICPLB table, so that ICPLB15 * is now free to be overwritten. Next, we have to determine @@ -504,14 +522,23 @@ ENTRY(_cplb_mgr) R0 = [P0++]; /* move data */ [P0 - 8] = R0; R0 = [P0-0x104] /* move address */ -.Lde_move: [P0-0x108] = R0; +.Lde_move: + [P0-0x108] = R0; + +.Lde_moved: + NOP; + + /* Clear DCPLB_DATA15, in case we don't find a replacement + * otherwise, we would have a duplicate entry, and will crash + */ + R0 = 0; + [P0 - 0x4] = R0; /* We've now made space in DCPLB15 for the new CPLB to be * installed. The next stage is to locate a CPLB in the * config table that covers the faulting address. */ -.Lde_moved:NOP; R0 = I0; /* Our faulting address */ P2.L = _dpdt_table; diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c index 724f4a5a1d46..60f67f90fe35 100644 --- a/arch/blackfin/kernel/early_printk.c +++ b/arch/blackfin/kernel/early_printk.c @@ -187,7 +187,7 @@ asmlinkage void __init init_early_exception_vectors(void) bfin_write_EVT15(early_trap); CSYNC(); - /* Set all the return from interupt, exception, NMI to a known place + /* Set all the return from interrupt, exception, NMI to a known place * so if we do a RETI, RETX or RETN by mistake - we go somewhere known * Note - don't change RETS - we are in a subroutine, or * RETE - since it might screw up if emulator is attached @@ -205,7 +205,7 @@ asmlinkage void __init early_trap_c(struct pt_regs *fp, void *retaddr) if (likely(early_console == NULL)) setup_early_printk(DEFAULT_EARLY_PORT); - dump_bfin_mem((void *)fp->retx); + dump_bfin_mem(fp); show_regs(fp); dump_bfin_trace_buffer(); diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c index 5bf15125f0d6..023dc80af187 100644 --- a/arch/blackfin/kernel/process.c +++ b/arch/blackfin/kernel/process.c @@ -39,9 +39,6 @@ #include <asm/blackfin.h> #include <asm/fixed_code.h> -#define LED_ON 0 -#define LED_OFF 1 - asmlinkage void ret_from_fork(void); /* Points to the SDRAM backup memory for the stack that is currently in @@ -70,32 +67,6 @@ void (*pm_power_off)(void) = NULL; EXPORT_SYMBOL(pm_power_off); /* - * We are using a different LED from the one used to indicate timer interrupt. - */ -#if defined(CONFIG_BFIN_IDLE_LED) -static inline void leds_switch(int flag) -{ - unsigned short tmp = 0; - - tmp = bfin_read_CONFIG_BFIN_IDLE_LED_PORT(); - SSYNC(); - - if (flag == LED_ON) - tmp &= ~CONFIG_BFIN_IDLE_LED_PIN; /* light on */ - else - tmp |= CONFIG_BFIN_IDLE_LED_PIN; /* light off */ - - bfin_write_CONFIG_BFIN_IDLE_LED_PORT(tmp); - SSYNC(); - -} -#else -static inline void leds_switch(int flag) -{ -} -#endif - -/* * The idle loop on BFIN */ #ifdef CONFIG_IDLE_L1 @@ -106,12 +77,10 @@ void cpu_idle(void)__attribute__((l1_text)); void default_idle(void) { while (!need_resched()) { - leds_switch(LED_OFF); local_irq_disable(); if (likely(!need_resched())) idle_with_irq_disabled(); local_irq_enable(); - leds_switch(LED_ON); } } @@ -327,6 +296,7 @@ void finish_atomic_sections (struct pt_regs *regs) } #if defined(CONFIG_ACCESS_CHECK) +/* Return 1 if access to memory range is OK, 0 otherwise */ int _access_ok(unsigned long addr, unsigned long size) { if (size == 0) diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c index ae28aac6fec1..483f93dfc1b5 100644 --- a/arch/blackfin/kernel/reboot.c +++ b/arch/blackfin/kernel/reboot.c @@ -19,6 +19,11 @@ #define SYSCR_VAL 0x10 #endif +/* + * Delay min 5 SCLK cycles using worst case CCLK/SCLK ratio (15) + */ +#define SWRST_DELAY (5 * 15) + /* A system soft reset makes external memory unusable * so force this function into L1. */ @@ -34,7 +39,13 @@ void bfin_reset(void) while (1) { /* initiate system soft reset with magic 0x7 */ bfin_write_SWRST(0x7); - asm("ssync;"); + + /* Wait for System reset to actually reset, needs to be 5 SCLKs, */ + /* Assume CCLK / SCLK ratio is worst case (15), and use 5*15 */ + + asm("LSETUP(.Lfoo,.Lfoo) LC0 = %0\n .Lfoo: NOP;\n" + : : "a" (SWRST_DELAY) : "LC0", "LT0", "LB0"); + /* clear system soft reset */ bfin_write_SWRST(0); asm("ssync;"); diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index d2822010b7ce..462cae893757 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -238,7 +238,13 @@ void __init setup_arch(char **cmdline_p) memory_end = _ramend - DMA_UNCACHED_REGION; _ramstart = (unsigned long)__bss_stop; + _rambase = (unsigned long)_stext; +#ifdef CONFIG_MPU + /* Round up to multiple of 4MB. */ + memory_start = (_ramstart + 0x3fffff) & ~0x3fffff; +#else memory_start = PAGE_ALIGN(_ramstart); +#endif #if defined(CONFIG_MTD_UCLINUX) /* generic memory mapped MTD driver */ @@ -307,6 +313,11 @@ void __init setup_arch(char **cmdline_p) printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20); #endif /* ANOMALY_05000263 */ +#ifdef CONFIG_MPU + page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32; + page_mask_order = get_order(3 * page_mask_nelts * sizeof(long)); +#endif + #if !defined(CONFIG_MTD_UCLINUX) memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/ #endif @@ -315,8 +326,6 @@ void __init setup_arch(char **cmdline_p) init_mm.end_data = (unsigned long)_edata; init_mm.brk = (unsigned long)0; - init_leds(); - _bfin_swrst = bfin_read_SWRST(); if (_bfin_swrst & RESET_DOUBLE) diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c index beef057bd1dc..5bd64e341df3 100644 --- a/arch/blackfin/kernel/time.c +++ b/arch/blackfin/kernel/time.c @@ -42,75 +42,6 @@ static void time_sched_init(irqreturn_t(*timer_routine) (int, void *)); static unsigned long gettimeoffset(void); -static inline void do_leds(void); - -#if (defined(CONFIG_BFIN_ALIVE_LED) || defined(CONFIG_BFIN_IDLE_LED)) -void __init init_leds(void) -{ - unsigned int tmp = 0; - -#if defined(CONFIG_BFIN_ALIVE_LED) - /* config pins as output. */ - tmp = bfin_read_CONFIG_BFIN_ALIVE_LED_DPORT(); - SSYNC(); - bfin_write_CONFIG_BFIN_ALIVE_LED_DPORT(tmp | CONFIG_BFIN_ALIVE_LED_PIN); - SSYNC(); - - /* First set led be off */ - tmp = bfin_read_CONFIG_BFIN_ALIVE_LED_PORT(); - SSYNC(); - bfin_write_CONFIG_BFIN_ALIVE_LED_PORT(tmp | CONFIG_BFIN_ALIVE_LED_PIN); /* light off */ - SSYNC(); -#endif - -#if defined(CONFIG_BFIN_IDLE_LED) - /* config pins as output. */ - tmp = bfin_read_CONFIG_BFIN_IDLE_LED_DPORT(); - SSYNC(); - bfin_write_CONFIG_BFIN_IDLE_LED_DPORT(tmp | CONFIG_BFIN_IDLE_LED_PIN); - SSYNC(); - - /* First set led be off */ - tmp = bfin_read_CONFIG_BFIN_IDLE_LED_PORT(); - SSYNC(); - bfin_write_CONFIG_BFIN_IDLE_LED_PORT(tmp | CONFIG_BFIN_IDLE_LED_PIN); /* light off */ - SSYNC(); -#endif -} -#else -void __init init_leds(void) -{ -} -#endif - -#if defined(CONFIG_BFIN_ALIVE_LED) -static inline void do_leds(void) -{ - static unsigned int count = 50; - static int flag; - unsigned short tmp = 0; - - if (--count == 0) { - count = 50; - flag = ~flag; - } - tmp = bfin_read_CONFIG_BFIN_ALIVE_LED_PORT(); - SSYNC(); - - if (flag) - tmp &= ~CONFIG_BFIN_ALIVE_LED_PIN; /* light on */ - else - tmp |= CONFIG_BFIN_ALIVE_LED_PIN; /* light off */ - - bfin_write_CONFIG_BFIN_ALIVE_LED_PORT(tmp); - SSYNC(); - -} -#else -static inline void do_leds(void) -{ -} -#endif static struct irqaction bfin_timer_irq = { .name = "BFIN Timer Tick", @@ -205,7 +136,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy) write_seqlock(&xtime_lock); do_timer(1); - do_leds(); #ifndef CONFIG_SMP update_process_times(user_mode(get_irq_regs())); diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index 21a55ef19cbd..66b5f3e3ae2a 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -36,8 +36,10 @@ #include <asm/cacheflush.h> #include <asm/blackfin.h> #include <asm/irq_handler.h> +#include <linux/irq.h> #include <asm/trace.h> #include <asm/fixed_code.h> +#include <asm/dma.h> #ifdef CONFIG_KGDB # include <linux/debugger.h> @@ -170,7 +172,7 @@ asmlinkage void double_fault_c(struct pt_regs *fp) oops_in_progress = 1; printk(KERN_EMERG "\n" KERN_EMERG "Double Fault\n"); dump_bfin_process(fp); - dump_bfin_mem((void *)fp->retx); + dump_bfin_mem(fp); show_regs(fp); panic("Double Fault - unrecoverable event\n"); @@ -195,9 +197,13 @@ asmlinkage void trap_c(struct pt_regs *fp) * we will kernel panic, so the system reboots. * If KGDB is enabled, don't set this for kernel breakpoints */ - if ((bfin_read_IPEND() & 0xFFC0) + + /* TODO: check to see if we are in some sort of deferred HWERR + * that we should be able to recover from, not kernel panic + */ + if ((bfin_read_IPEND() & 0xFFC0) && (trapnr != VEC_STEP) #ifdef CONFIG_KGDB - && trapnr != VEC_EXCPT02 + && (trapnr != VEC_EXCPT02) #endif ){ console_verbose(); @@ -433,6 +439,36 @@ asmlinkage void trap_c(struct pt_regs *fp) /* 0x3D - Reserved, Caught by default */ /* 0x3E - Reserved, Caught by default */ /* 0x3F - Reserved, Caught by default */ + case VEC_HWERR: + info.si_code = BUS_ADRALN; + sig = SIGBUS; + switch (fp->seqstat & SEQSTAT_HWERRCAUSE) { + /* System MMR Error */ + case (SEQSTAT_HWERRCAUSE_SYSTEM_MMR): + info.si_code = BUS_ADRALN; + sig = SIGBUS; + printk(KERN_NOTICE HWC_x2(KERN_NOTICE)); + break; + /* External Memory Addressing Error */ + case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR): + info.si_code = BUS_ADRERR; + sig = SIGBUS; + printk(KERN_NOTICE HWC_x3(KERN_NOTICE)); + break; + /* Performance Monitor Overflow */ + case (SEQSTAT_HWERRCAUSE_PERF_FLOW): + printk(KERN_NOTICE HWC_x12(KERN_NOTICE)); + break; + /* RAISE 5 instruction */ + case (SEQSTAT_HWERRCAUSE_RAISE_5): + printk(KERN_NOTICE HWC_x18(KERN_NOTICE)); + break; + default: /* Reserved */ + printk(KERN_NOTICE HWC_default(KERN_NOTICE)); + break; + } + CHK_DEBUGGER_TRAP(); + break; default: info.si_code = TRAP_ILLTRAP; sig = SIGTRAP; @@ -447,7 +483,7 @@ asmlinkage void trap_c(struct pt_regs *fp) if (sig != SIGTRAP) { unsigned long stack; dump_bfin_process(fp); - dump_bfin_mem((void *)fp->retx); + dump_bfin_mem(fp); show_regs(fp); /* Print out the trace buffer if it makes sense */ @@ -461,6 +497,7 @@ asmlinkage void trap_c(struct pt_regs *fp) dump_bfin_trace_buffer(); show_stack(current, &stack); if (oops_in_progress) { + print_modules(); #ifndef CONFIG_ACCESS_CHECK printk(KERN_EMERG "Please turn on " "CONFIG_ACCESS_CHECK\n"); @@ -474,13 +511,6 @@ asmlinkage void trap_c(struct pt_regs *fp) info.si_addr = (void *)fp->pc; force_sig_info(sig, &info, current); - /* Ensure that bad return addresses don't end up in an infinite - * loop, due to speculative loads/reads. This needs to be done after - * the signal has been sent. - */ - if (trapnr == VEC_CPLB_I_M && sig != SIGTRAP) - fp->pc = SAFE_USER_INSTRUCTION; - trace_buffer_restore(j); return; } @@ -616,8 +646,10 @@ void dump_bfin_process(struct pt_regs *fp) if (oops_in_progress) printk(KERN_EMERG "Kernel OOPS in progress\n"); - if (context & 0x0020) - printk(KERN_NOTICE "Deferred excecption or HW Error context\n"); + if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) + printk(KERN_NOTICE "HW Error context\n"); + else if (context & 0x0020) + printk(KERN_NOTICE "Defered Exception context\n"); else if (context & 0x3FC0) printk(KERN_NOTICE "Interrupt context\n"); else if (context & 0x4000) @@ -645,59 +677,124 @@ void dump_bfin_process(struct pt_regs *fp) "No Valid process in current context\n"); } -void dump_bfin_mem(void *retaddr) +void dump_bfin_mem(struct pt_regs *fp) { + unsigned short *addr, *erraddr, val = 0, err = 0; + char sti = 0, buf[6]; - if (retaddr >= (void *)FIXED_CODE_START && retaddr < (void *)physical_mem_end -#if L1_CODE_LENGTH != 0 - /* FIXME: Copy the code out of L1 Instruction SRAM through dma - memcpy. */ - && !(retaddr >= (void *)L1_CODE_START - && retaddr < (void *)(L1_CODE_START + L1_CODE_LENGTH)) -#endif - ) { - int i = ((unsigned int)retaddr & 0xFFFFFFF0) - 32; - unsigned short x = 0; - printk(KERN_NOTICE "return address: [0x%p]; contents of:", retaddr); - for (; i < ((unsigned int)retaddr & 0xFFFFFFF0) + 32; i += 2) { - if (!(i & 0xF)) - printk("\n" KERN_NOTICE "0x%08x: ", i); - - if (get_user(x, (unsigned short *)i)) - break; + if (unlikely((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR)) + erraddr = (void *)fp->pc; + else + erraddr = (void *)fp->retx; + + printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr); + + for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10; + addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10; + addr++) { + if (!((unsigned long)addr & 0xF)) + printk("\n" KERN_NOTICE "0x%p: ", addr); + + if (get_user(val, addr)) { + if (addr >= (unsigned short *)L1_CODE_START && + addr < (unsigned short *)(L1_CODE_START + L1_CODE_LENGTH)) { + dma_memcpy(&val, addr, sizeof(val)); + sprintf(buf, "%04x", val); + } else if (addr >= (unsigned short *)FIXED_CODE_START && + addr <= (unsigned short *)memory_start) { + val = bfin_read16(addr); + sprintf(buf, "%04x", val); + } else { + val = 0; + sprintf(buf, "????"); + } + } else + sprintf(buf, "%04x", val); + + if (addr == erraddr) { + printk("[%s]", buf); + err = val; + } else + printk(" %s ", buf); + + /* Do any previous instructions turn on interrupts? */ + if (addr <= erraddr && /* in the past */ + ((val >= 0x0040 && val <= 0x0047) || /* STI instruction */ + val == 0x017b)) /* [SP++] = RETI */ + sti = 1; + } + + printk("\n"); + + /* Hardware error interrupts can be deferred */ + if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR && + oops_in_progress)){ + printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n"); #ifndef CONFIG_DEBUG_HWERR - /* If one of the last few instructions was a STI - * it is likely that the error occured awhile ago - * and we just noticed. This only happens in kernel - * context, which should mean an oops is happening - */ - if (oops_in_progress && x >= 0x0040 && x <= 0x0047 && i <= 0) - panic("\n\nWARNING : You should reconfigure" - " the kernel to turn on\n" - " 'Hardware error interrupt" - " debugging'\n" - " The rest of this error" - " is meanless\n"); -#endif - if (i == (unsigned int)retaddr) - printk("[%04x]", x); - else - printk(" %04x ", x); + printk(KERN_NOTICE "The remaining message may be meaningless\n" + KERN_NOTICE "You should enable CONFIG_DEBUG_HWERR to get a" + " better idea where it came from\n"); +#else + /* If we are handling only one peripheral interrupt + * and current mm and pid are valid, and the last error + * was in that user space process's text area + * print it out - because that is where the problem exists + */ + if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) && + (current->pid && current->mm)) { + /* And the last RETI points to the current userspace context */ + if ((fp + 1)->pc >= current->mm->start_code && + (fp + 1)->pc <= current->mm->end_code) { + printk(KERN_NOTICE "It might be better to look around here : \n"); + printk(KERN_NOTICE "-------------------------------------------\n"); + show_regs(fp + 1); + printk(KERN_NOTICE "-------------------------------------------\n"); + } } - printk("\n"); - } else - printk("\n" KERN_NOTICE - "Cannot look at the [PC] <%p> for it is" - " in unreadable memory - sorry\n", retaddr); +#endif + } } void show_regs(struct pt_regs *fp) { char buf [150]; + struct irqaction *action; + unsigned int i; + unsigned long flags; - printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\n"); + printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", (long)fp->seqstat, fp->ipend, fp->syscfg); + printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n", + (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14); + printk(KERN_NOTICE " EXCAUSE : 0x%lx\n", + fp->seqstat & SEQSTAT_EXCAUSE); + for (i = 6; i <= 15 ; i++) { + if (fp->ipend & (1 << i)) { + decode_address(buf, bfin_read32(EVT0 + 4*i)); + printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf); + } + } + + /* if no interrupts are going off, don't print this out */ + if (fp->ipend & ~0x3F) { + for (i = 0; i < (NR_IRQS - 1); i++) { + spin_lock_irqsave(&irq_desc[i].lock, flags); + action = irq_desc[i].action; + if (!action) + goto unlock; + + decode_address(buf, (unsigned int)action->handler); + printk(KERN_NOTICE " logical irq %3d mapped : %s", i, buf); + for (action = action->next; action; action = action->next) { + decode_address(buf, (unsigned int)action->handler); + printk(", %s", buf); + } + printk("\n"); +unlock: + spin_unlock_irqrestore(&irq_desc[i].lock, flags); + } + } decode_address(buf, fp->rete); printk(KERN_NOTICE " RETE: %s\n", buf); @@ -708,9 +805,10 @@ void show_regs(struct pt_regs *fp) decode_address(buf, fp->rets); printk(KERN_NOTICE " RETS: %s\n", buf); decode_address(buf, fp->pc); - printk(KERN_NOTICE " PC: %s\n", buf); + printk(KERN_NOTICE " PC : %s\n", buf); - if ((long)fp->seqstat & SEQSTAT_EXCAUSE) { + if (((long)fp->seqstat & SEQSTAT_EXCAUSE) && + (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) { decode_address(buf, bfin_read_DCPLB_FAULT_ADDR()); printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf); decode_address(buf, bfin_read_ICPLB_FAULT_ADDR()); @@ -824,7 +922,7 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp) printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void *)bfin_read_DCPLB_FAULT_ADDR()); printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void *)bfin_read_ICPLB_FAULT_ADDR()); dump_bfin_process(fp); - dump_bfin_mem((void *)fp->retx); + dump_bfin_mem(fp); show_regs(fp); dump_stack(); panic("Unrecoverable event\n"); diff --git a/arch/blackfin/lib/memcpy.S b/arch/blackfin/lib/memcpy.S index 2e6336492b4b..e654a18a0754 100644 --- a/arch/blackfin/lib/memcpy.S +++ b/arch/blackfin/lib/memcpy.S @@ -70,8 +70,8 @@ ENTRY(_memcpy) /* Check for aligned data.*/ R3 = R1 | R0; - R0 = 0x3; - R3 = R3 & R0; + R1 = 0x3; + R3 = R3 & R1; CC = R3; /* low bits set on either address? */ IF CC JUMP .Lnot_aligned; @@ -83,7 +83,6 @@ ENTRY(_memcpy) /* less than eight bytes... */ P2 = R2; LSETUP(.Lthree_start, .Lthree_end) LC0=P2; - R0 = R1; /* setup src address for return */ .Lthree_start: R3 = B[P1++] (X); .Lthree_end: @@ -95,7 +94,6 @@ ENTRY(_memcpy) /* There's at least eight bytes to copy. */ P2 += -1; /* because we unroll one iteration */ LSETUP(.Lword_loops, .Lword_loope) LC0=P2; - R0 = R1; I1 = P1; R3 = [I1++]; #if ANOMALY_05000202 @@ -120,7 +118,6 @@ ENTRY(_memcpy) .Lnot_aligned: /* From here, we're copying byte-by-byte. */ LSETUP (.Lbyte_start, .Lbyte_end) LC0=P2; - R0 = R1; /* Save src address for return */ .Lbyte_start: R1 = B[P1++] (X); .Lbyte_end: @@ -135,7 +132,6 @@ ENTRY(_memcpy) * Don't bother to work out alignment for * the reverse case. */ - R0 = R1; /* save src for later. */ P0 = P0 + P2; P0 += -1; P1 = P1 + P2; diff --git a/arch/blackfin/mach-bf527/Kconfig b/arch/blackfin/mach-bf527/Kconfig index 5c736837d4bf..3cde4beeb214 100644 --- a/arch/blackfin/mach-bf527/Kconfig +++ b/arch/blackfin/mach-bf527/Kconfig @@ -43,7 +43,7 @@ endchoice choice prompt "UART1" - default BF527_UART1_PORTG + default BF527_UART1_PORTF help Select PORT used for UART1. See Hardware Reference Manual diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index 003e2ac654d8..f8c411a24af7 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c @@ -8,7 +8,7 @@ * * Modified: * Copyright 2005 National ICT Australia (NICTA) - * Copyright 2004-2007 Analog Devices Inc. + * Copyright 2004-2008 Analog Devices Inc. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * @@ -41,6 +41,7 @@ #include <linux/irq.h> #include <linux/interrupt.h> #include <linux/usb/sl811.h> +#include <linux/usb/musb.h> #include <asm/cplb.h> #include <asm/dma.h> #include <asm/bfin5xx_spi.h> @@ -105,6 +106,69 @@ void __exit bfin_isp1761_exit(void) arch_initcall(bfin_isp1761_init); #endif +#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) +static struct resource musb_resources[] = { + [0] = { + .start = 0xffc03800, + .end = 0xffc03cff, + .flags = IORESOURCE_MEM, + }, + [1] = { /* general IRQ */ + .start = IRQ_USB_INT0, + .end = IRQ_USB_INT0, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, + }, + [2] = { /* DMA IRQ */ + .start = IRQ_USB_DMA, + .end = IRQ_USB_DMA, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, + }, +}; + +static struct musb_hdrc_platform_data musb_plat = { +#if defined(CONFIG_USB_MUSB_OTG) + .mode = MUSB_OTG, +#elif defined(CONFIG_USB_MUSB_HDRC_HCD) + .mode = MUSB_HOST, +#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) + .mode = MUSB_PERIPHERAL, +#endif + .multipoint = 0, +}; + +static u64 musb_dmamask = ~(u32)0; + +static struct platform_device musb_device = { + .name = "musb_hdrc", + .id = 0, + .dev = { + .dma_mask = &musb_dmamask, + .coherent_dma_mask = 0xffffffff, + .platform_data = &musb_plat, + }, + .num_resources = ARRAY_SIZE(musb_resources), + .resource = musb_resources, +}; +#endif + +#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE) + +static struct resource bf52x_t350mcqb_resources[] = { + { + .start = IRQ_PPI_ERROR, + .end = IRQ_PPI_ERROR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device bf52x_t350mcqb_device = { + .name = "bfin-t350mcqb", + .id = -1, + .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources), + .resource = bf52x_t350mcqb_resources, +}; +#endif + #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) static struct mtd_partition partition_info[] = { { @@ -253,12 +317,7 @@ static struct resource sl811_hcd_resources[] = { void sl811_port_power(struct device *dev, int is_on) { gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); - gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS); - - if (is_on) - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1); - else - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0); + gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); } #endif @@ -718,6 +777,28 @@ static struct platform_device bfin_pata_device = { }; #endif +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#include <linux/input.h> +#include <linux/gpio_keys.h> + +static struct gpio_keys_button bfin_gpio_keys_table[] = { + {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"}, + {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"}, +}; + +static struct gpio_keys_platform_data bfin_gpio_keys_data = { + .buttons = bfin_gpio_keys_table, + .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), +}; + +static struct platform_device bfin_device_gpiokeys = { + .name = "gpio-keys", + .dev = { + .platform_data = &bfin_gpio_keys_data, + }, +}; +#endif + static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) &bf5xx_nand_device, @@ -739,6 +820,10 @@ static struct platform_device *stamp_devices[] __initdata = { &isp1362_hcd_device, #endif +#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) + &musb_device, +#endif + #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) &smc91x_device, #endif @@ -763,6 +848,10 @@ static struct platform_device *stamp_devices[] __initdata = { &bfin_fb_device, #endif +#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE) + &bf52x_t350mcqb_device, +#endif + #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) &bfin_fb_adv7393_device, #endif @@ -783,6 +872,10 @@ static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) &bfin_pata_device, #endif + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) + &bfin_device_gpiokeys, +#endif }; static int __init stamp_init(void) diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c index 6bcf4047f89c..a72c7a620fa1 100644 --- a/arch/blackfin/mach-bf533/boards/H8606.c +++ b/arch/blackfin/mach-bf533/boards/H8606.c @@ -40,6 +40,7 @@ #endif #include <linux/pata_platform.h> #include <linux/irq.h> + #include <asm/dma.h> #include <asm/bfin5xx_spi.h> #include <asm/reboot.h> @@ -303,7 +304,77 @@ static struct platform_device bfin_uart_device = { }; #endif -static struct platform_device *stamp_devices[] __initdata = { +#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) + +#include <linux/serial_8250.h> +#include <linux/serial.h> + +/* + * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010. + * running at half system clock, both with interrupt output or-ed to PF8. Change to + * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus + */ + +static struct plat_serial8250_port serial8250_platform_data [] = { + { + .membase = 0x20200000, + .mapbase = 0x20200000, + .irq = IRQ_PF8, + .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE, + .iotype = UPIO_MEM, + .regshift = 1, + .uartclk = 66666667, + }, { + .membase = 0x20200010, + .mapbase = 0x20200010, + .irq = IRQ_PF8, + .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE, + .iotype = UPIO_MEM, + .regshift = 1, + .uartclk = 66666667, + }, { + } +}; + +static struct platform_device serial8250_device = { + .id = PLAT8250_DEV_PLATFORM, + .name = "serial8250", + .dev = { + .platform_data = serial8250_platform_data, + }, +}; + +#endif + +#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE) + +/* + * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030, + * interrupt output wired to PF9. Change to suit different FPGA configuration + */ + +static struct resource opencores_kbd_resources[] = { + [0] = { + .start = 0x20200030, + .end = 0x20300030 + 2, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_PF9, + .end = IRQ_PF9, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, + }, +}; + +static struct platform_device opencores_kbd_device = { + .id = -1, + .name = "opencores-kbd", + .resource = opencores_kbd_resources, + .num_resources = ARRAY_SIZE(opencores_kbd_resources), +}; +#endif + +static struct platform_device *h8606_devices[] __initdata = { #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) &rtc_device, #endif @@ -327,13 +398,21 @@ static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) &bfin_uart_device, #endif + +#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) + &serial8250_device, +#endif + +#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE) + &opencores_kbd_device, +#endif }; static int __init H8606_init(void) { printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n"); printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); - platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); + platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices)); #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); #endif diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c index be852034a68b..c37dd45c8803 100644 --- a/arch/blackfin/mach-bf533/boards/ezkit.c +++ b/arch/blackfin/mach-bf533/boards/ezkit.c @@ -256,6 +256,50 @@ static struct platform_device bfin_pata_device = { }; #endif +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#include <linux/input.h> +#include <linux/gpio_keys.h> + +static struct gpio_keys_button bfin_gpio_keys_table[] = { + {BTN_0, GPIO_PF7, 1, "gpio-keys: BTN0"}, + {BTN_1, GPIO_PF8, 1, "gpio-keys: BTN1"}, + {BTN_2, GPIO_PF9, 1, "gpio-keys: BTN2"}, + {BTN_3, GPIO_PF10, 1, "gpio-keys: BTN3"}, +}; + +static struct gpio_keys_platform_data bfin_gpio_keys_data = { + .buttons = bfin_gpio_keys_table, + .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), +}; + +static struct platform_device bfin_device_gpiokeys = { + .name = "gpio-keys", + .dev = { + .platform_data = &bfin_gpio_keys_data, + }, +}; +#endif + +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) +#include <linux/i2c-gpio.h> + +static struct i2c_gpio_platform_data i2c_gpio_data = { + .sda_pin = 1, + .scl_pin = 0, + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .udelay = 40, +}; + +static struct platform_device i2c_gpio_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &i2c_gpio_data, + }, +}; +#endif + static struct platform_device *ezkit_devices[] __initdata = { #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) &smc91x_device, @@ -280,6 +324,14 @@ static struct platform_device *ezkit_devices[] __initdata = { #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) &bfin_pata_device, #endif + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) + &bfin_device_gpiokeys, +#endif + +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) + &i2c_gpio_device, +#endif }; static int __init ezkit_init(void) diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c index 8fde8d832850..ac52b040b336 100644 --- a/arch/blackfin/mach-bf533/boards/stamp.c +++ b/arch/blackfin/mach-bf533/boards/stamp.c @@ -32,6 +32,7 @@ #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) @@ -108,6 +109,50 @@ static struct platform_device net2272_bfin_device = { }; #endif +static struct mtd_partition stamp_partitions[] = { + { + .name = "Bootloader", + .size = 0x20000, + .offset = 0, + }, { + .name = "Kernel", + .size = 0xE0000, + .offset = MTDPART_OFS_APPEND, + }, { + .name = "RootFS", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND, + } +}; + +static struct physmap_flash_data stamp_flash_data = { + .width = 2, + .parts = stamp_partitions, + .nr_parts = ARRAY_SIZE(stamp_partitions), +}; + +static struct resource stamp_flash_resource[] = { + { + .name = "cfi_probe", + .start = 0x20000000, + .end = 0x203fffff, + .flags = IORESOURCE_MEM, + }, { + .start = CONFIG_ENET_FLASH_PIN, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device stamp_flash_device = { + .name = "BF5xx-Flash", + .id = 0, + .dev = { + .platform_data = &stamp_flash_data, + }, + .num_resources = ARRAY_SIZE(stamp_flash_resource), + .resource = stamp_flash_resource, +}; + #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) /* all SPI peripherals info goes here */ @@ -373,6 +418,49 @@ static struct platform_device bfin_pata_device = { }; #endif +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#include <linux/input.h> +#include <linux/gpio_keys.h> + +static struct gpio_keys_button bfin_gpio_keys_table[] = { + {BTN_0, GPIO_PF5, 1, "gpio-keys: BTN0"}, + {BTN_1, GPIO_PF6, 1, "gpio-keys: BTN1"}, + {BTN_2, GPIO_PF8, 1, "gpio-keys: BTN2"}, +}; + +static struct gpio_keys_platform_data bfin_gpio_keys_data = { + .buttons = bfin_gpio_keys_table, + .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), +}; + +static struct platform_device bfin_device_gpiokeys = { + .name = "gpio-keys", + .dev = { + .platform_data = &bfin_gpio_keys_data, + }, +}; +#endif + +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) +#include <linux/i2c-gpio.h> + +static struct i2c_gpio_platform_data i2c_gpio_data = { + .sda_pin = 2, + .scl_pin = 3, + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .udelay = 40, +}; + +static struct platform_device i2c_gpio_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &i2c_gpio_data, + }, +}; +#endif + static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) &rtc_device, @@ -406,6 +494,15 @@ static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) &bfin_pata_device, #endif + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) + &bfin_device_gpiokeys, +#endif + +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) + &i2c_gpio_device, +#endif + &stamp_flash_device, }; static int __init stamp_init(void) @@ -418,12 +515,10 @@ static int __init stamp_init(void) return ret; #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) -# if defined(CONFIG_BFIN_SHARED_FLASH_ENET) /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */ bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN)); bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN); SSYNC(); -# endif #endif #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) @@ -440,10 +535,8 @@ arch_initcall(stamp_init); void native_machine_restart(char *cmd) { -#if defined(CONFIG_BFIN_SHARED_FLASH_ENET) -# define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN) +#define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN) bfin_write_FIO_INEN(~BIT_TO_SET); bfin_write_FIO_DIR(BIT_TO_SET); bfin_write_FIO_FLAG_C(BIT_TO_SET); -#endif } diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig index 96a15196e416..7e789dbef036 100644 --- a/arch/blackfin/mach-bf537/boards/Kconfig +++ b/arch/blackfin/mach-bf537/boards/Kconfig @@ -21,6 +21,12 @@ config PNAV10 help PNAV board support. +config CAMSIG_MINOTAUR + bool "Cambridge Signal Processing LTD Minotaur" + depends on (BF537) + help + Board supply package for CSP Minotaur + config GENERIC_BF537_BOARD bool "Generic" help diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile index 94a85174283a..87e450f29e37 100644 --- a/arch/blackfin/mach-bf537/boards/Makefile +++ b/arch/blackfin/mach-bf537/boards/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o obj-$(CONFIG_BFIN537_STAMP) += stamp.o led.o obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o obj-$(CONFIG_PNAV10) += pnav10.o +obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c index c0fb06dbc42e..8703b67d5ec6 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c @@ -29,6 +29,7 @@ */ #include <linux/device.h> +#include <linux/etherdevice.h> #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -216,6 +217,12 @@ static struct platform_device rtc_device = { }; #endif +#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) +static struct platform_device hitachi_fb_device = { + .name = "hitachi-tx09", +}; +#endif + #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) static struct resource smc91x_resources[] = { { @@ -374,6 +381,10 @@ static struct platform_device bfin_pata_device = { #endif static struct platform_device *cm_bf537_devices[] __initdata = { +#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) + &hitachi_fb_device, +#endif + #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) &rtc_device, #endif diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c index 09f4bfbd2350..3e52f3f5bd58 100644 --- a/arch/blackfin/mach-bf537/boards/generic_board.c +++ b/arch/blackfin/mach-bf537/boards/generic_board.c @@ -8,7 +8,7 @@ * * Modified: * Copyright 2005 National ICT Australia (NICTA) - * Copyright 2004-2007 Analog Devices Inc. + * Copyright 2004-2008 Analog Devices Inc. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * @@ -29,6 +29,7 @@ */ #include <linux/device.h> +#include <linux/etherdevice.h> #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -204,12 +205,8 @@ static struct resource sl811_hcd_resources[] = { void sl811_port_power(struct device *dev, int is_on) { gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); - gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS); + gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); - if (is_on) - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1); - else - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0); } #endif @@ -733,9 +730,11 @@ void native_machine_restart(char *cmd) bfin_gpio_reset_spi0_ssel1(); } +#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) void bfin_get_ether_addr(char *addr) { random_ether_addr(addr); printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__); } EXPORT_SYMBOL(bfin_get_ether_addr); +#endif diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c new file mode 100644 index 000000000000..b8bbba85af53 --- /dev/null +++ b/arch/blackfin/mach-bf537/boards/minotaur.c @@ -0,0 +1,317 @@ +/* + */ + +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> +#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) +#include <linux/usb_isp1362.h> +#endif +#include <linux/pata_platform.h> +#include <linux/irq.h> +#include <linux/interrupt.h> +#include <linux/usb_sl811.h> +#include <asm/dma.h> +#include <asm/bfin5xx_spi.h> +#include <asm/reboot.h> +#include <linux/spi/ad7877.h> + +/* + * Name the Board for the /proc/cpuinfo + */ +char *bfin_board_name = "CamSig Minotaur BF537"; + +#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) +static struct resource bfin_pcmcia_cf_resources[] = { + { + .start = 0x20310000, /* IO PORT */ + .end = 0x20312000, + .flags = IORESOURCE_MEM, + }, { + .start = 0x20311000, /* Attribute Memory */ + .end = 0x20311FFF, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_PF4, + .end = IRQ_PF4, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, + }, { + .start = IRQ_PF6, /* Card Detect PF6 */ + .end = IRQ_PF6, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device bfin_pcmcia_cf_device = { + .name = "bfin_cf_pcmcia", + .id = -1, + .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), + .resource = bfin_pcmcia_cf_resources, +}; +#endif + +#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) +static struct platform_device rtc_device = { + .name = "rtc-bfin", + .id = -1, +}; +#endif + +#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) +static struct platform_device bfin_mac_device = { + .name = "bfin_mac", +}; +#endif + +#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) +static struct resource net2272_bfin_resources[] = { + { + .start = 0x20300000, + .end = 0x20300000 + 0x100, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_PF7, + .end = IRQ_PF7, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, + }, +}; + +static struct platform_device net2272_bfin_device = { + .name = "net2272", + .id = -1, + .num_resources = ARRAY_SIZE(net2272_bfin_resources), + .resource = net2272_bfin_resources, +}; +#endif + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) +/* all SPI peripherals info goes here */ + +#if defined(CONFIG_MTD_M25P80) \ + || defined(CONFIG_MTD_M25P80_MODULE) + +/* Partition sizes */ +#define FLASH_SIZE 0x00400000 +#define PSIZE_UBOOT 0x00030000 +#define PSIZE_INITRAMFS 0x00240000 + +static struct mtd_partition bfin_spi_flash_partitions[] = { + { + .name = "uboot", + .size = PSIZE_UBOOT, + .offset = 0x000000, + .mask_flags = MTD_CAP_ROM + }, { + .name = "initramfs", + .size = PSIZE_INITRAMFS, + .offset = PSIZE_UBOOT + }, { + .name = "opt", + .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS), + .offset = PSIZE_UBOOT + PSIZE_INITRAMFS, + } +}; + +static struct flash_platform_data bfin_spi_flash_data = { + .name = "m25p80", + .parts = bfin_spi_flash_partitions, + .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), + .type = "m25p64", +}; + +/* SPI flash chip (m25p64) */ +static struct bfin5xx_spi_chip spi_flash_chip_info = { + .enable_dma = 0, /* use dma transfer with this chip*/ + .bits_per_word = 8, +}; +#endif + +#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) +static struct bfin5xx_spi_chip spi_mmc_chip_info = { + .enable_dma = 1, + .bits_per_word = 8, +}; +#endif + +static struct spi_board_info bfin_spi_board_info[] __initdata = { +#if defined(CONFIG_MTD_M25P80) \ + || defined(CONFIG_MTD_M25P80_MODULE) + { + /* the modalias must be the same as spi device driver name */ + .modalias = "m25p80", /* Name of spi_driver for this device */ + .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 0, /* Framework bus number */ + .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ + .platform_data = &bfin_spi_flash_data, + .controller_data = &spi_flash_chip_info, + .mode = SPI_MODE_3, + }, +#endif + +#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) + { + .modalias = "spi_mmc_dummy", + .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 0, + .chip_select = 0, + .platform_data = NULL, + .controller_data = &spi_mmc_chip_info, + .mode = SPI_MODE_3, + }, + { + .modalias = "spi_mmc", + .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 0, + .chip_select = CONFIG_SPI_MMC_CS_CHAN, + .platform_data = NULL, + .controller_data = &spi_mmc_chip_info, + .mode = SPI_MODE_3, + }, +#endif +}; + +/* SPI controller data */ +static struct bfin5xx_spi_master bfin_spi0_info = { + .num_chipselect = 8, + .enable_dma = 1, /* master has the ability to do dma transfer */ +}; + +/* SPI (0) */ +static struct resource bfin_spi0_resource[] = { + [0] = { + .start = SPI0_REGBASE, + .end = SPI0_REGBASE + 0xFF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = CH_SPI, + .end = CH_SPI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device bfin_spi0_device = { + .name = "bfin-spi", + .id = 0, /* Bus number */ + .num_resources = ARRAY_SIZE(bfin_spi0_resource), + .resource = bfin_spi0_resource, + .dev = { + .platform_data = &bfin_spi0_info, /* Passed to driver */ + }, +}; +#endif /* spi master and devices */ + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) +static struct resource bfin_uart_resources[] = { + { + .start = 0xFFC00400, + .end = 0xFFC004FF, + .flags = IORESOURCE_MEM, + }, { + .start = 0xFFC02000, + .end = 0xFFC020FF, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device bfin_uart_device = { + .name = "bfin-uart", + .id = 1, + .num_resources = ARRAY_SIZE(bfin_uart_resources), + .resource = bfin_uart_resources, +}; +#endif + +#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) +static struct resource bfin_twi0_resource[] = { + [0] = { + .start = TWI0_REGBASE, + .end = TWI0_REGBASE + 0xFF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_TWI, + .end = IRQ_TWI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device i2c_bfin_twi_device = { + .name = "i2c-bfin-twi", + .id = 0, + .num_resources = ARRAY_SIZE(bfin_twi0_resource), + .resource = bfin_twi0_resource, +}; +#endif + +#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) +static struct platform_device bfin_sport0_uart_device = { + .name = "bfin-sport-uart", + .id = 0, +}; + +static struct platform_device bfin_sport1_uart_device = { + .name = "bfin-sport-uart", + .id = 1, +}; +#endif + +static struct platform_device *minotaur_devices[] __initdata = { +#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) + &bfin_pcmcia_cf_device, +#endif + +#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) + &rtc_device, +#endif + +#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) + &bfin_mac_device, +#endif + +#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) + &net2272_bfin_device, +#endif + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) + &bfin_spi0_device, +#endif + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) + &bfin_uart_device, +#endif + +#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) + &i2c_bfin_twi_device, +#endif + +#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) + &bfin_sport0_uart_device, + &bfin_sport1_uart_device, +#endif + +}; + +static int __init minotaur_init(void) +{ + printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); + platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices)); +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) + spi_register_board_info(bfin_spi_board_info, + ARRAY_SIZE(bfin_spi_board_info)); +#endif + + return 0; +} + +arch_initcall(minotaur_init); + +void native_machine_restart(char *cmd) +{ + /* workaround reboot hang when booting from SPI */ + if ((bfin_read_SYSCR() & 0x7) == 0x3) + bfin_gpio_reset_spi0_ssel1(); +} diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c index fd5f4a6f08e4..509a8a236fd0 100644 --- a/arch/blackfin/mach-bf537/boards/pnav10.c +++ b/arch/blackfin/mach-bf537/boards/pnav10.c @@ -8,7 +8,7 @@ * * Modified: * Copyright 2005 National ICT Australia (NICTA) - * Copyright 2004-2006 Analog Devices Inc. + * Copyright 2004-2008 Analog Devices Inc. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * @@ -29,6 +29,7 @@ */ #include <linux/device.h> +#include <linux/etherdevice.h> #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -133,12 +134,8 @@ static struct resource sl811_hcd_resources[] = { void sl811_port_power(struct device *dev, int is_on) { gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); - gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS); + gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); - if (is_on) - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1); - else - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0); } #endif diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 07b0dc273d2f..772541548b76 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c @@ -32,6 +32,7 @@ #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) @@ -103,6 +104,30 @@ void __exit bfin_isp1761_exit(void) arch_initcall(bfin_isp1761_init); #endif +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#include <linux/input.h> +#include <linux/gpio_keys.h> + +static struct gpio_keys_button bfin_gpio_keys_table[] = { + {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"}, + {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"}, + {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"}, + {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"}, +}; + +static struct gpio_keys_platform_data bfin_gpio_keys_data = { + .buttons = bfin_gpio_keys_table, + .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), +}; + +static struct platform_device bfin_device_gpiokeys = { + .name = "gpio-keys", + .dev = { + .platform_data = &bfin_gpio_keys_data, + }, +}; +#endif + #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) static struct resource bfin_pcmcia_cf_resources[] = { { @@ -226,12 +251,7 @@ static struct resource sl811_hcd_resources[] = { void sl811_port_power(struct device *dev, int is_on) { gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS"); - gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS); - - if (is_on) - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1); - else - gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0); + gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on); } #endif @@ -320,6 +340,49 @@ static struct platform_device net2272_bfin_device = { }; #endif +static struct mtd_partition stamp_partitions[] = { + { + .name = "Bootloader", + .size = 0x20000, + .offset = 0, + }, { + .name = "Kernel", + .size = 0xE0000, + .offset = MTDPART_OFS_APPEND, + }, { + .name = "RootFS", + .size = 0x400000 - 0x20000 - 0xE0000 - 0x10000, + .offset = MTDPART_OFS_APPEND, + }, { + .name = "MAC Address", + .size = MTDPART_SIZ_FULL, + .offset = 0x3F0000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct physmap_flash_data stamp_flash_data = { + .width = 2, + .parts = stamp_partitions, + .nr_parts = ARRAY_SIZE(stamp_partitions), +}; + +static struct resource stamp_flash_resource = { + .start = 0x20000000, + .end = 0x203fffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device stamp_flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &stamp_flash_data, + }, + .num_resources = 1, + .resource = &stamp_flash_resource, +}; + #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) /* all SPI peripherals info goes here */ @@ -738,6 +801,11 @@ static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) &bfin_pata_device, #endif + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) + &bfin_device_gpiokeys, +#endif + &stamp_flash_device, }; static int __init stamp_init(void) diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig index d8bd3b49f150..1bfcd8f646ab 100644 --- a/arch/blackfin/mach-bf548/Kconfig +++ b/arch/blackfin/mach-bf548/Kconfig @@ -7,7 +7,7 @@ menu "BF548 Specific Configuration" config DEB_DMA_URGENT bool "DMA has priority over core for ext. accesses" depends on BF54x - default n + default y help Treat any DEB1, DEB2 and DEB3 request as Urgent diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index d37d6653c4bc..14860f04d1bd 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c @@ -32,6 +32,7 @@ #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <linux/irq.h> @@ -206,23 +207,6 @@ static struct platform_device smsc911x_device = { }; #endif -#if defined(CONFIG_USB_BF54x_HCD) || defined(CONFIG_USB_BF54x_HCD_MODULE) -static struct resource bf54x_hcd_resources[] = { - { - .start = 0xFFC03C00, - .end = 0xFFC040FF, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device bf54x_hcd = { - .name = "bf54x-hcd", - .id = 0, - .num_resources = ARRAY_SIZE(bf54x_hcd_resources), - .resource = bf54x_hcd_resources, -}; -#endif - #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) static struct resource musb_resources[] = { [0] = { @@ -243,14 +227,14 @@ static struct resource musb_resources[] = { }; static struct musb_hdrc_platform_data musb_plat = { -#ifdef CONFIG_USB_MUSB_OTG +#if defined(CONFIG_USB_MUSB_OTG) .mode = MUSB_OTG, -#elif CONFIG_USB_MUSB_HDRC_HCD +#elif defined(CONFIG_USB_MUSB_HDRC_HCD) .mode = MUSB_HOST, -#elif CONFIG_USB_GADGET_MUSB_HDRC +#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) .mode = MUSB_PERIPHERAL, #endif - .multipoint = 1, + .multipoint = 0, }; static u64 musb_dmamask = ~(u32)0; @@ -344,6 +328,44 @@ static struct platform_device bf54x_sdh_device = { }; #endif +static struct mtd_partition ezkit_partitions[] = { + { + .name = "Bootloader", + .size = 0x20000, + .offset = 0, + }, { + .name = "Kernel", + .size = 0xE0000, + .offset = MTDPART_OFS_APPEND, + }, { + .name = "RootFS", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND, + } +}; + +static struct physmap_flash_data ezkit_flash_data = { + .width = 2, + .parts = ezkit_partitions, + .nr_parts = ARRAY_SIZE(ezkit_partitions), +}; + +static struct resource ezkit_flash_resource = { + .start = 0x20000000, + .end = 0x20ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ezkit_flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &ezkit_flash_data, + }, + .num_resources = 1, + .resource = &ezkit_flash_resource, +}; + #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) /* all SPI peripherals info goes here */ #if defined(CONFIG_MTD_M25P80) \ @@ -531,6 +553,29 @@ static struct platform_device i2c_bfin_twi1_device = { #endif #endif +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#include <linux/gpio_keys.h> + +static struct gpio_keys_button bfin_gpio_keys_table[] = { + {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"}, + {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"}, + {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"}, + {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"}, +}; + +static struct gpio_keys_platform_data bfin_gpio_keys_data = { + .buttons = bfin_gpio_keys_table, + .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), +}; + +static struct platform_device bfin_device_gpiokeys = { + .name = "gpio-keys", + .dev = { + .platform_data = &bfin_gpio_keys_data, + }, +}; +#endif + static struct platform_device *ezkit_devices[] __initdata = { #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) &rtc_device, @@ -548,10 +593,6 @@ static struct platform_device *ezkit_devices[] __initdata = { &smsc911x_device, #endif -#if defined(CONFIG_USB_BF54x_HCD) || defined(CONFIG_USB_BF54x_HCD_MODULE) - &bf54x_hcd, -#endif - #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) &musb_device, #endif @@ -583,6 +624,11 @@ static struct platform_device *ezkit_devices[] __initdata = { &i2c_bfin_twi1_device, #endif #endif + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) + &bfin_device_gpiokeys, +#endif + &ezkit_flash_device, }; static int __init stamp_init(void) diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S index 74b34c7f3629..74fe258421a5 100644 --- a/arch/blackfin/mach-bf548/head.S +++ b/arch/blackfin/mach-bf548/head.S @@ -298,8 +298,8 @@ ENTRY(_start_dma_code) w[p0] = r0.l; ssync; - p0.h = hi(SIC_IWR); - p0.l = lo(SIC_IWR); + p0.h = hi(SIC_IWR0); + p0.l = lo(SIC_IWR0); r0.l = 0x1; r0.h = 0x0; [p0] = r0; @@ -324,12 +324,25 @@ ENTRY(_start_dma_code) w[p0] = r0.l; ssync; +#if defined(CONFIG_BF54x) + P2.H = hi(EBIU_RSTCTL); + P2.L = lo(EBIU_RSTCTL); + R0 = [P2]; + BITSET (R0, 3); +#else P2.H = hi(EBIU_SDGCTL); P2.L = lo(EBIU_SDGCTL); R0 = [P2]; BITSET (R0, 24); +#endif [P2] = R0; SSYNC; +#if defined(CONFIG_BF54x) +.LSRR_MODE: + R0 = [P2]; + CC = BITTST(R0, 4); + if !CC JUMP .LSRR_MODE; +#endif r0 = CONFIG_VCO_MULT & 63; /* Load the VCO multiplier */ r0 = r0 << 9; /* Shift it over, */ @@ -361,6 +374,39 @@ ENTRY(_start_dma_code) w[p0] = r0.l; ssync; +#if defined(CONFIG_BF54x) + P2.H = hi(EBIU_RSTCTL); + P2.L = lo(EBIU_RSTCTL); + R0 = [P2]; + CC = BITTST(R0, 0); + if CC jump .Lskipddrrst; + BITSET (R0, 0); +.Lskipddrrst: + BITCLR (R0, 3); + [P2] = R0; + SSYNC; + + p0.l = lo(EBIU_DDRCTL0); + p0.h = hi(EBIU_DDRCTL0); + r0.l = lo(mem_DDRCTL0); + r0.h = hi(mem_DDRCTL0); + [p0] = r0; + ssync; + + p0.l = lo(EBIU_DDRCTL1); + p0.h = hi(EBIU_DDRCTL1); + r0.l = lo(mem_DDRCTL1); + r0.h = hi(mem_DDRCTL1); + [p0] = r0; + ssync; + + p0.l = lo(EBIU_DDRCTL2); + p0.h = hi(EBIU_DDRCTL2); + r0.l = lo(mem_DDRCTL2); + r0.h = hi(mem_DDRCTL2); + [p0] = r0; + ssync; +#else p0.l = lo(EBIU_SDRRC); p0.h = hi(EBIU_SDRRC); r0 = mem_SDRRC; @@ -394,9 +440,10 @@ ENTRY(_start_dma_code) R1 = R1 | R0; [P2] = R1; SSYNC; +#endif - p0.h = hi(SIC_IWR); - p0.l = lo(SIC_IWR); + p0.h = hi(SIC_IWR0); + p0.l = lo(SIC_IWR0); r0.l = lo(IWR_ENABLE_ALL); r0.h = hi(IWR_ENABLE_ALL); [p0] = r0; diff --git a/arch/blackfin/mach-bf548/ints-priority.c b/arch/blackfin/mach-bf548/ints-priority.c index cb0ebac53c79..2665653cee37 100644 --- a/arch/blackfin/mach-bf548/ints-priority.c +++ b/arch/blackfin/mach-bf548/ints-priority.c @@ -4,7 +4,7 @@ * Author: Michael Hennerich * * Created: - * Description: Set up the interupt priorities + * Description: Set up the interrupt priorities * * Modified: * Copyright 2004-2006 Analog Devices Inc. @@ -58,7 +58,7 @@ void program_IAR(void) ((CONFIG_IRQ_PINT1 - 7) << IRQ_PINT1_POS) | ((CONFIG_IRQ_MDMAS0 - 7) << IRQ_MDMAS0_POS) | ((CONFIG_IRQ_MDMAS1 - 7) << IRQ_MDMAS1_POS) | - ((CONFIG_IRQ_WATCHDOG - 7) << IRQ_WATCHDOG_POS)); + ((CONFIG_IRQ_WATCHDOG - 7) << IRQ_WATCH_POS)); bfin_write_SIC_IAR3(((CONFIG_IRQ_DMAC1_ERR - 7) << IRQ_DMAC1_ERR_POS) | ((CONFIG_IRQ_SPORT2_ERR - 7) << IRQ_SPORT2_ERR_POS) | diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c index c19cd29b948a..3a79a9061bdc 100644 --- a/arch/blackfin/mach-bf561/boards/cm_bf561.c +++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c @@ -198,6 +198,13 @@ static struct platform_device bfin_spi0_device = { #endif /* spi master and devices */ +#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) +static struct platform_device hitachi_fb_device = { + .name = "hitachi-tx09", +}; +#endif + + #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) static struct resource smc91x_resources[] = { @@ -315,6 +322,10 @@ static struct platform_device bfin_pata_device = { static struct platform_device *cm_bf561_devices[] __initdata = { +#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) + &hitachi_fb_device, +#endif + #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) &bfin_uart_device, #endif diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c index 4ff8f6e7a11f..7601c3be1b5c 100644 --- a/arch/blackfin/mach-bf561/boards/ezkit.c +++ b/arch/blackfin/mach-bf561/boards/ezkit.c @@ -29,6 +29,9 @@ #include <linux/device.h> #include <linux/platform_device.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> #include <linux/spi/spi.h> #include <linux/irq.h> #include <linux/interrupt.h> @@ -155,6 +158,44 @@ static struct platform_device bfin_uart_device = { }; #endif +static struct mtd_partition ezkit_partitions[] = { + { + .name = "Bootloader", + .size = 0x20000, + .offset = 0, + }, { + .name = "Kernel", + .size = 0xE0000, + .offset = MTDPART_OFS_APPEND, + }, { + .name = "RootFS", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND, + } +}; + +static struct physmap_flash_data ezkit_flash_data = { + .width = 2, + .parts = ezkit_partitions, + .nr_parts = ARRAY_SIZE(ezkit_partitions), +}; + +static struct resource ezkit_flash_resource = { + .start = 0x20000000, + .end = 0x207fffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device ezkit_flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &ezkit_flash_data, + }, + .num_resources = 1, + .resource = &ezkit_flash_resource, +}; + #ifdef CONFIG_SPI_BFIN #if defined(CONFIG_SND_BLACKFIN_AD1836) \ || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) @@ -246,6 +287,50 @@ static struct platform_device bfin_pata_device = { }; #endif +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#include <linux/input.h> +#include <linux/gpio_keys.h> + +static struct gpio_keys_button bfin_gpio_keys_table[] = { + {BTN_0, GPIO_PF5, 1, "gpio-keys: BTN0"}, + {BTN_1, GPIO_PF6, 1, "gpio-keys: BTN1"}, + {BTN_2, GPIO_PF7, 1, "gpio-keys: BTN2"}, + {BTN_3, GPIO_PF8, 1, "gpio-keys: BTN3"}, +}; + +static struct gpio_keys_platform_data bfin_gpio_keys_data = { + .buttons = bfin_gpio_keys_table, + .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), +}; + +static struct platform_device bfin_device_gpiokeys = { + .name = "gpio-keys", + .dev = { + .platform_data = &bfin_gpio_keys_data, + }, +}; +#endif + +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) +#include <linux/i2c-gpio.h> + +static struct i2c_gpio_platform_data i2c_gpio_data = { + .sda_pin = 1, + .scl_pin = 0, + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, + .udelay = 40, +}; + +static struct platform_device i2c_gpio_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &i2c_gpio_data, + }, +}; +#endif + static struct platform_device *ezkit_devices[] __initdata = { #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) &smc91x_device, @@ -258,12 +343,23 @@ static struct platform_device *ezkit_devices[] __initdata = { #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) &bfin_spi0_device, #endif + #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) &bfin_uart_device, #endif + #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) &bfin_pata_device, #endif + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) + &bfin_device_gpiokeys, +#endif + +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) + &i2c_gpio_device, +#endif + &ezkit_flash_device, }; static int __init ezkit_init(void) diff --git a/arch/blackfin/mach-bf561/coreb.c b/arch/blackfin/mach-bf561/coreb.c index 5d1d21b4c2a7..1b44e9e6dc3b 100644 --- a/arch/blackfin/mach-bf561/coreb.c +++ b/arch/blackfin/mach-bf561/coreb.c @@ -33,7 +33,9 @@ #include <linux/ioport.h> #include <linux/module.h> #include <linux/uaccess.h> +#include <linux/fs.h> #include <asm/dma.h> +#include <asm/cacheflush.h> #define MODULE_VER "v0.1" @@ -90,11 +92,12 @@ static ssize_t coreb_write(struct file *file, const char *buf, size_t count, coreb_dma_done = 0; + flush_dcache_range((unsigned long)buf, (unsigned long)(buf+len)); /* Source Channel */ set_dma_start_addr(CH_MEM_STREAM2_SRC, (unsigned long)buf); set_dma_x_count(CH_MEM_STREAM2_SRC, len); set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char)); - set_dma_config(CH_MEM_STREAM2_SRC, RESTART); + set_dma_config(CH_MEM_STREAM2_SRC, 0); /* Destination Channel */ set_dma_start_addr(CH_MEM_STREAM2_DEST, coreb_base + p); set_dma_x_count(CH_MEM_STREAM2_DEST, len); @@ -135,11 +138,12 @@ static ssize_t coreb_read(struct file *file, char *buf, size_t count, coreb_dma_done = 0; + invalidate_dcache_range((unsigned long)buf, (unsigned long)(buf+len)); /* Source Channel */ set_dma_start_addr(CH_MEM_STREAM2_SRC, coreb_base + p); set_dma_x_count(CH_MEM_STREAM2_SRC, len); set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char)); - set_dma_config(CH_MEM_STREAM2_SRC, RESTART); + set_dma_config(CH_MEM_STREAM2_SRC, 0); /* Destination Channel */ set_dma_start_addr(CH_MEM_STREAM2_DEST, (unsigned long)buf); set_dma_x_count(CH_MEM_STREAM2_DEST, len); @@ -266,7 +270,7 @@ static int coreb_ioctl(struct inode *inode, struct file *file, coreb_status |= COREB_IS_RUNNING; bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~0x0020); SSYNC(); - spin_lock_irq(&coreb_lock); + spin_unlock_irq(&coreb_lock); break; #if defined(CONFIG_BF561_COREB_RESET) case CMD_COREB_STOP: @@ -275,7 +279,7 @@ static int coreb_ioctl(struct inode *inode, struct file *file, bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() | 0x0020); bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080); coreb_status &= ~COREB_IS_RUNNING; - spin_lock_irq(&coreb_lock); + spin_unlock_irq(&coreb_lock); break; case CMD_COREB_RESET: printk(KERN_INFO "Resetting Core B\n"); diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile index 4d7733dfd5de..8636d4284bdb 100644 --- a/arch/blackfin/mach-common/Makefile +++ b/arch/blackfin/mach-common/Makefile @@ -3,10 +3,9 @@ # obj-y := \ - cache.o cacheinit.o cplbhdlr.o cplbmgr.o entry.o \ + cache.o cacheinit.o entry.o \ interrupt.o lock.o irqpanic.o arch_checks.o -obj-$(CONFIG_CPLB_INFO) += cplbinfo.o obj-$(CONFIG_BFIN_SINGLE_CORE) += ints-priority-sc.o obj-$(CONFIG_BFIN_DUAL_CORE) += ints-priority-dc.o obj-$(CONFIG_PM) += pm.o dpmc.o diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S index 39fbc2861107..b82c096e1980 100644 --- a/arch/blackfin/mach-common/dpmc.S +++ b/arch/blackfin/mach-common/dpmc.S @@ -38,6 +38,9 @@ ENTRY(_unmask_wdog_wakeup_evt) #if defined(CONFIG_BF561) P0.H = hi(SICA_IWR1); P0.L = lo(SICA_IWR1); +#elif defined(CONFIG_BF54x) || defined(CONFIG_BF52x) + P0.h = HI(SIC_IWR0); + P0.l = LO(SIC_IWR0); #else P0.h = HI(SIC_IWR); P0.l = LO(SIC_IWR); @@ -172,7 +175,7 @@ ENTRY(_sleep_mode) call _set_sic_iwr; R0 = 0xFFFF (Z); - call _set_rtc_istat + call _set_rtc_istat; P0.H = hi(PLL_CTL); P0.L = lo(PLL_CTL); @@ -210,7 +213,7 @@ ENTRY(_hibernate_mode) call _set_sic_iwr; R0 = 0xFFFF (Z); - call _set_rtc_istat + call _set_rtc_istat; P0.H = hi(VR_CTL); P0.L = lo(VR_CTL); @@ -236,7 +239,7 @@ ENTRY(_deep_sleep) call _set_sic_iwr; - call _set_sdram_srfs; + call _set_dram_srfs; /* Clear all the interrupts,bits sticky */ R0 = 0xFFFF (Z); @@ -253,7 +256,7 @@ ENTRY(_deep_sleep) SSYNC; IDLE; - call _unset_sdram_srfs; + call _unset_dram_srfs; call _test_pll_locked; @@ -285,23 +288,22 @@ ENTRY(_sleep_deeper) P3 = R0; R0 = IWR_ENABLE(0); call _set_sic_iwr; - call _set_sdram_srfs; + call _set_dram_srfs; /* Set SDRAM Self Refresh */ /* Clear all the interrupts,bits sticky */ R0 = 0xFFFF (Z); - call _set_rtc_istat - + call _set_rtc_istat; P0.H = hi(PLL_DIV); P0.L = lo(PLL_DIV); R6 = W[P0](z); R0.L = 0xF; - W[P0] = R0.l; + W[P0] = R0.l; /* Set Max VCO to SCLK divider */ P0.H = hi(PLL_CTL); P0.L = lo(PLL_CTL); R5 = W[P0](z); R0.L = (CONFIG_MIN_VCO_HZ/CONFIG_CLKIN_HZ) << 9; - W[P0] = R0.l; + W[P0] = R0.l; /* Set Min CLKIN to VCO multiplier */ SSYNC; IDLE; @@ -317,29 +319,28 @@ ENTRY(_sleep_deeper) R1 = R1|R2; R2 = DEPOSIT(R7, R1); - W[P0] = R2; + W[P0] = R2; /* Set Min Core Voltage */ SSYNC; IDLE; call _test_pll_locked; + R0 = P3; + call _set_sic_iwr; /* Set Awake from IDLE */ + P0.H = hi(PLL_CTL); P0.L = lo(PLL_CTL); R0 = W[P0](z); BITSET (R0, 3); - W[P0] = R0.L; - - R0 = P3; - call _set_sic_iwr; - + W[P0] = R0.L; /* Turn CCLK OFF */ SSYNC; IDLE; call _test_pll_locked; R0 = IWR_ENABLE(0); - call _set_sic_iwr; + call _set_sic_iwr; /* Set Awake from IDLE PLL */ P0.H = hi(VR_CTL); P0.L = lo(VR_CTL); @@ -352,15 +353,15 @@ ENTRY(_sleep_deeper) P0.H = hi(PLL_DIV); P0.L = lo(PLL_DIV); - W[P0]= R6; + W[P0]= R6; /* Restore CCLK and SCLK divider */ P0.H = hi(PLL_CTL); P0.L = lo(PLL_CTL); - w[p0] = R5; + w[p0] = R5; /* Restore VCO multiplier */ IDLE; call _test_pll_locked; - call _unset_sdram_srfs; + call _unset_dram_srfs; /* SDRAM Self Refresh Off */ STI R4; @@ -368,25 +369,47 @@ ENTRY(_sleep_deeper) ( R7:0, P5:0 ) = [SP++]; RTS; -ENTRY(_set_sdram_srfs) - /* set the sdram to self refresh mode */ +ENTRY(_set_dram_srfs) + /* set the dram to self refresh mode */ +#if defined(CONFIG_BF54x) + P0.H = hi(EBIU_RSTCTL); + P0.L = lo(EBIU_RSTCTL); + R2 = [P0]; + R3.H = hi(SRREQ); + R3.L = lo(SRREQ); +#else P0.H = hi(EBIU_SDGCTL); P0.L = lo(EBIU_SDGCTL); R2 = [P0]; R3.H = hi(SRFS); R3.L = lo(SRFS); +#endif R2 = R2|R3; [P0] = R2; ssync; +#if defined(CONFIG_BF54x) +.LSRR_MODE: + R2 = [P0]; + CC = BITTST(R2, 4); + if !CC JUMP .LSRR_MODE; +#endif RTS; -ENTRY(_unset_sdram_srfs) - /* set the sdram out of self refresh mode */ +ENTRY(_unset_dram_srfs) + /* set the dram out of self refresh mode */ +#if defined(CONFIG_BF54x) + P0.H = hi(EBIU_RSTCTL); + P0.L = lo(EBIU_RSTCTL); + R2 = [P0]; + R3.H = hi(SRREQ); + R3.L = lo(SRREQ); +#else P0.H = hi(EBIU_SDGCTL); P0.L = lo(EBIU_SDGCTL); R2 = [P0]; R3.H = hi(SRFS); R3.L = lo(SRFS); +#endif R3 = ~R3; R2 = R2&R3; [P0] = R2; @@ -394,8 +417,13 @@ ENTRY(_unset_sdram_srfs) RTS; ENTRY(_set_sic_iwr) +#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) + P0.H = hi(SIC_IWR0); + P0.L = lo(SIC_IWR0); +#else P0.H = hi(SIC_IWR); P0.L = lo(SIC_IWR); +#endif [P0] = R0; SSYNC; RTS; diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index dc9d3ee2e691..56ff51bc8c21 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S @@ -95,6 +95,9 @@ ENTRY(_ex_workaround_261) R6 = 0x26; /* Data CPLB Miss */ cc = R6 == R7; if cc jump _ex_dcplb_miss (BP); + R6 = 0x23; /* Data CPLB Miss */ + cc = R6 == R7; + if cc jump _ex_dcplb_viol (BP); /* Handle 0x23 Data CPLB Protection Violation * and Data CPLB Multiple Hits - Linux Trap Zero */ @@ -102,17 +105,33 @@ ENTRY(_ex_workaround_261) ENDPROC(_ex_workaround_261) #else +#ifdef CONFIG_MPU +#define _ex_dviol _ex_dcplb_viol +#else #define _ex_dviol _ex_trap_c +#endif #define _ex_dmiss _ex_dcplb_miss #define _ex_dmult _ex_trap_c #endif + +ENTRY(_ex_dcplb_viol) ENTRY(_ex_dcplb_miss) ENTRY(_ex_icplb_miss) (R7:6,P5:4) = [sp++]; ASTAT = [sp++]; SAVE_ALL_SYS +#ifdef CONFIG_MPU + R0 = SEQSTAT; + R1 = SP; + sp += -12; + call _cplb_hdr; + sp += 12; + CC = R0 == 0; + IF !CC JUMP _handle_bad_cplb; +#else call __cplb_hdr; +#endif DEBUG_START_HWTRACE(p5, r7) RESTORE_ALL_SYS SP = EX_SCRATCH_REG; @@ -329,7 +348,7 @@ ENTRY(_exception_to_level5) R7 = R7 + R6; P5 = R7; R1 = [P5]; - [SP + 8] = r1; + [SP + PT_SEQSTAT] = r1; r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ SP += -12; @@ -633,9 +652,7 @@ ENTRY(_ret_from_exception) [sp + PT_IPEND] = r0; 1: - r1 = 0x37(Z); - r2 = ~r1; - r2.h = 0; + r2 = LO(~0x37) (Z); r0 = r2 & r0; cc = r0 == 0; if !cc jump 4f; /* if not return to user mode, get out */ @@ -1364,6 +1381,7 @@ ENTRY(_sys_call_table) .long _sys_set_robust_list .long _sys_get_robust_list /* 355 */ .long _sys_fallocate + .long _sys_semtimedop .rept NR_syscalls-(.-_sys_call_table)/4 .long _sys_ni_syscall .endr diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index 4de376418a18..7f752c87fe46 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S @@ -34,9 +34,13 @@ #include <asm/entry.h> #include <asm/asm-offsets.h> #include <asm/trace.h> +#include <asm/traps.h> +#include <asm/thread_info.h> #include <asm/mach-common/context.S> +.extern _ret_from_exception + #ifdef CONFIG_I_ENTRY_L1 .section .l1.text #else @@ -117,8 +121,8 @@ __common_int_entry: #if ANOMALY_05000283 || ANOMALY_05000315 cc = r7 == r7; - p5.h = 0xffc0; - p5.l = 0x0014; + p5.h = HI(CHIPID); + p5.l = LO(CHIPID); if cc jump 1f; r7.l = W[p5]; 1: @@ -134,26 +138,22 @@ __common_int_entry: /* interrupt routine for ivhw - 5 */ ENTRY(_evt_ivhw) - SAVE_CONTEXT + SAVE_ALL_SYS #ifdef CONFIG_FRAME_POINTER fp = 0; #endif + #if ANOMALY_05000283 cc = r7 == r7; - p5.h = 0xffc0; - p5.l = 0x0014; + p5.h = HI(CHIPID); + p5.l = LO(CHIPID); if cc jump 1f; r7.l = W[p5]; 1: #endif - trace_buffer_stop(p0, r0); - - r0 = IRQ_HWERR; - r1 = sp; - #ifdef CONFIG_HARDWARE_PM - r7 = SEQSTAT; + r7 = [sp + PT_SEQSTAT]; r7 = r7 >>> 0xe; r6 = 0x1F; r7 = r7 & r6; @@ -161,11 +161,29 @@ ENTRY(_evt_ivhw) cc = r7 == r5; if cc jump .Lcall_do_ovf; /* deal with performance counter overflow */ #endif - + # We are going to dump something out, so make sure we print IPEND properly + p2.l = lo(IPEND); + p2.h = hi(IPEND); + r0 = [p2]; + [sp + PT_IPEND] = r0; + + /* set the EXCAUSE to HWERR for trap_c */ + r0 = [sp + PT_SEQSTAT]; + R1.L = LO(VEC_HWERR); + R1.H = HI(VEC_HWERR); + R0 = R0 | R1; + [sp + PT_SEQSTAT] = R0; + + r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ SP += -12; - call _irq_panic; + call _trap_c; SP += 12; + + call _ret_from_exception; +.Lcommon_restore_all_sys: + RESTORE_ALL_SYS rti; + #ifdef CONFIG_HARDWARE_PM .Lcall_do_ovf: @@ -173,9 +191,11 @@ ENTRY(_evt_ivhw) call _pm_overflow; SP += 12; - jump .Lcommon_restore_context; + jump .Lcommon_restore_all_sys; #endif +ENDPROC(_evt_ivhw) + /* Interrupt routine for evt2 (NMI). * We don't actually use this, so just return. * For inner circle type details, please see: diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c index 4882f0e801a9..8d18d6b163bb 100644 --- a/arch/blackfin/mach-common/ints-priority-dc.c +++ b/arch/blackfin/mach-common/ints-priority-dc.c @@ -222,11 +222,12 @@ static void bf561_gpio_unmask_irq(unsigned int irq) static unsigned int bf561_gpio_irq_startup(unsigned int irq) { unsigned int ret; + char buf[8]; u16 gpionr = irq - IRQ_PF0; if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { - - ret = gpio_request(gpionr, "IRQ"); + snprintf(buf, sizeof buf, "IRQ %d", irq); + ret = gpio_request(gpionr, buf); if (ret) return ret; @@ -250,6 +251,7 @@ static int bf561_gpio_irq_type(unsigned int irq, unsigned int type) { unsigned int ret; + char buf[8]; u16 gpionr = irq - IRQ_PF0; @@ -265,8 +267,8 @@ static int bf561_gpio_irq_type(unsigned int irq, unsigned int type) IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { - - ret = gpio_request(gpionr, "IRQ"); + snprintf(buf, sizeof buf, "IRQ %d", irq); + ret = gpio_request(gpionr, buf); if (ret) return ret; diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c index 147f0731087a..dec42acb5de0 100644 --- a/arch/blackfin/mach-common/ints-priority-sc.c +++ b/arch/blackfin/mach-common/ints-priority-sc.c @@ -313,6 +313,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq, static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)]; + static void bfin_gpio_ack_irq(unsigned int irq) { u16 gpionr = irq - IRQ_PF0; @@ -352,9 +353,11 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq) { unsigned int ret; u16 gpionr = irq - IRQ_PF0; + char buf[8]; if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { - ret = gpio_request(gpionr, "IRQ"); + snprintf(buf, sizeof buf, "IRQ %d", irq); + ret = gpio_request(gpionr, buf); if (ret) return ret; } @@ -376,6 +379,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) { unsigned int ret; + char buf[8]; u16 gpionr = irq - IRQ_PF0; if (type == IRQ_TYPE_PROBE) { @@ -388,7 +392,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { - ret = gpio_request(gpionr, "IRQ"); + snprintf(buf, sizeof buf, "IRQ %d", irq); + ret = gpio_request(gpionr, buf); if (ret) return ret; } @@ -478,6 +483,10 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq, static unsigned char irq2pint_lut[NR_PINTS]; static unsigned char pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS]; +static unsigned int gpio_both_edge_triggered[NR_PINT_SYS_IRQS]; +static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; + + struct pin_int_t { unsigned int mask_set; unsigned int mask_clear; @@ -544,13 +553,20 @@ void init_pint_lut(void) } -static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; - static void bfin_gpio_ack_irq(unsigned int irq) { u8 pint_val = irq2pint_lut[irq - SYS_IRQS]; + u32 pintbit = PINT_BIT(pint_val); + u8 bank = PINT_2_BANK(pint_val); + + if (unlikely(gpio_both_edge_triggered[bank] & pintbit)) { + if (pint[bank]->invert_set & pintbit) + pint[bank]->invert_clear = pintbit; + else + pint[bank]->invert_set = pintbit; + } + pint[bank]->request = pintbit; - pint[PINT_2_BANK(pint_val)]->request = PINT_BIT(pint_val); SSYNC(); } @@ -560,6 +576,13 @@ static void bfin_gpio_mask_ack_irq(unsigned int irq) u32 pintbit = PINT_BIT(pint_val); u8 bank = PINT_2_BANK(pint_val); + if (unlikely(gpio_both_edge_triggered[bank] & pintbit)) { + if (pint[bank]->invert_set & pintbit) + pint[bank]->invert_clear = pintbit; + else + pint[bank]->invert_set = pintbit; + } + pint[bank]->request = pintbit; pint[bank]->mask_clear = pintbit; SSYNC(); @@ -587,7 +610,8 @@ static void bfin_gpio_unmask_irq(unsigned int irq) static unsigned int bfin_gpio_irq_startup(unsigned int irq) { unsigned int ret; - u16 gpionr = irq - IRQ_PA0; + char buf[8]; + u16 gpionr = irq_to_gpio(irq); u8 pint_val = irq2pint_lut[irq - SYS_IRQS]; if (pint_val == IRQ_NOT_AVAIL) { @@ -598,7 +622,8 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq) } if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { - ret = gpio_request(gpionr, "IRQ"); + snprintf(buf, sizeof buf, "IRQ %d", irq); + ret = gpio_request(gpionr, buf); if (ret) return ret; } @@ -611,16 +636,19 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq) static void bfin_gpio_irq_shutdown(unsigned int irq) { + u16 gpionr = irq_to_gpio(irq); + bfin_gpio_mask_irq(irq); - gpio_free(irq - IRQ_PA0); - gpio_enabled[gpio_bank(irq - IRQ_PA0)] &= ~gpio_bit(irq - IRQ_PA0); + gpio_free(gpionr); + gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr); } static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) { unsigned int ret; - u16 gpionr = irq - IRQ_PA0; + char buf[8]; + u16 gpionr = irq_to_gpio(irq); u8 pint_val = irq2pint_lut[irq - SYS_IRQS]; u32 pintbit = PINT_BIT(pint_val); u8 bank = PINT_2_BANK(pint_val); @@ -638,7 +666,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { - ret = gpio_request(gpionr, "IRQ"); + snprintf(buf, sizeof buf, "IRQ %d", irq); + ret = gpio_request(gpionr, buf); if (ret) return ret; } @@ -651,28 +680,33 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) gpio_direction_input(gpionr); - if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { - pint[bank]->edge_set = pintbit; - } else { - pint[bank]->edge_clear = pintbit; - } - if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW))) pint[bank]->invert_set = pintbit; /* low or falling edge denoted by one */ else - pint[bank]->invert_set = pintbit; /* high or rising edge denoted by zero */ + pint[bank]->invert_clear = pintbit; /* high or rising edge denoted by zero */ - if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) - pint[bank]->invert_set = pintbit; - else - pint[bank]->invert_set = pintbit; + if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) + == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { - SSYNC(); + gpio_both_edge_triggered[bank] |= pintbit; - if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) + if (gpio_get_value(gpionr)) + pint[bank]->invert_set = pintbit; + else + pint[bank]->invert_clear = pintbit; + } else { + gpio_both_edge_triggered[bank] &= ~pintbit; + } + + if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { + pint[bank]->edge_set = pintbit; set_irq_handler(irq, handle_edge_irq); - else + } else { + pint[bank]->edge_clear = pintbit; set_irq_handler(irq, handle_level_irq); + } + + SSYNC(); return 0; } diff --git a/arch/blackfin/mach-common/irqpanic.c b/arch/blackfin/mach-common/irqpanic.c index b22959b197e5..606ded9ff4e1 100644 --- a/arch/blackfin/mach-common/irqpanic.c +++ b/arch/blackfin/mach-common/irqpanic.c @@ -46,9 +46,6 @@ void irq_panic(int reason, struct pt_regs *regs) __attribute__ ((l1_text)); */ asmlinkage void irq_panic(int reason, struct pt_regs *regs) { - int sig = 0; - siginfo_t info; - #ifdef CONFIG_DEBUG_ICACHE_CHECK unsigned int cmd, tag, ca, cache_hi, cache_lo, *pa; unsigned short i, j, die; @@ -136,53 +133,6 @@ asmlinkage void irq_panic(int reason, struct pt_regs *regs) } #endif - printk(KERN_EMERG "\n"); - printk(KERN_EMERG "Exception: IRQ 0x%x entered\n", reason); - printk(KERN_EMERG " code=[0x%08lx], stack frame=0x%08lx, " - " bad PC=0x%08lx\n", - (unsigned long)regs->seqstat, - (unsigned long)regs, - (unsigned long)regs->pc); - if (reason == 0x5) { - printk(KERN_EMERG "----------- HARDWARE ERROR -----------\n"); - - /* There is only need to check for Hardware Errors, since other - * EXCEPTIONS are handled in TRAPS.c (MH) - */ - switch (regs->seqstat & SEQSTAT_HWERRCAUSE) { - case (SEQSTAT_HWERRCAUSE_SYSTEM_MMR): /* System MMR Error */ - info.si_code = BUS_ADRALN; - sig = SIGBUS; - printk(KERN_EMERG HWC_x2(KERN_EMERG)); - break; - case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR): /* External Memory Addressing Error */ - info.si_code = BUS_ADRERR; - sig = SIGBUS; - printk(KERN_EMERG HWC_x3(KERN_EMERG)); - break; - case (SEQSTAT_HWERRCAUSE_PERF_FLOW): /* Performance Monitor Overflow */ - printk(KERN_EMERG HWC_x12(KERN_EMERG)); - break; - case (SEQSTAT_HWERRCAUSE_RAISE_5): /* RAISE 5 instruction */ - printk(KERN_EMERG HWC_x18(KERN_EMERG)); - break; - default: /* Reserved */ - printk(KERN_EMERG HWC_default(KERN_EMERG)); - break; - } - } - - regs->ipend = bfin_read_IPEND(); - dump_bfin_process(regs); - dump_bfin_mem((void *)regs->pc); - show_regs(regs); - if (0 == (info.si_signo = sig) || 0 == user_mode(regs)) /* in kernelspace */ - panic("Unhandled IRQ or exceptions!\n"); - else { /* in userspace */ - info.si_errno = 0; - info.si_addr = (void *)regs->pc; - force_sig_info(sig, &info, current); - } } #ifdef CONFIG_HARDWARE_PM diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index dac51fb06f22..81930f7d06f1 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c @@ -77,7 +77,15 @@ void bfin_pm_suspend_standby_enter(void) gpio_pm_restore(); +#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) + bfin_write_SIC_IWR0(IWR_ENABLE_ALL); + bfin_write_SIC_IWR1(IWR_ENABLE_ALL); +# ifdef CONFIG_BF54x + bfin_write_SIC_IWR2(IWR_ENABLE_ALL); +# endif +#else bfin_write_SIC_IWR(IWR_ENABLE_ALL); +#endif local_irq_restore(flags); } @@ -85,7 +93,15 @@ void bfin_pm_suspend_standby_enter(void) #if defined(CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR) sleep_deeper(CONFIG_PM_WAKEUP_SIC_IWR); +# if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) + bfin_write_SIC_IWR0(IWR_ENABLE_ALL); + bfin_write_SIC_IWR1(IWR_ENABLE_ALL); +# ifdef CONFIG_BF54x + bfin_write_SIC_IWR2(IWR_ENABLE_ALL); +# endif +# else bfin_write_SIC_IWR(IWR_ENABLE_ALL); +# endif #endif /* CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR */ } diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c index e97ea8fc8dc4..eb1a12ac9e33 100644 --- a/arch/blackfin/mm/init.c +++ b/arch/blackfin/mm/init.c @@ -128,8 +128,8 @@ void __init paging_init(void) void __init mem_init(void) { unsigned int codek = 0, datak = 0, initk = 0; + unsigned int reservedpages = 0, freepages = 0; unsigned long tmp; - unsigned int len = _ramend - _rambase; unsigned long start_mem = memory_start; unsigned long end_mem = memory_end; @@ -138,19 +138,36 @@ void __init mem_init(void) start_mem = PAGE_ALIGN(start_mem); max_mapnr = num_physpages = MAP_NR(high_memory); - printk(KERN_INFO "Physical pages: %lx\n", num_physpages); + printk(KERN_INFO "Kernel managed physical pages: %lu\n", + num_physpages); /* This will put all memory onto the freelists. */ totalram_pages = free_all_bootmem(); + reservedpages = 0; + for (tmp = 0; tmp < max_mapnr; tmp++) + if (PageReserved(pfn_to_page(tmp))) + reservedpages++; + freepages = max_mapnr - reservedpages; + + /* do not count in kernel image between _rambase and _ramstart */ + reservedpages -= (_ramstart - _rambase) >> PAGE_SHIFT; +#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) + reservedpages += (_ramend - memory_end - DMA_UNCACHED_REGION) >> + PAGE_SHIFT; +#endif + codek = (_etext - _stext) >> 10; - datak = (__bss_stop - __bss_start) >> 10; initk = (__init_end - __init_begin) >> 10; + datak = ((_ramstart - _rambase) >> 10) - codek - initk; - tmp = nr_free_pages() << PAGE_SHIFT; printk(KERN_INFO - "Memory available: %luk/%uk RAM, (%uk init code, %uk kernel code, %uk data, %uk dma)\n", - tmp >> 10, len >> 10, initk, codek, datak, DMA_UNCACHED_REGION >> 10); + "Memory available: %luk/%luk RAM, " + "(%uk init code, %uk kernel code, " + "%uk data, %uk dma, %uk reserved)\n", + (unsigned long) freepages << (PAGE_SHIFT-10), _ramend >> 10, + initk, codek, datak, DMA_UNCACHED_REGION >> 10, + (reservedpages << (PAGE_SHIFT-10))); /* Initialize the blackfin L1 Memory. */ l1sram_init(); @@ -184,13 +201,15 @@ static __init void free_init_pages(const char *what, unsigned long begin, unsign #ifdef CONFIG_BLK_DEV_INITRD void __init free_initrd_mem(unsigned long start, unsigned long end) { +#ifndef CONFIG_MPU free_init_pages("initrd memory", start, end); +#endif } #endif void __init free_initmem(void) { -#ifdef CONFIG_RAMKERNEL +#if defined CONFIG_RAMKERNEL && !defined CONFIG_MPU free_init_pages("unused kernel memory", (unsigned long)(&__init_begin), (unsigned long)(&__init_end)); diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index 4ac2b1f1bd3b..86028c69861e 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -71,8 +71,6 @@ unsigned long __per_cpu_offset[NR_CPUS]; EXPORT_SYMBOL(__per_cpu_offset); #endif -extern void ia64_setup_printk_clock(void); - DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info); DEFINE_PER_CPU(unsigned long, local_per_cpu_offset); unsigned long ia64_cycles_per_usec; @@ -507,8 +505,6 @@ setup_arch (char **cmdline_p) /* process SAL system table: */ ia64_sal_init(__va(efi.sal_systab)); - ia64_setup_printk_clock(); - #ifdef CONFIG_SMP cpu_physical_id(0) = hard_smp_processor_id(); #endif diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c index 2bb84214e5f1..3ab042720970 100644 --- a/arch/ia64/kernel/time.c +++ b/arch/ia64/kernel/time.c @@ -344,33 +344,6 @@ udelay (unsigned long usecs) } EXPORT_SYMBOL(udelay); -static unsigned long long ia64_itc_printk_clock(void) -{ - if (ia64_get_kr(IA64_KR_PER_CPU_DATA)) - return sched_clock(); - return 0; -} - -static unsigned long long ia64_default_printk_clock(void) -{ - return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) * - (1000000000/HZ); -} - -unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock; - -unsigned long long printk_clock(void) -{ - return ia64_printk_clock(); -} - -void __init -ia64_setup_printk_clock(void) -{ - if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) - ia64_printk_clock = ia64_itc_printk_clock; -} - /* IA64 doesn't cache the timezone */ void update_vsyscall_tz(void) { diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c index 1f38a3a68390..bb1d24929640 100644 --- a/arch/ia64/sn/kernel/setup.c +++ b/arch/ia64/sn/kernel/setup.c @@ -64,7 +64,6 @@ extern void sn_timer_init(void); extern unsigned long last_time_offset; extern void (*ia64_mark_idle) (int); extern void snidle(int); -extern unsigned long long (*ia64_printk_clock)(void); unsigned long sn_rtc_cycles_per_second; EXPORT_SYMBOL(sn_rtc_cycles_per_second); @@ -360,14 +359,6 @@ sn_scan_pcdp(void) static unsigned long sn2_rtc_initial; -static unsigned long long ia64_sn2_printk_clock(void) -{ - unsigned long rtc_now = rtc_time(); - - return (rtc_now - sn2_rtc_initial) * - (1000000000 / sn_rtc_cycles_per_second); -} - /** * sn_setup - SN platform setup routine * @cmdline_p: kernel command line @@ -468,8 +459,6 @@ void __init sn_setup(char **cmdline_p) platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR; - ia64_printk_clock = ia64_sn2_printk_clock; - printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF); /* diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c index d51e18fb789b..841904cdef4d 100644 --- a/arch/mips/au1000/common/platform.c +++ b/arch/mips/au1000/common/platform.c @@ -270,6 +270,24 @@ static struct platform_device smc91x_device = { #endif +/* All Alchemy demoboards with I2C have this #define in their headers */ +#ifdef SMBUS_PSC_BASE +static struct resource pbdb_smbus_resources[] = { + { + .start = SMBUS_PSC_BASE, + .end = SMBUS_PSC_BASE + 0x24 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device pbdb_smbus_device = { + .name = "au1xpsc_smbus", + .id = 0, /* bus number */ + .num_resources = ARRAY_SIZE(pbdb_smbus_resources), + .resource = pbdb_smbus_resources, +}; +#endif + static struct platform_device *au1xxx_platform_devices[] __initdata = { &au1xxx_usb_ohci_device, &au1x00_pcmcia_device, @@ -287,6 +305,9 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = { #ifdef CONFIG_MIPS_DB1200 &smc91x_device, #endif +#ifdef SMBUS_PSC_BASE + &pbdb_smbus_device, +#endif }; int __init au1xxx_platform_init(void) diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c index 892665bb12b1..bb4f00c0cbe9 100644 --- a/arch/mips/kernel/mips-mt-fpaff.c +++ b/arch/mips/kernel/mips-mt-fpaff.c @@ -58,13 +58,13 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, if (copy_from_user(&new_mask, user_mask_ptr, sizeof(new_mask))) return -EFAULT; - lock_cpu_hotplug(); + get_online_cpus(); read_lock(&tasklist_lock); p = find_process_by_pid(pid); if (!p) { read_unlock(&tasklist_lock); - unlock_cpu_hotplug(); + put_online_cpus(); return -ESRCH; } @@ -106,7 +106,7 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, out_unlock: put_task_struct(p); - unlock_cpu_hotplug(); + put_online_cpus(); return retval; } @@ -125,7 +125,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len, if (len < real_len) return -EINVAL; - lock_cpu_hotplug(); + get_online_cpus(); read_lock(&tasklist_lock); retval = -ESRCH; @@ -140,7 +140,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len, out_unlock: read_unlock(&tasklist_lock); - unlock_cpu_hotplug(); + put_online_cpus(); if (retval) return retval; if (copy_to_user(user_mask_ptr, &mask, real_len)) diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c index 412e6b42986f..c4ad54e0f288 100644 --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c @@ -153,7 +153,7 @@ static int pseries_add_processor(struct device_node *np) for (i = 0; i < nthreads; i++) cpu_set(i, tmp); - lock_cpu_hotplug(); + cpu_maps_update_begin(); BUG_ON(!cpus_subset(cpu_present_map, cpu_possible_map)); @@ -190,7 +190,7 @@ static int pseries_add_processor(struct device_node *np) } err = 0; out_unlock: - unlock_cpu_hotplug(); + cpu_maps_update_done(); return err; } @@ -211,7 +211,7 @@ static void pseries_remove_processor(struct device_node *np) nthreads = len / sizeof(u32); - lock_cpu_hotplug(); + cpu_maps_update_begin(); for (i = 0; i < nthreads; i++) { for_each_present_cpu(cpu) { if (get_hard_smp_processor_id(cpu) != intserv[i]) @@ -225,7 +225,7 @@ static void pseries_remove_processor(struct device_node *np) printk(KERN_WARNING "Could not find cpu to remove " "with physical id 0x%x\n", intserv[i]); } - unlock_cpu_hotplug(); + cpu_maps_update_done(); } static int pseries_smp_notifier(struct notifier_block *nb, diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c index 73401c820110..e3078ce41518 100644 --- a/arch/powerpc/platforms/pseries/rtasd.c +++ b/arch/powerpc/platforms/pseries/rtasd.c @@ -382,7 +382,7 @@ static void do_event_scan_all_cpus(long delay) { int cpu; - lock_cpu_hotplug(); + get_online_cpus(); cpu = first_cpu(cpu_online_map); for (;;) { set_cpus_allowed(current, cpumask_of_cpu(cpu)); @@ -390,15 +390,15 @@ static void do_event_scan_all_cpus(long delay) set_cpus_allowed(current, CPU_MASK_ALL); /* Drop hotplug lock, and sleep for the specified delay */ - unlock_cpu_hotplug(); + put_online_cpus(); msleep_interruptible(delay); - lock_cpu_hotplug(); + get_online_cpus(); cpu = next_cpu(cpu, cpu_online_map); if (cpu == NR_CPUS) break; } - unlock_cpu_hotplug(); + put_online_cpus(); } static int rtasd(void *unused) diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index 548a32082e4a..4316f5a48a0f 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c @@ -361,12 +361,6 @@ static int __init mv64x60_i2c_device_setup(struct device_node *np, int id) else pdata.timeout = 1000; /* 1 second */ - prop = of_get_property(np, "retries", NULL); - if (prop) - pdata.retries = *prop; - else - pdata.retries = 1; - pdev = platform_device_alloc(MV64XXX_I2C_CTLR_NAME, id); if (!pdev) return -ENOMEM; diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c index b84f8df325c4..cb0a7493ff64 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.c +++ b/arch/ppc/platforms/83xx/mpc834x_sys.c @@ -224,26 +224,6 @@ mpc834x_sys_init_IRQ(void) ipic_set_default_priority(); } -#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374) -extern ulong ds1374_get_rtc_time(void); -extern int ds1374_set_rtc_time(ulong); - -static int __init -mpc834x_rtc_hookup(void) -{ - struct timespec tv; - - ppc_md.get_rtc_time = ds1374_get_rtc_time; - ppc_md.set_rtc_time = ds1374_set_rtc_time; - - tv.tv_nsec = 0; - tv.tv_sec = (ppc_md.get_rtc_time)(); - do_settimeofday(&tv); - - return 0; -} -late_initcall(mpc834x_rtc_hookup); -#endif static __inline__ void mpc834x_sys_set_bat(void) { diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c index 4ee2bd156dc5..27ce389c1224 100644 --- a/arch/ppc/platforms/85xx/tqm85xx.c +++ b/arch/ppc/platforms/85xx/tqm85xx.c @@ -258,27 +258,6 @@ int tqm85xx_show_cpuinfo(struct seq_file *m) return 0; } -#if defined(CONFIG_I2C) && defined(CONFIG_SENSORS_DS1337) -extern ulong ds1337_get_rtc_time(void); -extern int ds1337_set_rtc_time(unsigned long nowtime); - -static int __init -tqm85xx_rtc_hookup(void) -{ - struct timespec tv; - - ppc_md.set_rtc_time = ds1337_set_rtc_time; - ppc_md.get_rtc_time = ds1337_get_rtc_time; - - tv.tv_nsec = 0; - tv.tv_sec = (ppc_md.get_rtc_time)(); - do_settimeofday(&tv); - - return 0; -} -late_initcall(tqm85xx_rtc_hookup); -#endif - #ifdef CONFIG_PCI /* * interrupt routing diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c index 52f63e6f0856..fe6e88cdb1cd 100644 --- a/arch/ppc/platforms/katana.c +++ b/arch/ppc/platforms/katana.c @@ -838,27 +838,6 @@ katana_find_end_of_memory(void) return bdp->bi_memsize; } -#if defined(CONFIG_I2C_MV64XXX) && defined(CONFIG_SENSORS_M41T00) -extern ulong m41t00_get_rtc_time(void); -extern int m41t00_set_rtc_time(ulong); - -static int __init -katana_rtc_hookup(void) -{ - struct timespec tv; - - ppc_md.get_rtc_time = m41t00_get_rtc_time; - ppc_md.set_rtc_time = m41t00_set_rtc_time; - - tv.tv_nsec = 0; - tv.tv_sec = (ppc_md.get_rtc_time)(); - do_settimeofday(&tv); - - return 0; -} -late_initcall(katana_rtc_hookup); -#endif - #if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) static void __init katana_map_io(void) diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c index 2744b8a6f66a..90fe904d3614 100644 --- a/arch/ppc/syslib/mv64x60.c +++ b/arch/ppc/syslib/mv64x60.c @@ -411,7 +411,6 @@ static struct mv64xxx_i2c_pdata mv64xxx_i2c_pdata = { .freq_m = 8, .freq_n = 3, .timeout = 1000, /* Default timeout of 1 second */ - .retries = 1, }; static struct resource mv64xxx_i2c_resources[] = { diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 1330061020ab..6ef54d27fc00 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -276,9 +276,6 @@ source "kernel/Kconfig.preempt" source "mm/Kconfig" -config HOLES_IN_ZONE - def_bool y - comment "I/O subsystem configuration" config MACHCHK_WARNING diff --git a/arch/s390/crypto/Kconfig b/arch/s390/crypto/Kconfig deleted file mode 100644 index d1defbbfcd81..000000000000 --- a/arch/s390/crypto/Kconfig +++ /dev/null @@ -1,60 +0,0 @@ -config CRYPTO_SHA1_S390 - tristate "SHA1 digest algorithm" - depends on S390 - select CRYPTO_ALGAPI - help - This is the s390 hardware accelerated implementation of the - SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). - -config CRYPTO_SHA256_S390 - tristate "SHA256 digest algorithm" - depends on S390 - select CRYPTO_ALGAPI - help - This is the s390 hardware accelerated implementation of the - SHA256 secure hash standard (DFIPS 180-2). - - This version of SHA implements a 256 bit hash with 128 bits of - security against collision attacks. - -config CRYPTO_DES_S390 - tristate "DES and Triple DES cipher algorithms" - depends on S390 - select CRYPTO_ALGAPI - select CRYPTO_BLKCIPHER - help - This us the s390 hardware accelerated implementation of the - DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). - -config CRYPTO_AES_S390 - tristate "AES cipher algorithms" - depends on S390 - select CRYPTO_ALGAPI - select CRYPTO_BLKCIPHER - help - This is the s390 hardware accelerated implementation of the - AES cipher algorithms (FIPS-197). AES uses the Rijndael - algorithm. - - Rijndael appears to be consistently a very good performer in - both hardware and software across a wide range of computing - environments regardless of its use in feedback or non-feedback - modes. Its key setup time is excellent, and its key agility is - good. Rijndael's very low memory requirements make it very well - suited for restricted-space environments, in which it also - demonstrates excellent performance. Rijndael's operations are - among the easiest to defend against power and timing attacks. - - On s390 the System z9-109 currently only supports the key size - of 128 bit. - -config S390_PRNG - tristate "Pseudo random number generator device driver" - depends on S390 - default "m" - help - Select this option if you want to use the s390 pseudo random number - generator. The PRNG is part of the cryptographic processor functions - and uses triple-DES to generate secure random numbers like the - ANSI X9.17 standard. The PRNG is usable via the char device - /dev/prandom. diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c index 46c97058ebe1..a3f67f8b5427 100644 --- a/arch/s390/crypto/aes_s390.c +++ b/arch/s390/crypto/aes_s390.c @@ -516,7 +516,7 @@ static int __init aes_init(void) /* z9 109 and z9 BC/EC only support 128 bit key length */ if (keylen_flag == AES_KEYLEN_128) printk(KERN_INFO - "aes_s390: hardware acceleration only available for" + "aes_s390: hardware acceleration only available for " "128 bit keys\n"); ret = crypto_register_alg(&aes_alg); diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c index 8eb3a1aedc22..0cfefddd8375 100644 --- a/arch/s390/crypto/prng.c +++ b/arch/s390/crypto/prng.c @@ -90,7 +90,7 @@ static ssize_t prng_read(struct file *file, char __user *ubuf, size_t nbytes, int ret = 0; int tmp; - /* nbytes can be arbitrary long, we spilt it into chunks */ + /* nbytes can be arbitrary length, we split it into chunks */ while (nbytes) { /* same as in extract_entropy_user in random.c */ if (need_resched()) { @@ -146,7 +146,7 @@ static ssize_t prng_read(struct file *file, char __user *ubuf, size_t nbytes, return ret; } -static struct file_operations prng_fops = { +static const struct file_operations prng_fops = { .owner = THIS_MODULE, .open = &prng_open, .release = NULL, diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile index 56cb71007cd9..b3b650a93c7c 100644 --- a/arch/s390/kernel/Makefile +++ b/arch/s390/kernel/Makefile @@ -31,7 +31,3 @@ S390_KEXEC_OBJS := machine_kexec.o crash.o S390_KEXEC_OBJS += $(if $(CONFIG_64BIT),relocate_kernel64.o,relocate_kernel.o) obj-$(CONFIG_KEXEC) += $(S390_KEXEC_OBJS) -# -# This is just to get the dependencies... -# -binfmt_elf32.o: $(TOPDIR)/fs/binfmt_elf.c diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c index 1b3af7dab816..9f7b73b180f0 100644 --- a/arch/s390/kernel/early.c +++ b/arch/s390/kernel/early.c @@ -276,7 +276,7 @@ void __init startup_init(void) create_kernel_nss(); sort_main_extable(); setup_lowcore_early(); - sclp_readinfo_early(); + sclp_read_info_early(); sclp_facilities_detect(); memsize = sclp_memory_detect(); #ifndef CONFIG_64BIT diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S index a87b1976d409..79dccd206a6e 100644 --- a/arch/s390/kernel/head64.S +++ b/arch/s390/kernel/head64.S @@ -157,7 +157,7 @@ startup_continue: .long 0xb2b10000 # store facility list tm 0xc8,0x08 # check bit for clearing-by-ASCE bno 0f-.LPG1(%r13) - lhi %r1,2094 + lhi %r1,2048 lhi %r2,0 .long 0xb98e2001 oi 7(%r12),0x80 # set IDTE flag diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c index b97694fa62ec..db28cca81fef 100644 --- a/arch/s390/kernel/ipl.c +++ b/arch/s390/kernel/ipl.c @@ -2,7 +2,7 @@ * arch/s390/kernel/ipl.c * ipl/reipl/dump support for Linux on s390. * - * Copyright (C) IBM Corp. 2005,2006 + * Copyright IBM Corp. 2005,2007 * Author(s): Michael Holzheu <holzheu@de.ibm.com> * Heiko Carstens <heiko.carstens@de.ibm.com> * Volker Sameske <sameske@de.ibm.com> @@ -31,6 +31,43 @@ #define IPL_FCP_DUMP_STR "fcp_dump" #define IPL_NSS_STR "nss" +#define DUMP_CCW_STR "ccw" +#define DUMP_FCP_STR "fcp" +#define DUMP_NONE_STR "none" + +/* + * Four shutdown trigger types are supported: + * - panic + * - halt + * - power off + * - reipl + */ +#define ON_PANIC_STR "on_panic" +#define ON_HALT_STR "on_halt" +#define ON_POFF_STR "on_poff" +#define ON_REIPL_STR "on_reboot" + +struct shutdown_action; +struct shutdown_trigger { + char *name; + struct shutdown_action *action; +}; + +/* + * Five shutdown action types are supported: + */ +#define SHUTDOWN_ACTION_IPL_STR "ipl" +#define SHUTDOWN_ACTION_REIPL_STR "reipl" +#define SHUTDOWN_ACTION_DUMP_STR "dump" +#define SHUTDOWN_ACTION_VMCMD_STR "vmcmd" +#define SHUTDOWN_ACTION_STOP_STR "stop" + +struct shutdown_action { + char *name; + void (*fn) (struct shutdown_trigger *trigger); + int (*init) (void); +}; + static char *ipl_type_str(enum ipl_type type) { switch (type) { @@ -54,10 +91,6 @@ enum dump_type { DUMP_TYPE_FCP = 4, }; -#define DUMP_NONE_STR "none" -#define DUMP_CCW_STR "ccw" -#define DUMP_FCP_STR "fcp" - static char *dump_type_str(enum dump_type type) { switch (type) { @@ -99,30 +132,6 @@ enum dump_method { DUMP_METHOD_FCP_DIAG, }; -enum shutdown_action { - SHUTDOWN_REIPL, - SHUTDOWN_DUMP, - SHUTDOWN_STOP, -}; - -#define SHUTDOWN_REIPL_STR "reipl" -#define SHUTDOWN_DUMP_STR "dump" -#define SHUTDOWN_STOP_STR "stop" - -static char *shutdown_action_str(enum shutdown_action action) -{ - switch (action) { - case SHUTDOWN_REIPL: - return SHUTDOWN_REIPL_STR; - case SHUTDOWN_DUMP: - return SHUTDOWN_DUMP_STR; - case SHUTDOWN_STOP: - return SHUTDOWN_STOP_STR; - default: - return NULL; - } -} - static int diag308_set_works = 0; static int reipl_capabilities = IPL_TYPE_UNKNOWN; @@ -140,8 +149,6 @@ static enum dump_method dump_method = DUMP_METHOD_NONE; static struct ipl_parameter_block *dump_block_fcp; static struct ipl_parameter_block *dump_block_ccw; -static enum shutdown_action on_panic_action = SHUTDOWN_STOP; - static struct sclp_ipl_info sclp_ipl_info; int diag308(unsigned long subcode, void *addr) @@ -205,8 +212,8 @@ static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj, \ struct kobj_attribute *attr, \ const char *buf, size_t len) \ { \ - if (sscanf(buf, _fmt_in, _value) != 1) \ - return -EINVAL; \ + strncpy(_value, buf, sizeof(_value) - 1); \ + strstrip(_value); \ return len; \ } \ static struct kobj_attribute sys_##_prefix##_##_name##_attr = \ @@ -245,33 +252,6 @@ static __init enum ipl_type get_ipl_type(void) return IPL_TYPE_FCP; } -void __init setup_ipl_info(void) -{ - ipl_info.type = get_ipl_type(); - switch (ipl_info.type) { - case IPL_TYPE_CCW: - ipl_info.data.ccw.dev_id.devno = ipl_devno; - ipl_info.data.ccw.dev_id.ssid = 0; - break; - case IPL_TYPE_FCP: - case IPL_TYPE_FCP_DUMP: - ipl_info.data.fcp.dev_id.devno = - IPL_PARMBLOCK_START->ipl_info.fcp.devno; - ipl_info.data.fcp.dev_id.ssid = 0; - ipl_info.data.fcp.wwpn = IPL_PARMBLOCK_START->ipl_info.fcp.wwpn; - ipl_info.data.fcp.lun = IPL_PARMBLOCK_START->ipl_info.fcp.lun; - break; - case IPL_TYPE_NSS: - strncpy(ipl_info.data.nss.name, kernel_nss_name, - sizeof(ipl_info.data.nss.name)); - break; - case IPL_TYPE_UNKNOWN: - default: - /* We have no info to copy */ - break; - } -} - struct ipl_info ipl_info; EXPORT_SYMBOL_GPL(ipl_info); @@ -428,8 +408,74 @@ static struct attribute_group ipl_unknown_attr_group = { static struct kset *ipl_kset; +static int __init ipl_register_fcp_files(void) +{ + int rc; + + rc = sysfs_create_group(&ipl_kset->kobj, &ipl_fcp_attr_group); + if (rc) + goto out; + rc = sysfs_create_bin_file(&ipl_kset->kobj, &ipl_parameter_attr); + if (rc) + goto out_ipl_parm; + rc = sysfs_create_bin_file(&ipl_kset->kobj, &ipl_scp_data_attr); + if (!rc) + goto out; + + sysfs_remove_bin_file(&ipl_kset->kobj, &ipl_parameter_attr); + +out_ipl_parm: + sysfs_remove_group(&ipl_kset->kobj, &ipl_fcp_attr_group); +out: + return rc; +} + +static void ipl_run(struct shutdown_trigger *trigger) +{ + diag308(DIAG308_IPL, NULL); + if (MACHINE_IS_VM) + __cpcmd("IPL", NULL, 0, NULL); + else if (ipl_info.type == IPL_TYPE_CCW) + reipl_ccw_dev(&ipl_info.data.ccw.dev_id); +} + +static int ipl_init(void) +{ + int rc; + + ipl_kset = kset_create_and_add("ipl", NULL, firmware_kobj); + if (!ipl_kset) { + rc = -ENOMEM; + goto out; + } + switch (ipl_info.type) { + case IPL_TYPE_CCW: + rc = sysfs_create_group(&ipl_kset->kobj, &ipl_ccw_attr_group); + break; + case IPL_TYPE_FCP: + case IPL_TYPE_FCP_DUMP: + rc = ipl_register_fcp_files(); + break; + case IPL_TYPE_NSS: + rc = sysfs_create_group(&ipl_kset->kobj, &ipl_nss_attr_group); + break; + default: + rc = sysfs_create_group(&ipl_kset->kobj, + &ipl_unknown_attr_group); + break; + } +out: + if (rc) + panic("ipl_init failed: rc = %i\n", rc); + + return 0; +} + +static struct shutdown_action ipl_action = {SHUTDOWN_ACTION_IPL_STR, ipl_run, + ipl_init}; + /* - * reipl section + * reipl shutdown action: Reboot Linux on shutdown. */ /* FCP reipl device attributes */ @@ -549,7 +595,9 @@ static int reipl_set_type(enum ipl_type type) switch(type) { case IPL_TYPE_CCW: - if (MACHINE_IS_VM) + if (diag308_set_works) + reipl_method = REIPL_METHOD_CCW_DIAG; + else if (MACHINE_IS_VM) reipl_method = REIPL_METHOD_CCW_VM; else reipl_method = REIPL_METHOD_CCW_CIO; @@ -600,143 +648,11 @@ static ssize_t reipl_type_store(struct kobject *kobj, } static struct kobj_attribute reipl_type_attr = - __ATTR(reipl_type, 0644, reipl_type_show, reipl_type_store); + __ATTR(reipl_type, 0644, reipl_type_show, reipl_type_store); static struct kset *reipl_kset; -/* - * dump section - */ - -/* FCP dump device attributes */ - -DEFINE_IPL_ATTR_RW(dump_fcp, wwpn, "0x%016llx\n", "%016llx\n", - dump_block_fcp->ipl_info.fcp.wwpn); -DEFINE_IPL_ATTR_RW(dump_fcp, lun, "0x%016llx\n", "%016llx\n", - dump_block_fcp->ipl_info.fcp.lun); -DEFINE_IPL_ATTR_RW(dump_fcp, bootprog, "%lld\n", "%lld\n", - dump_block_fcp->ipl_info.fcp.bootprog); -DEFINE_IPL_ATTR_RW(dump_fcp, br_lba, "%lld\n", "%lld\n", - dump_block_fcp->ipl_info.fcp.br_lba); -DEFINE_IPL_ATTR_RW(dump_fcp, device, "0.0.%04llx\n", "0.0.%llx\n", - dump_block_fcp->ipl_info.fcp.devno); - -static struct attribute *dump_fcp_attrs[] = { - &sys_dump_fcp_device_attr.attr, - &sys_dump_fcp_wwpn_attr.attr, - &sys_dump_fcp_lun_attr.attr, - &sys_dump_fcp_bootprog_attr.attr, - &sys_dump_fcp_br_lba_attr.attr, - NULL, -}; - -static struct attribute_group dump_fcp_attr_group = { - .name = IPL_FCP_STR, - .attrs = dump_fcp_attrs, -}; - -/* CCW dump device attributes */ - -DEFINE_IPL_ATTR_RW(dump_ccw, device, "0.0.%04llx\n", "0.0.%llx\n", - dump_block_ccw->ipl_info.ccw.devno); - -static struct attribute *dump_ccw_attrs[] = { - &sys_dump_ccw_device_attr.attr, - NULL, -}; - -static struct attribute_group dump_ccw_attr_group = { - .name = IPL_CCW_STR, - .attrs = dump_ccw_attrs, -}; - -/* dump type */ - -static int dump_set_type(enum dump_type type) -{ - if (!(dump_capabilities & type)) - return -EINVAL; - switch(type) { - case DUMP_TYPE_CCW: - if (MACHINE_IS_VM) - dump_method = DUMP_METHOD_CCW_VM; - else if (diag308_set_works) - dump_method = DUMP_METHOD_CCW_DIAG; - else - dump_method = DUMP_METHOD_CCW_CIO; - break; - case DUMP_TYPE_FCP: - dump_method = DUMP_METHOD_FCP_DIAG; - break; - default: - dump_method = DUMP_METHOD_NONE; - } - dump_type = type; - return 0; -} - -static ssize_t dump_type_show(struct kobject *kobj, - struct kobj_attribute *attr, char *page) -{ - return sprintf(page, "%s\n", dump_type_str(dump_type)); -} - -static ssize_t dump_type_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, size_t len) -{ - int rc = -EINVAL; - - if (strncmp(buf, DUMP_NONE_STR, strlen(DUMP_NONE_STR)) == 0) - rc = dump_set_type(DUMP_TYPE_NONE); - else if (strncmp(buf, DUMP_CCW_STR, strlen(DUMP_CCW_STR)) == 0) - rc = dump_set_type(DUMP_TYPE_CCW); - else if (strncmp(buf, DUMP_FCP_STR, strlen(DUMP_FCP_STR)) == 0) - rc = dump_set_type(DUMP_TYPE_FCP); - return (rc != 0) ? rc : len; -} - -static struct kobj_attribute dump_type_attr = - __ATTR(dump_type, 0644, dump_type_show, dump_type_store); - -static struct kset *dump_kset; - -/* - * Shutdown actions section - */ - -static struct kset *shutdown_actions_kset; - -/* on panic */ - -static ssize_t on_panic_show(struct kobject *kobj, - struct kobj_attribute *attr, char *page) -{ - return sprintf(page, "%s\n", shutdown_action_str(on_panic_action)); -} - -static ssize_t on_panic_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, size_t len) -{ - if (strncmp(buf, SHUTDOWN_REIPL_STR, strlen(SHUTDOWN_REIPL_STR)) == 0) - on_panic_action = SHUTDOWN_REIPL; - else if (strncmp(buf, SHUTDOWN_DUMP_STR, - strlen(SHUTDOWN_DUMP_STR)) == 0) - on_panic_action = SHUTDOWN_DUMP; - else if (strncmp(buf, SHUTDOWN_STOP_STR, - strlen(SHUTDOWN_STOP_STR)) == 0) - on_panic_action = SHUTDOWN_STOP; - else - return -EINVAL; - - return len; -} - -static struct kobj_attribute on_panic_attr = - __ATTR(on_panic, 0644, on_panic_show, on_panic_store); - -void do_reipl(void) +void reipl_run(struct shutdown_trigger *trigger) { struct ccw_dev_id devid; static char buf[100]; @@ -745,8 +661,6 @@ void do_reipl(void) switch (reipl_method) { case REIPL_METHOD_CCW_CIO: devid.devno = reipl_block_ccw->ipl_info.ccw.devno; - if (ipl_info.type == IPL_TYPE_CCW && devid.devno == ipl_devno) - diag308(DIAG308_IPL, NULL); devid.ssid = 0; reipl_ccw_dev(&devid); break; @@ -787,98 +701,6 @@ void do_reipl(void) default: break; } - signal_processor(smp_processor_id(), sigp_stop_and_store_status); -} - -static void do_dump(void) -{ - struct ccw_dev_id devid; - static char buf[100]; - - switch (dump_method) { - case DUMP_METHOD_CCW_CIO: - smp_send_stop(); - devid.devno = dump_block_ccw->ipl_info.ccw.devno; - devid.ssid = 0; - reipl_ccw_dev(&devid); - break; - case DUMP_METHOD_CCW_VM: - smp_send_stop(); - sprintf(buf, "STORE STATUS"); - __cpcmd(buf, NULL, 0, NULL); - sprintf(buf, "IPL %X", dump_block_ccw->ipl_info.ccw.devno); - __cpcmd(buf, NULL, 0, NULL); - break; - case DUMP_METHOD_CCW_DIAG: - diag308(DIAG308_SET, dump_block_ccw); - diag308(DIAG308_DUMP, NULL); - break; - case DUMP_METHOD_FCP_DIAG: - diag308(DIAG308_SET, dump_block_fcp); - diag308(DIAG308_DUMP, NULL); - break; - case DUMP_METHOD_NONE: - default: - return; - } - printk(KERN_EMERG "Dump failed!\n"); -} - -/* init functions */ - -static int __init ipl_register_fcp_files(void) -{ - int rc; - - rc = sysfs_create_group(&ipl_kset->kobj, - &ipl_fcp_attr_group); - if (rc) - goto out; - rc = sysfs_create_bin_file(&ipl_kset->kobj, - &ipl_parameter_attr); - if (rc) - goto out_ipl_parm; - rc = sysfs_create_bin_file(&ipl_kset->kobj, - &ipl_scp_data_attr); - if (!rc) - goto out; - - sysfs_remove_bin_file(&ipl_kset->kobj, &ipl_parameter_attr); - -out_ipl_parm: - sysfs_remove_group(&ipl_kset->kobj, &ipl_fcp_attr_group); -out: - return rc; -} - -static int __init ipl_init(void) -{ - int rc; - - ipl_kset = kset_create_and_add("ipl", NULL, firmware_kobj); - if (!ipl_kset) - return -ENOMEM; - switch (ipl_info.type) { - case IPL_TYPE_CCW: - rc = sysfs_create_group(&ipl_kset->kobj, - &ipl_ccw_attr_group); - break; - case IPL_TYPE_FCP: - case IPL_TYPE_FCP_DUMP: - rc = ipl_register_fcp_files(); - break; - case IPL_TYPE_NSS: - rc = sysfs_create_group(&ipl_kset->kobj, - &ipl_nss_attr_group); - break; - default: - rc = sysfs_create_group(&ipl_kset->kobj, - &ipl_unknown_attr_group); - break; - } - if (rc) - kset_unregister(ipl_kset); - return rc; } static void __init reipl_probe(void) @@ -923,6 +745,7 @@ static int __init reipl_ccw_init(void) reipl_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION; reipl_block_ccw->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN; reipl_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW; + reipl_block_ccw->hdr.flags = DIAG308_FLAGS_LP_VALID; /* check if read scp info worked and set loadparm */ if (sclp_ipl_info.is_valid) memcpy(reipl_block_ccw->ipl_info.ccw.load_param, @@ -931,8 +754,7 @@ static int __init reipl_ccw_init(void) /* read scp info failed: set empty loadparm (EBCDIC blanks) */ memset(reipl_block_ccw->ipl_info.ccw.load_param, 0x40, LOADPARM_LEN); - /* FIXME: check for diag308_set_works when enabling diag ccw reipl */ - if (!MACHINE_IS_VM) + if (!MACHINE_IS_VM && !diag308_set_works) sys_reipl_ccw_loadparm_attr.attr.mode = S_IRUGO; if (ipl_info.type == IPL_TYPE_CCW) reipl_block_ccw->ipl_info.ccw.devno = ipl_devno; @@ -970,7 +792,7 @@ static int __init reipl_fcp_init(void) return 0; } -static int __init reipl_init(void) +static int reipl_init(void) { int rc; @@ -997,6 +819,140 @@ static int __init reipl_init(void) return 0; } +static struct shutdown_action reipl_action = {SHUTDOWN_ACTION_REIPL_STR, + reipl_run, reipl_init}; + +/* + * dump shutdown action: Dump Linux on shutdown. + */ + +/* FCP dump device attributes */ + +DEFINE_IPL_ATTR_RW(dump_fcp, wwpn, "0x%016llx\n", "%016llx\n", + dump_block_fcp->ipl_info.fcp.wwpn); +DEFINE_IPL_ATTR_RW(dump_fcp, lun, "0x%016llx\n", "%016llx\n", + dump_block_fcp->ipl_info.fcp.lun); +DEFINE_IPL_ATTR_RW(dump_fcp, bootprog, "%lld\n", "%lld\n", + dump_block_fcp->ipl_info.fcp.bootprog); +DEFINE_IPL_ATTR_RW(dump_fcp, br_lba, "%lld\n", "%lld\n", + dump_block_fcp->ipl_info.fcp.br_lba); +DEFINE_IPL_ATTR_RW(dump_fcp, device, "0.0.%04llx\n", "0.0.%llx\n", + dump_block_fcp->ipl_info.fcp.devno); + +static struct attribute *dump_fcp_attrs[] = { + &sys_dump_fcp_device_attr.attr, + &sys_dump_fcp_wwpn_attr.attr, + &sys_dump_fcp_lun_attr.attr, + &sys_dump_fcp_bootprog_attr.attr, + &sys_dump_fcp_br_lba_attr.attr, + NULL, +}; + +static struct attribute_group dump_fcp_attr_group = { + .name = IPL_FCP_STR, + .attrs = dump_fcp_attrs, +}; + +/* CCW dump device attributes */ + +DEFINE_IPL_ATTR_RW(dump_ccw, device, "0.0.%04llx\n", "0.0.%llx\n", + dump_block_ccw->ipl_info.ccw.devno); + +static struct attribute *dump_ccw_attrs[] = { + &sys_dump_ccw_device_attr.attr, + NULL, +}; + +static struct attribute_group dump_ccw_attr_group = { + .name = IPL_CCW_STR, + .attrs = dump_ccw_attrs, +}; + +/* dump type */ + +static int dump_set_type(enum dump_type type) +{ + if (!(dump_capabilities & type)) + return -EINVAL; + switch (type) { + case DUMP_TYPE_CCW: + if (diag308_set_works) + dump_method = DUMP_METHOD_CCW_DIAG; + else if (MACHINE_IS_VM) + dump_method = DUMP_METHOD_CCW_VM; + else + dump_method = DUMP_METHOD_CCW_CIO; + break; + case DUMP_TYPE_FCP: + dump_method = DUMP_METHOD_FCP_DIAG; + break; + default: + dump_method = DUMP_METHOD_NONE; + } + dump_type = type; + return 0; +} + +static ssize_t dump_type_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return sprintf(page, "%s\n", dump_type_str(dump_type)); +} + +static ssize_t dump_type_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + int rc = -EINVAL; + + if (strncmp(buf, DUMP_NONE_STR, strlen(DUMP_NONE_STR)) == 0) + rc = dump_set_type(DUMP_TYPE_NONE); + else if (strncmp(buf, DUMP_CCW_STR, strlen(DUMP_CCW_STR)) == 0) + rc = dump_set_type(DUMP_TYPE_CCW); + else if (strncmp(buf, DUMP_FCP_STR, strlen(DUMP_FCP_STR)) == 0) + rc = dump_set_type(DUMP_TYPE_FCP); + return (rc != 0) ? rc : len; +} + +static struct kobj_attribute dump_type_attr = + __ATTR(dump_type, 0644, dump_type_show, dump_type_store); + +static struct kset *dump_kset; + +static void dump_run(struct shutdown_trigger *trigger) +{ + struct ccw_dev_id devid; + static char buf[100]; + + switch (dump_method) { + case DUMP_METHOD_CCW_CIO: + smp_send_stop(); + devid.devno = dump_block_ccw->ipl_info.ccw.devno; + devid.ssid = 0; + reipl_ccw_dev(&devid); + break; + case DUMP_METHOD_CCW_VM: + smp_send_stop(); + sprintf(buf, "STORE STATUS"); + __cpcmd(buf, NULL, 0, NULL); + sprintf(buf, "IPL %X", dump_block_ccw->ipl_info.ccw.devno); + __cpcmd(buf, NULL, 0, NULL); + break; + case DUMP_METHOD_CCW_DIAG: + diag308(DIAG308_SET, dump_block_ccw); + diag308(DIAG308_DUMP, NULL); + break; + case DUMP_METHOD_FCP_DIAG: + diag308(DIAG308_SET, dump_block_fcp); + diag308(DIAG308_DUMP, NULL); + break; + case DUMP_METHOD_NONE: + default: + return; + } + printk(KERN_EMERG "Dump failed!\n"); +} + static int __init dump_ccw_init(void) { int rc; @@ -1042,31 +998,14 @@ static int __init dump_fcp_init(void) return 0; } -#define SHUTDOWN_ON_PANIC_PRIO 0 - -static int shutdown_on_panic_notify(struct notifier_block *self, - unsigned long event, void *data) -{ - if (on_panic_action == SHUTDOWN_DUMP) - do_dump(); - else if (on_panic_action == SHUTDOWN_REIPL) - do_reipl(); - return NOTIFY_OK; -} - -static struct notifier_block shutdown_on_panic_nb = { - .notifier_call = shutdown_on_panic_notify, - .priority = SHUTDOWN_ON_PANIC_PRIO -}; - -static int __init dump_init(void) +static int dump_init(void) { int rc; dump_kset = kset_create_and_add("dump", NULL, firmware_kobj); if (!dump_kset) return -ENOMEM; - rc = sysfs_create_file(&dump_kset->kobj, &dump_type_attr); + rc = sysfs_create_file(&dump_kset->kobj, &dump_type_attr.attr); if (rc) { kset_unregister(dump_kset); return rc; @@ -1081,47 +1020,381 @@ static int __init dump_init(void) return 0; } -static int __init shutdown_actions_init(void) +static struct shutdown_action dump_action = {SHUTDOWN_ACTION_DUMP_STR, + dump_run, dump_init}; + +/* + * vmcmd shutdown action: Trigger vm command on shutdown. + */ + +static char vmcmd_on_reboot[128]; +static char vmcmd_on_panic[128]; +static char vmcmd_on_halt[128]; +static char vmcmd_on_poff[128]; + +DEFINE_IPL_ATTR_STR_RW(vmcmd, on_reboot, "%s\n", "%s\n", vmcmd_on_reboot); +DEFINE_IPL_ATTR_STR_RW(vmcmd, on_panic, "%s\n", "%s\n", vmcmd_on_panic); +DEFINE_IPL_ATTR_STR_RW(vmcmd, on_halt, "%s\n", "%s\n", vmcmd_on_halt); +DEFINE_IPL_ATTR_STR_RW(vmcmd, on_poff, "%s\n", "%s\n", vmcmd_on_poff); + +static struct attribute *vmcmd_attrs[] = { + &sys_vmcmd_on_reboot_attr.attr, + &sys_vmcmd_on_panic_attr.attr, + &sys_vmcmd_on_halt_attr.attr, + &sys_vmcmd_on_poff_attr.attr, + NULL, +}; + +static struct attribute_group vmcmd_attr_group = { + .attrs = vmcmd_attrs, +}; + +static struct kset *vmcmd_kset; + +static void vmcmd_run(struct shutdown_trigger *trigger) +{ + char *cmd, *next_cmd; + + if (strcmp(trigger->name, ON_REIPL_STR) == 0) + cmd = vmcmd_on_reboot; + else if (strcmp(trigger->name, ON_PANIC_STR) == 0) + cmd = vmcmd_on_panic; + else if (strcmp(trigger->name, ON_HALT_STR) == 0) + cmd = vmcmd_on_halt; + else if (strcmp(trigger->name, ON_POFF_STR) == 0) + cmd = vmcmd_on_poff; + else + return; + + if (strlen(cmd) == 0) + return; + do { + next_cmd = strchr(cmd, '\n'); + if (next_cmd) { + next_cmd[0] = 0; + next_cmd += 1; + } + __cpcmd(cmd, NULL, 0, NULL); + cmd = next_cmd; + } while (cmd != NULL); +} + +static int vmcmd_init(void) { - int rc; + if (!MACHINE_IS_VM) + return -ENOTSUPP; + vmcmd_kset = kset_create_and_add("vmcmd", NULL, firmware_kobj); + if (!vmcmd_kset) + return -ENOMEM; + return sysfs_create_group(&vmcmd_kset->kobj, &vmcmd_attr_group); +} + +static struct shutdown_action vmcmd_action = {SHUTDOWN_ACTION_VMCMD_STR, + vmcmd_run, vmcmd_init}; + +/* + * stop shutdown action: Stop Linux on shutdown. + */ + +static void stop_run(struct shutdown_trigger *trigger) +{ + if (strcmp(trigger->name, ON_PANIC_STR) == 0) + disabled_wait((unsigned long) __builtin_return_address(0)); + else { + signal_processor(smp_processor_id(), sigp_stop); + for (;;); + } +} + +static struct shutdown_action stop_action = {SHUTDOWN_ACTION_STOP_STR, + stop_run, NULL}; + +/* action list */ + +static struct shutdown_action *shutdown_actions_list[] = { + &ipl_action, &reipl_action, &dump_action, &vmcmd_action, &stop_action}; +#define SHUTDOWN_ACTIONS_COUNT (sizeof(shutdown_actions_list) / sizeof(void *)) + +/* + * Trigger section + */ + +static struct kset *shutdown_actions_kset; + +static int set_trigger(const char *buf, struct shutdown_trigger *trigger, + size_t len) +{ + int i; + for (i = 0; i < SHUTDOWN_ACTIONS_COUNT; i++) { + if (!shutdown_actions_list[i]) + continue; + if (strncmp(buf, shutdown_actions_list[i]->name, + strlen(shutdown_actions_list[i]->name)) == 0) { + trigger->action = shutdown_actions_list[i]; + return len; + } + } + return -EINVAL; +} + +/* on reipl */ + +static struct shutdown_trigger on_reboot_trigger = {ON_REIPL_STR, + &reipl_action}; + +static ssize_t on_reboot_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return sprintf(page, "%s\n", on_reboot_trigger.action->name); +} + +static ssize_t on_reboot_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return set_trigger(buf, &on_reboot_trigger, len); +} + +static struct kobj_attribute on_reboot_attr = + __ATTR(on_reboot, 0644, on_reboot_show, on_reboot_store); + +static void do_machine_restart(char *__unused) +{ + smp_send_stop(); + on_reboot_trigger.action->fn(&on_reboot_trigger); + reipl_run(NULL); +} +void (*_machine_restart)(char *command) = do_machine_restart; + +/* on panic */ + +static struct shutdown_trigger on_panic_trigger = {ON_PANIC_STR, &stop_action}; + +static ssize_t on_panic_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return sprintf(page, "%s\n", on_panic_trigger.action->name); +} +static ssize_t on_panic_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return set_trigger(buf, &on_panic_trigger, len); +} + +static struct kobj_attribute on_panic_attr = + __ATTR(on_panic, 0644, on_panic_show, on_panic_store); + +static void do_panic(void) +{ + on_panic_trigger.action->fn(&on_panic_trigger); + stop_run(&on_panic_trigger); +} + +/* on halt */ + +static struct shutdown_trigger on_halt_trigger = {ON_HALT_STR, &stop_action}; + +static ssize_t on_halt_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return sprintf(page, "%s\n", on_halt_trigger.action->name); +} + +static ssize_t on_halt_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return set_trigger(buf, &on_halt_trigger, len); +} + +static struct kobj_attribute on_halt_attr = + __ATTR(on_halt, 0644, on_halt_show, on_halt_store); + + +static void do_machine_halt(void) +{ + smp_send_stop(); + on_halt_trigger.action->fn(&on_halt_trigger); + stop_run(&on_halt_trigger); +} +void (*_machine_halt)(void) = do_machine_halt; + +/* on power off */ + +static struct shutdown_trigger on_poff_trigger = {ON_POFF_STR, &stop_action}; + +static ssize_t on_poff_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return sprintf(page, "%s\n", on_poff_trigger.action->name); +} + +static ssize_t on_poff_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return set_trigger(buf, &on_poff_trigger, len); +} + +static struct kobj_attribute on_poff_attr = + __ATTR(on_poff, 0644, on_poff_show, on_poff_store); + + +static void do_machine_power_off(void) +{ + smp_send_stop(); + on_poff_trigger.action->fn(&on_poff_trigger); + stop_run(&on_poff_trigger); +} +void (*_machine_power_off)(void) = do_machine_power_off; + +static void __init shutdown_triggers_init(void) +{ shutdown_actions_kset = kset_create_and_add("shutdown_actions", NULL, firmware_kobj); if (!shutdown_actions_kset) - return -ENOMEM; - rc = sysfs_create_file(&shutdown_actions_kset->kobj, &on_panic_attr); - if (rc) { - kset_unregister(shutdown_actions_kset); - return rc; + goto fail; + if (sysfs_create_file(&shutdown_actions_kset->kobj, + &on_reboot_attr.attr)) + goto fail; + if (sysfs_create_file(&shutdown_actions_kset->kobj, + &on_panic_attr.attr)) + goto fail; + if (sysfs_create_file(&shutdown_actions_kset->kobj, + &on_halt_attr.attr)) + goto fail; + if (sysfs_create_file(&shutdown_actions_kset->kobj, + &on_poff_attr.attr)) + goto fail; + + return; +fail: + panic("shutdown_triggers_init failed\n"); +} + +static void __init shutdown_actions_init(void) +{ + int i; + + for (i = 0; i < SHUTDOWN_ACTIONS_COUNT; i++) { + if (!shutdown_actions_list[i]->init) + continue; + if (shutdown_actions_list[i]->init()) + shutdown_actions_list[i] = NULL; } - atomic_notifier_chain_register(&panic_notifier_list, - &shutdown_on_panic_nb); - return 0; } static int __init s390_ipl_init(void) { - int rc; - - sclp_get_ipl_info(&sclp_ipl_info); reipl_probe(); - rc = ipl_init(); - if (rc) - return rc; - rc = reipl_init(); - if (rc) - return rc; - rc = dump_init(); - if (rc) - return rc; - rc = shutdown_actions_init(); - if (rc) - return rc; + sclp_get_ipl_info(&sclp_ipl_info); + shutdown_actions_init(); + shutdown_triggers_init(); return 0; } __initcall(s390_ipl_init); +static void __init strncpy_skip_quote(char *dst, char *src, int n) +{ + int sx, dx; + + dx = 0; + for (sx = 0; src[sx] != 0; sx++) { + if (src[sx] == '"') + continue; + dst[dx++] = src[sx]; + if (dx >= n) + break; + } +} + +static int __init vmcmd_on_reboot_setup(char *str) +{ + if (!MACHINE_IS_VM) + return 1; + strncpy_skip_quote(vmcmd_on_reboot, str, 127); + vmcmd_on_reboot[127] = 0; + on_reboot_trigger.action = &vmcmd_action; + return 1; +} +__setup("vmreboot=", vmcmd_on_reboot_setup); + +static int __init vmcmd_on_panic_setup(char *str) +{ + if (!MACHINE_IS_VM) + return 1; + strncpy_skip_quote(vmcmd_on_panic, str, 127); + vmcmd_on_panic[127] = 0; + on_panic_trigger.action = &vmcmd_action; + return 1; +} +__setup("vmpanic=", vmcmd_on_panic_setup); + +static int __init vmcmd_on_halt_setup(char *str) +{ + if (!MACHINE_IS_VM) + return 1; + strncpy_skip_quote(vmcmd_on_halt, str, 127); + vmcmd_on_halt[127] = 0; + on_halt_trigger.action = &vmcmd_action; + return 1; +} +__setup("vmhalt=", vmcmd_on_halt_setup); + +static int __init vmcmd_on_poff_setup(char *str) +{ + if (!MACHINE_IS_VM) + return 1; + strncpy_skip_quote(vmcmd_on_poff, str, 127); + vmcmd_on_poff[127] = 0; + on_poff_trigger.action = &vmcmd_action; + return 1; +} +__setup("vmpoff=", vmcmd_on_poff_setup); + +static int on_panic_notify(struct notifier_block *self, + unsigned long event, void *data) +{ + do_panic(); + return NOTIFY_OK; +} + +static struct notifier_block on_panic_nb = { + .notifier_call = on_panic_notify, + .priority = 0, +}; + +void __init setup_ipl(void) +{ + ipl_info.type = get_ipl_type(); + switch (ipl_info.type) { + case IPL_TYPE_CCW: + ipl_info.data.ccw.dev_id.devno = ipl_devno; + ipl_info.data.ccw.dev_id.ssid = 0; + break; + case IPL_TYPE_FCP: + case IPL_TYPE_FCP_DUMP: + ipl_info.data.fcp.dev_id.devno = + IPL_PARMBLOCK_START->ipl_info.fcp.devno; + ipl_info.data.fcp.dev_id.ssid = 0; + ipl_info.data.fcp.wwpn = IPL_PARMBLOCK_START->ipl_info.fcp.wwpn; + ipl_info.data.fcp.lun = IPL_PARMBLOCK_START->ipl_info.fcp.lun; + break; + case IPL_TYPE_NSS: + strncpy(ipl_info.data.nss.name, kernel_nss_name, + sizeof(ipl_info.data.nss.name)); + break; + case IPL_TYPE_UNKNOWN: + default: + /* We have no info to copy */ + break; + } + atomic_notifier_chain_register(&panic_notifier_list, &on_panic_nb); +} + void __init ipl_save_parameters(void) { struct cio_iplinfo iplinfo; @@ -1202,3 +1475,4 @@ void s390_reset_system(void) do_reset_calls(); } + diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c index 29f7884b4ffa..0e7aca039307 100644 --- a/arch/s390/kernel/process.c +++ b/arch/s390/kernel/process.c @@ -36,7 +36,7 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/notifier.h> - +#include <linux/utsname.h> #include <asm/uaccess.h> #include <asm/pgtable.h> #include <asm/system.h> @@ -182,13 +182,15 @@ void cpu_idle(void) void show_regs(struct pt_regs *regs) { - struct task_struct *tsk = current; - - printk("CPU: %d %s\n", task_thread_info(tsk)->cpu, print_tainted()); - printk("Process %s (pid: %d, task: %p, ksp: %p)\n", - current->comm, task_pid_nr(current), (void *) tsk, - (void *) tsk->thread.ksp); - + print_modules(); + printk("CPU: %d %s %s %.*s\n", + task_thread_info(current)->cpu, print_tainted(), + init_utsname()->release, + (int)strcspn(init_utsname()->version, " "), + init_utsname()->version); + printk("Process %s (pid: %d, task: %p, ksp: %p)\n", + current->comm, current->pid, current, + (void *) current->thread.ksp); show_registers(regs); /* Show stack backtrace if pt_regs is from kernel mode */ if (!(regs->psw.mask & PSW_MASK_PSTATE)) diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c index 1d81bf9488ae..6e036bae9875 100644 --- a/arch/s390/kernel/ptrace.c +++ b/arch/s390/kernel/ptrace.c @@ -86,13 +86,13 @@ FixPerRegisters(struct task_struct *task) per_info->control_regs.bits.storage_alt_space_ctl = 0; } -static void set_single_step(struct task_struct *task) +void user_enable_single_step(struct task_struct *task) { task->thread.per_info.single_step = 1; FixPerRegisters(task); } -static void clear_single_step(struct task_struct *task) +void user_disable_single_step(struct task_struct *task) { task->thread.per_info.single_step = 0; FixPerRegisters(task); @@ -107,7 +107,7 @@ void ptrace_disable(struct task_struct *child) { /* make sure the single step bit is not set. */ - clear_single_step(child); + user_disable_single_step(child); } #ifndef CONFIG_64BIT @@ -651,7 +651,7 @@ do_ptrace(struct task_struct *child, long request, long addr, long data) clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); child->exit_code = data; /* make sure the single step bit is not set. */ - clear_single_step(child); + user_disable_single_step(child); wake_up_process(child); return 0; @@ -665,7 +665,7 @@ do_ptrace(struct task_struct *child, long request, long addr, long data) return 0; child->exit_code = SIGKILL; /* make sure the single step bit is not set. */ - clear_single_step(child); + user_disable_single_step(child); wake_up_process(child); return 0; @@ -675,10 +675,7 @@ do_ptrace(struct task_struct *child, long request, long addr, long data) return -EIO; clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); child->exit_code = data; - if (data) - set_tsk_thread_flag(child, TIF_SINGLE_STEP); - else - set_single_step(child); + user_enable_single_step(child); /* give it a chance to run. */ wake_up_process(child); return 0; diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index 577aa7dd660e..766c783bd7a7 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c @@ -126,75 +126,6 @@ void __cpuinit cpu_init(void) } /* - * VM halt and poweroff setup routines - */ -char vmhalt_cmd[128] = ""; -char vmpoff_cmd[128] = ""; -static char vmpanic_cmd[128] = ""; - -static void strncpy_skip_quote(char *dst, char *src, int n) -{ - int sx, dx; - - dx = 0; - for (sx = 0; src[sx] != 0; sx++) { - if (src[sx] == '"') continue; - dst[dx++] = src[sx]; - if (dx >= n) break; - } -} - -static int __init vmhalt_setup(char *str) -{ - strncpy_skip_quote(vmhalt_cmd, str, 127); - vmhalt_cmd[127] = 0; - return 1; -} - -__setup("vmhalt=", vmhalt_setup); - -static int __init vmpoff_setup(char *str) -{ - strncpy_skip_quote(vmpoff_cmd, str, 127); - vmpoff_cmd[127] = 0; - return 1; -} - -__setup("vmpoff=", vmpoff_setup); - -static int vmpanic_notify(struct notifier_block *self, unsigned long event, - void *data) -{ - if (MACHINE_IS_VM && strlen(vmpanic_cmd) > 0) - cpcmd(vmpanic_cmd, NULL, 0, NULL); - - return NOTIFY_OK; -} - -#define PANIC_PRI_VMPANIC 0 - -static struct notifier_block vmpanic_nb = { - .notifier_call = vmpanic_notify, - .priority = PANIC_PRI_VMPANIC -}; - -static int __init vmpanic_setup(char *str) -{ - static int register_done __initdata = 0; - - strncpy_skip_quote(vmpanic_cmd, str, 127); - vmpanic_cmd[127] = 0; - if (!register_done) { - register_done = 1; - atomic_notifier_chain_register(&panic_notifier_list, - &vmpanic_nb); - } - return 1; -} - -__setup("vmpanic=", vmpanic_setup); - -/* * condev= and conmode= setup parameter. */ @@ -308,38 +239,6 @@ static void __init setup_zfcpdump(unsigned int console_devno) static inline void setup_zfcpdump(unsigned int console_devno) {} #endif /* CONFIG_ZFCPDUMP */ -#ifdef CONFIG_SMP -void (*_machine_restart)(char *command) = machine_restart_smp; -void (*_machine_halt)(void) = machine_halt_smp; -void (*_machine_power_off)(void) = machine_power_off_smp; -#else -/* - * Reboot, halt and power_off routines for non SMP. - */ -static void do_machine_restart_nonsmp(char * __unused) -{ - do_reipl(); -} - -static void do_machine_halt_nonsmp(void) -{ - if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0) - __cpcmd(vmhalt_cmd, NULL, 0, NULL); - signal_processor(smp_processor_id(), sigp_stop_and_store_status); -} - -static void do_machine_power_off_nonsmp(void) -{ - if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0) - __cpcmd(vmpoff_cmd, NULL, 0, NULL); - signal_processor(smp_processor_id(), sigp_stop_and_store_status); -} - -void (*_machine_restart)(char *command) = do_machine_restart_nonsmp; -void (*_machine_halt)(void) = do_machine_halt_nonsmp; -void (*_machine_power_off)(void) = do_machine_power_off_nonsmp; -#endif - /* * Reboot, halt and power_off stubs. They just call _machine_restart, * _machine_halt or _machine_power_off. @@ -559,7 +458,9 @@ setup_resources(void) data_resource.start = (unsigned long) &_etext; data_resource.end = (unsigned long) &_edata - 1; - for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) { + for (i = 0; i < MEMORY_CHUNKS; i++) { + if (!memory_chunk[i].size) + continue; res = alloc_bootmem_low(sizeof(struct resource)); res->flags = IORESOURCE_BUSY | IORESOURCE_MEM; switch (memory_chunk[i].type) { @@ -617,7 +518,7 @@ EXPORT_SYMBOL_GPL(real_memory_size); static void __init setup_memory_end(void) { unsigned long memory_size; - unsigned long max_mem, max_phys; + unsigned long max_mem; int i; #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) @@ -625,10 +526,31 @@ static void __init setup_memory_end(void) memory_end = ZFCPDUMP_HSA_SIZE; #endif memory_size = 0; - max_phys = VMALLOC_END_INIT - VMALLOC_MIN_SIZE; memory_end &= PAGE_MASK; - max_mem = memory_end ? min(max_phys, memory_end) : max_phys; + max_mem = memory_end ? min(VMALLOC_START, memory_end) : VMALLOC_START; + memory_end = min(max_mem, memory_end); + + /* + * Make sure all chunks are MAX_ORDER aligned so we don't need the + * extra checks that HOLES_IN_ZONE would require. + */ + for (i = 0; i < MEMORY_CHUNKS; i++) { + unsigned long start, end; + struct mem_chunk *chunk; + unsigned long align; + + chunk = &memory_chunk[i]; + align = 1UL << (MAX_ORDER + PAGE_SHIFT - 1); + start = (chunk->addr + align - 1) & ~(align - 1); + end = (chunk->addr + chunk->size) & ~(align - 1); + if (start >= end) + memset(chunk, 0, sizeof(*chunk)); + else { + chunk->addr = start; + chunk->size = end - start; + } + } for (i = 0; i < MEMORY_CHUNKS; i++) { struct mem_chunk *chunk = &memory_chunk[i]; @@ -890,7 +812,7 @@ setup_arch(char **cmdline_p) parse_early_param(); - setup_ipl_info(); + setup_ipl(); setup_memory_end(); setup_addressing_mode(); setup_memory(); @@ -899,7 +821,6 @@ setup_arch(char **cmdline_p) cpu_init(); __cpu_logical_map[0] = S390_lowcore.cpu_data.cpu_addr; - smp_setup_cpu_possible_map(); /* * Setup capabilities (ELF_HWCAP & ELF_PLATFORM). @@ -920,7 +841,7 @@ setup_arch(char **cmdline_p) void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo) { - printk("cpu %d " + printk(KERN_INFO "cpu %d " #ifdef CONFIG_SMP "phys_idx=%d " #endif @@ -996,7 +917,7 @@ static void *c_next(struct seq_file *m, void *v, loff_t *pos) static void c_stop(struct seq_file *m, void *v) { } -struct seq_operations cpuinfo_op = { +const struct seq_operations cpuinfo_op = { .start = c_start, .next = c_next, .stop = c_stop, diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c index d264671c1b71..4449bf32cbf1 100644 --- a/arch/s390/kernel/signal.c +++ b/arch/s390/kernel/signal.c @@ -471,6 +471,7 @@ void do_signal(struct pt_regs *regs) if (signr > 0) { /* Whee! Actually deliver the signal. */ + int ret; #ifdef CONFIG_COMPAT if (test_thread_flag(TIF_31BIT)) { extern int handle_signal32(unsigned long sig, @@ -478,15 +479,12 @@ void do_signal(struct pt_regs *regs) siginfo_t *info, sigset_t *oldset, struct pt_regs *regs); - if (handle_signal32( - signr, &ka, &info, oldset, regs) == 0) { - if (test_thread_flag(TIF_RESTORE_SIGMASK)) - clear_thread_flag(TIF_RESTORE_SIGMASK); - } - return; + ret = handle_signal32(signr, &ka, &info, oldset, regs); } + else #endif - if (handle_signal(signr, &ka, &info, oldset, regs) == 0) { + ret = handle_signal(signr, &ka, &info, oldset, regs); + if (!ret) { /* * A signal was successfully delivered; the saved * sigmask will have been stored in the signal frame, @@ -495,6 +493,14 @@ void do_signal(struct pt_regs *regs) */ if (test_thread_flag(TIF_RESTORE_SIGMASK)) clear_thread_flag(TIF_RESTORE_SIGMASK); + + /* + * If we would have taken a single-step trap + * for a normal instruction, act like we took + * one for the handler setup. + */ + if (current->thread.per_info.single_step) + set_thread_flag(TIF_SINGLE_STEP); } return; } diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index 264ea906db4c..aa37fa154512 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c @@ -42,6 +42,7 @@ #include <asm/tlbflush.h> #include <asm/timer.h> #include <asm/lowcore.h> +#include <asm/sclp.h> #include <asm/cpu.h> /* @@ -53,11 +54,27 @@ EXPORT_SYMBOL(lowcore_ptr); cpumask_t cpu_online_map = CPU_MASK_NONE; EXPORT_SYMBOL(cpu_online_map); -cpumask_t cpu_possible_map = CPU_MASK_NONE; +cpumask_t cpu_possible_map = CPU_MASK_ALL; EXPORT_SYMBOL(cpu_possible_map); static struct task_struct *current_set[NR_CPUS]; +static u8 smp_cpu_type; +static int smp_use_sigp_detection; + +enum s390_cpu_state { + CPU_STATE_STANDBY, + CPU_STATE_CONFIGURED, +}; + +#ifdef CONFIG_HOTPLUG_CPU +static DEFINE_MUTEX(smp_cpu_state_mutex); +#endif +static int smp_cpu_state[NR_CPUS]; + +static DEFINE_PER_CPU(struct cpu, cpu_devices); +DEFINE_PER_CPU(struct s390_idle_data, s390_idle); + static void smp_ext_bitcall(int, ec_bit_sig); /* @@ -193,6 +210,33 @@ int smp_call_function_single(int cpu, void (*func) (void *info), void *info, } EXPORT_SYMBOL(smp_call_function_single); +/** + * smp_call_function_mask(): Run a function on a set of other CPUs. + * @mask: The set of cpus to run on. Must not include the current cpu. + * @func: The function to run. This must be fast and non-blocking. + * @info: An arbitrary pointer to pass to the function. + * @wait: If true, wait (atomically) until function has completed on other CPUs. + * + * Returns 0 on success, else a negative status code. + * + * If @wait is true, then returns once @func has returned; otherwise + * it returns just before the target cpu calls @func. + * + * You must not call this function with disabled interrupts or from a + * hardware interrupt handler or from a bottom half handler. + */ +int +smp_call_function_mask(cpumask_t mask, + void (*func)(void *), void *info, + int wait) +{ + preempt_disable(); + __smp_call_function_map(func, info, 0, wait, mask); + preempt_enable(); + return 0; +} +EXPORT_SYMBOL(smp_call_function_mask); + void smp_send_stop(void) { int cpu, rc; @@ -217,33 +261,6 @@ void smp_send_stop(void) } /* - * Reboot, halt and power_off routines for SMP. - */ -void machine_restart_smp(char *__unused) -{ - smp_send_stop(); - do_reipl(); -} - -void machine_halt_smp(void) -{ - smp_send_stop(); - if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0) - __cpcmd(vmhalt_cmd, NULL, 0, NULL); - signal_processor(smp_processor_id(), sigp_stop_and_store_status); - for (;;); -} - -void machine_power_off_smp(void) -{ - smp_send_stop(); - if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0) - __cpcmd(vmpoff_cmd, NULL, 0, NULL); - signal_processor(smp_processor_id(), sigp_stop_and_store_status); - for (;;); -} - -/* * This is the main routine where commands issued by other * cpus are handled. */ @@ -355,6 +372,13 @@ void smp_ctl_clear_bit(int cr, int bit) } EXPORT_SYMBOL(smp_ctl_clear_bit); +/* + * In early ipl state a temp. logically cpu number is needed, so the sigp + * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on + * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1. + */ +#define CPU_INIT_NO 1 + #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) /* @@ -375,9 +399,10 @@ static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS); return; } - zfcpdump_save_areas[cpu] = alloc_bootmem(sizeof(union save_area)); - __cpu_logical_map[1] = (__u16) phy_cpu; - while (signal_processor(1, sigp_stop_and_store_status) == sigp_busy) + zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL); + __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu; + while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) == + sigp_busy) cpu_relax(); memcpy(zfcpdump_save_areas[cpu], (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE, @@ -397,32 +422,155 @@ static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { } #endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */ -/* - * Lets check how many CPUs we have. - */ -static unsigned int __init smp_count_cpus(void) +static int cpu_stopped(int cpu) { - unsigned int cpu, num_cpus; - __u16 boot_cpu_addr; + __u32 status; - /* - * cpu 0 is the boot cpu. See smp_prepare_boot_cpu. - */ + /* Check for stopped state */ + if (signal_processor_ps(&status, 0, cpu, sigp_sense) == + sigp_status_stored) { + if (status & 0x40) + return 1; + } + return 0; +} + +static int cpu_known(int cpu_id) +{ + int cpu; + + for_each_present_cpu(cpu) { + if (__cpu_logical_map[cpu] == cpu_id) + return 1; + } + return 0; +} + +static int smp_rescan_cpus_sigp(cpumask_t avail) +{ + int cpu_id, logical_cpu; + + logical_cpu = first_cpu(avail); + if (logical_cpu == NR_CPUS) + return 0; + for (cpu_id = 0; cpu_id <= 65535; cpu_id++) { + if (cpu_known(cpu_id)) + continue; + __cpu_logical_map[logical_cpu] = cpu_id; + if (!cpu_stopped(logical_cpu)) + continue; + cpu_set(logical_cpu, cpu_present_map); + smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; + logical_cpu = next_cpu(logical_cpu, avail); + if (logical_cpu == NR_CPUS) + break; + } + return 0; +} + +static int smp_rescan_cpus_sclp(cpumask_t avail) +{ + struct sclp_cpu_info *info; + int cpu_id, logical_cpu, cpu; + int rc; + + logical_cpu = first_cpu(avail); + if (logical_cpu == NR_CPUS) + return 0; + info = kmalloc(sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + rc = sclp_get_cpu_info(info); + if (rc) + goto out; + for (cpu = 0; cpu < info->combined; cpu++) { + if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) + continue; + cpu_id = info->cpu[cpu].address; + if (cpu_known(cpu_id)) + continue; + __cpu_logical_map[logical_cpu] = cpu_id; + cpu_set(logical_cpu, cpu_present_map); + if (cpu >= info->configured) + smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY; + else + smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED; + logical_cpu = next_cpu(logical_cpu, avail); + if (logical_cpu == NR_CPUS) + break; + } +out: + kfree(info); + return rc; +} + +static int smp_rescan_cpus(void) +{ + cpumask_t avail; + + cpus_xor(avail, cpu_possible_map, cpu_present_map); + if (smp_use_sigp_detection) + return smp_rescan_cpus_sigp(avail); + else + return smp_rescan_cpus_sclp(avail); +} + +static void __init smp_detect_cpus(void) +{ + unsigned int cpu, c_cpus, s_cpus; + struct sclp_cpu_info *info; + u16 boot_cpu_addr, cpu_addr; + + c_cpus = 1; + s_cpus = 0; boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr; - current_thread_info()->cpu = 0; - num_cpus = 1; - for (cpu = 0; cpu <= 65535; cpu++) { - if ((__u16) cpu == boot_cpu_addr) + info = kmalloc(sizeof(*info), GFP_KERNEL); + if (!info) + panic("smp_detect_cpus failed to allocate memory\n"); + /* Use sigp detection algorithm if sclp doesn't work. */ + if (sclp_get_cpu_info(info)) { + smp_use_sigp_detection = 1; + for (cpu = 0; cpu <= 65535; cpu++) { + if (cpu == boot_cpu_addr) + continue; + __cpu_logical_map[CPU_INIT_NO] = cpu; + if (!cpu_stopped(CPU_INIT_NO)) + continue; + smp_get_save_area(c_cpus, cpu); + c_cpus++; + } + goto out; + } + + if (info->has_cpu_type) { + for (cpu = 0; cpu < info->combined; cpu++) { + if (info->cpu[cpu].address == boot_cpu_addr) { + smp_cpu_type = info->cpu[cpu].type; + break; + } + } + } + + for (cpu = 0; cpu < info->combined; cpu++) { + if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type) + continue; + cpu_addr = info->cpu[cpu].address; + if (cpu_addr == boot_cpu_addr) continue; - __cpu_logical_map[1] = (__u16) cpu; - if (signal_processor(1, sigp_sense) == sigp_not_operational) + __cpu_logical_map[CPU_INIT_NO] = cpu_addr; + if (!cpu_stopped(CPU_INIT_NO)) { + s_cpus++; continue; - smp_get_save_area(num_cpus, cpu); - num_cpus++; + } + smp_get_save_area(c_cpus, cpu_addr); + c_cpus++; } - printk("Detected %d CPU's\n", (int) num_cpus); - printk("Boot cpu address %2X\n", boot_cpu_addr); - return num_cpus; +out: + kfree(info); + printk(KERN_INFO "CPUs: %d configured, %d standby\n", c_cpus, s_cpus); + get_online_cpus(); + smp_rescan_cpus(); + put_online_cpus(); } /* @@ -453,8 +601,6 @@ int __cpuinit start_secondary(void *cpuvoid) return 0; } -DEFINE_PER_CPU(struct s390_idle_data, s390_idle); - static void __init smp_create_idle(unsigned int cpu) { struct task_struct *p; @@ -470,37 +616,82 @@ static void __init smp_create_idle(unsigned int cpu) spin_lock_init(&(&per_cpu(s390_idle, cpu))->lock); } -static int cpu_stopped(int cpu) +static int __cpuinit smp_alloc_lowcore(int cpu) { - __u32 status; + unsigned long async_stack, panic_stack; + struct _lowcore *lowcore; + int lc_order; + + lc_order = sizeof(long) == 8 ? 1 : 0; + lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order); + if (!lowcore) + return -ENOMEM; + async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); + if (!async_stack) + goto out_async_stack; + panic_stack = __get_free_page(GFP_KERNEL); + if (!panic_stack) + goto out_panic_stack; + + *lowcore = S390_lowcore; + lowcore->async_stack = async_stack + ASYNC_SIZE; + lowcore->panic_stack = panic_stack + PAGE_SIZE; - /* Check for stopped state */ - if (signal_processor_ps(&status, 0, cpu, sigp_sense) == - sigp_status_stored) { - if (status & 0x40) - return 1; +#ifndef CONFIG_64BIT + if (MACHINE_HAS_IEEE) { + unsigned long save_area; + + save_area = get_zeroed_page(GFP_KERNEL); + if (!save_area) + goto out_save_area; + lowcore->extended_save_area_addr = (u32) save_area; } +#endif + lowcore_ptr[cpu] = lowcore; return 0; + +#ifndef CONFIG_64BIT +out_save_area: + free_page(panic_stack); +#endif +out_panic_stack: + free_pages(async_stack, ASYNC_ORDER); +out_async_stack: + free_pages((unsigned long) lowcore, lc_order); + return -ENOMEM; } -/* Upping and downing of CPUs */ +#ifdef CONFIG_HOTPLUG_CPU +static void smp_free_lowcore(int cpu) +{ + struct _lowcore *lowcore; + int lc_order; + + lc_order = sizeof(long) == 8 ? 1 : 0; + lowcore = lowcore_ptr[cpu]; +#ifndef CONFIG_64BIT + if (MACHINE_HAS_IEEE) + free_page((unsigned long) lowcore->extended_save_area_addr); +#endif + free_page(lowcore->panic_stack - PAGE_SIZE); + free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER); + free_pages((unsigned long) lowcore, lc_order); + lowcore_ptr[cpu] = NULL; +} +#endif /* CONFIG_HOTPLUG_CPU */ -int __cpu_up(unsigned int cpu) +/* Upping and downing of CPUs */ +int __cpuinit __cpu_up(unsigned int cpu) { struct task_struct *idle; struct _lowcore *cpu_lowcore; struct stack_frame *sf; sigp_ccode ccode; - int curr_cpu; - for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) { - __cpu_logical_map[cpu] = (__u16) curr_cpu; - if (cpu_stopped(cpu)) - break; - } - - if (!cpu_stopped(cpu)) - return -ENODEV; + if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED) + return -EIO; + if (smp_alloc_lowcore(cpu)) + return -ENOMEM; ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]), cpu, sigp_set_prefix); @@ -515,6 +706,7 @@ int __cpu_up(unsigned int cpu) cpu_lowcore = lowcore_ptr[cpu]; cpu_lowcore->kernel_stack = (unsigned long) task_stack_page(idle) + THREAD_SIZE; + cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle); sf = (struct stack_frame *) (cpu_lowcore->kernel_stack - sizeof(struct pt_regs) - sizeof(struct stack_frame)); @@ -528,6 +720,8 @@ int __cpu_up(unsigned int cpu) cpu_lowcore->percpu_offset = __per_cpu_offset[cpu]; cpu_lowcore->current_task = (unsigned long) idle; cpu_lowcore->cpu_data.cpu_nr = cpu; + cpu_lowcore->softirq_pending = 0; + cpu_lowcore->ext_call_fast = 0; eieio(); while (signal_processor(cpu, sigp_restart) == sigp_busy) @@ -538,44 +732,20 @@ int __cpu_up(unsigned int cpu) return 0; } -static unsigned int __initdata additional_cpus; -static unsigned int __initdata possible_cpus; - -void __init smp_setup_cpu_possible_map(void) +static int __init setup_possible_cpus(char *s) { - unsigned int phy_cpus, pos_cpus, cpu; - - phy_cpus = smp_count_cpus(); - pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS); - - if (possible_cpus) - pos_cpus = min(possible_cpus, (unsigned int) NR_CPUS); + int pcpus, cpu; - for (cpu = 0; cpu < pos_cpus; cpu++) + pcpus = simple_strtoul(s, NULL, 0); + cpu_possible_map = cpumask_of_cpu(0); + for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++) cpu_set(cpu, cpu_possible_map); - - phy_cpus = min(phy_cpus, pos_cpus); - - for (cpu = 0; cpu < phy_cpus; cpu++) - cpu_set(cpu, cpu_present_map); -} - -#ifdef CONFIG_HOTPLUG_CPU - -static int __init setup_additional_cpus(char *s) -{ - additional_cpus = simple_strtoul(s, NULL, 0); - return 0; -} -early_param("additional_cpus", setup_additional_cpus); - -static int __init setup_possible_cpus(char *s) -{ - possible_cpus = simple_strtoul(s, NULL, 0); return 0; } early_param("possible_cpus", setup_possible_cpus); +#ifdef CONFIG_HOTPLUG_CPU + int __cpu_disable(void) { struct ec_creg_mask_parms cr_parms; @@ -612,7 +782,8 @@ void __cpu_die(unsigned int cpu) /* Wait until target cpu is down */ while (!smp_cpu_not_running(cpu)) cpu_relax(); - printk("Processor %d spun down\n", cpu); + smp_free_lowcore(cpu); + printk(KERN_INFO "Processor %d spun down\n", cpu); } void cpu_die(void) @@ -625,49 +796,19 @@ void cpu_die(void) #endif /* CONFIG_HOTPLUG_CPU */ -/* - * Cycle through the processors and setup structures. - */ - void __init smp_prepare_cpus(unsigned int max_cpus) { - unsigned long stack; unsigned int cpu; - int i; + + smp_detect_cpus(); /* request the 0x1201 emergency signal external interrupt */ if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0) panic("Couldn't request external interrupt 0x1201"); memset(lowcore_ptr, 0, sizeof(lowcore_ptr)); - /* - * Initialize prefix pages and stacks for all possible cpus - */ print_cpu_info(&S390_lowcore.cpu_data); + smp_alloc_lowcore(smp_processor_id()); - for_each_possible_cpu(i) { - lowcore_ptr[i] = (struct _lowcore *) - __get_free_pages(GFP_KERNEL | GFP_DMA, - sizeof(void*) == 8 ? 1 : 0); - stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); - if (!lowcore_ptr[i] || !stack) - panic("smp_boot_cpus failed to allocate memory\n"); - - *(lowcore_ptr[i]) = S390_lowcore; - lowcore_ptr[i]->async_stack = stack + ASYNC_SIZE; - stack = __get_free_pages(GFP_KERNEL, 0); - if (!stack) - panic("smp_boot_cpus failed to allocate memory\n"); - lowcore_ptr[i]->panic_stack = stack + PAGE_SIZE; -#ifndef CONFIG_64BIT - if (MACHINE_HAS_IEEE) { - lowcore_ptr[i]->extended_save_area_addr = - (__u32) __get_free_pages(GFP_KERNEL, 0); - if (!lowcore_ptr[i]->extended_save_area_addr) - panic("smp_boot_cpus failed to " - "allocate memory\n"); - } -#endif - } #ifndef CONFIG_64BIT if (MACHINE_HAS_IEEE) ctl_set_bit(14, 29); /* enable extended save area */ @@ -683,15 +824,17 @@ void __init smp_prepare_boot_cpu(void) { BUG_ON(smp_processor_id() != 0); + current_thread_info()->cpu = 0; + cpu_set(0, cpu_present_map); cpu_set(0, cpu_online_map); S390_lowcore.percpu_offset = __per_cpu_offset[0]; current_set[0] = current; + smp_cpu_state[0] = CPU_STATE_CONFIGURED; spin_lock_init(&(&__get_cpu_var(s390_idle))->lock); } void __init smp_cpus_done(unsigned int max_cpus) { - cpu_present_map = cpu_possible_map; } /* @@ -705,7 +848,79 @@ int setup_profiling_timer(unsigned int multiplier) return 0; } -static DEFINE_PER_CPU(struct cpu, cpu_devices); +#ifdef CONFIG_HOTPLUG_CPU +static ssize_t cpu_configure_show(struct sys_device *dev, char *buf) +{ + ssize_t count; + + mutex_lock(&smp_cpu_state_mutex); + count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]); + mutex_unlock(&smp_cpu_state_mutex); + return count; +} + +static ssize_t cpu_configure_store(struct sys_device *dev, const char *buf, + size_t count) +{ + int cpu = dev->id; + int val, rc; + char delim; + + if (sscanf(buf, "%d %c", &val, &delim) != 1) + return -EINVAL; + if (val != 0 && val != 1) + return -EINVAL; + + mutex_lock(&smp_cpu_state_mutex); + get_online_cpus(); + rc = -EBUSY; + if (cpu_online(cpu)) + goto out; + rc = 0; + switch (val) { + case 0: + if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) { + rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]); + if (!rc) + smp_cpu_state[cpu] = CPU_STATE_STANDBY; + } + break; + case 1: + if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) { + rc = sclp_cpu_configure(__cpu_logical_map[cpu]); + if (!rc) + smp_cpu_state[cpu] = CPU_STATE_CONFIGURED; + } + break; + default: + break; + } +out: + put_online_cpus(); + mutex_unlock(&smp_cpu_state_mutex); + return rc ? rc : count; +} +static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); +#endif /* CONFIG_HOTPLUG_CPU */ + +static ssize_t show_cpu_address(struct sys_device *dev, char *buf) +{ + return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]); +} +static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL); + + +static struct attribute *cpu_common_attrs[] = { +#ifdef CONFIG_HOTPLUG_CPU + &attr_configure.attr, +#endif + &attr_address.attr, + NULL, +}; + +static struct attribute_group cpu_common_attr_group = { + .attrs = cpu_common_attrs, +}; static ssize_t show_capability(struct sys_device *dev, char *buf) { @@ -750,15 +965,15 @@ static ssize_t show_idle_time(struct sys_device *dev, char *buf) } static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL); -static struct attribute *cpu_attrs[] = { +static struct attribute *cpu_online_attrs[] = { &attr_capability.attr, &attr_idle_count.attr, &attr_idle_time_us.attr, NULL, }; -static struct attribute_group cpu_attr_group = { - .attrs = cpu_attrs, +static struct attribute_group cpu_online_attr_group = { + .attrs = cpu_online_attrs, }; static int __cpuinit smp_cpu_notify(struct notifier_block *self, @@ -778,12 +993,12 @@ static int __cpuinit smp_cpu_notify(struct notifier_block *self, idle->idle_time = 0; idle->idle_count = 0; spin_unlock_irq(&idle->lock); - if (sysfs_create_group(&s->kobj, &cpu_attr_group)) + if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) return NOTIFY_BAD; break; case CPU_DEAD: case CPU_DEAD_FROZEN: - sysfs_remove_group(&s->kobj, &cpu_attr_group); + sysfs_remove_group(&s->kobj, &cpu_online_attr_group); break; } return NOTIFY_OK; @@ -793,6 +1008,62 @@ static struct notifier_block __cpuinitdata smp_cpu_nb = { .notifier_call = smp_cpu_notify, }; +static int smp_add_present_cpu(int cpu) +{ + struct cpu *c = &per_cpu(cpu_devices, cpu); + struct sys_device *s = &c->sysdev; + int rc; + + c->hotpluggable = 1; + rc = register_cpu(c, cpu); + if (rc) + goto out; + rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); + if (rc) + goto out_cpu; + if (!cpu_online(cpu)) + goto out; + rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group); + if (!rc) + return 0; + sysfs_remove_group(&s->kobj, &cpu_common_attr_group); +out_cpu: +#ifdef CONFIG_HOTPLUG_CPU + unregister_cpu(c); +#endif +out: + return rc; +} + +#ifdef CONFIG_HOTPLUG_CPU +static ssize_t rescan_store(struct sys_device *dev, const char *buf, + size_t count) +{ + cpumask_t newcpus; + int cpu; + int rc; + + mutex_lock(&smp_cpu_state_mutex); + get_online_cpus(); + newcpus = cpu_present_map; + rc = smp_rescan_cpus(); + if (rc) + goto out; + cpus_andnot(newcpus, cpu_present_map, newcpus); + for_each_cpu_mask(cpu, newcpus) { + rc = smp_add_present_cpu(cpu); + if (rc) + cpu_clear(cpu, cpu_present_map); + } + rc = 0; +out: + put_online_cpus(); + mutex_unlock(&smp_cpu_state_mutex); + return rc ? rc : count; +} +static SYSDEV_ATTR(rescan, 0200, NULL, rescan_store); +#endif /* CONFIG_HOTPLUG_CPU */ + static int __init topology_init(void) { int cpu; @@ -800,16 +1071,14 @@ static int __init topology_init(void) register_cpu_notifier(&smp_cpu_nb); - for_each_possible_cpu(cpu) { - struct cpu *c = &per_cpu(cpu_devices, cpu); - struct sys_device *s = &c->sysdev; - - c->hotpluggable = 1; - register_cpu(c, cpu); - if (!cpu_online(cpu)) - continue; - s = &c->sysdev; - rc = sysfs_create_group(&s->kobj, &cpu_attr_group); +#ifdef CONFIG_HOTPLUG_CPU + rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj, + &attr_rescan.attr); + if (rc) + return rc; +#endif + for_each_present_cpu(cpu) { + rc = smp_add_present_cpu(cpu); if (rc) return rc; } diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c index 8ed16a83fba7..52b8342c6bf2 100644 --- a/arch/s390/kernel/traps.c +++ b/arch/s390/kernel/traps.c @@ -31,6 +31,7 @@ #include <linux/reboot.h> #include <linux/kprobes.h> #include <linux/bug.h> +#include <linux/utsname.h> #include <asm/system.h> #include <asm/uaccess.h> #include <asm/io.h> @@ -168,9 +169,16 @@ void show_stack(struct task_struct *task, unsigned long *sp) */ void dump_stack(void) { + printk("CPU: %d %s %s %.*s\n", + task_thread_info(current)->cpu, print_tainted(), + init_utsname()->release, + (int)strcspn(init_utsname()->version, " "), + init_utsname()->version); + printk("Process %s (pid: %d, task: %p, ksp: %p)\n", + current->comm, current->pid, current, + (void *) current->thread.ksp); show_stack(NULL, NULL); } - EXPORT_SYMBOL(dump_stack); static inline int mask_bits(struct pt_regs *regs, unsigned long bits) @@ -258,8 +266,14 @@ void die(const char * str, struct pt_regs * regs, long err) console_verbose(); spin_lock_irq(&die_lock); bust_spinlocks(1); - printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); - print_modules(); + printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter); +#ifdef CONFIG_PREEMPT + printk("PREEMPT "); +#endif +#ifdef CONFIG_SMP + printk("SMP"); +#endif + printk("\n"); notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV); show_regs(regs); bust_spinlocks(0); diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S index 849120e3e28a..936159199346 100644 --- a/arch/s390/kernel/vmlinux.lds.S +++ b/arch/s390/kernel/vmlinux.lds.S @@ -17,6 +17,12 @@ ENTRY(_start) jiffies = jiffies_64; #endif +PHDRS { + text PT_LOAD FLAGS(5); /* R_E */ + data PT_LOAD FLAGS(7); /* RWE */ + note PT_NOTE FLAGS(0); /* ___ */ +} + SECTIONS { . = 0x00000000; @@ -33,6 +39,9 @@ SECTIONS _etext = .; /* End of text section */ + NOTES :text :note + BUG_TABLE :text + RODATA #ifdef CONFIG_SHARED_KERNEL @@ -49,9 +58,6 @@ SECTIONS __stop___ex_table = .; } - NOTES - BUG_TABLE - .data : { /* Data */ DATA_DATA CONSTRUCTORS diff --git a/arch/s390/lib/spinlock.c b/arch/s390/lib/spinlock.c index 8d76403fcf89..e41f4008afc5 100644 --- a/arch/s390/lib/spinlock.c +++ b/arch/s390/lib/spinlock.c @@ -39,7 +39,7 @@ static inline void _raw_yield_cpu(int cpu) _raw_yield(); } -void _raw_spin_lock_wait(raw_spinlock_t *lp, unsigned int pc) +void _raw_spin_lock_wait(raw_spinlock_t *lp) { int count = spin_retry; unsigned int cpu = ~smp_processor_id(); @@ -53,15 +53,36 @@ void _raw_spin_lock_wait(raw_spinlock_t *lp, unsigned int pc) } if (__raw_spin_is_locked(lp)) continue; - if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0) { - lp->owner_pc = pc; + if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0) return; - } } } EXPORT_SYMBOL(_raw_spin_lock_wait); -int _raw_spin_trylock_retry(raw_spinlock_t *lp, unsigned int pc) +void _raw_spin_lock_wait_flags(raw_spinlock_t *lp, unsigned long flags) +{ + int count = spin_retry; + unsigned int cpu = ~smp_processor_id(); + + local_irq_restore(flags); + while (1) { + if (count-- <= 0) { + unsigned int owner = lp->owner_cpu; + if (owner != 0) + _raw_yield_cpu(~owner); + count = spin_retry; + } + if (__raw_spin_is_locked(lp)) + continue; + local_irq_disable(); + if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0) + return; + local_irq_restore(flags); + } +} +EXPORT_SYMBOL(_raw_spin_lock_wait_flags); + +int _raw_spin_trylock_retry(raw_spinlock_t *lp) { unsigned int cpu = ~smp_processor_id(); int count; @@ -69,10 +90,8 @@ int _raw_spin_trylock_retry(raw_spinlock_t *lp, unsigned int pc) for (count = spin_retry; count > 0; count--) { if (__raw_spin_is_locked(lp)) continue; - if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0) { - lp->owner_pc = pc; + if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0) return 1; - } } return 0; } diff --git a/arch/s390/mm/extmem.c b/arch/s390/mm/extmem.c index 394980b05e6f..880b0ebf894b 100644 --- a/arch/s390/mm/extmem.c +++ b/arch/s390/mm/extmem.c @@ -83,7 +83,7 @@ struct dcss_segment { }; static DEFINE_MUTEX(dcss_lock); -static struct list_head dcss_list = LIST_HEAD_INIT(dcss_list); +static LIST_HEAD(dcss_list); static char *segtype_string[] = { "SW", "EW", "SR", "ER", "SN", "EN", "SC", "EW/EN-MIXED" }; diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c index fb9c5a85aa56..79d13a166a3d 100644 --- a/arch/s390/mm/vmem.c +++ b/arch/s390/mm/vmem.c @@ -15,10 +15,6 @@ #include <asm/setup.h> #include <asm/tlbflush.h> -unsigned long vmalloc_end; -EXPORT_SYMBOL(vmalloc_end); - -static struct page *vmem_map; static DEFINE_MUTEX(vmem_mutex); struct memory_segment { @@ -188,8 +184,8 @@ static int vmem_add_mem_map(unsigned long start, unsigned long size) pte_t pte; int ret = -ENOMEM; - map_start = vmem_map + PFN_DOWN(start); - map_end = vmem_map + PFN_DOWN(start + size); + map_start = VMEM_MAP + PFN_DOWN(start); + map_end = VMEM_MAP + PFN_DOWN(start + size); start_addr = (unsigned long) map_start & PAGE_MASK; end_addr = PFN_ALIGN((unsigned long) map_end); @@ -240,10 +236,10 @@ static int vmem_add_mem(unsigned long start, unsigned long size) { int ret; - ret = vmem_add_range(start, size); + ret = vmem_add_mem_map(start, size); if (ret) return ret; - return vmem_add_mem_map(start, size); + return vmem_add_range(start, size); } /* @@ -254,7 +250,7 @@ static int insert_memory_segment(struct memory_segment *seg) { struct memory_segment *tmp; - if (PFN_DOWN(seg->start + seg->size) > max_pfn || + if (seg->start + seg->size >= VMALLOC_START || seg->start + seg->size < seg->start) return -ERANGE; @@ -357,17 +353,15 @@ out: /* * map whole physical memory to virtual memory (identity mapping) + * we reserve enough space in the vmalloc area for vmemmap to hotplug + * additional memory segments. */ void __init vmem_map_init(void) { - unsigned long map_size; int i; - map_size = ALIGN(max_low_pfn, MAX_ORDER_NR_PAGES) * sizeof(struct page); - vmalloc_end = PFN_ALIGN(VMALLOC_END_INIT) - PFN_ALIGN(map_size); - vmem_map = (struct page *) vmalloc_end; - NODE_DATA(0)->node_mem_map = vmem_map; - + BUILD_BUG_ON((unsigned long)VMEM_MAP + VMEM_MAP_SIZE > VMEM_MAP_MAX); + NODE_DATA(0)->node_mem_map = VMEM_MAP; for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) vmem_add_mem(memory_chunk[i].addr, memory_chunk[i].size); } @@ -382,7 +376,7 @@ static int __init vmem_convert_memory_chunk(void) int i; mutex_lock(&vmem_mutex); - for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) { + for (i = 0; i < MEMORY_CHUNKS; i++) { if (!memory_chunk[i].size) continue; seg = kzalloc(sizeof(*seg), GFP_KERNEL); diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 496d635f89b2..1cd9c8fd927d 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -6,8 +6,7 @@ mainmenu "Linux/SuperH Kernel Configuration" config SUPERH - bool - default y + def_bool y select EMBEDDED help The SuperH is a RISC processor targeted for use in embedded systems @@ -15,36 +14,36 @@ config SUPERH gaming console. The SuperH port has a home page at <http://www.linux-sh.org/>. +config SUPERH32 + def_bool !SUPERH64 + +config SUPERH64 + def_bool y if CPU_SH5 + config RWSEM_GENERIC_SPINLOCK - bool - default y + def_bool y config RWSEM_XCHGADD_ALGORITHM bool config GENERIC_BUG def_bool y - depends on BUG + depends on BUG && SUPERH32 config GENERIC_FIND_NEXT_BIT - bool - default y + def_bool y config GENERIC_HWEIGHT - bool - default y + def_bool y config GENERIC_HARDIRQS - bool - default y + def_bool y config GENERIC_IRQ_PROBE - bool - default y + def_bool y config GENERIC_CALIBRATE_DELAY - bool - default y + def_bool y config GENERIC_IOMAP bool @@ -75,20 +74,16 @@ config ARCH_MAY_HAVE_PC_FDC bool config STACKTRACE_SUPPORT - bool - default y + def_bool y config LOCKDEP_SUPPORT - bool - default y + def_bool y config ARCH_HAS_ILOG2_U32 - bool - default n + def_bool n config ARCH_HAS_ILOG2_U64 - bool - default n + def_bool n config ARCH_NO_VIRT_TO_BUS def_bool y @@ -97,110 +92,234 @@ source "init/Kconfig" menu "System type" -source "arch/sh/mm/Kconfig" +# +# Processor families +# +config CPU_SH2 + bool -menu "Processor features" +config CPU_SH2A + bool + select CPU_SH2 + +config CPU_SH3 + bool + select CPU_HAS_INTEVT + select CPU_HAS_SR_RB + +config CPU_SH4 + bool + select CPU_HAS_INTEVT + select CPU_HAS_SR_RB + select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2 + select CPU_HAS_FPU if !CPU_SH4AL_DSP + +config CPU_SH4A + bool + select CPU_SH4 + +config CPU_SH4AL_DSP + bool + select CPU_SH4A + select CPU_HAS_DSP + +config CPU_SH5 + bool + select CPU_HAS_FPU + +config CPU_SHX2 + bool + +config CPU_SHX3 + bool choice - prompt "Endianess selection" - default CPU_LITTLE_ENDIAN - help - Some SuperH machines can be configured for either little or big - endian byte order. These modes require different kernels. + prompt "Processor sub-type selection" -config CPU_LITTLE_ENDIAN - bool "Little Endian" +# +# Processor subtypes +# -config CPU_BIG_ENDIAN - bool "Big Endian" +# SH-2 Processor Support -endchoice +config CPU_SUBTYPE_SH7619 + bool "Support SH7619 processor" + select CPU_SH2 + +# SH-2A Processor Support + +config CPU_SUBTYPE_SH7203 + bool "Support SH7203 processor" + select CPU_SH2A + select CPU_HAS_FPU + +config CPU_SUBTYPE_SH7206 + bool "Support SH7206 processor" + select CPU_SH2A -config SH_FPU - bool "FPU support" - depends on CPU_HAS_FPU - default y +config CPU_SUBTYPE_SH7263 + bool "Support SH7263 processor" + select CPU_SH2A + select CPU_HAS_FPU + +# SH-3 Processor Support + +config CPU_SUBTYPE_SH7705 + bool "Support SH7705 processor" + select CPU_SH3 + +config CPU_SUBTYPE_SH7706 + bool "Support SH7706 processor" + select CPU_SH3 help - Selecting this option will enable support for SH processors that - have FPU units (ie, SH77xx). + Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. - This option must be set in order to enable the FPU. +config CPU_SUBTYPE_SH7707 + bool "Support SH7707 processor" + select CPU_SH3 + help + Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. -config SH_FPU_EMU - bool "FPU emulation support" - depends on !SH_FPU && EXPERIMENTAL - default n +config CPU_SUBTYPE_SH7708 + bool "Support SH7708 processor" + select CPU_SH3 help - Selecting this option will enable support for software FPU emulation. - Most SH-3 users will want to say Y here, whereas most SH-4 users will - want to say N. + Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or + if you have a 100 Mhz SH-3 HD6417708R CPU. -config SH_DSP - bool "DSP support" - depends on CPU_HAS_DSP - default y +config CPU_SUBTYPE_SH7709 + bool "Support SH7709 processor" + select CPU_SH3 help - Selecting this option will enable support for SH processors that - have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). + Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. - This option must be set in order to enable the DSP. +config CPU_SUBTYPE_SH7710 + bool "Support SH7710 processor" + select CPU_SH3 + select CPU_HAS_DSP + help + Select SH7710 if you have a SH3-DSP SH7710 CPU. -config SH_ADC - bool "ADC support" - depends on CPU_SH3 - default y +config CPU_SUBTYPE_SH7712 + bool "Support SH7712 processor" + select CPU_SH3 + select CPU_HAS_DSP help - Selecting this option will allow the Linux kernel to use SH3 on-chip - ADC module. + Select SH7712 if you have a SH3-DSP SH7712 CPU. - If unsure, say N. +config CPU_SUBTYPE_SH7720 + bool "Support SH7720 processor" + select CPU_SH3 + select CPU_HAS_DSP + help + Select SH7720 if you have a SH3-DSP SH7720 CPU. -config SH_STORE_QUEUES - bool "Support for Store Queues" - depends on CPU_SH4 +config CPU_SUBTYPE_SH7721 + bool "Support SH7721 processor" + select CPU_SH3 + select CPU_HAS_DSP help - Selecting this option will enable an in-kernel API for manipulating - the store queues integrated in the SH-4 processors. + Select SH7721 if you have a SH3-DSP SH7721 CPU. -config SPECULATIVE_EXECUTION - bool "Speculative subroutine return" - depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL +# SH-4 Processor Support + +config CPU_SUBTYPE_SH7750 + bool "Support SH7750 processor" + select CPU_SH4 help - This enables support for a speculative instruction fetch for - subroutine return. There are various pitfalls associated with - this, as outlined in the SH7780 hardware manual. + Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. - If unsure, say N. +config CPU_SUBTYPE_SH7091 + bool "Support SH7091 processor" + select CPU_SH4 + help + Select SH7091 if you have an SH-4 based Sega device (such as + the Dreamcast, Naomi, and Naomi 2). -config CPU_HAS_INTEVT - bool +config CPU_SUBTYPE_SH7750R + bool "Support SH7750R processor" + select CPU_SH4 -config CPU_HAS_MASKREG_IRQ - bool +config CPU_SUBTYPE_SH7750S + bool "Support SH7750S processor" + select CPU_SH4 -config CPU_HAS_IPR_IRQ - bool +config CPU_SUBTYPE_SH7751 + bool "Support SH7751 processor" + select CPU_SH4 + help + Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, + or if you have a HD6417751R CPU. -config CPU_HAS_SR_RB - bool +config CPU_SUBTYPE_SH7751R + bool "Support SH7751R processor" + select CPU_SH4 + +config CPU_SUBTYPE_SH7760 + bool "Support SH7760 processor" + select CPU_SH4 + +config CPU_SUBTYPE_SH4_202 + bool "Support SH4-202 processor" + select CPU_SH4 + +# SH-4A Processor Support + +config CPU_SUBTYPE_SH7763 + bool "Support SH7763 processor" + select CPU_SH4A help - This will enable the use of SR.RB register bank usage. Processors - that are lacking this bit must have another method in place for - accomplishing what is taken care of by the banked registers. + Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. - See <file:Documentation/sh/register-banks.txt> for further - information on SR.RB and register banking in the kernel in general. +config CPU_SUBTYPE_SH7770 + bool "Support SH7770 processor" + select CPU_SH4A -config CPU_HAS_PTEA - bool +config CPU_SUBTYPE_SH7780 + bool "Support SH7780 processor" + select CPU_SH4A -config CPU_HAS_DSP - bool +config CPU_SUBTYPE_SH7785 + bool "Support SH7785 processor" + select CPU_SH4A + select CPU_SHX2 + select ARCH_SPARSEMEM_ENABLE + select SYS_SUPPORTS_NUMA -config CPU_HAS_FPU - bool +config CPU_SUBTYPE_SHX3 + bool "Support SH-X3 processor" + select CPU_SH4A + select CPU_SHX3 + select ARCH_SPARSEMEM_ENABLE + select SYS_SUPPORTS_NUMA + select SYS_SUPPORTS_SMP -endmenu +# SH4AL-DSP Processor Support + +config CPU_SUBTYPE_SH7343 + bool "Support SH7343 processor" + select CPU_SH4AL_DSP + +config CPU_SUBTYPE_SH7722 + bool "Support SH7722 processor" + select CPU_SH4AL_DSP + select CPU_SHX2 + select ARCH_SPARSEMEM_ENABLE + select SYS_SUPPORTS_NUMA + +# SH-5 Processor Support + +config CPU_SUBTYPE_SH5_101 + bool "Support SH5-101 processor" + select CPU_SH5 + +config CPU_SUBTYPE_SH5_103 + bool "Support SH5-103 processor" + +endchoice + +source "arch/sh/mm/Kconfig" +source "arch/sh/Kconfig.cpu" menu "Board support" @@ -321,13 +440,6 @@ config SH_SECUREEDGE5410 This includes both the OEM SecureEdge products as well as the SME product line. -config SH_HS7751RVOIP - bool "HS7751RVOIP" - depends on CPU_SUBTYPE_SH7751R - help - Select HS7751RVOIP if configuring for a Renesas Technology - Sales VoIP board. - config SH_7710VOIPGW bool "SH7710-VOIP-GW" depends on CPU_SUBTYPE_SH7710 @@ -343,6 +455,14 @@ config SH_RTS7751R2D Select RTS7751R2D if configuring for a Renesas Technology Sales SH-Graphics board. +config SH_SDK7780 + bool "SDK7780R3" + depends on CPU_SUBTYPE_SH7780 + select SYS_SUPPORTS_PCI + help + Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3 + evaluation board. + config SH_HIGHLANDER bool "Highlander" depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 @@ -399,41 +519,47 @@ config SH_MAGIC_PANEL_R2 help Select Magic Panel R2 if configuring for Magic Panel R2. +config SH_CAYMAN + bool "Hitachi Cayman" + depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103 + select SYS_SUPPORTS_PCI + endmenu -source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" source "arch/sh/boards/renesas/rts7751r2d/Kconfig" source "arch/sh/boards/renesas/r7780rp/Kconfig" +source "arch/sh/boards/renesas/sdk7780/Kconfig" source "arch/sh/boards/magicpanelr2/Kconfig" menu "Timer and clock configuration" config SH_TMU - bool "TMU timer support" + def_bool y + prompt "TMU timer support" depends on CPU_SH3 || CPU_SH4 select GENERIC_TIME select GENERIC_CLOCKEVENTS - default y help This enables the use of the TMU as the system timer. config SH_CMT - bool "CMT timer support" + def_bool y + prompt "CMT timer support" depends on CPU_SH2 - default y help This enables the use of the CMT as the system timer. config SH_MTU2 - bool "MTU2 timer support" + def_bool n + prompt "MTU2 timer support" depends on CPU_SH2A - default n help This enables the use of the MTU2 as the system timer. config SH_TIMER_IRQ int - default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 + default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \ + CPU_SUBTYPE_SH7763 default "86" if CPU_SUBTYPE_SH7619 default "140" if CPU_SUBTYPE_SH7206 default "16" @@ -445,7 +571,8 @@ config SH_PCLK_FREQ default "32000000" if CPU_SUBTYPE_SH7722 default "33333333" if CPU_SUBTYPE_SH7770 || \ CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ - CPU_SUBTYPE_SH7206 + CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \ + CPU_SUBTYPE_SH7263 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R default "66000000" if CPU_SUBTYPE_SH4_202 default "50000000" @@ -456,7 +583,7 @@ config SH_PCLK_FREQ config SH_CLK_MD int "CPU Mode Pin Setting" - depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206 + depends on CPU_SH2 default 6 if CPU_SUBTYPE_SH7206 default 5 if CPU_SUBTYPE_SH7619 default 0 @@ -490,9 +617,8 @@ source "arch/sh/drivers/Kconfig" endmenu config ISA_DMA_API - bool + def_bool y depends on SH_MPC1211 - default y menu "Kernel features" @@ -570,7 +696,7 @@ source "kernel/Kconfig.preempt" config GUSA def_bool y - depends on !SMP + depends on !SMP && SUPERH32 help This enables support for gUSA (general UserSpace Atomicity). This is the default implementation for both UP and non-ll/sc @@ -582,6 +708,16 @@ config GUSA This should only be disabled for special cases where alternate atomicity implementations exist. +config GUSA_RB + bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" + depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) + help + Enabling this option will allow the kernel to implement some + atomic operations using a software implemention of load-locked/ + store-conditional (LLSC). On machines which do not have hardware + LLSC, this should be more efficient than the other alternative of + disabling insterrupts around the atomic sequence. + endmenu menu "Boot options" diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu new file mode 100644 index 000000000000..d850184d0694 --- /dev/null +++ b/arch/sh/Kconfig.cpu @@ -0,0 +1,115 @@ +menu "Processor features" + +choice + prompt "Endianess selection" + default CPU_LITTLE_ENDIAN + help + Some SuperH machines can be configured for either little or big + endian byte order. These modes require different kernels. + +config CPU_LITTLE_ENDIAN + bool "Little Endian" + +config CPU_BIG_ENDIAN + bool "Big Endian" + +endchoice + +config SH_FPU + def_bool y + prompt "FPU support" + depends on CPU_HAS_FPU + help + Selecting this option will enable support for SH processors that + have FPU units (ie, SH77xx). + + This option must be set in order to enable the FPU. + +config SH64_FPU_DENORM_FLUSH + bool "Flush floating point denorms to zero" + depends on SH_FPU && SUPERH64 + +config SH_FPU_EMU + def_bool n + prompt "FPU emulation support" + depends on !SH_FPU && EXPERIMENTAL + help + Selecting this option will enable support for software FPU emulation. + Most SH-3 users will want to say Y here, whereas most SH-4 users will + want to say N. + +config SH_DSP + def_bool y + prompt "DSP support" + depends on CPU_HAS_DSP + help + Selecting this option will enable support for SH processors that + have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). + + This option must be set in order to enable the DSP. + +config SH_ADC + def_bool y + prompt "ADC support" + depends on CPU_SH3 + help + Selecting this option will allow the Linux kernel to use SH3 on-chip + ADC module. + + If unsure, say N. + +config SH_STORE_QUEUES + bool "Support for Store Queues" + depends on CPU_SH4 + help + Selecting this option will enable an in-kernel API for manipulating + the store queues integrated in the SH-4 processors. + +config SPECULATIVE_EXECUTION + bool "Speculative subroutine return" + depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL + help + This enables support for a speculative instruction fetch for + subroutine return. There are various pitfalls associated with + this, as outlined in the SH7780 hardware manual. + + If unsure, say N. + +config SH64_USER_MISALIGNED_FIXUP + def_bool y + prompt "Fixup misaligned loads/stores occurring in user mode" + depends on SUPERH64 + +config SH64_ID2815_WORKAROUND + bool "Include workaround for SH5-101 cut2 silicon defect ID2815" + depends on CPU_SUBTYPE_SH5_101 + +config CPU_HAS_INTEVT + bool + +config CPU_HAS_MASKREG_IRQ + bool + +config CPU_HAS_IPR_IRQ + bool + +config CPU_HAS_SR_RB + bool + help + This will enable the use of SR.RB register bank usage. Processors + that are lacking this bit must have another method in place for + accomplishing what is taken care of by the banked registers. + + See <file:Documentation/sh/register-banks.txt> for further + information on SR.RB and register banking in the kernel in general. + +config CPU_HAS_PTEA + bool + +config CPU_HAS_DSP + bool + +config CPU_HAS_FPU + bool + +endmenu diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 722da6851f56..f7c716166ce8 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -1,8 +1,7 @@ menu "Kernel hacking" config TRACE_IRQFLAGS_SUPPORT - bool - default y + def_bool y source "lib/Kconfig.debug" @@ -30,12 +29,13 @@ config EARLY_SCIF_CONSOLE config EARLY_SCIF_CONSOLE_PORT hex depends on EARLY_SCIF_CONSOLE - default "0xffe00000" if CPU_SUBTYPE_SH7780 + default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 default "0xffea0000" if CPU_SUBTYPE_SH7785 - default "0xfffe9800" if CPU_SUBTYPE_SH7206 + default "0xfffe8000" if CPU_SUBTYPE_SH7203 + default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 default "0xf8420000" if CPU_SUBTYPE_SH7619 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 - default "0xa4430000" if CPU_SUBTYPE_SH7720 + default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721 default "0xffc30000" if CPU_SUBTYPE_SHX3 default "0xffe80000" if CPU_SH4 default "0x00000000" @@ -62,7 +62,7 @@ config DEBUG_BOOTMEM config DEBUG_STACKOVERFLOW bool "Check for stack overflows" - depends on DEBUG_KERNEL + depends on DEBUG_KERNEL && SUPERH32 help This option will cause messages to be printed if free stack space drops below a certain limit. @@ -88,7 +88,7 @@ config 4KSTACKS config IRQSTACKS bool "Use separate kernel stacks when processing interrupts" - depends on DEBUG_KERNEL + depends on DEBUG_KERNEL && SUPERH32 help If you say Y here the kernel will use separate kernel stacks for handling hard and soft interrupts. This can help avoid @@ -119,19 +119,19 @@ config COMPILE_OPTIONS depends on MORE_COMPILE_OPTIONS config KGDB_NMI - bool "Enter KGDB on NMI" - default n + def_bool n + prompt "Enter KGDB on NMI" config SH_KGDB_CONSOLE - bool "Console messages through GDB" + def_bool n + prompt "Console messages through GDB" depends on !SERIAL_SH_SCI_CONSOLE && SERIAL_SH_SCI=y select SERIAL_CORE_CONSOLE - default n config KGDB_SYSRQ - bool "Allow SysRq 'G' to enter KGDB" + def_bool y + prompt "Allow SysRq 'G' to enter KGDB" depends on MAGIC_SYSRQ - default y comment "Serial port setup" @@ -174,4 +174,29 @@ endchoice endmenu +if SUPERH64 + +config SH64_PROC_ASIDS + bool "Debug: report ASIDs through /proc/asids" + depends on PROC_FS + +config SH64_SR_WATCH + bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" + +config POOR_MANS_STRACE + bool "Debug: enable rudimentary strace facility" + help + This option allows system calls to be traced to the console. It also + aids in detecting kernel stack underflow. It is useful for debugging + early-userland problems (e.g. init incurring fatal exceptions.) + +config SH_ALPHANUMERIC + bool "Enable debug outputs to on-board alphanumeric display" + depends on SH_CAYMAN + +config SH_NO_BSS_INIT + bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" + +endif + endmenu diff --git a/arch/sh/Makefile b/arch/sh/Makefile index e189fae8b60c..17fc36186bf4 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -1,17 +1,13 @@ -# $Id: Makefile,v 1.35 2004/04/15 03:39:20 sugioka Exp $ # -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. +# arch/sh/Makefile # # Copyright (C) 1999 Kaz Kojima # Copyright (C) 2002, 2003, 2004 Paul Mundt # Copyright (C) 2002 M. R. Brown # -# This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. Remember to do have actions -# for "archclean" and "archdep" for cleaning up and making dependencies for -# this architecture +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. # isa-y := any isa-$(CONFIG_SH_DSP) := sh @@ -21,13 +17,9 @@ isa-$(CONFIG_CPU_SH3) := sh3 isa-$(CONFIG_CPU_SH4) := sh4 isa-$(CONFIG_CPU_SH4A) := sh4a isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al - +isa-$(CONFIG_CPU_SH5) := shmedia isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp -ifndef CONFIG_MMU -isa-y := $(isa-y)-nommu -endif - ifndef CONFIG_SH_DSP ifndef CONFIG_SH_FPU isa-y := $(isa-y)-nofpu @@ -44,6 +36,7 @@ cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \ $(call cc-option,-mno-implicit-fp,-m4-nofpu) cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ $(call cc-option,-m4a-nofpu,) +cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml @@ -66,22 +59,27 @@ cflags-y += $(isaflags-y) -ffreestanding cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \ $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g') -OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment -R .stab -R .stabstr -S +OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \ + -R .stab -R .stabstr -S -# -# arch/sh/defconfig doesn't reflect any real hardware, and as such should -# never be used by anyone. Use a board-specific defconfig that has a -# reasonable chance of being current instead. -# -KBUILD_DEFCONFIG := r7780rp_defconfig +# Give the various platforms the opportunity to set default image types +defaultimage-$(CONFIG_SUPERH32) := zImage -KBUILD_IMAGE := arch/sh/boot/zImage +# Set some sensible Kbuild defaults +KBUILD_DEFCONFIG := r7780mp_defconfig +KBUILD_IMAGE := $(defaultimage-y) # # Choosing incompatible machines durings configuration will result in # error messages during linking. # -LDFLAGS_vmlinux += -e _stext +ifdef CONFIG_SUPERH32 +LDFLAGS_vmlinux += -e _stext +else +LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \ + --defsym phys_stext_shmedia=phys_stext+1 \ + -e phys_stext_shmedia +endif ifdef CONFIG_CPU_LITTLE_ENDIAN LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' @@ -94,7 +92,9 @@ endif KBUILD_CFLAGS += -pipe $(cflags-y) KBUILD_AFLAGS += $(cflags-y) -head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o +head-y := arch/sh/kernel/init_task.o +head-$(CONFIG_SUPERH32) += arch/sh/kernel/head_32.o +head-$(CONFIG_SUPERH64) += arch/sh/kernel/head_64.o LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) @@ -112,11 +112,11 @@ machdir-$(CONFIG_SH_DREAMCAST) += dreamcast machdir-$(CONFIG_SH_MPC1211) += mpc1211 machdir-$(CONFIG_SH_SH03) += sh03 machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear -machdir-$(CONFIG_SH_HS7751RVOIP) += renesas/hs7751rvoip machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705 machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp +machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780 machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev @@ -127,6 +127,7 @@ machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206 machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619 machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2 machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += magicpanelr2 +machdir-$(CONFIG_SH_CAYMAN) += cayman incdir-y := $(notdir $(machdir-y)) @@ -137,22 +138,22 @@ endif # Companion chips core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/ -core-$(CONFIG_MFD_SM501) += arch/sh/cchips/voyagergx/ cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2 cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3 cpuincdir-$(CONFIG_CPU_SH4) := cpu-sh4 +cpuincdir-$(CONFIG_CPU_SH5) := cpu-sh5 -libs-y := arch/sh/lib/ $(libs-y) $(LIBGCC) +libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) +libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) +libs-y += $(LIBGCC) drivers-y += arch/sh/drivers/ drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/ boot := arch/sh/boot -CPPFLAGS_vmlinux.lds := -traditional - incdir-prefix := $(srctree)/include/asm-sh/ # Update machine arch and proc symlinks if something which affects @@ -196,29 +197,61 @@ include/asm-sh/.mach: $(wildcard include/config/sh/*.h) \ done @touch $@ -archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools - PHONY += maketools FORCE + maketools: include/linux/version.h FORCE $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h -all: zImage +all: $(KBUILD_IMAGE) zImage uImage uImage.srec vmlinux.srec: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ compressed: zImage +archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools \ + arch/sh/lib64/syscalltab.h + archclean: $(Q)$(MAKE) $(clean)=$(boot) -CLEAN_FILES += include/asm-sh/machtypes.h \ - include/asm-sh/cpu include/asm-sh/.cpu \ - include/asm-sh/mach include/asm-sh/.mach - define archhelp @echo '* zImage - Compressed kernel image' @echo ' vmlinux.srec - Create an ELF S-record' @echo ' uImage - Create a bootable image for U-Boot' @echo ' uImage.srec - Create an S-record for U-Boot' endef + +define filechk_gen-syscalltab + (set -e; \ + echo "/*"; \ + echo " * DO NOT MODIFY."; \ + echo " *"; \ + echo " * This file was generated by arch/sh/Makefile"; \ + echo " * Any changes will be reverted at build time."; \ + echo " */"; \ + echo ""; \ + echo "#ifndef __SYSCALLTAB_H"; \ + echo "#define __SYSCALLTAB_H"; \ + echo ""; \ + echo "#include <linux/kernel.h>"; \ + echo ""; \ + echo "struct syscall_info {"; \ + echo " const char *name;"; \ + echo "} syscall_info_table[] = {"; \ + sed -e '/^.*\.long /!d;s// { "/;s/\(\([^/]*\)\/\)\{1\}.*/\2/; \ + s/[ \t]*$$//g;s/$$/" },/;s/\("\)sys_/\1/g'; \ + echo "};"; \ + echo ""; \ + echo "#define NUM_SYSCALL_INFO_ENTRIES ARRAY_SIZE(syscall_info_table)";\ + echo ""; \ + echo "#endif /* __SYSCALLTAB_H */" ) +endef + +arch/sh/lib64/syscalltab.h: arch/sh/kernel/syscalls_64.S + $(call filechk,gen-syscalltab) + +CLEAN_FILES += arch/sh/lib64/syscalltab.h \ + include/asm-sh/machtypes.h \ + include/asm-sh/cpu include/asm-sh/.cpu \ + include/asm-sh/mach include/asm-sh/.mach diff --git a/arch/sh/boards/cayman/Makefile b/arch/sh/boards/cayman/Makefile new file mode 100644 index 000000000000..489a8f867368 --- /dev/null +++ b/arch/sh/boards/cayman/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the Hitachi Cayman specific parts of the kernel +# +obj-y := setup.o irq.o +obj-$(CONFIG_HEARTBEAT) += led.o diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh/boards/cayman/irq.c index aaad36d37d1f..30ec7bebfaf1 100644 --- a/arch/sh64/mach-cayman/irq.c +++ b/arch/sh/boards/cayman/irq.c @@ -1,24 +1,26 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/irq_cayman.c - * - * SH-5 Cayman Interrupt Support + * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support * * This file handles the board specific parts of the Cayman interrupt system * * Copyright (C) 2002 Stuart Menefy + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - -#include <asm/irq.h> -#include <asm/page.h> -#include <asm/io.h> +#include <linux/io.h> #include <linux/irq.h> #include <linux/interrupt.h> #include <linux/signal.h> -#include <asm/cayman.h> +#include <asm/cpu/irq.h> +#include <asm/page.h> + +/* Setup for the SMSC FDC37C935 / LAN91C100FD */ +#define SMSC_IRQ IRQ_IRL1 + +/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */ +#define PCI2_IRQ IRQ_IRL3 unsigned long epld_virt; diff --git a/arch/sh64/mach-cayman/led.c b/arch/sh/boards/cayman/led.c index b4e122fd9502..a808eac4ecd6 100644 --- a/arch/sh64/mach-cayman/led.c +++ b/arch/sh/boards/cayman/led.c @@ -1,5 +1,5 @@ /* - * arch/sh64/mach-cayman/led.c + * arch/sh/boards/cayman/led.c * * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> * diff --git a/arch/sh64/mach-cayman/setup.c b/arch/sh/boards/cayman/setup.c index 726c520d7eb9..8c9fa472d8f5 100644 --- a/arch/sh64/mach-cayman/setup.c +++ b/arch/sh/boards/cayman/setup.c @@ -1,28 +1,19 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mach-cayman/setup.c + * arch/sh/mach-cayman/setup.c * * SH5 Cayman support * - * This file handles the architecture-dependent parts of initialization + * Copyright (C) 2002 David J. Mckay & Benedict Gaster + * Copyright (C) 2003 - 2007 Paul Mundt * - * Copyright David J. Mckay. - * Needs major work! - * - * benedict.gaster@superh.com: 3rd May 2002 - * Added support for ramdisk, removing statically linked romfs at the same time. - * - * lethal@linux-sh.org: 15th May 2003 - * Use the generic procfs cpuinfo interface, just return a valid board name. + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ #include <linux/init.h> +#include <linux/io.h> #include <linux/kernel.h> -#include <asm/platform.h> -#include <asm/irq.h> -#include <asm/io.h> +#include <asm/cpu/irq.h> /* * Platform Dependent Interrupt Priorities. @@ -96,42 +87,6 @@ unsigned long smsc_superio_virt; -/* - * Platform dependent structures: maps and parms block. - */ -struct resource io_resources[] = { - /* To be updated with external devices */ -}; - -struct resource kram_resources[] = { - /* These must be last in the array */ - { .name = "Kernel code", .start = 0, .end = 0 }, - /* These must be last in the array */ - { .name = "Kernel data", .start = 0, .end = 0 } -}; - -struct resource xram_resources[] = { - /* To be updated with external devices */ -}; - -struct resource rom_resources[] = { - /* To be updated with external devices */ -}; - -struct sh64_platform platform_parms = { - .readonly_rootfs = 1, - .initial_root_dev = 0x0100, - .loader_type = 1, - .io_res_p = io_resources, - .io_res_count = ARRAY_SIZE(io_resources), - .kram_res_p = kram_resources, - .kram_res_count = ARRAY_SIZE(kram_resources), - .xram_res_p = xram_resources, - .xram_res_count = ARRAY_SIZE(xram_resources), - .rom_res_p = rom_resources, - .rom_res_count = ARRAY_SIZE(rom_resources), -}; - int platform_int_priority[NR_INTC_IRQS] = { IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ @@ -210,30 +165,23 @@ static int __init smsc_superio_setup(void) return 0; } - -/* This is grotty, but, because kernel is always referenced on the link line - * before any devices, this is safe. - */ __initcall(smsc_superio_setup); -void __init platform_setup(void) -{ - /* Cayman platform leaves the decision to head.S, for now */ - platform_parms.fpu_flags = fpu_in_use; -} - -void __init platform_monitor(void) +static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len) { - /* Nothing yet .. */ -} + if (port < 0x400) { + extern unsigned long smsc_superio_virt; + return (void __iomem *)((port << 2) | smsc_superio_virt); + } -void __init platform_reserve(void) -{ - /* Nothing yet .. */ + return (void __iomem *)port; } -const char *get_system_type(void) -{ - return "Hitachi Cayman"; -} +extern void init_cayman_irq(void); +static struct sh_machine_vector mv_cayman __initmv = { + .mv_name = "Hitachi Cayman", + .mv_nr_irqs = 64, + .mv_ioport_map = cayman_ioport_map, + .mv_init_irq = init_cayman_irq, +}; diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c index 5bf01f86c20c..9d0673a9092a 100644 --- a/arch/sh/boards/dreamcast/irq.c +++ b/arch/sh/boards/dreamcast/irq.c @@ -136,7 +136,7 @@ int systemasic_irq_demux(int irq) emr = EMR_BASE + (level << 4) + (level << 2); esr = ESR_BASE + (level << 2); - /* Mask the ESR to filter any spurious, unwanted interrtupts */ + /* Mask the ESR to filter any spurious, unwanted interrupts */ status = inl(esr); status &= inl(emr); diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c index 8799df6e866a..2581c8cd5df7 100644 --- a/arch/sh/boards/dreamcast/setup.c +++ b/arch/sh/boards/dreamcast/setup.c @@ -33,9 +33,6 @@ extern void aica_time_init(void); extern int gapspci_init(void); extern int systemasic_irq_demux(int); -void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t); -int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t); - static void __init dreamcast_setup(char **cmdline_p) { int i; @@ -64,9 +61,4 @@ static struct sh_machine_vector mv_dreamcast __initmv = { .mv_name = "Sega Dreamcast", .mv_setup = dreamcast_setup, .mv_irq_demux = systemasic_irq_demux, - -#ifdef CONFIG_PCI - .mv_consistent_alloc = dreamcast_consistent_alloc, - .mv_consistent_free = dreamcast_consistent_free, -#endif }; diff --git a/arch/sh/boards/landisk/gio.c b/arch/sh/boards/landisk/gio.c index a37643d002b2..17025080db35 100644 --- a/arch/sh/boards/landisk/gio.c +++ b/arch/sh/boards/landisk/gio.c @@ -121,7 +121,7 @@ static int gio_ioctl(struct inode *inode, struct file *filp, return 0; } -static struct file_operations gio_fops = { +static const struct file_operations gio_fops = { .owner = THIS_MODULE, .open = gio_open, /* open */ .release = gio_close, /* release */ diff --git a/arch/sh/boards/renesas/hs7751rvoip/Kconfig b/arch/sh/boards/renesas/hs7751rvoip/Kconfig deleted file mode 100644 index 1743be477be5..000000000000 --- a/arch/sh/boards/renesas/hs7751rvoip/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if SH_HS7751RVOIP - -menu "HS7751RVoIP options" - -config HS7751RVOIP_CODEC - bool "Support VoIP Codec section" - help - Selecting this option will support CODEC section. - -endmenu - -endif diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile deleted file mode 100644 index e626377c55ee..000000000000 --- a/arch/sh/boards/renesas/hs7751rvoip/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# Makefile for the HS7751RVoIP specific parts of the kernel -# - -obj-y := setup.o io.o irq.o - -obj-$(CONFIG_PCI) += pci.o - diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c deleted file mode 100644 index bb9aa0d62852..000000000000 --- a/arch/sh/boards/renesas/hs7751rvoip/io.c +++ /dev/null @@ -1,283 +0,0 @@ -/* - * linux/arch/sh/boards/renesas/hs7751rvoip/io.c - * - * Copyright (C) 2001 Ian da Silva, Jeremy Siegel - * Based largely on io_se.c. - * - * I/O routine for Renesas Technology sales HS7751RVoIP - * - * Initial version only to support LAN access; some - * placeholder code from io_hs7751rvoip.c left in with the - * expectation of later SuperIO and PCMCIA access. - */ -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/module.h> -#include <linux/pci.h> -#include <asm/io.h> -#include <asm/hs7751rvoip.h> -#include <asm/addrspace.h> - -extern void *area6_io8_base; /* Area 6 8bit I/O Base address */ -extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ - -/* - * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC) - * of the 7751R processor, and has a SuperIO accessible via the PCI. - * The board also includes a PCMCIA controller on its memory bus, - * like the other Solution Engine boards. - */ - -#define CODEC_IO_BASE 0x1000 -#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE)) - -static inline unsigned long port2adr(unsigned int port) -{ - if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) - if (port == 0x3f6) - return ((unsigned long)area5_io16_base + 0x0c); - else - return ((unsigned long)area5_io16_base + 0x800 + - ((port-0x1f0) << 1)); - else - maybebadio((unsigned long)port); - return port; -} - -/* The 7751R HS7751RVoIP seems to have everything hooked */ -/* up pretty normally (nothing on high-bytes only...) so this */ -/* shouldn't be needed */ -static inline int shifted_port(unsigned long port) -{ - /* For IDE registers, value is not shifted */ - if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) - return 0; - else - return 1; -} - -#if defined(CONFIG_HS7751RVOIP_CODEC) -#define codec_port(port) \ - ((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20))) -#else -#define codec_port(port) (0) -#endif - -/* - * General outline: remap really low stuff [eventually] to SuperIO, - * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) - * is mapped through the PCI IO window. Stuff with high bits (PXSEG) - * should be way beyond the window, and is used w/o translation for - * compatibility. - */ -unsigned char hs7751rvoip_inb(unsigned long port) -{ - if (PXSEG(port)) - return ctrl_inb(port); - else if (codec_port(port)) - return ctrl_inb(CODEC_IOMAP(port)); - else if (is_pci_ioaddr(port) || shifted_port(port)) - return ctrl_inb(pci_ioaddr(port)); - else - return ctrl_inw(port2adr(port)) & 0xff; -} - -unsigned char hs7751rvoip_inb_p(unsigned long port) -{ - unsigned char v; - - if (PXSEG(port)) - v = ctrl_inb(port); - else if (codec_port(port)) - v = ctrl_inb(CODEC_IOMAP(port)); - else if (is_pci_ioaddr(port) || shifted_port(port)) - v = ctrl_inb(pci_ioaddr(port)); - else - v = ctrl_inw(port2adr(port)) & 0xff; - ctrl_delay(); - return v; -} - -unsigned short hs7751rvoip_inw(unsigned long port) -{ - if (PXSEG(port)) - return ctrl_inw(port); - else if (is_pci_ioaddr(port) || shifted_port(port)) - return ctrl_inw(pci_ioaddr(port)); - else - maybebadio(port); - return 0; -} - -unsigned int hs7751rvoip_inl(unsigned long port) -{ - if (PXSEG(port)) - return ctrl_inl(port); - else if (is_pci_ioaddr(port) || shifted_port(port)) - return ctrl_inl(pci_ioaddr(port)); - else - maybebadio(port); - return 0; -} - -void hs7751rvoip_outb(unsigned char value, unsigned long port) -{ - - if (PXSEG(port)) - ctrl_outb(value, port); - else if (codec_port(port)) - ctrl_outb(value, CODEC_IOMAP(port)); - else if (is_pci_ioaddr(port) || shifted_port(port)) - ctrl_outb(value, pci_ioaddr(port)); - else - ctrl_outb(value, port2adr(port)); -} - -void hs7751rvoip_outb_p(unsigned char value, unsigned long port) -{ - if (PXSEG(port)) - ctrl_outb(value, port); - else if (codec_port(port)) - ctrl_outb(value, CODEC_IOMAP(port)); - else if (is_pci_ioaddr(port) || shifted_port(port)) - ctrl_outb(value, pci_ioaddr(port)); - else - ctrl_outw(value, port2adr(port)); - - ctrl_delay(); -} - -void hs7751rvoip_outw(unsigned short value, unsigned long port) -{ - if (PXSEG(port)) - ctrl_outw(value, port); - else if (is_pci_ioaddr(port) || shifted_port(port)) - ctrl_outw(value, pci_ioaddr(port)); - else - maybebadio(port); -} - -void hs7751rvoip_outl(unsigned int value, unsigned long port) -{ - if (PXSEG(port)) - ctrl_outl(value, port); - else if (is_pci_ioaddr(port) || shifted_port(port)) - ctrl_outl(value, pci_ioaddr(port)); - else - maybebadio(port); -} - -void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count) -{ - u8 *buf = addr; - - if (PXSEG(port)) - while (count--) - *buf++ = ctrl_inb(port); - else if (codec_port(port)) - while (count--) - *buf++ = ctrl_inb(CODEC_IOMAP(port)); - else if (is_pci_ioaddr(port) || shifted_port(port)) { - volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); - - while (count--) - *buf++ = *bp; - } else { - volatile u16 *p = (volatile u16 *)port2adr(port); - - while (count--) - *buf++ = *p & 0xff; - } -} - -void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count) -{ - volatile u16 *p; - u16 *buf = addr; - - if (PXSEG(port)) - p = (volatile u16 *)port; - else if (is_pci_ioaddr(port) || shifted_port(port)) - p = (volatile u16 *)pci_ioaddr(port); - else - p = (volatile u16 *)port2adr(port); - while (count--) - *buf++ = *p; -} - -void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count) -{ - - if (is_pci_ioaddr(port) || shifted_port(port)) { - volatile u32 *p = (volatile u32 *)pci_ioaddr(port); - u32 *buf = addr; - - while (count--) - *buf++ = *p; - } else - maybebadio(port); -} - -void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count) -{ - const u8 *buf = addr; - - if (PXSEG(port)) - while (count--) - ctrl_outb(*buf++, port); - else if (codec_port(port)) - while (count--) - ctrl_outb(*buf++, CODEC_IOMAP(port)); - else if (is_pci_ioaddr(port) || shifted_port(port)) { - volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); - - while (count--) - *bp = *buf++; - } else { - volatile u16 *p = (volatile u16 *)port2adr(port); - - while (count--) - *p = *buf++; - } -} - -void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count) -{ - volatile u16 *p; - const u16 *buf = addr; - - if (PXSEG(port)) - p = (volatile u16 *)port; - else if (is_pci_ioaddr(port) || shifted_port(port)) - p = (volatile u16 *)pci_ioaddr(port); - else - p = (volatile u16 *)port2adr(port); - - while (count--) - *p = *buf++; -} - -void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count) -{ - const u32 *buf = addr; - - if (is_pci_ioaddr(port) || shifted_port(port)) { - volatile u32 *p = (volatile u32 *)pci_ioaddr(port); - - while (count--) - *p = *buf++; - } else - maybebadio(port); -} - -void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size) -{ - if (PXSEG(port)) - return (void __iomem *)port; - else if (unlikely(codec_port(port) && (size == 1))) - return (void __iomem *)CODEC_IOMAP(port); - else if (is_pci_ioaddr(port)) - return (void __iomem *)pci_ioaddr(port); - - return (void __iomem *)port2adr(port); -} diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c deleted file mode 100644 index e55c6686b21f..000000000000 --- a/arch/sh/boards/renesas/hs7751rvoip/irq.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * linux/arch/sh/boards/renesas/hs7751rvoip/irq.c - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Renesas Technology Sales HS7751RVoIP Support. - * - * Modified for HS7751RVoIP by - * Atom Create Engineering Co., Ltd. 2002. - * Lineo uSolutions, Inc. 2003. - */ - -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/interrupt.h> -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/hs7751rvoip.h> - -static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7}; - -static void enable_hs7751rvoip_irq(unsigned int irq); -static void disable_hs7751rvoip_irq(unsigned int irq); - -/* shutdown is same as "disable" */ -#define shutdown_hs7751rvoip_irq disable_hs7751rvoip_irq - -static void ack_hs7751rvoip_irq(unsigned int irq); -static void end_hs7751rvoip_irq(unsigned int irq); - -static unsigned int startup_hs7751rvoip_irq(unsigned int irq) -{ - enable_hs7751rvoip_irq(irq); - return 0; /* never anything pending */ -} - -static void disable_hs7751rvoip_irq(unsigned int irq) -{ - unsigned short val; - unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); - - /* Set the priority in IPR to 0 */ - val = ctrl_inw(IRLCNTR3); - val &= mask; - ctrl_outw(val, IRLCNTR3); -} - -static void enable_hs7751rvoip_irq(unsigned int irq) -{ - unsigned short val; - unsigned short value = (0x0001 << mask_pos[irq]); - - /* Set priority in IPR back to original value */ - val = ctrl_inw(IRLCNTR3); - val |= value; - ctrl_outw(val, IRLCNTR3); -} - -static void ack_hs7751rvoip_irq(unsigned int irq) -{ - disable_hs7751rvoip_irq(irq); -} - -static void end_hs7751rvoip_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_hs7751rvoip_irq(irq); -} - -static struct hw_interrupt_type hs7751rvoip_irq_type = { - .typename = "HS7751RVoIP IRQ", - .startup = startup_hs7751rvoip_irq, - .shutdown = shutdown_hs7751rvoip_irq, - .enable = enable_hs7751rvoip_irq, - .disable = disable_hs7751rvoip_irq, - .ack = ack_hs7751rvoip_irq, - .end = end_hs7751rvoip_irq, -}; - -static void make_hs7751rvoip_irq(unsigned int irq) -{ - disable_irq_nosync(irq); - irq_desc[irq].chip = &hs7751rvoip_irq_type; - disable_hs7751rvoip_irq(irq); -} - -/* - * Initialize IRQ setting - */ -void __init init_hs7751rvoip_IRQ(void) -{ - int i; - - /* IRL0=ON HOOK1 - * IRL1=OFF HOOK1 - * IRL2=ON HOOK2 - * IRL3=OFF HOOK2 - * IRL4=Ringing Detection - * IRL5=CODEC - * IRL6=Ethernet - * IRL7=Ethernet Hub - * IRL8=USB Communication - * IRL9=USB Connection - * IRL10=USB DMA - * IRL11=CF Card - * IRL12=PCMCIA - * IRL13=PCI Slot - */ - ctrl_outw(0x9876, IRLCNTR1); - ctrl_outw(0xdcba, IRLCNTR2); - ctrl_outw(0x0050, IRLCNTR4); - ctrl_outw(0x4321, IRLCNTR5); - - for (i=0; i<14; i++) - make_hs7751rvoip_irq(i); -} diff --git a/arch/sh/boards/renesas/hs7751rvoip/pci.c b/arch/sh/boards/renesas/hs7751rvoip/pci.c deleted file mode 100644 index 1c0ddee30d21..000000000000 --- a/arch/sh/boards/renesas/hs7751rvoip/pci.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * linux/arch/sh/boards/renesas/hs7751rvoip/pci.c - * - * Author: Ian DaSilva (idasilva@mvista.com) - * - * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * PCI initialization for the Renesas SH7751R HS7751RVoIP board - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/pci.h> -#include <linux/module.h> - -#include <asm/io.h> -#include "../../../drivers/pci/pci-sh7751.h" -#include <asm/hs7751rvoip/hs7751rvoip.h> - -#define PCIMCR_MRSET_OFF 0xBFFFFFFF -#define PCIMCR_RFSH_OFF 0xFFFFFFFB - -/* - * Only long word accesses of the PCIC's internal local registers and the - * configuration registers from the CPU is supported. - */ -#define PCIC_WRITE(x,v) writel((v), PCI_REG(x)) -#define PCIC_READ(x) readl(PCI_REG(x)) - -/* - * Description: This function sets up and initializes the pcic, sets - * up the BARS, maps the DRAM into the address space etc, etc. - */ -int __init pcibios_init_platform(void) -{ - unsigned long bcr1, wcr1, wcr2, wcr3, mcr; - unsigned short bcr2, bcr3; - - /* - * Initialize the slave bus controller on the pcic. The values used - * here should not be hardcoded, but they should be taken from the bsc - * on the processor, to make this function as generic as possible. - * (i.e. Another sbc may usr different SDRAM timing settings -- in order - * for the pcic to work, its settings need to be exactly the same.) - */ - bcr1 = (*(volatile unsigned long *)(SH7751_BCR1)); - bcr2 = (*(volatile unsigned short *)(SH7751_BCR2)); - bcr3 = (*(volatile unsigned short *)(SH7751_BCR3)); - wcr1 = (*(volatile unsigned long *)(SH7751_WCR1)); - wcr2 = (*(volatile unsigned long *)(SH7751_WCR2)); - wcr3 = (*(volatile unsigned long *)(SH7751_WCR3)); - mcr = (*(volatile unsigned long *)(SH7751_MCR)); - - bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */ - (*(volatile unsigned long *)(SH7751_BCR1)) = bcr1; - - bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ - PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */ - PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */ - PCIC_WRITE(SH7751_PCIBCR3, bcr3); /* PCIC BCR3 */ - PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */ - PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */ - PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */ - mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; - PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */ - - /* Enable all interrupts, so we know what to fix */ - PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff); - PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f); - - /* Set up standard PCI config registers */ - PCIC_WRITE(SH7751_PCICONF1, 0xFB900047); /* Bus Master, Mem & I/O access */ - PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */ - PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */ - PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM address (local RAM) */ - PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */ - PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */ - PCIC_WRITE(SH7751_PCILSR0, 0x03f00000); /* MEM (full 64M exposed) */ - PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */ - PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM (direct map from PCI) */ - PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */ - - /* Now turn it on... */ - PCIC_WRITE(SH7751_PCICR, 0xa5000001); - - /* - * Set PCIMBR and PCIIOBR here, assuming a single window - * (16M MEM, 256K IO) is enough. If a larger space is - * needed, the readx/writex and inx/outx functions will - * have to do more (e.g. setting registers for each call). - */ - - /* - * Set the MBR so PCI address is one-to-one with window, - * meaning all calls go straight through... use ifdef to - * catch erroneous assumption. - */ - BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE); - - PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM); - - /* Set IOBR for window containing area specified in pci.h */ - PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK)); - - /* All done, may as well say so... */ - printk("SH7751R PCI: Finished initialization of the PCI controller\n"); - - return 1; -} - -int __init pcibios_map_platform_irq(u8 slot, u8 pin) -{ - switch (slot) { - case 0: return IRQ_PCISLOT; /* PCI Extend slot */ - case 1: return IRQ_PCMCIA; /* PCI Cardbus Bridge */ - case 2: return IRQ_PCIETH; /* Realtek Ethernet controller */ - case 3: return IRQ_PCIHUB; /* Realtek Ethernet Hub controller */ - default: - printk("PCI: Bad IRQ mapping request for slot %d\n", slot); - return -1; - } -} - -static struct resource sh7751_io_resource = { - .name = "SH7751_IO", - .start = 0x4000, - .end = 0x4000 + SH7751_PCI_IO_SIZE - 1, - .flags = IORESOURCE_IO -}; - -static struct resource sh7751_mem_resource = { - .name = "SH7751_mem", - .start = SH7751_PCI_MEMORY_BASE, - .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, - .flags = IORESOURCE_MEM -}; - -extern struct pci_ops sh7751_pci_ops; - -struct pci_channel board_pci_channels[] = { - { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, - { NULL, NULL, NULL, 0, 0 }, -}; -EXPORT_SYMBOL(board_pci_channels); diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c deleted file mode 100644 index c05625975f2c..000000000000 --- a/arch/sh/boards/renesas/hs7751rvoip/setup.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Renesas Technology Sales HS7751RVoIP Support. - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Modified for HS7751RVoIP by - * Atom Create Engineering Co., Ltd. 2002. - * Lineo uSolutions, Inc. 2003. - */ -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/mm.h> -#include <linux/pm.h> -#include <asm/hs7751rvoip.h> -#include <asm/io.h> -#include <asm/machvec.h> - -static void hs7751rvoip_power_off(void) -{ - ctrl_outw(ctrl_inw(PA_OUTPORTR) & 0xffdf, PA_OUTPORTR); -} - -void *area5_io8_base; -void *area6_io8_base; -void *area5_io16_base; -void *area6_io16_base; - -static int __init hs7751rvoip_cf_init(void) -{ - pgprot_t prot; - unsigned long paddrbase; - - /* open I/O area window */ - paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800)); - prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16); - area5_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); - if (!area5_io16_base) { - printk("allocate_cf_area : can't open CF I/O window!\n"); - return -ENOMEM; - } - - /* XXX : do we need attribute and common-memory area also? */ - - paddrbase = virt_to_phys((void *)PA_AREA6_IO); -#if defined(CONFIG_HS7751RVOIP_CODEC) - prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8); -#else - prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8); -#endif - area6_io8_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); - if (!area6_io8_base) { - printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n"); - return -ENOMEM; - } - prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16); - area6_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); - if (!area6_io16_base) { - printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n"); - return -ENOMEM; - } - - return 0; -} -device_initcall(hs7751rvoip_cf_init); - -/* - * Initialize the board - */ -static void __init hs7751rvoip_setup(char **cmdline_p) -{ - ctrl_outb(0xf0, PA_OUTPORTR); - pm_power_off = hs7751rvoip_power_off; - - printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n"); -} - -static struct sh_machine_vector mv_hs7751rvoip __initmv = { - .mv_name = "HS7751RVoIP", - .mv_setup = hs7751rvoip_setup, - .mv_nr_irqs = 72, - - .mv_inb = hs7751rvoip_inb, - .mv_inw = hs7751rvoip_inw, - .mv_inl = hs7751rvoip_inl, - .mv_outb = hs7751rvoip_outb, - .mv_outw = hs7751rvoip_outw, - .mv_outl = hs7751rvoip_outl, - - .mv_inb_p = hs7751rvoip_inb_p, - .mv_inw_p = hs7751rvoip_inw, - .mv_inl_p = hs7751rvoip_inl, - .mv_outb_p = hs7751rvoip_outb_p, - .mv_outw_p = hs7751rvoip_outw, - .mv_outl_p = hs7751rvoip_outl, - - .mv_insb = hs7751rvoip_insb, - .mv_insw = hs7751rvoip_insw, - .mv_insl = hs7751rvoip_insl, - .mv_outsb = hs7751rvoip_outsb, - .mv_outsw = hs7751rvoip_outsw, - .mv_outsl = hs7751rvoip_outsl, - - .mv_init_irq = init_hs7751rvoip_IRQ, - .mv_ioport_map = hs7751rvoip_ioport_map, -}; diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile index dd26182fbf58..20a10080b11f 100644 --- a/arch/sh/boards/renesas/r7780rp/Makefile +++ b/arch/sh/boards/renesas/r7780rp/Makefile @@ -3,7 +3,7 @@ # irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o -irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o irq.o +irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o obj-y := setup.o $(irqinit-y) ifneq ($(CONFIG_SH_R7785RP),y) diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c index 59b47fe061f9..1f8f073f27be 100644 --- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c +++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c @@ -47,7 +47,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, - NULL, NULL, mask_registers, NULL, NULL); + NULL, mask_registers, NULL, NULL); unsigned char * __init highlander_init_irq_r7780mp(void) { diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c index fa4a534cade9..bd34048ed0e1 100644 --- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c +++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c @@ -3,21 +3,65 @@ * * Copyright (C) 2002 Atom Create Engineering Co., Ltd. * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2008 Magnus Damm * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <linux/init.h> +#include <linux/irq.h> #include <linux/io.h> #include <asm/r7780rp.h> +enum { + UNUSED = 0, + + /* board specific interrupt sources */ + + AX88796, /* Ethernet controller */ + PSW, /* Push Switch */ + CF, /* Compact Flash */ + + PCI_A, + PCI_B, + PCI_C, + PCI_D, +}; + +static struct intc_vect vectors[] __initdata = { + INTC_IRQ(PCI_A, 65), /* dirty: overwrite cpu vectors for pci */ + INTC_IRQ(PCI_B, 66), + INTC_IRQ(PCI_C, 67), + INTC_IRQ(PCI_D, 68), + INTC_IRQ(CF, IRQ_CF), + INTC_IRQ(PSW, IRQ_PSW), + INTC_IRQ(AX88796, IRQ_AX88796), +}; + +static struct intc_mask_reg mask_registers[] __initdata = { + { 0xa5000000, 0, 16, /* IRLMSK */ + { PCI_A, PCI_B, PCI_C, PCI_D, CF, 0, 0, 0, + 0, 0, 0, 0, 0, 0, PSW, AX88796 } }, +}; + +static unsigned char irl2irq[HL_NR_IRL] __initdata = { + 65, 66, 67, 68, + IRQ_CF, 0, 0, 0, + 0, 0, 0, 0, + IRQ_AX88796, IRQ_PSW +}; + +static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors, + NULL, mask_registers, NULL, NULL); + unsigned char * __init highlander_init_irq_r7780rp(void) { - int i; - - for (i = 0; i < 15; i++) - make_r7780rp_irq(i); + if (ctrl_inw(0xa5000600)) { + printk(KERN_INFO "Using r7780rp interrupt controller.\n"); + register_intc_controller(&intc_desc); + return irl2irq; + } return NULL; } diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c index b2c6a84673bd..bf7ec107fbc6 100644 --- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c +++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c @@ -2,7 +2,7 @@ * Renesas Solutions Highlander R7785RP Support. * * Copyright (C) 2002 Atom Create Engineering Co., Ltd. - * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2006 - 2008 Paul Mundt * Copyright (C) 2007 Magnus Damm * * This file is subject to the terms and conditions of the GNU General Public @@ -17,31 +17,52 @@ enum { UNUSED = 0, - /* board specific interrupt sources */ - AX88796, /* Ethernet controller */ - CF, /* Compact Flash */ + /* FPGA specific interrupt sources */ + CF, /* Compact Flash */ + SMBUS, /* SMBUS */ + TP, /* Touch panel */ + RTC, /* RTC Alarm */ + TH_ALERT, /* Temperature sensor */ + AX88796, /* Ethernet controller */ + + /* external bus connector */ + EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7, }; static struct intc_vect vectors[] __initdata = { INTC_IRQ(CF, IRQ_CF), + INTC_IRQ(SMBUS, IRQ_SMBUS), + INTC_IRQ(TP, IRQ_TP), + INTC_IRQ(RTC, IRQ_RTC), + INTC_IRQ(TH_ALERT, IRQ_TH_ALERT), + + INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1), + INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3), + + INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5), + INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7), + INTC_IRQ(AX88796, IRQ_AX88796), }; static struct intc_mask_reg mask_registers[] __initdata = { { 0xa4000010, 0, 16, /* IRLMCR1 */ - { 0, 0, 0, 0, CF, AX88796, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 } }, + { 0, 0, 0, 0, CF, AX88796, SMBUS, TP, + RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } }, + { 0xa4000012, 0, 16, /* IRLMCR2 */ + { 0, 0, 0, 0, 0, 0, 0, 0, + EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } }, }; static unsigned char irl2irq[HL_NR_IRL] __initdata = { - 0, IRQ_CF, 0, 0, - 0, 0, 0, 0, - 0, 0, IRQ_AX88796, 0, - 0, 0, 0, + 0, IRQ_CF, IRQ_EXT4, IRQ_EXT5, + IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP, + IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0, + IRQ_EXT1, IRQ_EXT2, IRQ_EXT3, }; static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, - NULL, NULL, mask_registers, NULL, NULL); + NULL, mask_registers, NULL, NULL); unsigned char * __init highlander_init_irq_r7785rp(void) { @@ -58,7 +79,7 @@ unsigned char * __init highlander_init_irq_r7785rp(void) ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ - ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */ + ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ register_intc_controller(&intc_desc); return irl2irq; diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c deleted file mode 100644 index e0b8eb52f376..000000000000 --- a/arch/sh/boards/renesas/r7780rp/irq.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Renesas Solutions Highlander R7780RP-1 Support. - * - * Copyright (C) 2002 Atom Create Engineering Co., Ltd. - * Copyright (C) 2006 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <asm/r7780rp.h> - -#ifdef CONFIG_SH_R7780RP -static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0}; -#elif defined(CONFIG_SH_R7780MP) -static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0}; -#elif defined(CONFIG_SH_R7785RP) -static int mask_pos[] = {2, 11, 2, 2, 2, 2, 9, 8, 7, 5, 10, 2, 2, 2, 2, 2}; -#endif - -static void enable_r7780rp_irq(unsigned int irq) -{ - /* Set priority in IPR back to original value */ - ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1); -} - -static void disable_r7780rp_irq(unsigned int irq) -{ - /* Set the priority in IPR to 0 */ - ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])), - IRLCNTR1); -} - -static struct irq_chip r7780rp_irq_chip __read_mostly = { - .name = "R7780RP", - .mask = disable_r7780rp_irq, - .unmask = enable_r7780rp_irq, - .mask_ack = disable_r7780rp_irq, -}; - -void make_r7780rp_irq(unsigned int irq) -{ - disable_irq_nosync(irq); - set_irq_chip_and_handler_name(irq, &r7780rp_irq_chip, - handle_level_irq, "level"); - enable_r7780rp_irq(irq); -} diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c index 0fdc0bc19145..a43b47726f54 100644 --- a/arch/sh/boards/renesas/r7780rp/setup.c +++ b/arch/sh/boards/renesas/r7780rp/setup.c @@ -179,9 +179,11 @@ static struct platform_device ax88796_device = { static struct platform_device *r7780rp_devices[] __initdata = { &r8a66597_usb_host_device, &m66592_usb_peripheral_device, - &cf_ide_device, &heartbeat_device, +#ifndef CONFIG_SH_R7780RP + &cf_ide_device, &ax88796_device, +#endif }; static int __init r7780rp_devices_setup(void) @@ -316,9 +318,9 @@ void __init highlander_init_irq(void) break; #endif #ifdef CONFIG_SH_R7780RP - highlander_init_irq_r7780rp(); - ucp = irl2irq; - break; + ucp = highlander_init_irq_r7780rp(); + if (ucp) + break; #endif } while (0); diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c index 7cc2813adfe4..8e49f6e51247 100644 --- a/arch/sh/boards/renesas/rts7751r2d/irq.c +++ b/arch/sh/boards/renesas/rts7751r2d/irq.c @@ -13,7 +13,6 @@ #include <linux/irq.h> #include <linux/interrupt.h> #include <linux/io.h> -#include <asm/voyagergx.h> #include <asm/rts7751r2d.h> #define R2D_NR_IRL 13 @@ -71,7 +70,7 @@ static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1, - NULL, NULL, mask_registers_r2d_1, NULL, NULL); + NULL, mask_registers_r2d_1, NULL, NULL); #endif /* CONFIG_RTS7751R2D_1 */ @@ -109,7 +108,7 @@ static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus, - NULL, NULL, mask_registers_r2d_plus, NULL, NULL); + NULL, mask_registers_r2d_plus, NULL, NULL); #endif /* CONFIG_RTS7751R2D_PLUS */ @@ -153,7 +152,4 @@ void __init init_rts7751r2d_IRQ(void) } register_intc_controller(d); -#ifdef CONFIG_MFD_SM501 - setup_voyagergx_irq(); -#endif } diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c index 8125d20fdbd8..3452b072adde 100644 --- a/arch/sh/boards/renesas/rts7751r2d/setup.c +++ b/arch/sh/boards/renesas/rts7751r2d/setup.c @@ -13,34 +13,15 @@ #include <linux/pata_platform.h> #include <linux/serial_8250.h> #include <linux/sm501.h> +#include <linux/sm501-regs.h> #include <linux/pm.h> +#include <linux/fb.h> +#include <linux/spi/spi.h> +#include <linux/spi/spi_bitbang.h> #include <asm/machvec.h> #include <asm/rts7751r2d.h> -#include <asm/voyagergx.h> #include <asm/io.h> - -static void __init voyagergx_serial_init(void) -{ - unsigned long val; - - /* - * GPIO Control - */ - val = readl((void __iomem *)GPIO_MUX_HIGH); - val |= 0x00001fe0; - writel(val, (void __iomem *)GPIO_MUX_HIGH); - - /* - * Power Mode Gate - */ - val = readl((void __iomem *)POWER_MODE0_GATE); - val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1); - writel(val, (void __iomem *)POWER_MODE0_GATE); - - val = readl((void __iomem *)POWER_MODE1_GATE); - val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1); - writel(val, (void __iomem *)POWER_MODE1_GATE); -} +#include <asm/spi.h> static struct resource cf_ide_resources[] = { [0] = { @@ -75,6 +56,43 @@ static struct platform_device cf_ide_device = { }, }; +static struct spi_board_info spi_bus[] = { + { + .modalias = "rtc-r9701", + .max_speed_hz = 1000000, + .mode = SPI_MODE_3, + }, +}; + +static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state) +{ + BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */ + ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE); +} + +static struct sh_spi_info spi_info = { + .num_chipselect = 1, + .chip_select = r2d_chip_select, +}; + +static struct resource spi_sh_sci_resources[] = { + { + .start = 0xffe00000, + .end = 0xffe0001f, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device spi_sh_sci_device = { + .name = "spi_sh_sci", + .id = -1, + .num_resources = ARRAY_SIZE(spi_sh_sci_resources), + .resource = spi_sh_sci_resources, + .dev = { + .platform_data = &spi_info, + }, +}; + static struct resource heartbeat_resources[] = { [0] = { .start = PA_OUTPORT, @@ -93,11 +111,11 @@ static struct platform_device heartbeat_device = { #ifdef CONFIG_MFD_SM501 static struct plat_serial8250_port uart_platform_data[] = { { - .membase = (void __iomem *)VOYAGER_UART_BASE, - .mapbase = VOYAGER_UART_BASE, + .membase = (void __iomem *)0xb3e30000, + .mapbase = 0xb3e30000, .iotype = UPIO_MEM, - .irq = IRQ_SM501_U0, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .irq = IRQ_VOYAGER, + .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ, .regshift = 2, .uartclk = (9600 * 16), }, @@ -124,14 +142,67 @@ static struct resource sm501_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = IRQ_SM501_CV, + .start = IRQ_VOYAGER, .flags = IORESOURCE_IRQ, }, }; +static struct fb_videomode sm501_default_mode = { + .pixclock = 35714, + .xres = 640, + .yres = 480, + .left_margin = 105, + .right_margin = 50, + .upper_margin = 35, + .lower_margin = 0, + .hsync_len = 96, + .vsync_len = 2, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, +}; + +static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = { + .def_bpp = 16, + .def_mode = &sm501_default_mode, + .flags = SM501FB_FLAG_USE_INIT_MODE | + SM501FB_FLAG_USE_HWCURSOR | + SM501FB_FLAG_USE_HWACCEL | + SM501FB_FLAG_DISABLE_AT_EXIT, +}; + +static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = { + .flags = (SM501FB_FLAG_USE_INIT_MODE | + SM501FB_FLAG_USE_HWCURSOR | + SM501FB_FLAG_USE_HWACCEL | + SM501FB_FLAG_DISABLE_AT_EXIT), + +}; + +static struct sm501_platdata_fb sm501_fb_pdata = { + .fb_route = SM501_FB_OWN, + .fb_crt = &sm501_pdata_fbsub_crt, + .fb_pnl = &sm501_pdata_fbsub_pnl, + .flags = SM501_FBPD_SWAP_FB_ENDIAN, +}; + +static struct sm501_initdata sm501_initdata = { + .gpio_high = { + .set = 0x00001fe0, + .mask = 0x0, + }, + .devices = SM501_USE_USB_HOST, +}; + +static struct sm501_platdata sm501_platform_data = { + .init = &sm501_initdata, + .fb = &sm501_fb_pdata, +}; + static struct platform_device sm501_device = { .name = "sm501", .id = -1, + .dev = { + .platform_data = &sm501_platform_data, + }, .num_resources = ARRAY_SIZE(sm501_resources), .resource = sm501_resources, }; @@ -145,10 +216,12 @@ static struct platform_device *rts7751r2d_devices[] __initdata = { #endif &cf_ide_device, &heartbeat_device, + &spi_sh_sci_device, }; static int __init rts7751r2d_devices_setup(void) { + spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); return platform_add_devices(rts7751r2d_devices, ARRAY_SIZE(rts7751r2d_devices)); } @@ -192,6 +265,7 @@ u8 rts7751r2d_readb(void __iomem *addr) */ static void __init rts7751r2d_setup(char **cmdline_p) { + void __iomem *sm501_reg; u16 ver = ctrl_inw(PA_VERREG); printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); @@ -202,7 +276,30 @@ static void __init rts7751r2d_setup(char **cmdline_p) ctrl_outw(0x0000, PA_OUTPORT); pm_power_off = rts7751r2d_power_off; - voyagergx_serial_init(); + /* sm501 dram configuration: + * ColSizeX = 11 - External Memory Column Size: 256 words. + * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks. + * RstX = 1 - External Memory Reset: Normal. + * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks. + * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks. + * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock. + * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks. + * Rst = 1 - Internal Memory Reset: Normal. + * RA = 1 - Internal Memory Remain in Active State: Do not remain. + */ + + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; + writel(readl(sm501_reg) | 0x00f107c0, sm501_reg); + + /* + * Power Mode Gate - Enable UART0 + */ + + sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE; + writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg); + + sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE; + writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg); } /* @@ -215,8 +312,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = { .mv_irq_demux = rts7751r2d_irq_demux, .mv_writeb = rts7751r2d_writeb, .mv_readb = rts7751r2d_readb, -#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD) - .mv_consistent_alloc = voyagergx_consistent_alloc, - .mv_consistent_free = voyagergx_consistent_free, -#endif }; diff --git a/arch/sh/boards/renesas/sdk7780/Kconfig b/arch/sh/boards/renesas/sdk7780/Kconfig new file mode 100644 index 000000000000..e4f5b6985be1 --- /dev/null +++ b/arch/sh/boards/renesas/sdk7780/Kconfig @@ -0,0 +1,23 @@ +if SH_SDK7780 + +choice + prompt "SDK7780 options" + default SH_SDK7780_BASE + +config SH_SDK7780_STANDALONE + bool "SDK7780 board support" + depends on CPU_SUBTYPE_SH7780 + help + Selecting this option will enable support for the + standalone version of the SDK7780. If in doubt, say Y. + +config SH_SDK7780_BASE + bool "SDK7780 with base-board support" + depends on CPU_SUBTYPE_SH7780 + help + Selecting this option will enable support for the expansion + baseboard devices. If in doubt, say Y. + +endchoice + +endif diff --git a/arch/sh/boards/renesas/sdk7780/Makefile b/arch/sh/boards/renesas/sdk7780/Makefile new file mode 100644 index 000000000000..3d8f0befc35d --- /dev/null +++ b/arch/sh/boards/renesas/sdk7780/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the SDK7780 specific parts of the kernel +# +obj-y := setup.o irq.o + diff --git a/arch/sh/boards/renesas/sdk7780/irq.c b/arch/sh/boards/renesas/sdk7780/irq.c new file mode 100644 index 000000000000..87cdc578f6ff --- /dev/null +++ b/arch/sh/boards/renesas/sdk7780/irq.c @@ -0,0 +1,46 @@ +/* + * linux/arch/sh/boards/renesas/sdk7780/irq.c + * + * Renesas Technology Europe SDK7780 Support. + * + * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/io.h> +#include <asm/sdk7780.h> + +enum { + UNUSED = 0, + /* board specific interrupt sources */ + SMC91C111, /* Ethernet controller */ +}; + +static struct intc_vect fpga_vectors[] __initdata = { + INTC_IRQ(SMC91C111, IRQ_ETHERNET), +}; + +static struct intc_mask_reg fpga_mask_registers[] __initdata = { + { 0, FPGA_IRQ0MR, 16, + { 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, SMC91C111, 0, 0, 0, 0 } }, +}; + +static DECLARE_INTC_DESC(fpga_intc_desc, "sdk7780-irq", fpga_vectors, + NULL, fpga_mask_registers, NULL, NULL); + +void __init init_sdk7780_IRQ(void) +{ + printk(KERN_INFO "Using SDK7780 interrupt controller.\n"); + + ctrl_outw(0xFFFF, FPGA_IRQ0MR); + /* Setup IRL 0-3 */ + ctrl_outw(0x0003, FPGA_IMSR); + plat_irq_setup_pins(IRQ_MODE_IRL3210); + + register_intc_controller(&fpga_intc_desc); +} diff --git a/arch/sh/boards/renesas/sdk7780/setup.c b/arch/sh/boards/renesas/sdk7780/setup.c new file mode 100644 index 000000000000..5df32f201870 --- /dev/null +++ b/arch/sh/boards/renesas/sdk7780/setup.c @@ -0,0 +1,109 @@ +/* + * arch/sh/boards/renesas/sdk7780/setup.c + * + * Renesas Solutions SH7780 SDK Support + * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/types.h> +#include <linux/platform_device.h> +#include <linux/pata_platform.h> +#include <asm/machvec.h> +#include <asm/sdk7780.h> +#include <asm/heartbeat.h> +#include <asm/io.h> +#include <asm/addrspace.h> + +#define GPIO_PECR 0xFFEA0008 + +//* Heartbeat */ +static struct heartbeat_data heartbeat_data = { + .regsize = 16, +}; + +static struct resource heartbeat_resources[] = { + [0] = { + .start = PA_LED, + .end = PA_LED, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + .dev = { + .platform_data = &heartbeat_data, + }, + .num_resources = ARRAY_SIZE(heartbeat_resources), + .resource = heartbeat_resources, +}; + +/* SMC91x */ +static struct resource smc91x_eth_resources[] = { + [0] = { + .name = "smc91x-regs" , + .start = PA_LAN + 0x300, + .end = PA_LAN + 0x300 + 0x10 , + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_ETHERNET, + .end = IRQ_ETHERNET, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc91x_eth_device = { + .name = "smc91x", + .id = 0, + .dev = { + .dma_mask = NULL, /* don't use dma */ + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(smc91x_eth_resources), + .resource = smc91x_eth_resources, +}; + +static struct platform_device *sdk7780_devices[] __initdata = { + &heartbeat_device, + &smc91x_eth_device, +}; + +static int __init sdk7780_devices_setup(void) +{ + return platform_add_devices(sdk7780_devices, + ARRAY_SIZE(sdk7780_devices)); +} +device_initcall(sdk7780_devices_setup); + +static void __init sdk7780_setup(char **cmdline_p) +{ + u16 ver = ctrl_inw(FPGA_FPVERR); + u16 dateStamp = ctrl_inw(FPGA_FPDATER); + + printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n"); + printk(KERN_INFO "Board version: %d (revision %d), " + "FPGA version: %d (revision %d), datestamp : %d\n", + (ver >> 12) & 0xf, (ver >> 8) & 0xf, + (ver >> 4) & 0xf, ver & 0xf, + dateStamp); + + /* Setup pin mux'ing for PCIC */ + ctrl_outw(0x0000, GPIO_PECR); +} + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_se7780 __initmv = { + .mv_name = "Renesas SDK7780-R3" , + .mv_setup = sdk7780_setup, + .mv_nr_irqs = 111, + .mv_init_irq = init_sdk7780_IRQ, +}; + diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile index 1b0f5be01d10..59f552c13349 100644 --- a/arch/sh/boot/Makefile +++ b/arch/sh/boot/Makefile @@ -35,17 +35,28 @@ $(obj)/compressed/vmlinux: FORCE KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%8x" \ $$[$(CONFIG_PAGE_OFFSET) + \ $(CONFIG_MEMORY_START) + \ + $(CONFIG_ZERO_PAGE_OFFSET)]') + +KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%8x" \ + $$[$(CONFIG_PAGE_OFFSET) + \ + $(CONFIG_MEMORY_START) + \ $(CONFIG_ZERO_PAGE_OFFSET)+0x1000]') quiet_cmd_uimage = UIMAGE $@ cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \ - -C none -a $(KERNEL_LOAD) -e $(KERNEL_LOAD) \ + -C none -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \ -n 'Linux-$(KERNELRELEASE)' -d $< $@ -$(obj)/uImage: $(obj)/zImage FORCE +$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE $(call if_changed,uimage) @echo ' Image $@ is ready' +$(obj)/vmlinux.bin: vmlinux FORCE + $(call if_changed,objcopy) + +$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE + $(call if_changed,gzip) + OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec $(obj)/vmlinux.srec: $(obj)/compressed/vmlinux $(call if_changed,objcopy) @@ -54,4 +65,5 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec $(obj)/uImage.srec: $(obj)/uImage $(call if_changed,objcopy) -clean-files += uImage uImage.srec vmlinux.srec +clean-files += uImage uImage.srec vmlinux.srec \ + vmlinux.bin vmlinux.bin.gz diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index 906a13f82fe0..efb01dc3c8c3 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile @@ -1,43 +1,5 @@ -# -# linux/arch/sh/boot/compressed/Makefile -# -# create a compressed vmlinux image from the original vmlinux -# - -targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o -EXTRA_AFLAGS := -traditional - -OBJECTS = $(obj)/head.o $(obj)/misc.o - -ifdef CONFIG_SH_STANDARD_BIOS -OBJECTS += $(obj)/../../kernel/sh_bios.o +ifeq ($(CONFIG_SUPERH32),y) +include ${srctree}/arch/sh/boot/compressed/Makefile_32 +else +include ${srctree}/arch/sh/boot/compressed/Makefile_64 endif - -# -# IMAGE_OFFSET is the load offset of the compression loader -# -IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \ - $$[$(CONFIG_PAGE_OFFSET) + \ - $(CONFIG_MEMORY_START) + \ - $(CONFIG_BOOT_LINK_OFFSET)]') - -LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) - -LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds - - -$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE - $(call if_changed,ld) - @: - -$(obj)/vmlinux.bin: vmlinux FORCE - $(call if_changed,objcopy) - -$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE - $(call if_changed,gzip) - -LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T -OBJCOPYFLAGS += -R .empty_zero_page - -$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE - $(call if_changed,ld) diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32 new file mode 100644 index 000000000000..6ac8d4a4ed1d --- /dev/null +++ b/arch/sh/boot/compressed/Makefile_32 @@ -0,0 +1,43 @@ +# +# linux/arch/sh/boot/compressed/Makefile +# +# create a compressed vmlinux image from the original vmlinux +# + +targets := vmlinux vmlinux.bin vmlinux.bin.gz \ + head_32.o misc_32.o piggy.o +EXTRA_AFLAGS := -traditional + +OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o + +ifdef CONFIG_SH_STANDARD_BIOS +OBJECTS += $(obj)/../../kernel/sh_bios.o +endif + +# +# IMAGE_OFFSET is the load offset of the compression loader +# +IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \ + $$[$(CONFIG_PAGE_OFFSET) + \ + $(CONFIG_MEMORY_START) + \ + $(CONFIG_BOOT_LINK_OFFSET)]') + +LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) + +LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds + +$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE + $(call if_changed,ld) + @: + +$(obj)/vmlinux.bin: vmlinux FORCE + $(call if_changed,objcopy) + +$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE + $(call if_changed,gzip) + +LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T +OBJCOPYFLAGS += -R .empty_zero_page + +$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE + $(call if_changed,ld) diff --git a/arch/sh64/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile_64 index 9cd216718856..4334f2b86d8f 100644 --- a/arch/sh64/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile_64 @@ -1,32 +1,32 @@ # -# linux/arch/sh64/boot/compressed/Makefile +# arch/sh/boot/compressed/Makefile_64 # -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. +# create a compressed vmlinux image from the original vmlinux # # Copyright (C) 2002 Stuart Menefy # Copyright (C) 2004 Paul Mundt # -# create a compressed vmlinux image from the original vmlinux +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. # targets := vmlinux vmlinux.bin vmlinux.bin.gz \ - head.o misc.o cache.o piggy.o vmlinux.lds - + head_64.o misc_64.o cache.o piggy.o EXTRA_AFLAGS := -traditional -OBJECTS := $(obj)/head.o $(obj)/misc.o $(obj)/cache.o +OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \ + $(obj)/cache.o # # ZIMAGE_OFFSET is the load offset of the compression loader # (4M for the kernel plus 64K for this loader) # -ZIMAGE_OFFSET = $(shell printf "0x%8x" $$[$(CONFIG_MEMORY_START)+0x400000+0x10000]) +ZIMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \ + $$[$(CONFIG_PAGE_OFFSET)+0x400000+0x10000]') LDFLAGS_vmlinux := -Ttext $(ZIMAGE_OFFSET) -e startup \ - -T $(obj)/../../kernel/vmlinux.lds \ - --no-warn-mismatch + -T $(obj)/../../kernel/vmlinux.lds $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE $(call if_changed,ld) @@ -41,6 +41,5 @@ $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh64-linux -T OBJCOPYFLAGS += -R .empty_zero_page -$(obj)/piggy.o: $(obj)/vmlinux.lds $(obj)/vmlinux.bin.gz FORCE +$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE $(call if_changed,ld) - diff --git a/arch/sh/boot/compressed/cache.c b/arch/sh/boot/compressed/cache.c new file mode 100644 index 000000000000..e27fc74f228c --- /dev/null +++ b/arch/sh/boot/compressed/cache.c @@ -0,0 +1,12 @@ +int cache_control(unsigned int command) +{ + volatile unsigned int *p = (volatile unsigned int *) 0x80000000; + int i; + + for (i = 0; i < (32 * 1024); i += 32) { + (void)*p; + p += (32 / sizeof (int)); + } + + return 0; +} diff --git a/arch/sh/boot/compressed/head.S b/arch/sh/boot/compressed/head_32.S index a8399b013729..a8399b013729 100644 --- a/arch/sh/boot/compressed/head.S +++ b/arch/sh/boot/compressed/head_32.S diff --git a/arch/sh64/boot/compressed/head.S b/arch/sh/boot/compressed/head_64.S index 82040b1a29cf..1d4ecbfc767c 100644 --- a/arch/sh64/boot/compressed/head.S +++ b/arch/sh/boot/compressed/head_64.S @@ -13,11 +13,10 @@ * Modification for compressed loader: * Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com) */ - #include <linux/linkage.h> -#include <asm/registers.h> #include <asm/cache.h> -#include <asm/mmu_context.h> +#include <asm/cpu/mmu_context.h> +#include <asm/cpu/registers.h> /* * Fixed TLB entries to identity map the beginning of RAM @@ -51,14 +50,14 @@ startup: * uninitialized target registers. * This must be executed before the first branch. */ - ptabs/u ZERO, tr0 - ptabs/u ZERO, tr1 - ptabs/u ZERO, tr2 - ptabs/u ZERO, tr3 - ptabs/u ZERO, tr4 - ptabs/u ZERO, tr5 - ptabs/u ZERO, tr6 - ptabs/u ZERO, tr7 + ptabs/u r63, tr0 + ptabs/u r63, tr1 + ptabs/u r63, tr2 + ptabs/u r63, tr3 + ptabs/u r63, tr4 + ptabs/u r63, tr5 + ptabs/u r63, tr6 + ptabs/u r63, tr7 synci /* @@ -69,7 +68,7 @@ startup: pta 1f, tr1 movi ITLB_FIXED, r21 movi ITLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22 -1: putcfg r21, 0, ZERO /* Clear MMUIR[n].PTEH.V */ +1: putcfg r21, 0, r63 /* Clear MMUIR[n].PTEH.V */ addi r21, TLB_STEP, r21 bne r21, r22, tr1 @@ -77,7 +76,7 @@ startup: pta 1f, tr1 movi DTLB_FIXED, r21 movi DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22 -1: putcfg r21, 0, ZERO /* Clear MMUDR[n].PTEH.V */ +1: putcfg r21, 0, r63 /* Clear MMUDR[n].PTEH.V */ addi r21, TLB_STEP, r21 bne r21, r22, tr1 @@ -133,7 +132,7 @@ startup: pt 1f, tr1 movi datalabel __bss_start, r22 movi datalabel _end, r23 -1: st.l r22, 0, ZERO +1: st.l r22, 0, r63 addi r22, 4, r22 bne r22, r23, tr1 @@ -161,4 +160,4 @@ startup: /* Shouldn't return here, but just in case, loop forever */ pt 1f, tr0 -1: blink tr0, ZERO +1: blink tr0, r63 diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc_32.c index df65e305acf7..adcea31e663e 100644 --- a/arch/sh/boot/compressed/misc.c +++ b/arch/sh/boot/compressed/misc_32.c @@ -230,7 +230,10 @@ long* stack_start = &user_stack[STACK_SIZE]; void decompress_kernel(void) { output_data = 0; - output_ptr = P2SEGADDR((unsigned long)&_text+PAGE_SIZE); + output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE); +#ifdef CONFIG_29BIT + output_ptr |= P2SEG; +#endif free_mem_ptr = (unsigned long)&_end; free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; diff --git a/arch/sh64/boot/compressed/misc.c b/arch/sh/boot/compressed/misc_64.c index aea00c53ce29..a006ef89b9dd 100644 --- a/arch/sh64/boot/compressed/misc.c +++ b/arch/sh/boot/compressed/misc_64.c @@ -1,5 +1,5 @@ /* - * arch/sh64/boot/compressed/misc.c + * arch/sh/boot/compressed/misc_64.c * * This is a collection of several routines from gzip-1.0.3 * adapted for Linux. diff --git a/arch/sh64/boot/compressed/vmlinux.lds.S b/arch/sh/boot/compressed/vmlinux_64.lds index 59c2ef4aeda5..59c2ef4aeda5 100644 --- a/arch/sh64/boot/compressed/vmlinux.lds.S +++ b/arch/sh/boot/compressed/vmlinux_64.lds diff --git a/arch/sh/cchips/voyagergx/Makefile b/arch/sh/cchips/voyagergx/Makefile deleted file mode 100644 index f73963cb3744..000000000000 --- a/arch/sh/cchips/voyagergx/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# Makefile for VoyagerGX -# - -obj-y := irq.o setup.o - -obj-$(CONFIG_USB_OHCI_HCD) += consistent.o - -EXTRA_CFLAGS += -Werror diff --git a/arch/sh/cchips/voyagergx/consistent.c b/arch/sh/cchips/voyagergx/consistent.c deleted file mode 100644 index 07e8b9c5a531..000000000000 --- a/arch/sh/cchips/voyagergx/consistent.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * arch/sh/cchips/voyagergx/consistent.c - * - * Copyright (C) 2004 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/mm.h> -#include <linux/dma-mapping.h> -#include <linux/slab.h> -#include <linux/list.h> -#include <linux/types.h> -#include <linux/module.h> -#include <linux/device.h> -#include <asm/io.h> - - -struct voya_alloc_entry { - struct list_head list; - unsigned long ofs; - unsigned long len; -}; - -static DEFINE_SPINLOCK(voya_list_lock); -static LIST_HEAD(voya_alloc_list); - -#define OHCI_SRAM_START 0xb0000000 -#define OHCI_HCCA_SIZE 0x100 -#define OHCI_SRAM_SIZE 0x10000 - -#define VOYAGER_OHCI_NAME "voyager-ohci" - -void *voyagergx_consistent_alloc(struct device *dev, size_t size, - dma_addr_t *handle, gfp_t flag) -{ - struct list_head *list = &voya_alloc_list; - struct voya_alloc_entry *entry; - unsigned long start, end; - unsigned long flags; - - /* - * The SM501 contains an integrated 8051 with its own SRAM. - * Devices within the cchip can all hook into the 8051 SRAM. - * We presently use this for the OHCI. - * - * Everything else goes through consistent_alloc(). - */ - if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME)) - return NULL; - - start = OHCI_SRAM_START + OHCI_HCCA_SIZE; - - entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC); - if (!entry) - return ERR_PTR(-ENOMEM); - - entry->len = (size + 15) & ~15; - - /* - * The basis for this allocator is dwmw2's malloc.. the - * Matrox allocator :-) - */ - spin_lock_irqsave(&voya_list_lock, flags); - list_for_each(list, &voya_alloc_list) { - struct voya_alloc_entry *p; - - p = list_entry(list, struct voya_alloc_entry, list); - - if (p->ofs - start >= size) - goto out; - - start = p->ofs + p->len; - } - - end = start + (OHCI_SRAM_SIZE - OHCI_HCCA_SIZE); - list = &voya_alloc_list; - - if (end - start >= size) { -out: - entry->ofs = start; - list_add_tail(&entry->list, list); - spin_unlock_irqrestore(&voya_list_lock, flags); - - *handle = start; - return (void *)start; - } - - kfree(entry); - spin_unlock_irqrestore(&voya_list_lock, flags); - - return ERR_PTR(-EINVAL); -} - -int voyagergx_consistent_free(struct device *dev, size_t size, - void *vaddr, dma_addr_t handle) -{ - struct voya_alloc_entry *entry; - unsigned long flags; - - if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME)) - return -EINVAL; - - spin_lock_irqsave(&voya_list_lock, flags); - list_for_each_entry(entry, &voya_alloc_list, list) { - if (entry->ofs != handle) - continue; - - list_del(&entry->list); - kfree(entry); - - break; - } - spin_unlock_irqrestore(&voya_list_lock, flags); - - return 0; -} - -EXPORT_SYMBOL(voyagergx_consistent_alloc); -EXPORT_SYMBOL(voyagergx_consistent_free); diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c deleted file mode 100644 index ade303876841..000000000000 --- a/arch/sh/cchips/voyagergx/irq.c +++ /dev/null @@ -1,101 +0,0 @@ -/* -------------------------------------------------------------------- */ -/* setup_voyagergx.c: */ -/* -------------------------------------------------------------------- */ -/* This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Copyright 2003 (c) Lineo uSolutions,Inc. -*/ -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/io.h> -#include <asm/voyagergx.h> -#include <asm/rts7751r2d.h> - -enum { - UNUSED = 0, - - /* voyager specific interrupt sources */ - UP, G54, G53, G52, G51, G50, G49, G48, - I2C, PW, DMA, PCI, I2S, AC, US, - U1, U0, CV, MC, S1, S0, - UH, TWOD, ZD, PV, CI, -}; - -static struct intc_vect vectors[] __initdata = { - INTC_IRQ(UP, IRQ_SM501_UP), INTC_IRQ(G54, IRQ_SM501_G54), - INTC_IRQ(G53, IRQ_SM501_G53), INTC_IRQ(G52, IRQ_SM501_G52), - INTC_IRQ(G51, IRQ_SM501_G51), INTC_IRQ(G50, IRQ_SM501_G50), - INTC_IRQ(G49, IRQ_SM501_G49), INTC_IRQ(G48, IRQ_SM501_G48), - INTC_IRQ(I2C, IRQ_SM501_I2C), INTC_IRQ(PW, IRQ_SM501_PW), - INTC_IRQ(DMA, IRQ_SM501_DMA), INTC_IRQ(PCI, IRQ_SM501_PCI), - INTC_IRQ(I2S, IRQ_SM501_I2S), INTC_IRQ(AC, IRQ_SM501_AC), - INTC_IRQ(US, IRQ_SM501_US), INTC_IRQ(U1, IRQ_SM501_U1), - INTC_IRQ(U0, IRQ_SM501_U0), INTC_IRQ(CV, IRQ_SM501_CV), - INTC_IRQ(MC, IRQ_SM501_MC), INTC_IRQ(S1, IRQ_SM501_S1), - INTC_IRQ(S0, IRQ_SM501_S0), INTC_IRQ(UH, IRQ_SM501_UH), - INTC_IRQ(TWOD, IRQ_SM501_2D), INTC_IRQ(ZD, IRQ_SM501_ZD), - INTC_IRQ(PV, IRQ_SM501_PV), INTC_IRQ(CI, IRQ_SM501_CI), -}; - -static struct intc_mask_reg mask_registers[] __initdata = { - { VOYAGER_INT_MASK, 0, 32, /* "Interrupt Mask", MMIO_base + 0x30 */ - { UP, G54, G53, G52, G51, G50, G49, G48, - I2C, PW, 0, DMA, PCI, I2S, AC, US, - 0, 0, U1, U0, CV, MC, S1, S0, - 0, UH, 0, 0, TWOD, ZD, PV, CI } }, -}; - -static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors, - NULL, NULL, mask_registers, NULL, NULL); - -static unsigned int voyagergx_stat2irq[32] = { - IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D, - 0, 0, IRQ_SM501_UH, 0, - IRQ_SM501_S0, IRQ_SM501_S1, IRQ_SM501_MC, IRQ_SM501_CV, - IRQ_SM501_U0, IRQ_SM501_U1, 0, 0, - IRQ_SM501_US, IRQ_SM501_AC, IRQ_SM501_I2S, IRQ_SM501_PCI, - IRQ_SM501_DMA, 0, IRQ_SM501_PW, IRQ_SM501_I2C, - IRQ_SM501_G48, IRQ_SM501_G49, IRQ_SM501_G50, IRQ_SM501_G51, - IRQ_SM501_G52, IRQ_SM501_G53, IRQ_SM501_G54, IRQ_SM501_UP -}; - -static void voyagergx_irq_demux(unsigned int irq, struct irq_desc *desc) -{ - unsigned long intv = ctrl_inl(INT_STATUS); - struct irq_desc *ext_desc; - unsigned int ext_irq; - unsigned int k = 0; - - while (intv) { - ext_irq = voyagergx_stat2irq[k]; - if (ext_irq && (intv & 1)) { - ext_desc = irq_desc + ext_irq; - handle_level_irq(ext_irq, ext_desc); - } - intv >>= 1; - k++; - } -} - -void __init setup_voyagergx_irq(void) -{ - printk(KERN_INFO "VoyagerGX on irq %d (mapped into %d to %d)\n", - IRQ_VOYAGER, - VOYAGER_IRQ_BASE, - VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1); - - register_intc_controller(&intc_desc); - set_irq_chained_handler(IRQ_VOYAGER, voyagergx_irq_demux); -} diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c deleted file mode 100644 index 33f03027c193..000000000000 --- a/arch/sh/cchips/voyagergx/setup.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * arch/sh/cchips/voyagergx/setup.c - * - * Setup routines for VoyagerGX cchip. - * - * Copyright (C) 2003 Lineo uSolutions, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include <linux/init.h> -#include <linux/module.h> -#include <asm/io.h> -#include <asm/voyagergx.h> - -static int __init setup_voyagergx(void) -{ - unsigned long val; - - val = readl((void __iomem *)DRAM_CTRL); - val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 | - DRAM_CTRL_CPU_ACTIVE_PRECHARGE | - DRAM_CTRL_CPU_RESET | - DRAM_CTRL_REFRESH_COMMAND | - DRAM_CTRL_BLOCK_WRITE_TIME | - DRAM_CTRL_BLOCK_WRITE_PRECHARGE | - DRAM_CTRL_ACTIVE_PRECHARGE | - DRAM_CTRL_RESET | - DRAM_CTRL_REMAIN_ACTIVE); - writel(val, (void __iomem *)DRAM_CTRL); - - return 0; -} - -module_init(setup_voyagergx); diff --git a/arch/sh64/configs/cayman_defconfig b/arch/sh/configs/cayman_defconfig index 75552bb01405..a05b278d72f5 100644 --- a/arch/sh64/configs/cayman_defconfig +++ b/arch/sh/configs/cayman_defconfig @@ -1,18 +1,22 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.24-rc1 -# Fri Nov 2 14:35:27 2007 +# Linux kernel version: 2.6.24-rc3 +# Fri Nov 23 14:15:55 2007 # CONFIG_SUPERH=y +# CONFIG_SUPERH32 is not set CONFIG_SUPERH64=y -CONFIG_MMU=y -CONFIG_QUICKLIST=y CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_GENERIC_TIME is not set +# CONFIG_GENERIC_CLOCKEVENTS is not set +CONFIG_SYS_SUPPORTS_PCI=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_ARCH_NO_VIRT_TO_BUS=y @@ -33,6 +37,7 @@ CONFIG_POSIX_MQUEUE=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set # CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 @@ -45,7 +50,7 @@ CONFIG_SYSFS_DEPRECATED=y # CONFIG_BLK_DEV_INITRD is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y -# CONFIG_EMBEDDED is not set +CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y @@ -97,73 +102,153 @@ CONFIG_DEFAULT_IOSCHED="cfq" # # System type # -# CONFIG_SH_SIMULATOR is not set -CONFIG_SH_CAYMAN=y -# CONFIG_SH_HARP is not set CONFIG_CPU_SH5=y +# CONFIG_CPU_SUBTYPE_SH7619 is not set +# CONFIG_CPU_SUBTYPE_SH7206 is not set +# CONFIG_CPU_SUBTYPE_SH7705 is not set +# CONFIG_CPU_SUBTYPE_SH7706 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7710 is not set +# CONFIG_CPU_SUBTYPE_SH7712 is not set +# CONFIG_CPU_SUBTYPE_SH7720 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +# CONFIG_CPU_SUBTYPE_SH7091 is not set +# CONFIG_CPU_SUBTYPE_SH7750R is not set +# CONFIG_CPU_SUBTYPE_SH7750S is not set +# CONFIG_CPU_SUBTYPE_SH7751 is not set +# CONFIG_CPU_SUBTYPE_SH7751R is not set +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_SH4_202 is not set +# CONFIG_CPU_SUBTYPE_SH7770 is not set +# CONFIG_CPU_SUBTYPE_SH7780 is not set +# CONFIG_CPU_SUBTYPE_SH7785 is not set +# CONFIG_CPU_SUBTYPE_SHX3 is not set +# CONFIG_CPU_SUBTYPE_SH7343 is not set +# CONFIG_CPU_SUBTYPE_SH7722 is not set CONFIG_CPU_SUBTYPE_SH5_101=y # CONFIG_CPU_SUBTYPE_SH5_103 is not set -CONFIG_LITTLE_ENDIAN=y -# CONFIG_BIG_ENDIAN is not set -CONFIG_SH_FPU=y -# CONFIG_SH64_FPU_DENORM_FLUSH is not set -CONFIG_SH64_PGTABLE_2_LEVEL=y -# CONFIG_SH64_PGTABLE_3_LEVEL is not set + +# +# Memory management options +# +CONFIG_QUICKLIST=y +CONFIG_MMU=y +CONFIG_PAGE_OFFSET=0x20000000 +CONFIG_MEMORY_START=0x80000000 +CONFIG_MEMORY_SIZE=0x00400000 +CONFIG_32BIT=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_MAX_ACTIVE_REGIONS=1 +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_64KB is not set CONFIG_HUGETLB_PAGE_SIZE_64K=y +# CONFIG_HUGETLB_PAGE_SIZE_256K is not set # CONFIG_HUGETLB_PAGE_SIZE_1MB is not set +# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set +# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set # CONFIG_HUGETLB_PAGE_SIZE_512MB is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_RESOURCES_64BIT=y +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NR_QUICK=2 + +# +# Cache configuration +# +# CONFIG_SH_DIRECT_MAPPED is not set +# CONFIG_CACHE_WRITEBACK is not set +# CONFIG_CACHE_WRITETHROUGH is not set +CONFIG_CACHE_OFF=y + +# +# Processor features +# +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SH_FPU=y +# CONFIG_SH64_FPU_DENORM_FLUSH is not set CONFIG_SH64_USER_MISALIGNED_FIXUP=y +CONFIG_SH64_ID2815_WORKAROUND=y +CONFIG_CPU_HAS_FPU=y # -# Memory options +# Board support # -CONFIG_CACHED_MEMORY_OFFSET=0x20000000 -CONFIG_MEMORY_START=0x80000000 -CONFIG_MEMORY_SIZE_IN_MB=128 +CONFIG_SH_CAYMAN=y # -# Cache options +# Timer and clock configuration # -CONFIG_DCACHE_WRITE_BACK=y -# CONFIG_DCACHE_WRITE_THROUGH is not set -# CONFIG_DCACHE_DISABLED is not set -# CONFIG_ICACHE_DISABLED is not set -CONFIG_PCIDEVICE_MEMORY_START=C0000000 -CONFIG_DEVICE_MEMORY_START=E0000000 -CONFIG_FLASH_MEMORY_START=0x00000000 -CONFIG_PCI_BLOCK_START=0x40000000 +CONFIG_SH_TIMER_IRQ=16 +CONFIG_SH_PCLK_FREQ=50000000 +# CONFIG_TICK_ONESHOT is not set # -# CPU Subtype specific options +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# DMA support # -CONFIG_SH64_ID2815_WORKAROUND=y # -# Misc options +# Companion Chips +# + +# +# Additional SuperH Device Drivers # CONFIG_HEARTBEAT=y -CONFIG_HDSP253_LED=y -# CONFIG_SH_DMA is not set +# CONFIG_PUSH_SWITCH is not set + +# +# Kernel features +# +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_NR_QUICK=1 +CONFIG_PREEMPT_BKL=y +CONFIG_GUSA=y + +# +# Boot options +# +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +# CONFIG_CMDLINE_BOOL is not set # -# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# Bus options # CONFIG_PCI=y CONFIG_SH_PCIDMA_NONCOHERENT=y +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y # CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCCARD is not set # CONFIG_HOTPLUG_PCI is not set @@ -354,11 +439,7 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_STEX is not set -CONFIG_SCSI_SYM53C8XX_2=y -CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0 -CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 -CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 -CONFIG_SCSI_SYM53C8XX_MMIO=y +# CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_QLA_FC is not set # CONFIG_SCSI_QLA_ISCSI is not set @@ -391,6 +472,7 @@ CONFIG_NETDEVICES=y # CONFIG_PHYLIB is not set CONFIG_NET_ETHERNET=y # CONFIG_MII is not set +# CONFIG_AX88796 is not set # CONFIG_STNIC is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNGEM is not set @@ -398,40 +480,14 @@ CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_SMC91X is not set # CONFIG_SMC911X is not set -CONFIG_NET_TULIP=y -# CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_ULI526X is not set +# CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_EMAC4 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_NET_PCI is not set # CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_EEPRO100 is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_SC92031 is not set CONFIG_NETDEV_1000=y # CONFIG_ACENIC is not set # CONFIG_DL2K is not set @@ -492,7 +548,7 @@ CONFIG_INPUT=y # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set @@ -502,24 +558,8 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # # Input Device Drivers # -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set @@ -528,12 +568,7 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y # # Hardware I/O ports # -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_PCIPS2 is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO is not set # CONFIG_GAMEPORT is not set # @@ -553,11 +588,7 @@ CONFIG_HW_CONSOLE=y # # Non-8250 serial port support # -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=2 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_SH_SCI is not set # CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y @@ -642,6 +673,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set @@ -832,9 +864,9 @@ CONFIG_VIDEO_OUTPUT_CONTROL=y CONFIG_FB=y CONFIG_FIRMWARE_EDID=y # CONFIG_FB_DDC is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set # CONFIG_FB_SYS_FILLRECT is not set # CONFIG_FB_SYS_COPYAREA is not set @@ -866,7 +898,7 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_SAVAGE is not set # CONFIG_FB_SIS is not set # CONFIG_FB_NEOMAGIC is not set -CONFIG_FB_KYRO=y +# CONFIG_FB_KYRO is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set # CONFIG_FB_VT8623 is not set @@ -1062,6 +1094,7 @@ CONFIG_INSTRUMENTATION=y # # Kernel hacking # +CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y @@ -1076,10 +1109,14 @@ CONFIG_SCHED_DEBUG=y CONFIG_SCHEDSTATS=y # CONFIG_TIMER_STATS is not set # CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set @@ -1094,8 +1131,11 @@ CONFIG_FORCED_INLINING=y # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_FAULT_INJECTION is not set # CONFIG_SAMPLES is not set -# CONFIG_EARLY_PRINTK is not set -CONFIG_SH64_PROC_TLB=y +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_EARLY_SCIF_CONSOLE is not set +# CONFIG_DEBUG_BOOTMEM is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_4KSTACKS is not set CONFIG_SH64_PROC_ASIDS=y CONFIG_SH64_SR_WATCH=y # CONFIG_POOR_MANS_STRACE is not set diff --git a/arch/sh/configs/hs7751rvoip_defconfig b/arch/sh/configs/hs7751rvoip_defconfig deleted file mode 100644 index 5d9da5a02759..000000000000 --- a/arch/sh/configs/hs7751rvoip_defconfig +++ /dev/null @@ -1,908 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.18 -# Tue Oct 3 13:04:52 2006 -# -CONFIG_SUPERH=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -CONFIG_POSIX_MQUEUE=y -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -# CONFIG_RELAY is not set -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_KALLSYMS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# System type -# -# CONFIG_SH_SOLUTION_ENGINE is not set -# CONFIG_SH_7751_SOLUTION_ENGINE is not set -# CONFIG_SH_7300_SOLUTION_ENGINE is not set -# CONFIG_SH_7343_SOLUTION_ENGINE is not set -# CONFIG_SH_73180_SOLUTION_ENGINE is not set -# CONFIG_SH_7751_SYSTEMH is not set -# CONFIG_SH_HP6XX is not set -# CONFIG_SH_EC3104 is not set -# CONFIG_SH_SATURN is not set -# CONFIG_SH_DREAMCAST is not set -# CONFIG_SH_BIGSUR is not set -# CONFIG_SH_MPC1211 is not set -# CONFIG_SH_SH03 is not set -# CONFIG_SH_SECUREEDGE5410 is not set -CONFIG_SH_HS7751RVOIP=y -# CONFIG_SH_7710VOIPGW is not set -# CONFIG_SH_RTS7751R2D is not set -# CONFIG_SH_R7780RP is not set -# CONFIG_SH_EDOSK7705 is not set -# CONFIG_SH_SH4202_MICRODEV is not set -# CONFIG_SH_LANDISK is not set -# CONFIG_SH_TITAN is not set -# CONFIG_SH_SHMIN is not set -# CONFIG_SH_UNKNOWN is not set - -# -# Processor selection -# -CONFIG_CPU_SH4=y - -# -# SH-2 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7604 is not set - -# -# SH-3 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7300 is not set -# CONFIG_CPU_SUBTYPE_SH7705 is not set -# CONFIG_CPU_SUBTYPE_SH7706 is not set -# CONFIG_CPU_SUBTYPE_SH7707 is not set -# CONFIG_CPU_SUBTYPE_SH7708 is not set -# CONFIG_CPU_SUBTYPE_SH7709 is not set -# CONFIG_CPU_SUBTYPE_SH7710 is not set - -# -# SH-4 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7750 is not set -# CONFIG_CPU_SUBTYPE_SH7091 is not set -# CONFIG_CPU_SUBTYPE_SH7750R is not set -# CONFIG_CPU_SUBTYPE_SH7750S is not set -# CONFIG_CPU_SUBTYPE_SH7751 is not set -CONFIG_CPU_SUBTYPE_SH7751R=y -# CONFIG_CPU_SUBTYPE_SH7760 is not set -# CONFIG_CPU_SUBTYPE_SH4_202 is not set - -# -# ST40 Processor Support -# -# CONFIG_CPU_SUBTYPE_ST40STB1 is not set -# CONFIG_CPU_SUBTYPE_ST40GX1 is not set - -# -# SH-4A Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7770 is not set -# CONFIG_CPU_SUBTYPE_SH7780 is not set - -# -# SH4AL-DSP Processor Support -# -# CONFIG_CPU_SUBTYPE_SH73180 is not set -# CONFIG_CPU_SUBTYPE_SH7343 is not set - -# -# Memory management options -# -CONFIG_MMU=y -CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_MEMORY_START=0x0c000000 -CONFIG_MEMORY_SIZE=0x04000000 -CONFIG_VSYSCALL=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set - -# -# Cache configuration -# -# CONFIG_SH_DIRECT_MAPPED is not set -# CONFIG_SH_WRITETHROUGH is not set -# CONFIG_SH_OCRAM is not set - -# -# Processor features -# -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SH_FPU=y -# CONFIG_SH_DSP is not set -# CONFIG_SH_STORE_QUEUES is not set -CONFIG_CPU_HAS_INTEVT=y -CONFIG_CPU_HAS_SR_RB=y - -# -# Timer support -# -CONFIG_SH_TMU=y - -# -# HS7751RVoIP options -# -CONFIG_HS7751RVOIP_CODEC=y -CONFIG_SH_PCLK_FREQ=60000000 - -# -# CPU Frequency scaling -# -# CONFIG_CPU_FREQ is not set - -# -# DMA support -# -# CONFIG_SH_DMA is not set - -# -# Companion Chips -# -# CONFIG_HD6446X_SERIES is not set - -# -# Kernel features -# -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -# CONFIG_KEXEC is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_PREEMPT_BKL=y - -# -# Boot options -# -CONFIG_ZERO_PAGE_OFFSET=0x00001000 -CONFIG_BOOT_LINK_OFFSET=0x00800000 -# CONFIG_UBC_WAKEUP is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="mem=64M console=ttySC1,115200 root=/dev/hda1" - -# -# Bus options -# -# CONFIG_PCI is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_FLAT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options (EXPERIMENTAL) -# -# CONFIG_PM is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_ASK_IP_FIB_HASH=y -# CONFIG_IP_FIB_TRIE is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_MULTIPLE_TABLES is not set -# CONFIG_IP_ROUTE_MULTIPATH is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_IEEE80211 is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -# CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_IDE_MAX_HWIFS=1 -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_IDE_TASK_IOCTL is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -# CONFIG_IDE_ARM is not set -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# PHY device support -# -# CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_STNIC is not set -# CONFIG_SMC91X is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=2 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -CONFIG_HW_RANDOM=y -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# - -# -# Hardware Monitoring support -# -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -CONFIG_VIDEO_V4L2=y - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -CONFIG_FIRMWARE_EDID=y -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set -# CONFIG_USB_ARCH_HAS_EHCI is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# -# CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLBFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -CONFIG_NFS_DIRECTIO=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_SH_STANDARD_BIOS is not set -# CONFIG_EARLY_SCIF_CONSOLE is not set -# CONFIG_KGDB is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_MANAGER=m -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_TGR192 is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_PLIST=y diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig index 2e43a2a971a9..0dc1ce7b9349 100644 --- a/arch/sh/configs/r7785rp_defconfig +++ b/arch/sh/configs/r7785rp_defconfig @@ -1,9 +1,10 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.24-rc2 -# Tue Nov 13 20:34:57 2007 +# Linux kernel version: 2.6.24-rc3 +# Fri Nov 23 14:03:57 2007 # CONFIG_SUPERH=y +CONFIG_SUPERH32=y CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_FIND_NEXT_BIT=y @@ -39,6 +40,7 @@ CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set # CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y @@ -130,6 +132,8 @@ CONFIG_CPU_SUBTYPE_SH7785=y # CONFIG_CPU_SUBTYPE_SHX3 is not set # CONFIG_CPU_SUBTYPE_SH7343 is not set # CONFIG_CPU_SUBTYPE_SH7722 is not set +# CONFIG_CPU_SUBTYPE_SH5_101 is not set +# CONFIG_CPU_SUBTYPE_SH5_103 is not set # # Memory management options @@ -139,7 +143,8 @@ CONFIG_MMU=y CONFIG_PAGE_OFFSET=0x80000000 CONFIG_MEMORY_START=0x08000000 CONFIG_MEMORY_SIZE=0x08000000 -# CONFIG_32BIT is not set +CONFIG_29BIT=y +# CONFIG_PMB is not set # CONFIG_X2TLB is not set CONFIG_VSYSCALL=y # CONFIG_NUMA is not set @@ -158,6 +163,7 @@ CONFIG_PAGE_SIZE_4KB=y CONFIG_HUGETLB_PAGE_SIZE_1MB=y # CONFIG_HUGETLB_PAGE_SIZE_4MB is not set # CONFIG_HUGETLB_PAGE_SIZE_64MB is not set +# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set CONFIG_SELECT_MEMORY_MODEL=y # CONFIG_FLATMEM_MANUAL is not set # CONFIG_DISCONTIGMEM_MANUAL is not set @@ -701,6 +707,7 @@ CONFIG_DEVPORT=y # CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_IT87 is not set diff --git a/arch/sh/configs/r7780rp_defconfig b/arch/sh/configs/sdk7780_defconfig index 12cc01910cf8..bb9bcd6591ab 100644 --- a/arch/sh/configs/r7780rp_defconfig +++ b/arch/sh/configs/sdk7780_defconfig @@ -1,9 +1,10 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.21-rc7 -# Tue May 1 12:28:39 2007 +# Linux kernel version: 2.6.24-rc7 +# Tue Jan 22 11:34:03 2008 # CONFIG_SUPERH=y +CONFIG_SUPERH32=y CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_FIND_NEXT_BIT=y @@ -11,149 +12,107 @@ CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_CALIBRATE_DELAY=y -# CONFIG_GENERIC_TIME is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_SYS_SUPPORTS_PCI=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_NO_VIRT_TO_BUS=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION="_SDK7780" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set +CONFIG_POSIX_MQUEUE=y CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set +CONFIG_LOG_BUF_SHIFT=18 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_RELAY=y # CONFIG_BLK_DEV_INITRD is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_EMBEDDED=y CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_ALL=y # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_BASE_FULL=y -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_SLAB=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y - -# -# Block layer -# CONFIG_BLOCK=y -# CONFIG_LBD is not set +CONFIG_LBD=y # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set # # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_AS is not set +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_DEADLINE is not set # CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" # # System type # -# CONFIG_SH_SOLUTION_ENGINE is not set -# CONFIG_SH_7722_SOLUTION_ENGINE is not set -# CONFIG_SH_7751_SOLUTION_ENGINE is not set -# CONFIG_SH_7780_SOLUTION_ENGINE is not set -# CONFIG_SH_7300_SOLUTION_ENGINE is not set -# CONFIG_SH_7343_SOLUTION_ENGINE is not set -# CONFIG_SH_73180_SOLUTION_ENGINE is not set -# CONFIG_SH_7751_SYSTEMH is not set -# CONFIG_SH_HP6XX is not set -# CONFIG_SH_SATURN is not set -# CONFIG_SH_DREAMCAST is not set -# CONFIG_SH_MPC1211 is not set -# CONFIG_SH_SH03 is not set -# CONFIG_SH_SECUREEDGE5410 is not set -# CONFIG_SH_HS7751RVOIP is not set -# CONFIG_SH_7710VOIPGW is not set -# CONFIG_SH_RTS7751R2D is not set -CONFIG_SH_HIGHLANDER=y -# CONFIG_SH_EDOSK7705 is not set -# CONFIG_SH_SH4202_MICRODEV is not set -# CONFIG_SH_LANDISK is not set -# CONFIG_SH_TITAN is not set -# CONFIG_SH_SHMIN is not set -# CONFIG_SH_7206_SOLUTION_ENGINE is not set -# CONFIG_SH_7619_SOLUTION_ENGINE is not set -# CONFIG_SH_LBOX_RE2 is not set -# CONFIG_SH_UNKNOWN is not set -CONFIG_SH_R7780RP=y -# CONFIG_SH_R7780MP is not set -# CONFIG_SH_R7785RP is not set - -# -# Processor selection -# CONFIG_CPU_SH4=y CONFIG_CPU_SH4A=y - -# -# SH-2 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7604 is not set # CONFIG_CPU_SUBTYPE_SH7619 is not set - -# -# SH-2A Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7203 is not set # CONFIG_CPU_SUBTYPE_SH7206 is not set - -# -# SH-3 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7263 is not set # CONFIG_CPU_SUBTYPE_SH7705 is not set # CONFIG_CPU_SUBTYPE_SH7706 is not set # CONFIG_CPU_SUBTYPE_SH7707 is not set @@ -161,10 +120,8 @@ CONFIG_CPU_SH4A=y # CONFIG_CPU_SUBTYPE_SH7709 is not set # CONFIG_CPU_SUBTYPE_SH7710 is not set # CONFIG_CPU_SUBTYPE_SH7712 is not set - -# -# SH-4 Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7720 is not set +# CONFIG_CPU_SUBTYPE_SH7721 is not set # CONFIG_CPU_SUBTYPE_SH7750 is not set # CONFIG_CPU_SUBTYPE_SH7091 is not set # CONFIG_CPU_SUBTYPE_SH7750R is not set @@ -173,38 +130,33 @@ CONFIG_CPU_SH4A=y # CONFIG_CPU_SUBTYPE_SH7751R is not set # CONFIG_CPU_SUBTYPE_SH7760 is not set # CONFIG_CPU_SUBTYPE_SH4_202 is not set - -# -# ST40 Processor Support -# -# CONFIG_CPU_SUBTYPE_ST40STB1 is not set -# CONFIG_CPU_SUBTYPE_ST40GX1 is not set - -# -# SH-4A Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7763 is not set # CONFIG_CPU_SUBTYPE_SH7770 is not set CONFIG_CPU_SUBTYPE_SH7780=y # CONFIG_CPU_SUBTYPE_SH7785 is not set - -# -# SH4AL-DSP Processor Support -# -# CONFIG_CPU_SUBTYPE_SH73180 is not set +# CONFIG_CPU_SUBTYPE_SHX3 is not set # CONFIG_CPU_SUBTYPE_SH7343 is not set # CONFIG_CPU_SUBTYPE_SH7722 is not set +# CONFIG_CPU_SUBTYPE_SH5_101 is not set +# CONFIG_CPU_SUBTYPE_SH5_103 is not set # # Memory management options # +CONFIG_QUICKLIST=y CONFIG_MMU=y CONFIG_PAGE_OFFSET=0x80000000 CONFIG_MEMORY_START=0x08000000 CONFIG_MEMORY_SIZE=0x08000000 -# CONFIG_32BIT is not set +CONFIG_29BIT=y +# CONFIG_PMB is not set CONFIG_VSYSCALL=y CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_MAX_ACTIVE_REGIONS=1 CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_64KB is not set @@ -213,23 +165,27 @@ CONFIG_HUGETLB_PAGE_SIZE_64K=y # CONFIG_HUGETLB_PAGE_SIZE_1MB is not set # CONFIG_HUGETLB_PAGE_SIZE_4MB is not set # CONFIG_HUGETLB_PAGE_SIZE_64MB is not set +# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set +CONFIG_RESOURCES_64BIT=y CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NR_QUICK=2 # # Cache configuration # # CONFIG_SH_DIRECT_MAPPED is not set -# CONFIG_SH_WRITETHROUGH is not set -# CONFIG_SH_OCRAM is not set +CONFIG_CACHE_WRITEBACK=y +# CONFIG_CACHE_WRITETHROUGH is not set +# CONFIG_CACHE_OFF is not set # # Processor features @@ -237,20 +193,31 @@ CONFIG_ZONE_DMA_FLAG=0 CONFIG_CPU_LITTLE_ENDIAN=y # CONFIG_CPU_BIG_ENDIAN is not set CONFIG_SH_FPU=y -# CONFIG_SH_DSP is not set CONFIG_SH_STORE_QUEUES=y -CONFIG_SPECULATIVE_EXECUTION=y +# CONFIG_SPECULATIVE_EXECUTION is not set CONFIG_CPU_HAS_INTEVT=y -CONFIG_CPU_HAS_INTC_IRQ=y CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_FPU=y + +# +# Board support +# +# CONFIG_SH_7780_SOLUTION_ENGINE is not set +CONFIG_SH_SDK7780=y +# CONFIG_SH_HIGHLANDER is not set +# CONFIG_SH_SDK7780_STANDALONE is not set +CONFIG_SH_SDK7780_BASE=y # # Timer and clock configuration # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=28 -CONFIG_NO_IDLE_HZ=y -CONFIG_SH_PCLK_FREQ=32000000 +CONFIG_SH_PCLK_FREQ=33333333 +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # # CPU Frequency scaling @@ -260,18 +227,20 @@ CONFIG_SH_PCLK_FREQ=32000000 # # DMA support # -# CONFIG_SH_DMA is not set +CONFIG_SH_DMA_API=y +CONFIG_SH_DMA=y +CONFIG_NR_ONCHIP_DMA_CHANNELS=12 +# CONFIG_NR_DMA_CHANNELS_BOOL is not set # # Companion Chips # -# CONFIG_HD6446X_SERIES is not set # # Additional SuperH Device Drivers # -# CONFIG_HEARTBEAT is not set -CONFIG_PUSH_SWITCH=y +CONFIG_HEARTBEAT=y +# CONFIG_PUSH_SWITCH is not set # # Kernel features @@ -281,22 +250,21 @@ CONFIG_HZ_250=y # CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=250 -CONFIG_KEXEC=y +# CONFIG_KEXEC is not set # CONFIG_CRASH_DUMP is not set -# CONFIG_SMP is not set # CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y CONFIG_PREEMPT_BKL=y +CONFIG_GUSA=y # # Boot options # CONFIG_ZERO_PAGE_OFFSET=0x00001000 -CONFIG_BOOT_LINK_OFFSET=0x00800000 -# CONFIG_UBC_WAKEUP is not set +CONFIG_BOOT_LINK_OFFSET=0x01800000 CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="mem=128M console=ttySC0,115200 root=/dev/sda1" +CONFIG_CMDLINE="mem=128M console=tty0 console=ttySC0,115200 ip=bootp root=/dev/nfs nfsroot=192.168.0.1:/home/rootfs" # # Bus options @@ -305,31 +273,40 @@ CONFIG_PCI=y CONFIG_SH_PCIDMA_NONCOHERENT=y CONFIG_PCI_AUTO=y CONFIG_PCI_AUTO_UPDATE_RESOURCES=y -# CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# -# CONFIG_HOTPLUG_PCI is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCI_LEGACY is not set +CONFIG_PCI_DEBUG=y +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=y +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +# CONFIG_PD6729 is not set +# CONFIG_I82092 is not set +CONFIG_PCCARD_NONSTATIC=y +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_FAKE is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set # # Executable file formats # CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_FLAT is not set # CONFIG_BINFMT_MISC is not set # -# Power management options (EXPERIMENTAL) -# -# CONFIG_PM is not set - -# # Networking # CONFIG_NET=y @@ -337,7 +314,6 @@ CONFIG_NET=y # # Networking options # -# CONFIG_NETDEBUG is not set CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set CONFIG_UNIX=y @@ -347,7 +323,7 @@ CONFIG_XFRM=y # CONFIG_XFRM_MIGRATE is not set # CONFIG_NET_KEY is not set CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set +CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y CONFIG_ASK_IP_FIB_HASH=y # CONFIG_IP_FIB_TRIE is not set @@ -356,52 +332,55 @@ CONFIG_IP_FIB_HASH=y # CONFIG_IP_ROUTE_MULTIPATH is not set # CONFIG_IP_ROUTE_VERBOSE is not set CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set # CONFIG_ARPD is not set # CONFIG_SYN_COOKIES is not set # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set +CONFIG_INET_TUNNEL=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +# CONFIG_INET6_XFRM_MODE_BEET is not set +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# # CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# # CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# # CONFIG_TIPC is not set # CONFIG_ATM is not set -CONFIG_BRIDGE=m +# CONFIG_BRIDGE is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set -CONFIG_LLC=m # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set @@ -409,11 +388,39 @@ CONFIG_LLC=m # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_RR is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_INGRESS is not set # -# QoS and/or fair queueing +# Classification # -# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +# CONFIG_NET_CLS_POLICE is not set +CONFIG_NET_SCH_FIFO=y # # Network testing @@ -422,8 +429,17 @@ CONFIG_LLC=m # CONFIG_HAMRADIO is not set # CONFIG_IRDA is not set # CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set # CONFIG_IEEE80211 is not set -CONFIG_WIRELESS_EXT=y +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set # # Device Drivers @@ -432,69 +448,108 @@ CONFIG_WIRELESS_EXT=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m +CONFIG_FW_LOADER=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# # CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# # CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# -# CONFIG_BLK_CPQ_DA is not set +CONFIG_PARPORT=y +# CONFIG_PARPORT_PC is not set +# CONFIG_PARPORT_GSC is not set +# CONFIG_PARPORT_AX88796 is not set +# CONFIG_PARPORT_1284 is not set +CONFIG_BLK_DEV=y # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set - -# -# Misc devices -# -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_IDE=y +CONFIG_IDE_MAX_HWIFS=4 +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +# CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set +CONFIG_BLK_DEV_IDECD=y +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +CONFIG_BLK_DEV_PLATFORM=y + +# +# PCI IDE chipsets support +# +CONFIG_BLK_DEV_IDEPCI=y +# CONFIG_IDEPCI_SHARE_IRQ is not set +CONFIG_IDEPCI_PCIBUS_ORDER=y +# CONFIG_BLK_DEV_OFFBOARD is not set +CONFIG_BLK_DEV_GENERIC=y +# CONFIG_BLK_DEV_OPTI621 is not set +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_JMICRON is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT8213 is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_BLK_DEV_TC86C001 is not set +# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDE_ARCH_OBSOLETE_INIT is not set +# CONFIG_BLK_DEV_HD is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y +CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_NETLINK=y CONFIG_SCSI_PROC_FS=y # @@ -503,8 +558,9 @@ CONFIG_SCSI_PROC_FS=y CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=m +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y # CONFIG_CHR_DEV_SCH is not set # @@ -514,19 +570,17 @@ CONFIG_CHR_DEV_SG=m # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m # # SCSI Transports # -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_SPI_ATTRS=y +CONFIG_SCSI_FC_ATTRS=y # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_3W_9XXX is not set @@ -536,7 +590,6 @@ CONFIG_CHR_DEV_SG=m # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set @@ -559,10 +612,7 @@ CONFIG_CHR_DEV_SG=m # CONFIG_SCSI_NSP32 is not set # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_SRP is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set # CONFIG_SATA_AHCI is not set @@ -574,7 +624,7 @@ CONFIG_ATA=y # CONFIG_SATA_QSTOR is not set # CONFIG_SATA_PROMISE is not set # CONFIG_SATA_SX4 is not set -CONFIG_SATA_SIL=y +# CONFIG_SATA_SIL is not set # CONFIG_SATA_SIL24 is not set # CONFIG_SATA_SIS is not set # CONFIG_SATA_ULI is not set @@ -585,6 +635,7 @@ CONFIG_SATA_SIL=y # CONFIG_PATA_AMD is not set # CONFIG_PATA_ARTOP is not set # CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_CMD64X is not set # CONFIG_PATA_CS5520 is not set # CONFIG_PATA_CS5530 is not set @@ -604,8 +655,10 @@ CONFIG_SATA_SIL=y # CONFIG_PATA_OLDPIIX is not set # CONFIG_PATA_NETCELL is not set # CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PCMCIA is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RZ1000 is not set @@ -616,185 +669,87 @@ CONFIG_SATA_SIL=y # CONFIG_PATA_SIS is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set -CONFIG_PATA_PLATFORM=y - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# +# CONFIG_PATA_PLATFORM is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set # CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set # # IEEE 1394 (FireWire) support # +# CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set - -# -# I2O device support -# # CONFIG_I2O is not set - -# -# Network device support -# CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - -# -# ARCnet devices -# +# CONFIG_VETH is not set # CONFIG_ARCNET is not set - -# -# PHY device support -# # CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# CONFIG_NET_ETHERNET=y CONFIG_MII=y +# CONFIG_AX88796 is not set # CONFIG_STNIC is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set # CONFIG_NET_VENDOR_3COM is not set -# CONFIG_SMC91X is not set - -# -# Tulip family network device support -# +CONFIG_SMC91X=y # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set -CONFIG_NET_PCI=y -CONFIG_PCNET32=m -# CONFIG_PCNET32_NAPI is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set # CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -CONFIG_8139CP=m -CONFIG_8139TOO=m -# CONFIG_8139TOO_PIO is not set -# CONFIG_8139TOO_TUNE_TWISTER is not set -CONFIG_8139TOO_8129=y -# CONFIG_8139_OLD_RX_RESET is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -CONFIG_VIA_RHINE=m -CONFIG_VIA_RHINE_MMIO=y -# CONFIG_VIA_RHINE_NAPI is not set -# CONFIG_SC92031 is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -CONFIG_E1000=m -# CONFIG_E1000_NAPI is not set -# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -CONFIG_R8169=y -# CONFIG_R8169_NAPI is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -# CONFIG_QLA3XXX is not set -# CONFIG_ATL1 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -# CONFIG_CHELSIO_T3 is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -# CONFIG_NETXEN_NIC is not set - -# -# Token Ring devices -# +# CONFIG_NET_POCKET is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set # -# Wireless LAN (non-hamradio) -# -CONFIG_NET_RADIO=y -# CONFIG_NET_WIRELESS_RTNETLINK is not set - -# -# Obsolete Wireless cards support (pre-802.11) -# -# CONFIG_STRIP is not set - -# -# Wireless 802.11b ISA/PCI cards support -# -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -CONFIG_HERMES=m -# CONFIG_PLX_HERMES is not set -# CONFIG_TMD_HERMES is not set -# CONFIG_NORTEL_HERMES is not set -# CONFIG_PCI_HERMES is not set -# CONFIG_ATMEL is not set - -# -# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# Wireless LAN # -CONFIG_PRISM54=m -# CONFIG_HOSTAP is not set -CONFIG_NET_WIRELESS=y +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set # -# Wan interfaces +# USB Network Adapters # +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_NET_PCMCIA is not set # CONFIG_WAN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set +# CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set # CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# +CONFIG_NETCONSOLE=y +# CONFIG_NETCONSOLE_DYNAMIC is not set +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NET_POLL_CONTROLLER=y # CONFIG_ISDN is not set - -# -# Telephony Support -# # CONFIG_PHONE is not set # @@ -802,17 +757,17 @@ CONFIG_NET_WIRELESS=y # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set +CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # @@ -825,8 +780,19 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_VSXXXAA is not set # CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set @@ -836,6 +802,7 @@ CONFIG_KEYBOARD_ATKBD=y CONFIG_SERIO=y # CONFIG_SERIO_I8042 is not set # CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_PARKBD is not set # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set @@ -844,7 +811,10 @@ CONFIG_SERIO_LIBPS2=y # # Character devices # -# CONFIG_VT is not set +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set # CONFIG_SERIAL_NONSTANDARD is not set # @@ -864,32 +834,22 @@ CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# +# CONFIG_PRINTER is not set +# CONFIG_PPDEV is not set # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=y -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set # -# TPM devices +# PCMCIA character devices # +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set - -# -# I2C support -# +CONFIG_DEVPORT=y # CONFIG_I2C is not set # @@ -897,22 +857,27 @@ CONFIG_HW_RANDOM=y # # CONFIG_SPI is not set # CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# # CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set # -# Hardware Monitoring support +# Sonics Silicon Backplane # -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +# CONFIG_SSB_PCMCIAHOST is not set +# CONFIG_SSB_SILENT is not set +# CONFIG_SSB_DEBUG is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y # # Multifunction device drivers @@ -923,22 +888,93 @@ CONFIG_HWMON=y # Multimedia devices # # CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # -# Digital Video Broadcasting Devices +# Display device support # -# CONFIG_DVB is not set +CONFIG_DISPLAY_SUPPORT=y # -# Graphics support +# Display hardware drivers # -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -# CONFIG_FB is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_LOGO_SUPERH_MONO=y +CONFIG_LOGO_SUPERH_VGA16=y +CONFIG_LOGO_SUPERH_CLUT224=y # # Sound # -CONFIG_SOUND=m +CONFIG_SOUND=y # # Advanced Linux Sound Architecture @@ -948,126 +984,162 @@ CONFIG_SOUND=m # # Open Sound System # -CONFIG_SOUND_PRIME=m -# CONFIG_OBSOLETE_OSS is not set -# CONFIG_SOUND_BT878 is not set -# CONFIG_SOUND_ICH is not set +CONFIG_SOUND_PRIME=y # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set -# CONFIG_SOUND_VIA82CXXX is not set - -# -# HID Devices -# +CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set # -# USB support +# USB Input Devices # +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB is not set +CONFIG_USB=y +CONFIG_USB_DEBUG=y # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# Miscellaneous USB options # +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set # -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices +# USB Host Controller Drivers # -# CONFIG_NEW_LEDS is not set +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_SPLIT_ISO is not set +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set # -# LED drivers +# USB Device Class drivers # +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y # -# LED Triggers +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' # # -# InfiniBand support +# may also be needed; see USB_STORAGE Help for more information # -# CONFIG_INFINIBAND is not set +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set # -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# USB Imaging devices # +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y # -# Real Time Clock +# USB port drivers # -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set +# CONFIG_USB_USS720 is not set # -# RTC interfaces +# USB Serial Converter support # -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_USB_SERIAL is not set # -# RTC drivers +# USB Miscellaneous drivers # -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_M48T86 is not set -CONFIG_RTC_DRV_SH=y -# CONFIG_RTC_DRV_TEST is not set -# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set # -# DMA Engine support +# USB DSL modem support # -# CONFIG_DMA_ENGINE is not set # -# DMA Clients +# USB Gadget Support # +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y # -# DMA Devices +# LED drivers # # -# Auxiliary Display support +# LED Triggers # +# CONFIG_LEDS_TRIGGERS is not set +# CONFIG_INFINIBAND is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_AUXDISPLAY is not set # -# Virtualization +# Userspace I/O # +# CONFIG_UIO is not set # # File systems # CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +# CONFIG_EXT2_FS_SECURITY is not set # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set +CONFIG_EXT3_FS_POSIX_ACL=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set @@ -1082,13 +1154,16 @@ CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -CONFIG_FUSE_FS=m +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y # # CD-ROM/DVD Filesystems # -# CONFIG_ISO9660_FS is not set +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set # CONFIG_UDF_FS is not set # @@ -1100,22 +1175,21 @@ CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_NTFS_FS=y -# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_DEBUG=y CONFIG_NTFS_RW=y # # Pseudo filesystems # CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y +# CONFIG_PROC_KCORE is not set CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set +CONFIG_TMPFS_POSIX_ACL=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y -CONFIG_RAMFS=y -CONFIG_CONFIGFS_FS=m +# CONFIG_CONFIGFS_FS is not set # # Miscellaneous filesystems @@ -1133,19 +1207,16 @@ CONFIG_CONFIGFS_FS=m # CONFIG_QNX4FS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y +# CONFIG_NFS_V4 is not set # CONFIG_NFS_DIRECTIO is not set CONFIG_NFSD=y CONFIG_NFSD_V3=y # CONFIG_NFSD_V3_ACL is not set -CONFIG_NFSD_V4=y +# CONFIG_NFSD_V4 is not set CONFIG_NFSD_TCP=y CONFIG_ROOT_NFS=y CONFIG_LOCKD=y @@ -1153,25 +1224,20 @@ CONFIG_LOCKD_V4=y CONFIG_EXPORTFS=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y @@ -1191,13 +1257,13 @@ CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set -CONFIG_NLS_CODEPAGE_932=y +# CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set @@ -1208,44 +1274,39 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set +CONFIG_NLS_ISO8859_15=y # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Distributed Lock Manager -# +CONFIG_NLS_UTF8=y # CONFIG_DLM is not set - -# -# Profiling support -# -CONFIG_PROFILING=y -CONFIG_OPROFILE=m +# CONFIG_INSTRUMENTATION is not set # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y +CONFIG_ENABLE_WARN_DEPRECATED=y +# CONFIG_ENABLE_MUST_CHECK is not set CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y +CONFIG_UNUSED_SYMBOLS=y +# CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set -CONFIG_LOG_BUF_SHIFT=14 CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_PREEMPT is not set +CONFIG_TIMER_STATS=y +# CONFIG_SLUB_DEBUG_ON is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set @@ -1253,16 +1314,21 @@ CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set # CONFIG_FRAME_POINTER is not set -CONFIG_FORCED_INLINING=y +# CONFIG_FORCED_INLINING is not set +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set CONFIG_SH_STANDARD_BIOS=y # CONFIG_EARLY_SCIF_CONSOLE is not set -CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK is not set +# CONFIG_DEBUG_BOOTMEM is not set CONFIG_DEBUG_STACKOVERFLOW=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_4KSTACKS is not set +# CONFIG_IRQSTACKS is not set # CONFIG_SH_KGDB is not set # @@ -1270,16 +1336,11 @@ CONFIG_DEBUG_STACKOVERFLOW=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set - -# -# Cryptographic options -# +# CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_CRYPTO=y CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_MD4 is not set @@ -1290,10 +1351,12 @@ CONFIG_CRYPTO_MD5=y # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_TGR192 is not set # CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_BLOWFISH is not set @@ -1306,15 +1369,14 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_KHAZAD is not set # CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_DEFLATE is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_HW=y # # Library routines @@ -1322,7 +1384,11 @@ CONFIG_CRYPTO_DES=y CONFIG_BITREVERSE=y # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y +# CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig index a5e37dbc5353..240a1cef69aa 100644 --- a/arch/sh/configs/se7712_defconfig +++ b/arch/sh/configs/se7712_defconfig @@ -237,7 +237,7 @@ CONFIG_CPU_HAS_SR_RB=y CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=16 # CONFIG_NO_IDLE_HZ is not set -CONFIG_SH_PCLK_FREQ=33333333 +CONFIG_SH_PCLK_FREQ=66666666 # # CPU Frequency scaling diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig index 4e711a0c3dae..01936368b8b0 100644 --- a/arch/sh/drivers/dma/Kconfig +++ b/arch/sh/drivers/dma/Kconfig @@ -12,7 +12,7 @@ config SH_DMA config NR_ONCHIP_DMA_CHANNELS int depends on SH_DMA - default "6" if CPU_SUBTYPE_SH7720 + default "6" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R default "12" if CPU_SUBTYPE_SH7780 default "4" diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index 958bac1c585a..5c3359756a92 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c @@ -25,6 +25,7 @@ static int dmte_irq_map[] = { DMTE2_IRQ, DMTE3_IRQ, #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ defined(CONFIG_CPU_SUBTYPE_SH7760) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) || \ @@ -203,6 +204,7 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan) } #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ defined(CONFIG_CPU_SUBTYPE_SH7780) #define dmaor_read_reg() ctrl_inw(DMAOR) #define dmaor_write_reg(data) ctrl_outw(data, DMAOR) diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index fba6b5ba0b3a..0718805774e8 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -7,16 +7,19 @@ obj-$(CONFIG_PCI_AUTO) += pci-auto.o obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o +obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o +obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o -obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ - dma-dreamcast.o +obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o +obj-$(CONFIG_SH_SDK7780) += ops-sdk7780.o fixups-sdk7780.o obj-$(CONFIG_SH_TITAN) += ops-titan.o obj-$(CONFIG_SH_LANDISK) += ops-landisk.o obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o +obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o diff --git a/arch/sh/drivers/pci/dma-dreamcast.c b/arch/sh/drivers/pci/dma-dreamcast.c deleted file mode 100644 index 888a34050599..000000000000 --- a/arch/sh/drivers/pci/dma-dreamcast.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * arch/sh/drivers/pci/dma-dreamcast.c - * - * PCI DMA support for the Sega Dreamcast - * - * Copyright (C) 2001, 2002 M. R. Brown - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file originally bore the message (with enclosed-$): - * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp - * Dreamcast PCI: Supports SEGA Broadband Adaptor only. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/param.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/pci.h> -#include <linux/dma-mapping.h> -#include <linux/device.h> - -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/mach/pci.h> - -static int gapspci_dma_used = 0; - -void *dreamcast_consistent_alloc(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) -{ - unsigned long buf; - - if (dev && dev->bus != &pci_bus_type) - return NULL; - - if (gapspci_dma_used + size > GAPSPCI_DMA_SIZE) - return ERR_PTR(-EINVAL); - - buf = GAPSPCI_DMA_BASE + gapspci_dma_used; - - gapspci_dma_used = PAGE_ALIGN(gapspci_dma_used+size); - - *dma_handle = (dma_addr_t)buf; - - buf = P2SEGADDR(buf); - - /* Flush the dcache before we hand off the buffer */ - __flush_purge_region((void *)buf, size); - - return (void *)buf; -} - -int dreamcast_consistent_free(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - if (dev && dev->bus != &pci_bus_type) - return -EINVAL; - - /* XXX */ - gapspci_dma_used = 0; - - return 0; -} - diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c index 6f53f8200dc3..c44699301eeb 100644 --- a/arch/sh/drivers/pci/fixups-dreamcast.c +++ b/arch/sh/drivers/pci/fixups-dreamcast.c @@ -22,6 +22,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/pci.h> +#include <linux/dma-mapping.h> #include <asm/io.h> #include <asm/irq.h> @@ -40,6 +41,15 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev) */ dev->resource[1].start = p->io_resource->start + 0x100; dev->resource[1].end = dev->resource[1].start + 0x200 - 1; + /* + * Redirect dma memory allocations to special memory window. + */ + BUG_ON(!dma_declare_coherent_memory(&dev->dev, + GAPSPCI_DMA_BASE, + GAPSPCI_DMA_BASE, + GAPSPCI_DMA_SIZE, + DMA_MEMORY_MAP | + DMA_MEMORY_EXCLUSIVE)); break; default: printk("PCI: Failed resource fixup\n"); diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c new file mode 100644 index 000000000000..2f8863099dd1 --- /dev/null +++ b/arch/sh/drivers/pci/fixups-sdk7780.c @@ -0,0 +1,59 @@ +/* + * arch/sh/drivers/pci/fixups-sdk7780.c + * + * PCI fixups for the SDK7780SE03 + * + * Copyright (C) 2003 Lineo uSolutions, Inc. + * Copyright (C) 2004 - 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/pci.h> +#include "pci-sh4.h" +#include <asm/io.h> + +int pci_fixup_pcic(void) +{ + ctrl_outl(0x00000001, SH7780_PCI_VCR2); + + /* Enable all interrupts, so we know what to fix */ + pci_write_reg(0x0000C3FF, SH7780_PCIIMR); + pci_write_reg(0x0000380F, SH7780_PCIAINTM); + + /* Set up standard PCI config registers */ + pci_write_reg(0xFB00, SH7780_PCISTATUS); + pci_write_reg(0x0047, SH7780_PCICMD); + pci_write_reg(0x00, SH7780_PCIPIF); + pci_write_reg(0x00, SH7780_PCISUB); + pci_write_reg(0x06, SH7780_PCIBCC); + pci_write_reg(0x1912, SH7780_PCISVID); + pci_write_reg(0x0001, SH7780_PCISID); + + pci_write_reg(0x08000000, SH7780_PCIMBAR0); /* PCI */ + pci_write_reg(0x08000000, SH7780_PCILAR0); /* SHwy */ + pci_write_reg(0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */ + + pci_write_reg(0x00000000, SH7780_PCIMBAR1); + pci_write_reg(0x00000000, SH7780_PCILAR1); + pci_write_reg(0x00000000, SH7780_PCILSR1); + + pci_write_reg(0xAB000801, SH7780_PCIIBAR); + + /* + * Set the MBR so PCI address is one-to-one with window, + * meaning all calls go straight through... use ifdef to + * catch erroneous assumption. + */ + pci_write_reg(0xFD000000 , SH7780_PCIMBR0); + pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0); /* 16M */ + + /* Set IOBR for window containing area specified in pci.h */ + pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR); + pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR); + + pci_write_reg(0xA5000C01, SH7780_PCICR); + + return 0; +} diff --git a/arch/sh/drivers/pci/ops-cayman.c b/arch/sh/drivers/pci/ops-cayman.c new file mode 100644 index 000000000000..980275ffa30b --- /dev/null +++ b/arch/sh/drivers/pci/ops-cayman.c @@ -0,0 +1,94 @@ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/types.h> +#include <asm/cpu/irq.h> +#include "pci-sh5.h" + +static inline u8 bridge_swizzle(u8 pin, u8 slot) +{ + return (((pin - 1) + slot) % 4) + 1; +} + +int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int result = -1; + + /* The complication here is that the PCI IRQ lines from the Cayman's 2 + 5V slots get into the CPU via a different path from the IRQ lines + from the 3 3.3V slots. Thus, we have to detect whether the card's + interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling' + at the point where we cross from 5V to 3.3V is not the normal case. + + The added complication is that we don't know that the 5V slots are + always bus 2, because a card containing a PCI-PCI bridge may be + plugged into a 3.3V slot, and this changes the bus numbering. + + Also, the Cayman has an intermediate PCI bus that goes a custom + expansion board header (and to the secondary bridge). This bus has + never been used in practice. + + The 1ary onboard PCI-PCI bridge is device 3 on bus 0 + The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of + the 1ary bridge. + */ + + struct slot_pin { + int slot; + int pin; + } path[4]; + int i=0; + + while (dev->bus->number > 0) { + + slot = path[i].slot = PCI_SLOT(dev->devfn); + pin = path[i].pin = bridge_swizzle(pin, slot); + dev = dev->bus->self; + i++; + if (i > 3) panic("PCI path to root bus too long!\n"); + } + + slot = PCI_SLOT(dev->devfn); + /* This is the slot on bus 0 through which the device is eventually + reachable. */ + + /* Now work back up. */ + if ((slot < 3) || (i == 0)) { + /* Bus 0 (incl. PCI-PCI bridge itself) : perform the final + swizzle now. */ + result = IRQ_INTA + bridge_swizzle(pin, slot) - 1; + } else { + i--; + slot = path[i].slot; + pin = path[i].pin; + if (slot > 0) { + panic("PCI expansion bus device found - not handled!\n"); + } else { + if (i > 0) { + /* 5V slots */ + i--; + slot = path[i].slot; + pin = path[i].pin; + /* 'pin' was swizzled earlier wrt slot, don't do it again. */ + result = IRQ_P2INTA + (pin - 1); + } else { + /* IRQ for 2ary PCI-PCI bridge : unused */ + result = -1; + } + } + } + + return result; +} + +struct pci_channel board_pci_channels[] = { + { &sh5_pci_ops, NULL, NULL, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; +EXPORT_SYMBOL(board_pci_channels); + +int __init pcibios_init_platform(void) +{ + return sh5pci_init(__pa(memory_start), + __pa(memory_end) - __pa(memory_start)); +} diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c index 48fe4032ebea..5fdadaeed6fc 100644 --- a/arch/sh/drivers/pci/ops-r7780rp.c +++ b/arch/sh/drivers/pci/ops-r7780rp.c @@ -17,25 +17,13 @@ #include <asm/io.h> #include "pci-sh4.h" -static char r7780rp_irq_tab[] __initdata = { - 0, 1, 2, 3, -}; - -static char r7780mp_irq_tab[] __initdata = { +static char irq_tab[] __initdata = { 65, 66, 67, 68, }; int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) { - if (mach_is_r7780rp()) - return r7780rp_irq_tab[slot]; - if (mach_is_r7780mp() || mach_is_r7785rp()) - return r7780mp_irq_tab[slot]; - - printk(KERN_ERR "PCI: Bad IRQ mapping " - "request for slot %d, func %d\n", slot, pin-1); - - return -1; + return irq_tab[slot]; } static struct resource sh7780_io_resource = { diff --git a/arch/sh/drivers/pci/ops-sdk7780.c b/arch/sh/drivers/pci/ops-sdk7780.c new file mode 100644 index 000000000000..66a9b4047f26 --- /dev/null +++ b/arch/sh/drivers/pci/ops-sdk7780.c @@ -0,0 +1,73 @@ +/* + * linux/arch/sh/drivers/pci/ops-sdk7780.c + * + * Copyright (C) 2006 Nobuhiro Iwamatsu + * + * PCI initialization for the SDK7780SE03 + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + */ +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pci.h> +#include <asm/sdk7780.h> +#include <asm/io.h> +#include "pci-sh4.h" + +/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */ +static char sdk7780_irq_tab[4][16] __initdata = { + /* INTA */ + { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, + /* INTB */ + { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, + /* INTC */ + { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, + /* INTD */ + { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, +}; + +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +{ + return sdk7780_irq_tab[pin-1][slot]; +} + +static struct resource sdk7780_io_resource = { + .name = "SH7780_IO", + .start = SH7780_PCI_IO_BASE, + .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sdk7780_mem_resource = { + .name = "SH7780_mem", + .start = SH7780_PCI_MEMORY_BASE, + .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +struct pci_channel board_pci_channels[] = { + { &sh4_pci_ops, &sdk7780_io_resource, &sdk7780_mem_resource, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; +EXPORT_SYMBOL(board_pci_channels); + +static struct sh4_pci_address_map sdk7780_pci_map = { + .window0 = { + .base = SH7780_CS2_BASE_ADDR, + .size = 0x04000000, + }, + .window1 = { + .base = SH7780_CS3_BASE_ADDR, + .size = 0x04000000, + }, + .flags = SH4_PCIC_NO_RESET, +}; + +int __init pcibios_init_platform(void) +{ + printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n"); + return sh7780_pcic_init(&sdk7780_pci_map); +} diff --git a/arch/sh/drivers/pci/ops-sh5.c b/arch/sh/drivers/pci/ops-sh5.c new file mode 100644 index 000000000000..729e38a6fe07 --- /dev/null +++ b/arch/sh/drivers/pci/ops-sh5.c @@ -0,0 +1,93 @@ +/* + * Support functions for the SH5 PCI hardware. + * + * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) + * Copyright (C) 2003, 2004 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + */ +#include <linux/kernel.h> +#include <linux/rwsem.h> +#include <linux/smp.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/pci.h> +#include <linux/delay.h> +#include <linux/types.h> +#include <linux/irq.h> +#include <asm/pci.h> +#include <asm/io.h> +#include "pci-sh5.h" + +static void __init pci_fixup_ide_bases(struct pci_dev *d) +{ + int i; + + /* + * PCI IDE controllers use non-standard I/O port decoding, respect it. + */ + if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) + return; + printk("PCI: IDE base address fixup for %s\n", pci_name(d)); + for(i=0; i<4; i++) { + struct resource *r = &d->resource[i]; + if ((r->start & ~0x80) == 0x374) { + r->start |= 2; + r->end = r->start; + } + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); + +char * __devinit pcibios_setup(char *str) +{ + return str; +} + +static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 *val) +{ + SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); + + switch (size) { + case 1: + *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3)); + break; + case 2: + *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2)); + break; + case 4: + *val = SH5PCI_READ(PDR); + break; + } + + return PCIBIOS_SUCCESSFUL; +} + +static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where, + int size, u32 val) +{ + SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); + + switch (size) { + case 1: + SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val); + break; + case 2: + SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val); + break; + case 4: + SH5PCI_WRITE(PDR, val); + break; + } + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops sh5_pci_ops = { + .read = sh5pci_read, + .write = sh5pci_write, +}; diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c index 224e007736fb..ea404704ace8 100644 --- a/arch/sh/drivers/pci/pci-auto.c +++ b/arch/sh/drivers/pci/pci-auto.c @@ -516,10 +516,8 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) PCI_COMMAND, cmdstat | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); -#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) early_write_config_byte(hose, top_bus, current_bus, pci_devfn, PCI_LATENCY_TIMER, 0x80); -#endif /* Allocate PCI I/O and/or memory space */ pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5); diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h index 1901c33cde6a..4925c79ea959 100644 --- a/arch/sh/drivers/pci/pci-sh4.h +++ b/arch/sh/drivers/pci/pci-sh4.h @@ -1,7 +1,9 @@ #ifndef __PCI_SH4_H #define __PCI_SH4_H -#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) +#if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) || \ + defined(CONFIG_CPU_SUBTYPE_SH7763) #include "pci-sh7780.h" #else #include "pci-sh7751.h" diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c new file mode 100644 index 000000000000..a00a4df8c02d --- /dev/null +++ b/arch/sh/drivers/pci/pci-sh5.c @@ -0,0 +1,228 @@ +/* + * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) + * Copyright (C) 2003, 2004 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Support functions for the SH5 PCI hardware. + */ + +#include <linux/kernel.h> +#include <linux/rwsem.h> +#include <linux/smp.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/pci.h> +#include <linux/delay.h> +#include <linux/types.h> +#include <linux/irq.h> +#include <asm/cpu/irq.h> +#include <asm/pci.h> +#include <asm/io.h> +#include "pci-sh5.h" + +unsigned long pcicr_virt; +unsigned long PCI_IO_AREA; + +/* Rounds a number UP to the nearest power of two. Used for + * sizing the PCI window. + */ +static u32 __init r2p2(u32 num) +{ + int i = 31; + u32 tmp = num; + + if (num == 0) + return 0; + + do { + if (tmp & (1 << 31)) + break; + i--; + tmp <<= 1; + } while (i >= 0); + + tmp = 1 << i; + /* If the original number isn't a power of 2, round it up */ + if (tmp != num) + tmp <<= 1; + + return tmp; +} + +static irqreturn_t pcish5_err_irq(int irq, void *dev_id) +{ + struct pt_regs *regs = get_irq_regs(); + unsigned pci_int, pci_air, pci_cir, pci_aint; + + pci_int = SH5PCI_READ(INT); + pci_cir = SH5PCI_READ(CIR); + pci_air = SH5PCI_READ(AIR); + + if (pci_int) { + printk("PCI INTERRUPT (at %08llx)!\n", regs->pc); + printk("PCI INT -> 0x%x\n", pci_int & 0xffff); + printk("PCI AIR -> 0x%x\n", pci_air); + printk("PCI CIR -> 0x%x\n", pci_cir); + SH5PCI_WRITE(INT, ~0); + } + + pci_aint = SH5PCI_READ(AINT); + if (pci_aint) { + printk("PCI ARB INTERRUPT!\n"); + printk("PCI AINT -> 0x%x\n", pci_aint); + printk("PCI AIR -> 0x%x\n", pci_air); + printk("PCI CIR -> 0x%x\n", pci_cir); + SH5PCI_WRITE(AINT, ~0); + } + + return IRQ_HANDLED; +} + +static irqreturn_t pcish5_serr_irq(int irq, void *dev_id) +{ + printk("SERR IRQ\n"); + + return IRQ_NONE; +} + +int __init sh5pci_init(unsigned long memStart, unsigned long memSize) +{ + u32 lsr0; + u32 uval; + + if (request_irq(IRQ_ERR, pcish5_err_irq, + IRQF_DISABLED, "PCI Error",NULL) < 0) { + printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n"); + return -EINVAL; + } + + if (request_irq(IRQ_SERR, pcish5_serr_irq, + IRQF_DISABLED, "PCI SERR interrupt", NULL) < 0) { + printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n"); + return -EINVAL; + } + + pcicr_virt = onchip_remap(SH5PCI_ICR_BASE, 1024, "PCICR"); + if (!pcicr_virt) { + panic("Unable to remap PCICR\n"); + } + + PCI_IO_AREA = onchip_remap(SH5PCI_IO_BASE, 0x10000, "PCIIO"); + if (!PCI_IO_AREA) { + panic("Unable to remap PCIIO\n"); + } + + /* Clear snoop registers */ + SH5PCI_WRITE(CSCR0, 0); + SH5PCI_WRITE(CSCR1, 0); + + /* Switch off interrupts */ + SH5PCI_WRITE(INTM, 0); + SH5PCI_WRITE(AINTM, 0); + SH5PCI_WRITE(PINTM, 0); + + /* Set bus active, take it out of reset */ + uval = SH5PCI_READ(CR); + + /* Set command Register */ + SH5PCI_WRITE(CR, uval | CR_LOCK_MASK | CR_CFINT| CR_FTO | CR_PFE | + CR_PFCS | CR_BMAM); + + uval=SH5PCI_READ(CR); + + /* Allow it to be a master */ + /* NB - WE DISABLE I/O ACCESS to stop overlap */ + /* set WAIT bit to enable stepping, an attempt to improve stability */ + SH5PCI_WRITE_SHORT(CSR_CMD, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_WAIT); + + /* + ** Set translation mapping memory in order to convert the address + ** used for the main bus, to the PCI internal address. + */ + SH5PCI_WRITE(MBR,0x40000000); + + /* Always set the max size 512M */ + SH5PCI_WRITE(MBMR, PCISH5_MEM_SIZCONV(512*1024*1024)); + + /* + ** I/O addresses are mapped at internal PCI specific address + ** as is described into the configuration bridge table. + ** These are changed to 0, to allow cards that have legacy + ** io such as vga to function correctly. We set the SH5 IOBAR to + ** 256K, which is a bit big as we can only have 64K of address space + */ + + SH5PCI_WRITE(IOBR,0x0); + + /* Set up a 256K window. Totally pointless waste of address space */ + SH5PCI_WRITE(IOBMR,0); + + /* The SH5 has a HUGE 256K I/O region, which breaks the PCI spec. + * Ideally, we would want to map the I/O region somewhere, but it + * is so big this is not that easy! + */ + SH5PCI_WRITE(CSR_IBAR0,~0); + /* Set memory size value */ + memSize = memory_end - memory_start; + + /* Now we set up the mbars so the PCI bus can see the memory of + * the machine */ + if (memSize < (1024 * 1024)) { + printk(KERN_ERR "PCISH5: Ridiculous memory size of 0x%lx?\n", + memSize); + return -EINVAL; + } + + /* Set LSR 0 */ + lsr0 = (memSize > (512 * 1024 * 1024)) ? 0x1ff00001 : + ((r2p2(memSize) - 0x100000) | 0x1); + SH5PCI_WRITE(LSR0, lsr0); + + /* Set MBAR 0 */ + SH5PCI_WRITE(CSR_MBAR0, memory_start); + SH5PCI_WRITE(LAR0, memory_start); + + SH5PCI_WRITE(CSR_MBAR1,0); + SH5PCI_WRITE(LAR1,0); + SH5PCI_WRITE(LSR1,0); + + /* Enable the PCI interrupts on the device */ + SH5PCI_WRITE(INTM, ~0); + SH5PCI_WRITE(AINTM, ~0); + SH5PCI_WRITE(PINTM, ~0); + + return 0; +} + +void __devinit pcibios_fixup_bus(struct pci_bus *bus) +{ + struct pci_dev *dev = bus->self; + int i; + + if (dev) { + for (i= 0; i < 3; i++) { + bus->resource[i] = + &dev->resource[PCI_BRIDGE_RESOURCES+i]; + bus->resource[i]->name = bus->name; + } + bus->resource[0]->flags |= IORESOURCE_IO; + bus->resource[1]->flags |= IORESOURCE_MEM; + + /* For now, propagate host limits to the bus; + * we'll adjust them later. */ + bus->resource[0]->end = 64*1024 - 1 ; + bus->resource[1]->end = PCIBIOS_MIN_MEM+(256*1024*1024)-1; + bus->resource[0]->start = PCIBIOS_MIN_IO; + bus->resource[1]->start = PCIBIOS_MIN_MEM; + + /* Turn off downstream PF memory address range by default */ + bus->resource[2]->start = 1024*1024; + bus->resource[2]->end = bus->resource[2]->start - 1; + } +} diff --git a/arch/sh64/kernel/pci_sh5.h b/arch/sh/drivers/pci/pci-sh5.h index c71159dd04b9..7cff3fc04d30 100644 --- a/arch/sh64/kernel/pci_sh5.h +++ b/arch/sh/drivers/pci/pci-sh5.h @@ -6,6 +6,8 @@ * * Definitions for the SH5 PCI hardware. */ +#ifndef __PCI_SH5_H +#define __PCI_SH5_H /* Product ID */ #define PCISH5_PID 0x350d @@ -73,13 +75,12 @@ #define PCISH5_ICR_CSR_MBAR0 0x014 /* First Memory base address register */ #define PCISH5_ICR_CSR_MBAR1 0x018 /* Second Memory base address register */ - - /* Base address of registers */ #define SH5PCI_ICR_BASE (PHYS_PCI_BLOCK + 0x00040000) #define SH5PCI_IO_BASE (PHYS_PCI_BLOCK + 0x00800000) /* #define SH5PCI_VCR_BASE (P2SEG_PCICB_BLOCK + P2SEG) */ +extern unsigned long pcicr_virt; /* Register selection macro */ #define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x)) /* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */ @@ -104,4 +105,9 @@ #define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18) #define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18) +extern struct pci_ops sh5_pci_ops; + +/* arch/sh/drivers/pci/pci-sh5.c */ +int sh5pci_init(unsigned long memStart, unsigned long memSize); +#endif /* __PCI_SH5_H */ diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index e516087fb435..7d797f4de5e7 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c @@ -58,6 +58,7 @@ static int __init sh7780_pci_init(void) id = pci_read_reg(SH7780_PCIVID); if ((id & 0xffff) == SH7780_VENDOR_ID) { switch ((id >> 16) & 0xffff) { + case SH7763_DEVICE_ID: case SH7780_DEVICE_ID: case SH7781_DEVICE_ID: case SH7785_DEVICE_ID: diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index 1d069a859de2..97b2c98f05c4 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h @@ -16,6 +16,7 @@ #define SH7780_VENDOR_ID 0x1912 #define SH7781_DEVICE_ID 0x0001 #define SH7780_DEVICE_ID 0x0002 +#define SH7763_DEVICE_ID 0x0004 #define SH7785_DEVICE_ID 0x0007 /* SH7780 Control Registers */ diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index ccaba368ac9b..49b435c3a57a 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -71,7 +71,7 @@ subsys_initcall(pcibios_init); * Called after each bus is probed, but before its children * are examined. */ -void __devinit pcibios_fixup_bus(struct pci_bus *bus) +void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus) { pci_read_bridge_bases(bus); } diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 4b81d9c47b00..349d833deab5 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile @@ -1,25 +1,5 @@ -# -# Makefile for the Linux/SuperH kernel. -# - -extra-y := head.o init_task.o vmlinux.lds - -obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process.o ptrace.o \ - semaphore.o setup.o signal.o sys_sh.o syscalls.o \ - time.o topology.o traps.o - -obj-y += cpu/ timers/ -obj-$(CONFIG_VSYSCALL) += vsyscall/ -obj-$(CONFIG_SMP) += smp.o -obj-$(CONFIG_CF_ENABLER) += cf-enabler.o -obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o -obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o -obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o -obj-$(CONFIG_MODULES) += sh_ksyms.o module.o -obj-$(CONFIG_EARLY_PRINTK) += early_printk.o -obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o -obj-$(CONFIG_CRASH_DUMP) += crash_dump.o -obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_STACKTRACE) += stacktrace.o - -EXTRA_CFLAGS += -Werror +ifeq ($(CONFIG_SUPERH32),y) +include ${srctree}/arch/sh/kernel/Makefile_32 +else +include ${srctree}/arch/sh/kernel/Makefile_64 +endif diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32 new file mode 100644 index 000000000000..c89289831053 --- /dev/null +++ b/arch/sh/kernel/Makefile_32 @@ -0,0 +1,26 @@ +# +# Makefile for the Linux/SuperH kernel. +# + +extra-y := head_32.o init_task.o vmlinux.lds + +obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \ + ptrace_32.o semaphore.o setup.o signal_32.o sys_sh.o sys_sh32.o \ + syscalls_32.o time_32.o topology.o traps.o traps_32.o + +obj-y += cpu/ timers/ +obj-$(CONFIG_VSYSCALL) += vsyscall/ +obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_CF_ENABLER) += cf-enabler.o +obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o +obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o +obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o +obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o +obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o +obj-$(CONFIG_CRASH_DUMP) += crash_dump.o +obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_STACKTRACE) += stacktrace.o +obj-$(CONFIG_BINFMT_ELF) += dump_task.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64 new file mode 100644 index 000000000000..1ef21cc087f3 --- /dev/null +++ b/arch/sh/kernel/Makefile_64 @@ -0,0 +1,22 @@ +extra-y := head_64.o init_task.o vmlinux.lds + +obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \ + ptrace_64.o semaphore.o setup.o signal_64.o sys_sh.o sys_sh64.o \ + syscalls_64.o time_64.o topology.o traps.o traps_64.o + +obj-y += cpu/ timers/ +obj-$(CONFIG_VSYSCALL) += vsyscall/ +obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_CF_ENABLER) += cf-enabler.o +obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o +obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o +obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o +obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o +obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o +obj-$(CONFIG_CRASH_DUMP) += crash_dump.o +obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_STACKTRACE) += stacktrace.o +obj-$(CONFIG_BINFMT_ELF) += dump_task.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index d055a3ea6b4b..f471d242774e 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -6,8 +6,14 @@ obj-$(CONFIG_CPU_SH2) = sh2/ obj-$(CONFIG_CPU_SH2A) = sh2a/ obj-$(CONFIG_CPU_SH3) = sh3/ obj-$(CONFIG_CPU_SH4) = sh4/ +obj-$(CONFIG_CPU_SH5) = sh5/ + +# Special cases for family ancestry. + obj-$(CONFIG_CPU_SH4A) += sh4a/ +# Common interfaces. + obj-$(CONFIG_UBC_WAKEUP) += ubc.o obj-$(CONFIG_SH_ADC) += adc.o diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index c217c4bf0085..80a31329ead9 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -13,6 +13,7 @@ #include <linux/init.h> #include <linux/kernel.h> #include <linux/mm.h> +#include <linux/log2.h> #include <asm/mmu_context.h> #include <asm/processor.h> #include <asm/uaccess.h> @@ -20,9 +21,12 @@ #include <asm/system.h> #include <asm/cacheflush.h> #include <asm/cache.h> +#include <asm/elf.h> #include <asm/io.h> -#include <asm/ubc.h> #include <asm/smp.h> +#ifdef CONFIG_SUPERH32 +#include <asm/ubc.h> +#endif /* * Generic wrapper for command line arguments to disable on-chip @@ -61,25 +65,12 @@ static void __init speculative_execution_init(void) /* * Generic first-level cache init */ -static void __init cache_init(void) +#ifdef CONFIG_SUPERH32 +static void __uses_jump_to_uncached cache_init(void) { unsigned long ccr, flags; - /* First setup the rest of the I-cache info */ - current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr - - current_cpu_data.icache.linesz; - - current_cpu_data.icache.way_size = current_cpu_data.icache.sets * - current_cpu_data.icache.linesz; - - /* And the D-cache too */ - current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr - - current_cpu_data.dcache.linesz; - - current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets * - current_cpu_data.dcache.linesz; - - jump_to_P2(); + jump_to_uncached(); ccr = ctrl_inl(CCR); /* @@ -156,7 +147,31 @@ static void __init cache_init(void) #endif ctrl_outl(flags, CCR); - back_to_P1(); + back_to_cached(); +} +#else +#define cache_init() do { } while (0) +#endif + +#define CSHAPE(totalsize, linesize, assoc) \ + ((totalsize & ~0xff) | (linesize << 4) | assoc) + +#define CACHE_DESC_SHAPE(desc) \ + CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways) + +static void detect_cache_shape(void) +{ + l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache); + + if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED) + l1i_cache_shape = l1d_cache_shape; + else + l1i_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.icache); + + if (current_cpu_data.flags & CPU_HAS_L2_CACHE) + l2_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.scache); + else + l2_cache_shape = -1; /* No S-cache */ } #ifdef CONFIG_SH_DSP @@ -228,14 +243,32 @@ asmlinkage void __cpuinit sh_cpu_init(void) if (current_cpu_data.type == CPU_SH_NONE) panic("Unknown CPU"); + /* First setup the rest of the I-cache info */ + current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr - + current_cpu_data.icache.linesz; + + current_cpu_data.icache.way_size = current_cpu_data.icache.sets * + current_cpu_data.icache.linesz; + + /* And the D-cache too */ + current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr - + current_cpu_data.dcache.linesz; + + current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets * + current_cpu_data.dcache.linesz; + /* Init the cache */ cache_init(); - if (raw_smp_processor_id() == 0) + if (raw_smp_processor_id() == 0) { shm_align_mask = max_t(unsigned long, current_cpu_data.dcache.way_size - 1, PAGE_SIZE - 1); + /* Boot CPU sets the cache shape */ + detect_cache_shape(); + } + /* Disable the FPU */ if (fpu_disabled) { printk("FPU Disabled\n"); @@ -273,7 +306,10 @@ asmlinkage void __cpuinit sh_cpu_init(void) * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. * we wake it up and hope that all is well. */ +#ifdef CONFIG_SUPERH32 if (raw_smp_processor_id() == 0) ubc_wakeup(); +#endif + speculative_execution_init(); } diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile index 8da8e178f09c..cc1836e47a5d 100644 --- a/arch/sh/kernel/cpu/irq/Makefile +++ b/arch/sh/kernel/cpu/irq/Makefile @@ -1,7 +1,9 @@ # # Makefile for the Linux/SuperH CPU-specifc IRQ handlers. # -obj-y += imask.o intc.o +obj-y += intc.o +obj-$(CONFIG_SUPERH32) += imask.o +obj-$(CONFIG_CPU_SH5) += intc-sh5.o obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o diff --git a/arch/sh64/kernel/irq_intc.c b/arch/sh/kernel/cpu/irq/intc-sh5.c index 3b63a93198f2..43ee7a9a4f0b 100644 --- a/arch/sh64/kernel/irq_intc.c +++ b/arch/sh/kernel/cpu/irq/intc-sh5.c @@ -1,34 +1,27 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. + * arch/sh/kernel/cpu/irq/intc-sh5.c * - * arch/sh64/kernel/irq_intc.c + * Interrupt Controller support for SH5 INTC. * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003 Paul Mundt * - * Interrupt Controller support for SH5 INTC. * Per-interrupt selective. IRLM=0 (Fixed priority) is not * supported being useless without a cascaded interrupt * controller. * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/io.h> #include <linux/kernel.h> -#include <linux/stddef.h> -#include <linux/bitops.h> /* this includes also <asm/registers.h */ - /* which is required to remap register */ - /* names used into __asm__ blocks... */ - -#include <asm/hardware.h> -#include <asm/platform.h> +#include <linux/bitops.h> +#include <asm/cpu/irq.h> #include <asm/page.h> -#include <asm/io.h> -#include <asm/irq.h> /* * Maybe the generic Peripheral block could move to a more @@ -192,7 +185,7 @@ int intc_irq_describe(char* p, int irq) } #endif -void __init init_IRQ(void) +void __init plat_irq_setup(void) { unsigned long long __dummy0, __dummy1=~0x00000000100000f0; unsigned long reg; @@ -251,14 +244,6 @@ void __init init_IRQ(void) } } -#ifdef CONFIG_SH_CAYMAN - { - extern void init_cayman_irq(void); - - init_cayman_irq(); - } -#endif - /* * And now let interrupts come in. * sti() is not enough, we need to diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c index 6ac018c15e03..84806b2027f8 100644 --- a/arch/sh/kernel/cpu/irq/intc.c +++ b/arch/sh/kernel/cpu/irq/intc.c @@ -335,31 +335,6 @@ static intc_enum __init intc_grp_id(struct intc_desc *desc, return 0; } -static unsigned int __init intc_prio_value(struct intc_desc *desc, - intc_enum enum_id, int do_grps) -{ - struct intc_prio *p = desc->priorities; - unsigned int i; - - for (i = 0; p && enum_id && i < desc->nr_priorities; i++) { - p = desc->priorities + i; - - if (p->enum_id != enum_id) - continue; - - return p->priority; - } - - if (do_grps) - return intc_prio_value(desc, intc_grp_id(desc, enum_id), 0); - - /* default to the lowest priority possible if no priority is set - * - this needs to be at least 2 for 5-bit priorities on 7780 - */ - - return 2; -} - static unsigned int __init intc_mask_data(struct intc_desc *desc, struct intc_desc_int *d, intc_enum enum_id, int do_grps) @@ -518,8 +493,10 @@ static void __init intc_register_irq(struct intc_desc *desc, handle_level_irq, "level"); set_irq_chip_data(irq, (void *)data[primary]); - /* record the desired priority level */ - intc_prio_level[irq] = intc_prio_value(desc, enum_id, 1); + /* set priority level + * - this needs to be at least 2 for 5-bit priorities on 7780 + */ + intc_prio_level[irq] = 2; /* enable secondary masking method if present */ if (data[!primary]) diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S index ee8f1fe84b08..7a26569e7956 100644 --- a/arch/sh/kernel/cpu/sh2/entry.S +++ b/arch/sh/kernel/cpu/sh2/entry.S @@ -149,6 +149,14 @@ ENTRY(exception_handler) mov #32,r8 cmp/hs r8,r9 bt trap_entry ! 64 > vec >= 32 is trap + +#if defined(CONFIG_SH_FPU) + mov #13,r8 + cmp/eq r8,r9 + bt 10f ! fpu + nop +#endif + mov.l 4f,r8 mov r9,r4 shll2 r9 @@ -158,6 +166,10 @@ ENTRY(exception_handler) cmp/eq r9,r8 bf 3f mov.l 8f,r8 ! unhandled exception +#if defined(CONFIG_SH_FPU) +10: + mov.l 9f, r8 ! unhandled exception +#endif 3: mov.l 5f,r10 jmp @r8 @@ -177,7 +189,10 @@ interrupt_entry: 6: .long ret_from_irq 7: .long do_IRQ 8: .long do_exception_error - +#ifdef CONFIG_SH_FPU +9: .long fpu_error_trap_handler +#endif + trap_entry: mov #0x30,r8 cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall @@ -250,7 +265,7 @@ ENTRY(sh_bios_handler) 1: .long gdb_vbr_vector #endif /* CONFIG_SH_STANDARD_BIOS */ -ENTRY(address_error_handler) +ENTRY(address_error_trap_handler) mov r15,r4 ! regs add #4,r4 mov #OFF_PC,r0 diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c index ec6adc3f306f..b230eb278cef 100644 --- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c +++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c @@ -65,7 +65,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups, - NULL, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); static struct plat_sci_port sci_platform_data[] = { { diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile index 965fa2572b23..b279cdc3a233 100644 --- a/arch/sh/kernel/cpu/sh2a/Makefile +++ b/arch/sh/kernel/cpu/sh2a/Makefile @@ -6,4 +6,8 @@ obj-y := common.o probe.o opcode_helper.o common-y += $(addprefix ../sh2/, ex.o entry.o) +obj-$(CONFIG_SH_FPU) += fpu.o + obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o +obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o +obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c new file mode 100644 index 000000000000..3feb95a4fcbc --- /dev/null +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c @@ -0,0 +1,89 @@ +/* + * arch/sh/kernel/cpu/sh2a/clock-sh7203.c + * + * SH7203 support for the clock framework + * + * Copyright (C) 2007 Kieran Bingham (MPC-Data Ltd) + * + * Based on clock-sh7263.c + * Copyright (C) 2006 Yoshinori Sato + * + * Based on clock-sh4.c + * Copyright (C) 2005 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/kernel.h> +#include <asm/clock.h> +#include <asm/freq.h> +#include <asm/io.h> + +const static int pll1rate[]={8,12,16,0}; +const static int pfc_divisors[]={1,2,3,4,6,8,12}; +#define ifc_divisors pfc_divisors + +#if (CONFIG_SH_CLK_MD == 0) +#define PLL2 (1) +#elif (CONFIG_SH_CLK_MD == 1) +#define PLL2 (2) +#elif (CONFIG_SH_CLK_MD == 2) +#define PLL2 (4) +#elif (CONFIG_SH_CLK_MD == 3) +#define PLL2 (4) +#else +#error "Illegal Clock Mode!" +#endif + +static void master_clk_init(struct clk *clk) +{ + clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ; +} + +static struct clk_ops sh7203_master_clk_ops = { + .init = master_clk_init, +}; + +static void module_clk_recalc(struct clk *clk) +{ + int idx = (ctrl_inw(FREQCR) & 0x0007); + clk->rate = clk->parent->rate / pfc_divisors[idx]; +} + +static struct clk_ops sh7203_module_clk_ops = { + .recalc = module_clk_recalc, +}; + +static void bus_clk_recalc(struct clk *clk) +{ + int idx = (ctrl_inw(FREQCR) & 0x0007); + clk->rate = clk->parent->rate / pfc_divisors[idx-2]; +} + +static struct clk_ops sh7203_bus_clk_ops = { + .recalc = bus_clk_recalc, +}; + +static void cpu_clk_recalc(struct clk *clk) +{ + clk->rate = clk->parent->rate; +} + +static struct clk_ops sh7203_cpu_clk_ops = { + .recalc = cpu_clk_recalc, +}; + +static struct clk_ops *sh7203_clk_ops[] = { + &sh7203_master_clk_ops, + &sh7203_module_clk_ops, + &sh7203_bus_clk_ops, + &sh7203_cpu_clk_ops, +}; + +void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +{ + if (idx < ARRAY_SIZE(sh7203_clk_ops)) + *ops = sh7203_clk_ops[idx]; +} diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c new file mode 100644 index 000000000000..ff99562456fb --- /dev/null +++ b/arch/sh/kernel/cpu/sh2a/fpu.c @@ -0,0 +1,633 @@ +/* + * Save/restore floating point context for signal handlers. + * + * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * FIXME! These routines can be optimized in big endian case. + */ +#include <linux/sched.h> +#include <linux/signal.h> +#include <asm/processor.h> +#include <asm/io.h> + +/* The PR (precision) bit in the FP Status Register must be clear when + * an frchg instruction is executed, otherwise the instruction is undefined. + * Executing frchg with PR set causes a trap on some SH4 implementations. + */ + +#define FPSCR_RCHG 0x00000000 + + +/* + * Save FPU registers onto task structure. + * Assume called with FPU enabled (SR.FD=0). + */ +void +save_fpu(struct task_struct *tsk, struct pt_regs *regs) +{ + unsigned long dummy; + + clear_tsk_thread_flag(tsk, TIF_USEDFPU); + enable_fpu(); + asm volatile("sts.l fpul, @-%0\n\t" + "sts.l fpscr, @-%0\n\t" + "fmov.s fr15, @-%0\n\t" + "fmov.s fr14, @-%0\n\t" + "fmov.s fr13, @-%0\n\t" + "fmov.s fr12, @-%0\n\t" + "fmov.s fr11, @-%0\n\t" + "fmov.s fr10, @-%0\n\t" + "fmov.s fr9, @-%0\n\t" + "fmov.s fr8, @-%0\n\t" + "fmov.s fr7, @-%0\n\t" + "fmov.s fr6, @-%0\n\t" + "fmov.s fr5, @-%0\n\t" + "fmov.s fr4, @-%0\n\t" + "fmov.s fr3, @-%0\n\t" + "fmov.s fr2, @-%0\n\t" + "fmov.s fr1, @-%0\n\t" + "fmov.s fr0, @-%0\n\t" + "lds %3, fpscr\n\t" + : "=r" (dummy) + : "0" ((char *)(&tsk->thread.fpu.hard.status)), + "r" (FPSCR_RCHG), + "r" (FPSCR_INIT) + : "memory"); + + disable_fpu(); + release_fpu(regs); +} + +static void +restore_fpu(struct task_struct *tsk) +{ + unsigned long dummy; + + enable_fpu(); + asm volatile("fmov.s @%0+, fr0\n\t" + "fmov.s @%0+, fr1\n\t" + "fmov.s @%0+, fr2\n\t" + "fmov.s @%0+, fr3\n\t" + "fmov.s @%0+, fr4\n\t" + "fmov.s @%0+, fr5\n\t" + "fmov.s @%0+, fr6\n\t" + "fmov.s @%0+, fr7\n\t" + "fmov.s @%0+, fr8\n\t" + "fmov.s @%0+, fr9\n\t" + "fmov.s @%0+, fr10\n\t" + "fmov.s @%0+, fr11\n\t" + "fmov.s @%0+, fr12\n\t" + "fmov.s @%0+, fr13\n\t" + "fmov.s @%0+, fr14\n\t" + "fmov.s @%0+, fr15\n\t" + "lds.l @%0+, fpscr\n\t" + "lds.l @%0+, fpul\n\t" + : "=r" (dummy) + : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG) + : "memory"); + disable_fpu(); +} + +/* + * Load the FPU with signalling NANS. This bit pattern we're using + * has the property that no matter wether considered as single or as + * double precission represents signaling NANS. + */ + +static void +fpu_init(void) +{ + enable_fpu(); + asm volatile("lds %0, fpul\n\t" + "fsts fpul, fr0\n\t" + "fsts fpul, fr1\n\t" + "fsts fpul, fr2\n\t" + "fsts fpul, fr3\n\t" + "fsts fpul, fr4\n\t" + "fsts fpul, fr5\n\t" + "fsts fpul, fr6\n\t" + "fsts fpul, fr7\n\t" + "fsts fpul, fr8\n\t" + "fsts fpul, fr9\n\t" + "fsts fpul, fr10\n\t" + "fsts fpul, fr11\n\t" + "fsts fpul, fr12\n\t" + "fsts fpul, fr13\n\t" + "fsts fpul, fr14\n\t" + "fsts fpul, fr15\n\t" + "lds %2, fpscr\n\t" + : /* no output */ + : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT)); + disable_fpu(); +} + +/* + * Emulate arithmetic ops on denormalized number for some FPU insns. + */ + +/* denormalized float * float */ +static int denormal_mulf(int hx, int hy) +{ + unsigned int ix, iy; + unsigned long long m, n; + int exp, w; + + ix = hx & 0x7fffffff; + iy = hy & 0x7fffffff; + if (iy < 0x00800000 || ix == 0) + return ((hx ^ hy) & 0x80000000); + + exp = (iy & 0x7f800000) >> 23; + ix &= 0x007fffff; + iy = (iy & 0x007fffff) | 0x00800000; + m = (unsigned long long)ix * iy; + n = m; + w = -1; + while (n) { n >>= 1; w++; } + + /* FIXME: use guard bits */ + exp += w - 126 - 46; + if (exp > 0) + ix = ((int) (m >> (w - 23)) & 0x007fffff) | (exp << 23); + else if (exp + 22 >= 0) + ix = (int) (m >> (w - 22 - exp)) & 0x007fffff; + else + ix = 0; + + ix |= (hx ^ hy) & 0x80000000; + return ix; +} + +/* denormalized double * double */ +static void mult64(unsigned long long x, unsigned long long y, + unsigned long long *highp, unsigned long long *lowp) +{ + unsigned long long sub0, sub1, sub2, sub3; + unsigned long long high, low; + + sub0 = (x >> 32) * (unsigned long) (y >> 32); + sub1 = (x & 0xffffffffLL) * (unsigned long) (y >> 32); + sub2 = (x >> 32) * (unsigned long) (y & 0xffffffffLL); + sub3 = (x & 0xffffffffLL) * (unsigned long) (y & 0xffffffffLL); + low = sub3; + high = 0LL; + sub3 += (sub1 << 32); + if (low > sub3) + high++; + low = sub3; + sub3 += (sub2 << 32); + if (low > sub3) + high++; + low = sub3; + high += (sub1 >> 32) + (sub2 >> 32); + high += sub0; + *lowp = low; + *highp = high; +} + +static inline long long rshift64(unsigned long long mh, + unsigned long long ml, int n) +{ + if (n >= 64) + return mh >> (n - 64); + return (mh << (64 - n)) | (ml >> n); +} + +static long long denormal_muld(long long hx, long long hy) +{ + unsigned long long ix, iy; + unsigned long long mh, ml, nh, nl; + int exp, w; + + ix = hx & 0x7fffffffffffffffLL; + iy = hy & 0x7fffffffffffffffLL; + if (iy < 0x0010000000000000LL || ix == 0) + return ((hx ^ hy) & 0x8000000000000000LL); + + exp = (iy & 0x7ff0000000000000LL) >> 52; + ix &= 0x000fffffffffffffLL; + iy = (iy & 0x000fffffffffffffLL) | 0x0010000000000000LL; + mult64(ix, iy, &mh, &ml); + nh = mh; + nl = ml; + w = -1; + if (nh) { + while (nh) { nh >>= 1; w++;} + w += 64; + } else + while (nl) { nl >>= 1; w++;} + + /* FIXME: use guard bits */ + exp += w - 1022 - 52 * 2; + if (exp > 0) + ix = (rshift64(mh, ml, w - 52) & 0x000fffffffffffffLL) + | ((long long)exp << 52); + else if (exp + 51 >= 0) + ix = rshift64(mh, ml, w - 51 - exp) & 0x000fffffffffffffLL; + else + ix = 0; + + ix |= (hx ^ hy) & 0x8000000000000000LL; + return ix; +} + +/* ix - iy where iy: denormal and ix, iy >= 0 */ +static int denormal_subf1(unsigned int ix, unsigned int iy) +{ + int frac; + int exp; + + if (ix < 0x00800000) + return ix - iy; + + exp = (ix & 0x7f800000) >> 23; + if (exp - 1 > 31) + return ix; + iy >>= exp - 1; + if (iy == 0) + return ix; + + frac = (ix & 0x007fffff) | 0x00800000; + frac -= iy; + while (frac < 0x00800000) { + if (--exp == 0) + return frac; + frac <<= 1; + } + + return (exp << 23) | (frac & 0x007fffff); +} + +/* ix + iy where iy: denormal and ix, iy >= 0 */ +static int denormal_addf1(unsigned int ix, unsigned int iy) +{ + int frac; + int exp; + + if (ix < 0x00800000) + return ix + iy; + + exp = (ix & 0x7f800000) >> 23; + if (exp - 1 > 31) + return ix; + iy >>= exp - 1; + if (iy == 0) + return ix; + + frac = (ix & 0x007fffff) | 0x00800000; + frac += iy; + if (frac >= 0x01000000) { + frac >>= 1; + ++exp; + } + + return (exp << 23) | (frac & 0x007fffff); +} + +static int denormal_addf(int hx, int hy) +{ + unsigned int ix, iy; + int sign; + + if ((hx ^ hy) & 0x80000000) { + sign = hx & 0x80000000; + ix = hx & 0x7fffffff; + iy = hy & 0x7fffffff; + if (iy < 0x00800000) { + ix = denormal_subf1(ix, iy); + if (ix < 0) { + ix = -ix; + sign ^= 0x80000000; + } + } else { + ix = denormal_subf1(iy, ix); + sign ^= 0x80000000; + } + } else { + sign = hx & 0x80000000; + ix = hx & 0x7fffffff; + iy = hy & 0x7fffffff; + if (iy < 0x00800000) + ix = denormal_addf1(ix, iy); + else + ix = denormal_addf1(iy, ix); + } + + return sign | ix; +} + +/* ix - iy where iy: denormal and ix, iy >= 0 */ +static long long denormal_subd1(unsigned long long ix, unsigned long long iy) +{ + long long frac; + int exp; + + if (ix < 0x0010000000000000LL) + return ix - iy; + + exp = (ix & 0x7ff0000000000000LL) >> 52; + if (exp - 1 > 63) + return ix; + iy >>= exp - 1; + if (iy == 0) + return ix; + + frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL; + frac -= iy; + while (frac < 0x0010000000000000LL) { + if (--exp == 0) + return frac; + frac <<= 1; + } + + return ((long long)exp << 52) | (frac & 0x000fffffffffffffLL); +} + +/* ix + iy where iy: denormal and ix, iy >= 0 */ +static long long denormal_addd1(unsigned long long ix, unsigned long long iy) +{ + long long frac; + long long exp; + + if (ix < 0x0010000000000000LL) + return ix + iy; + + exp = (ix & 0x7ff0000000000000LL) >> 52; + if (exp - 1 > 63) + return ix; + iy >>= exp - 1; + if (iy == 0) + return ix; + + frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL; + frac += iy; + if (frac >= 0x0020000000000000LL) { + frac >>= 1; + ++exp; + } + + return (exp << 52) | (frac & 0x000fffffffffffffLL); +} + +static long long denormal_addd(long long hx, long long hy) +{ + unsigned long long ix, iy; + long long sign; + + if ((hx ^ hy) & 0x8000000000000000LL) { + sign = hx & 0x8000000000000000LL; + ix = hx & 0x7fffffffffffffffLL; + iy = hy & 0x7fffffffffffffffLL; + if (iy < 0x0010000000000000LL) { + ix = denormal_subd1(ix, iy); + if (ix < 0) { + ix = -ix; + sign ^= 0x8000000000000000LL; + } + } else { + ix = denormal_subd1(iy, ix); + sign ^= 0x8000000000000000LL; + } + } else { + sign = hx & 0x8000000000000000LL; + ix = hx & 0x7fffffffffffffffLL; + iy = hy & 0x7fffffffffffffffLL; + if (iy < 0x0010000000000000LL) + ix = denormal_addd1(ix, iy); + else + ix = denormal_addd1(iy, ix); + } + + return sign | ix; +} + +/** + * denormal_to_double - Given denormalized float number, + * store double float + * + * @fpu: Pointer to sh_fpu_hard structure + * @n: Index to FP register + */ +static void +denormal_to_double (struct sh_fpu_hard_struct *fpu, int n) +{ + unsigned long du, dl; + unsigned long x = fpu->fpul; + int exp = 1023 - 126; + + if (x != 0 && (x & 0x7f800000) == 0) { + du = (x & 0x80000000); + while ((x & 0x00800000) == 0) { + x <<= 1; + exp--; + } + x &= 0x007fffff; + du |= (exp << 20) | (x >> 3); + dl = x << 29; + + fpu->fp_regs[n] = du; + fpu->fp_regs[n+1] = dl; + } +} + +/** + * ieee_fpe_handler - Handle denormalized number exception + * + * @regs: Pointer to register structure + * + * Returns 1 when it's handled (should not cause exception). + */ +static int +ieee_fpe_handler (struct pt_regs *regs) +{ + unsigned short insn = *(unsigned short *) regs->pc; + unsigned short finsn; + unsigned long nextpc; + int nib[4] = { + (insn >> 12) & 0xf, + (insn >> 8) & 0xf, + (insn >> 4) & 0xf, + insn & 0xf}; + + if (nib[0] == 0xb || + (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ + regs->pr = regs->pc + 4; + if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ + nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */ + if (regs->sr & 1) + nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); + else + nextpc = regs->pc + 4; + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */ + if (regs->sr & 1) + nextpc = regs->pc + 4; + else + nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x4 && nib[3] == 0xb && + (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */ + nextpc = regs->regs[nib[1]]; + finsn = *(unsigned short *) (regs->pc + 2); + } else if (nib[0] == 0x0 && nib[3] == 0x3 && + (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */ + nextpc = regs->pc + 4 + regs->regs[nib[1]]; + finsn = *(unsigned short *) (regs->pc + 2); + } else if (insn == 0x000b) { /* rts */ + nextpc = regs->pr; + finsn = *(unsigned short *) (regs->pc + 2); + } else { + nextpc = regs->pc + 2; + finsn = insn; + } + +#define FPSCR_FPU_ERROR (1 << 17) + + if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ + struct task_struct *tsk = current; + + if ((tsk->thread.fpu.hard.fpscr & FPSCR_FPU_ERROR)) { + /* FPU error */ + denormal_to_double (&tsk->thread.fpu.hard, + (finsn >> 8) & 0xf); + } else + return 0; + + regs->pc = nextpc; + return 1; + } else if ((finsn & 0xf00f) == 0xf002) { /* fmul */ + struct task_struct *tsk = current; + int fpscr; + int n, m, prec; + unsigned int hx, hy; + + n = (finsn >> 8) & 0xf; + m = (finsn >> 4) & 0xf; + hx = tsk->thread.fpu.hard.fp_regs[n]; + hy = tsk->thread.fpu.hard.fp_regs[m]; + fpscr = tsk->thread.fpu.hard.fpscr; + prec = fpscr & (1 << 19); + + if ((fpscr & FPSCR_FPU_ERROR) + && (prec && ((hx & 0x7fffffff) < 0x00100000 + || (hy & 0x7fffffff) < 0x00100000))) { + long long llx, lly; + + /* FPU error because of denormal */ + llx = ((long long) hx << 32) + | tsk->thread.fpu.hard.fp_regs[n+1]; + lly = ((long long) hy << 32) + | tsk->thread.fpu.hard.fp_regs[m+1]; + if ((hx & 0x7fffffff) >= 0x00100000) + llx = denormal_muld(lly, llx); + else + llx = denormal_muld(llx, lly); + tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; + tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; + } else if ((fpscr & FPSCR_FPU_ERROR) + && (!prec && ((hx & 0x7fffffff) < 0x00800000 + || (hy & 0x7fffffff) < 0x00800000))) { + /* FPU error because of denormal */ + if ((hx & 0x7fffffff) >= 0x00800000) + hx = denormal_mulf(hy, hx); + else + hx = denormal_mulf(hx, hy); + tsk->thread.fpu.hard.fp_regs[n] = hx; + } else + return 0; + + regs->pc = nextpc; + return 1; + } else if ((finsn & 0xf00e) == 0xf000) { /* fadd, fsub */ + struct task_struct *tsk = current; + int fpscr; + int n, m, prec; + unsigned int hx, hy; + + n = (finsn >> 8) & 0xf; + m = (finsn >> 4) & 0xf; + hx = tsk->thread.fpu.hard.fp_regs[n]; + hy = tsk->thread.fpu.hard.fp_regs[m]; + fpscr = tsk->thread.fpu.hard.fpscr; + prec = fpscr & (1 << 19); + + if ((fpscr & FPSCR_FPU_ERROR) + && (prec && ((hx & 0x7fffffff) < 0x00100000 + || (hy & 0x7fffffff) < 0x00100000))) { + long long llx, lly; + + /* FPU error because of denormal */ + llx = ((long long) hx << 32) + | tsk->thread.fpu.hard.fp_regs[n+1]; + lly = ((long long) hy << 32) + | tsk->thread.fpu.hard.fp_regs[m+1]; + if ((finsn & 0xf00f) == 0xf000) + llx = denormal_addd(llx, lly); + else + llx = denormal_addd(llx, lly ^ (1LL << 63)); + tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; + tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; + } else if ((fpscr & FPSCR_FPU_ERROR) + && (!prec && ((hx & 0x7fffffff) < 0x00800000 + || (hy & 0x7fffffff) < 0x00800000))) { + /* FPU error because of denormal */ + if ((finsn & 0xf00f) == 0xf000) + hx = denormal_addf(hx, hy); + else + hx = denormal_addf(hx, hy ^ 0x80000000); + tsk->thread.fpu.hard.fp_regs[n] = hx; + } else + return 0; + + regs->pc = nextpc; + return 1; + } + + return 0; +} + +BUILD_TRAP_HANDLER(fpu_error) +{ + struct task_struct *tsk = current; + TRAP_HANDLER_DECL; + + save_fpu(tsk, regs); + if (ieee_fpe_handler(regs)) { + tsk->thread.fpu.hard.fpscr &= + ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); + grab_fpu(regs); + restore_fpu(tsk); + set_tsk_thread_flag(tsk, TIF_USEDFPU); + return; + } + + force_sig(SIGFPE, tsk); +} + +BUILD_TRAP_HANDLER(fpu_state_restore) +{ + struct task_struct *tsk = current; + TRAP_HANDLER_DECL; + + grab_fpu(regs); + if (!user_mode(regs)) { + printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); + return; + } + + if (used_math()) { + /* Using the FPU again. */ + restore_fpu(tsk); + } else { + /* First time FPU user. */ + fpu_init(); + set_used_math(); + } + set_tsk_thread_flag(tsk, TIF_USEDFPU); +} diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c index 6d02465704b9..6910e2664468 100644 --- a/arch/sh/kernel/cpu/sh2a/probe.c +++ b/arch/sh/kernel/cpu/sh2a/probe.c @@ -3,25 +3,36 @@ * * CPU Subtype Probing for SH-2A. * - * Copyright (C) 2004, 2005 Paul Mundt + * Copyright (C) 2004 - 2007 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ - #include <linux/init.h> #include <asm/processor.h> #include <asm/cache.h> int __init detect_cpu_and_cache_system(void) { - /* Just SH7206 for now .. */ - boot_cpu_data.type = CPU_SH7206; + /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ boot_cpu_data.flags |= CPU_HAS_OP32; +#if defined(CONFIG_CPU_SUBTYPE_SH7203) + boot_cpu_data.type = CPU_SH7203; + /* SH7203 has an FPU.. */ + boot_cpu_data.flags |= CPU_HAS_FPU; +#elif defined(CONFIG_CPU_SUBTYPE_SH7263) + boot_cpu_data.type = CPU_SH7263; + boot_cpu_data.flags |= CPU_HAS_FPU; +#elif defined(CONFIG_CPU_SUBTYPE_SH7206) + boot_cpu_data.type = CPU_SH7206; + /* While SH7206 has a DSP.. */ + boot_cpu_data.flags |= CPU_HAS_DSP; +#endif + boot_cpu_data.dcache.ways = 4; - boot_cpu_data.dcache.way_incr = (1 << 11); + boot_cpu_data.dcache.way_incr = (1 << 11); boot_cpu_data.dcache.sets = 128; boot_cpu_data.dcache.entry_shift = 4; boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; @@ -37,4 +48,3 @@ int __init detect_cpu_and_cache_system(void) return 0; } - diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c new file mode 100644 index 000000000000..db6ef5cecde1 --- /dev/null +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c @@ -0,0 +1,319 @@ +/* + * SH7203 and SH7263 Setup + * + * Copyright (C) 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/platform_device.h> +#include <linux/init.h> +#include <linux/serial.h> +#include <asm/sci.h> + +enum { + UNUSED = 0, + + /* interrupt sources */ + IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, + PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, + DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI, + DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI, + DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI, + DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI, + USB, LCDC, CMT0, CMT1, BSC, WDT, + MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D, + MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F, + MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U, + MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U, + MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V, + MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V, + ADC_ADI, + IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI, + IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI, + IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI, + IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI, IIC33_TEI, + SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI, + SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI, + SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI, + SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI, + SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI, + SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI, + SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII, + + /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */ + ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG, ROMDEC_ISEC, ROMDEC_IBUF, + ROMDEC_IREADY, + + FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, + + SDHI3, SDHI0, SDHI1, + + RTC_ARM, RTC_PRD, RTC_CUP, + RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, RCAN0_SLE, + RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, RCAN1_SLE, + + SRC_OVF, SRC_ODFI, SRC_IDEI, IEBI, + + /* interrupt groups */ + PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7, + MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU, + MTU3_ABCD, MTU4_ABCD, + IIC30, IIC31, IIC32, IIC33, SCIF0, SCIF1, SCIF2, SCIF3, + SSU0, SSU1, ROMDEC, SDHI, FLCTL, RTC, RCAN0, RCAN1, SRC +}; + +static struct intc_vect vectors[] __initdata = { + INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65), + INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67), + INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69), + INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71), + INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81), + INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83), + INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85), + INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87), + INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109), + INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113), + INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117), + INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121), + INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125), + INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129), + INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133), + INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137), + INTC_IRQ(USB, 140), INTC_IRQ(LCDC, 141), + INTC_IRQ(CMT0, 142), INTC_IRQ(CMT1, 143), + INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145), + INTC_IRQ(MTU2_TGI0A, 146), INTC_IRQ(MTU2_TGI0B, 147), + INTC_IRQ(MTU2_TGI0C, 148), INTC_IRQ(MTU2_TGI0D, 149), + INTC_IRQ(MTU2_TCI0V, 150), + INTC_IRQ(MTU2_TGI0E, 151), INTC_IRQ(MTU2_TGI0F, 152), + INTC_IRQ(MTU2_TGI1A, 153), INTC_IRQ(MTU2_TGI1B, 154), + INTC_IRQ(MTU2_TCI1V, 155), INTC_IRQ(MTU2_TCI1U, 156), + INTC_IRQ(MTU2_TGI2A, 157), INTC_IRQ(MTU2_TGI2B, 158), + INTC_IRQ(MTU2_TCI2V, 159), INTC_IRQ(MTU2_TCI2U, 160), + INTC_IRQ(MTU2_TGI3A, 161), INTC_IRQ(MTU2_TGI3B, 162), + INTC_IRQ(MTU2_TGI3C, 163), INTC_IRQ(MTU2_TGI3D, 164), + INTC_IRQ(MTU2_TCI3V, 165), + INTC_IRQ(MTU2_TGI4A, 166), INTC_IRQ(MTU2_TGI4B, 167), + INTC_IRQ(MTU2_TGI4C, 168), INTC_IRQ(MTU2_TGI4D, 169), + INTC_IRQ(MTU2_TCI4V, 170), + INTC_IRQ(ADC_ADI, 171), + INTC_IRQ(IIC30_STPI, 172), INTC_IRQ(IIC30_NAKI, 173), + INTC_IRQ(IIC30_RXI, 174), INTC_IRQ(IIC30_TXI, 175), + INTC_IRQ(IIC30_TEI, 176), + INTC_IRQ(IIC31_STPI, 177), INTC_IRQ(IIC31_NAKI, 178), + INTC_IRQ(IIC31_RXI, 179), INTC_IRQ(IIC31_TXI, 180), + INTC_IRQ(IIC31_TEI, 181), + INTC_IRQ(IIC32_STPI, 182), INTC_IRQ(IIC32_NAKI, 183), + INTC_IRQ(IIC32_RXI, 184), INTC_IRQ(IIC32_TXI, 185), + INTC_IRQ(IIC32_TEI, 186), + INTC_IRQ(IIC33_STPI, 187), INTC_IRQ(IIC33_NAKI, 188), + INTC_IRQ(IIC33_RXI, 189), INTC_IRQ(IIC33_TXI, 190), + INTC_IRQ(IIC33_TEI, 191), + INTC_IRQ(SCIF0_BRI, 192), INTC_IRQ(SCIF0_ERI, 193), + INTC_IRQ(SCIF0_RXI, 194), INTC_IRQ(SCIF0_TXI, 195), + INTC_IRQ(SCIF1_BRI, 196), INTC_IRQ(SCIF1_ERI, 197), + INTC_IRQ(SCIF1_RXI, 198), INTC_IRQ(SCIF1_TXI, 199), + INTC_IRQ(SCIF2_BRI, 200), INTC_IRQ(SCIF2_ERI, 201), + INTC_IRQ(SCIF2_RXI, 202), INTC_IRQ(SCIF2_TXI, 203), + INTC_IRQ(SCIF3_BRI, 204), INTC_IRQ(SCIF3_ERI, 205), + INTC_IRQ(SCIF3_RXI, 206), INTC_IRQ(SCIF3_TXI, 207), + INTC_IRQ(SSU0_SSERI, 208), INTC_IRQ(SSU0_SSRXI, 209), + INTC_IRQ(SSU0_SSTXI, 210), + INTC_IRQ(SSU1_SSERI, 211), INTC_IRQ(SSU1_SSRXI, 212), + INTC_IRQ(SSU1_SSTXI, 213), + INTC_IRQ(SSI0_SSII, 214), INTC_IRQ(SSI1_SSII, 215), + INTC_IRQ(SSI2_SSII, 216), INTC_IRQ(SSI3_SSII, 217), + INTC_IRQ(FLCTL_FLSTEI, 224), INTC_IRQ(FLCTL_FLTENDI, 225), + INTC_IRQ(FLCTL_FLTREQ0I, 226), INTC_IRQ(FLCTL_FLTREQ1I, 227), + INTC_IRQ(RTC_ARM, 231), INTC_IRQ(RTC_PRD, 232), + INTC_IRQ(RTC_CUP, 233), + INTC_IRQ(RCAN0_ERS, 234), INTC_IRQ(RCAN0_OVR, 235), + INTC_IRQ(RCAN0_RM0, 236), INTC_IRQ(RCAN0_RM1, 237), + INTC_IRQ(RCAN0_SLE, 238), + INTC_IRQ(RCAN1_ERS, 239), INTC_IRQ(RCAN1_OVR, 240), + INTC_IRQ(RCAN1_RM0, 241), INTC_IRQ(RCAN1_RM1, 242), + INTC_IRQ(RCAN1_SLE, 243), + + /* SH7263-specific trash */ +#ifdef CONFIG_CPU_SUBTYPE_SH7263 + INTC_IRQ(ROMDEC_ISY, 218), INTC_IRQ(ROMDEC_IERR, 219), + INTC_IRQ(ROMDEC_IARG, 220), INTC_IRQ(ROMDEC_ISEC, 221), + INTC_IRQ(ROMDEC_IBUF, 222), INTC_IRQ(ROMDEC_IREADY, 223), + + INTC_IRQ(SDHI3, 228), INTC_IRQ(SDHI0, 229), INTC_IRQ(SDHI1, 230), + + INTC_IRQ(SRC_OVF, 244), INTC_IRQ(SRC_ODFI, 245), + INTC_IRQ(SRC_IDEI, 246), + + INTC_IRQ(IEBI, 247), +#endif +}; + +static struct intc_group groups[] __initdata = { + INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3, + PINT4, PINT5, PINT6, PINT7), + INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI), + INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI), + INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI), + INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI), + INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI), + INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI), + INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI), + INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI), + INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D), + INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F), + INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B), + INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U), + INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B), + INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U), + INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D), + INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D), + INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, + IIC30_TEI), + INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, + IIC31_TEI), + INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, + IIC32_TEI), + INTC_GROUP(IIC33, IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI, + IIC33_TEI), + INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI), + INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI), + INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), + INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI), + INTC_GROUP(SSU0, SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI), + INTC_GROUP(SSU1, SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI), + INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, + FLCTL_FLTREQ1I), + INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP), + INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, + RCAN0_SLE), + INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, + RCAN1_SLE), + +#ifdef CONFIG_CPU_SUBTYPE_SH7263 + INTC_GROUP(ROMDEC, ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG, + ROMDEC_ISEC, ROMDEC_IBUF, ROMDEC_IREADY), + INTC_GROUP(SDHI, SDHI3, SDHI0, SDHI1), + INTC_GROUP(SRC, SRC_OVF, SRC_ODFI, SRC_IDEI), +#endif +}; + +static struct intc_prio_reg prio_registers[] __initdata = { + { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } }, + { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } }, + { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } }, + { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } }, + { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4, DMAC5, DMAC6, DMAC7 } }, + { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { USB, LCDC, CMT0, CMT1 } }, + { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } }, + { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { MTU1_AB, MTU1_VU, MTU2_AB, + MTU2_VU } }, + { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { MTU3_ABCD, MTU2_TCI3V, MTU4_ABCD, + MTU2_TCI4V } }, + { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { ADC_ADI, IIC30, IIC31, IIC32 } }, + { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { IIC33, SCIF0, SCIF1, SCIF2 } }, + { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { SCIF3, SSU0, SSU1, SSI0_SSII } }, +#ifdef CONFIG_CPU_SUBTYPE_SH7203 + { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSI1_SSII, SSI2_SSII, + SSI3_SSII, 0 } }, + { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } }, + { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, 0, 0, 0 } }, +#else + { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSI1_SSII, SSI2_SSII, + SSI3_SSII, ROMDEC } }, + { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } }, + { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, SRC, IEBI, 0 } }, +#endif +}; + +static struct intc_mask_reg mask_registers[] __initdata = { + { 0xfffe0808, 0, 16, /* PINTER */ + { 0, 0, 0, 0, 0, 0, 0, 0, + PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } }, +}; + +static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups, + mask_registers, prio_registers, NULL); + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xfffe8000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 193, 194, 195, 192 }, + }, { + .mapbase = 0xfffe8800, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 197, 198, 199, 196 }, + }, { + .mapbase = 0xfffe9000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 201, 202, 203, 200 }, + }, { + .mapbase = 0xfffe9800, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 205, 206, 207, 204 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct resource rtc_resources[] = { + [0] = { + .start = 0xffff2000, + .end = 0xffff2000 + 0x58 - 1, + .flags = IORESOURCE_IO, + }, + [1] = { + /* Period IRQ */ + .start = 232, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* Carry IRQ */ + .start = 233, + .flags = IORESOURCE_IRQ, + }, + [3] = { + /* Alarm IRQ */ + .start = 231, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device rtc_device = { + .name = "sh-rtc", + .id = -1, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; + +static struct platform_device *sh7203_devices[] __initdata = { + &sci_device, + &rtc_device, +}; + +static int __init sh7203_devices_setup(void) +{ + return platform_add_devices(sh7203_devices, + ARRAY_SIZE(sh7203_devices)); +} +__initcall(sh7203_devices_setup); + +void __init plat_irq_setup(void) +{ + register_intc_controller(&intc_desc); +} diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c index bd745aa87222..a564425b905f 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c @@ -167,7 +167,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups, - NULL, mask_registers, prio_registers, NULL); + mask_registers, prio_registers, NULL); static struct plat_sci_port sci_platform_data[] = { { diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index 646eb6933614..3ae4d9111f19 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o +obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH3) := clock-sh3.o @@ -21,5 +22,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o +clock-$(CONFIG_CPU_SUBTYPE_SH7712) := clock-sh7712.o obj-y += $(clock-y) diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c new file mode 100644 index 000000000000..54f54df51ef0 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c @@ -0,0 +1,71 @@ +/* + * arch/sh/kernel/cpu/sh3/clock-sh7712.c + * + * SH7712 support for the clock framework + * + * Copyright (C) 2007 Andrew Murray <amurray@mpc-data.co.uk> + * + * Based on arch/sh/kernel/cpu/sh3/clock-sh3.c + * Copyright (C) 2005 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/kernel.h> +#include <asm/clock.h> +#include <asm/freq.h> +#include <asm/io.h> + +static int multipliers[] = { 1, 2, 3 }; +static int divisors[] = { 1, 2, 3, 4, 6 }; + +static void master_clk_init(struct clk *clk) +{ + int frqcr = ctrl_inw(FRQCR); + int idx = (frqcr & 0x0300) >> 8; + + clk->rate *= multipliers[idx]; +} + +static struct clk_ops sh7712_master_clk_ops = { + .init = master_clk_init, +}; + +static void module_clk_recalc(struct clk *clk) +{ + int frqcr = ctrl_inw(FRQCR); + int idx = frqcr & 0x0007; + + clk->rate = clk->parent->rate / divisors[idx]; +} + +static struct clk_ops sh7712_module_clk_ops = { + .recalc = module_clk_recalc, +}; + +static void cpu_clk_recalc(struct clk *clk) +{ + int frqcr = ctrl_inw(FRQCR); + int idx = (frqcr & 0x0030) >> 4; + + clk->rate = clk->parent->rate / divisors[idx]; +} + +static struct clk_ops sh7712_cpu_clk_ops = { + .recalc = cpu_clk_recalc, +}; + +static struct clk_ops *sh7712_clk_ops[] = { + &sh7712_master_clk_ops, + &sh7712_module_clk_ops, + &sh7712_cpu_clk_ops, +}; + +void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +{ + if (idx < ARRAY_SIZE(sh7712_clk_ops)) + *ops = sh7712_clk_ops[idx]; +} + diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S index 0d12a124055c..4004073f98cd 100644 --- a/arch/sh/kernel/cpu/sh3/entry.S +++ b/arch/sh/kernel/cpu/sh3/entry.S @@ -13,8 +13,9 @@ #include <linux/linkage.h> #include <asm/asm-offsets.h> #include <asm/thread_info.h> -#include <asm/cpu/mmu_context.h> #include <asm/unistd.h> +#include <asm/cpu/mmu_context.h> +#include <asm/page.h> ! NOTE: ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address @@ -409,6 +410,27 @@ ENTRY(handle_exception) ! Using k0, k1 for scratch registers (r0_bank1, r1_bank), ! save all registers onto stack. ! + +#ifdef CONFIG_GUSA + ! Check for roll back gRB (User and Kernel) + mov r15, k0 + shll k0 + bf/s 1f + shll k0 + bf/s 1f + stc spc, k1 + stc r0_bank, k0 + cmp/hs k0, k1 ! test k1 (saved PC) >= k0 (saved r0) + bt/s 2f + stc r1_bank, k1 + + add #-2, k0 + add r15, k0 + ldc k0, spc ! PC = saved r0 + r15 - 2 +2: mov k1, r15 ! SP = r1 +1: +#endif + stc ssr, k0 ! Is it from kernel space? shll k0 ! Check MD bit (bit30) by shifting it into... shll k0 ! ...the T bit diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index b6abf38d3a8d..11b6d9c6edae 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S @@ -36,7 +36,7 @@ ENTRY(exception_handling_table) .long exception_error ! address error store /* 100 */ #endif #if defined(CONFIG_SH_FPU) - .long do_fpu_error /* 120 */ + .long fpu_error_trap_handler /* 120 */ #else .long exception_error /* 120 */ #endif diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c index bf579e061e09..fcc80bb7bee7 100644 --- a/arch/sh/kernel/cpu/sh3/probe.c +++ b/arch/sh/kernel/cpu/sh3/probe.c @@ -16,11 +16,11 @@ #include <asm/cache.h> #include <asm/io.h> -int __init detect_cpu_and_cache_system(void) +int __uses_jump_to_uncached detect_cpu_and_cache_system(void) { unsigned long addr0, addr1, data0, data1, data2, data3; - jump_to_P2(); + jump_to_uncached(); /* * Check if the entry shadows or not. * When shadowed, it's 128-entry system. @@ -48,7 +48,7 @@ int __init detect_cpu_and_cache_system(void) ctrl_outl(data0&~SH_CACHE_VALID, addr0); ctrl_outl(data2&~SH_CACHE_VALID, addr1); - back_to_P1(); + back_to_cached(); boot_cpu_data.dcache.ways = 4; boot_cpu_data.dcache.entry_shift = 4; @@ -84,6 +84,9 @@ int __init detect_cpu_and_cache_system(void) #if defined(CONFIG_CPU_SUBTYPE_SH7720) boot_cpu_data.type = CPU_SH7720; #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7721) + boot_cpu_data.type = CPU_SH7721; +#endif #if defined(CONFIG_CPU_SUBTYPE_SH7705) boot_cpu_data.type = CPU_SH7705; diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index f6c65f2659e9..dd0a20a685f7 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -66,12 +66,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(DMAC, 7), - INTC_PRIO(SCIF2, 3), - INTC_PRIO(SCIF0, 3), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } }, @@ -85,7 +79,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); static struct intc_vect vectors_irq[] __initdata = { INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), @@ -93,7 +87,7 @@ static struct intc_vect vectors_irq[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); static struct plat_sci_port sci_platform_data[] = { { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c index 60b04b1f9453..969804bb523b 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c @@ -81,13 +81,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(DMAC, 7), - INTC_PRIO(SCI, 3), - INTC_PRIO(SCIF2, 3), - INTC_PRIO(SCIF0, 3), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } }, @@ -109,7 +102,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ @@ -120,7 +113,7 @@ static struct intc_vect vectors_irq[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); #endif static struct resource rtc_resources[] = { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 84e5629fa841..0cc0e2bf135d 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -73,18 +73,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(DMAC1, 7), - INTC_PRIO(DMAC2, 7), - INTC_PRIO(SCIF0, 3), - INTC_PRIO(SCIF1, 3), - INTC_PRIO(SIOF0, 3), - INTC_PRIO(SIOF1, 3), - INTC_PRIO(EDMAC0, 5), - INTC_PRIO(EDMAC1, 5), - INTC_PRIO(EDMAC2, 5), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } }, @@ -101,7 +89,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); static struct intc_vect vectors_irq[] __initdata = { INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), @@ -109,7 +97,7 @@ static struct intc_vect vectors_irq[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); static struct resource rtc_resources[] = { [0] = { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c index a0929b8a95ae..3855ea4c21c8 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c @@ -85,9 +85,62 @@ static struct platform_device sci_device = { }, }; +static struct resource usb_ohci_resources[] = { + [0] = { + .start = 0xA4428000, + .end = 0xA44280FF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 67, + .end = 67, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 usb_ohci_dma_mask = 0xffffffffUL; +static struct platform_device usb_ohci_device = { + .name = "sh_ohci", + .id = -1, + .dev = { + .dma_mask = &usb_ohci_dma_mask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(usb_ohci_resources), + .resource = usb_ohci_resources, +}; + +static struct resource usbf_resources[] = { + [0] = { + .name = "sh_udc", + .start = 0xA4420000, + .end = 0xA44200FF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "sh_udc", + .start = 65, + .end = 65, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device usbf_device = { + .name = "sh_udc", + .id = -1, + .dev = { + .dma_mask = NULL, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(usbf_resources), + .resource = usbf_resources, +}; + static struct platform_device *sh7720_devices[] __initdata = { &rtc_device, &sci_device, + &usb_ohci_device, + &usbf_device, }; static int __init sh7720_devices_setup(void) @@ -127,8 +180,11 @@ static struct intc_vect vectors[] __initdata = { INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1_DEI0, 0x800), INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840), INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900), - INTC_VECT(SSL, 0x980), INTC_VECT(USBFI0, 0xa20), - INTC_VECT(USBFI1, 0xa40), INTC_VECT(USBHI, 0xa60), +#if defined(CONFIG_CPU_SUBTYPE_SH7720) + INTC_VECT(SSL, 0x980), +#endif + INTC_VECT(USBFI0, 0xa20), INTC_VECT(USBFI1, 0xa40), + INTC_VECT(USBHI, 0xa60), INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0), INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00), INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80), @@ -153,22 +209,16 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(SCIF0, 2), - INTC_PRIO(SCIF1, 2), - INTC_PRIO(DMAC1, 1), - INTC_PRIO(DMAC2, 1), - INTC_PRIO(RTC, 2), - INTC_PRIO(TMU, 2), - INTC_PRIO(TPU, 2), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } }, +#if defined(CONFIG_CPU_SUBTYPE_SH7720) { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } }, +#else + { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } }, +#endif { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } }, { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } }, @@ -177,7 +227,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); static struct intc_sense_reg sense_registers[] __initdata = { { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, @@ -190,7 +240,7 @@ static struct intc_vect vectors_irq[] __initdata = { }; static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq, - NULL, priorities, NULL, prio_registers, sense_registers); + NULL, NULL, prio_registers, sense_registers); void __init plat_irq_setup_pins(int mode) { diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile index dadd6bffc128..d608557c7a3f 100644 --- a/arch/sh/kernel/cpu/sh4/Makefile +++ b/arch/sh/kernel/cpu/sh4/Makefile @@ -5,7 +5,7 @@ obj-y := probe.o common.o common-y += $(addprefix ../sh3/, entry.o ex.o) -obj-$(CONFIG_SH_FPU) += fpu.o +obj-$(CONFIG_SH_FPU) += fpu.o softfloat.o obj-$(CONFIG_SH_STORE_QUEUES) += sq.o # CPU subtype setup diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c index c5a4fc77fa06..817f9939cda6 100644 --- a/arch/sh/kernel/cpu/sh4/fpu.c +++ b/arch/sh/kernel/cpu/sh4/fpu.c @@ -1,7 +1,4 @@ -/* $Id: fpu.c,v 1.4 2004/01/13 05:52:11 kkojima Exp $ - * - * linux/arch/sh/kernel/fpu.c - * +/* * Save/restore floating point context for signal handlers. * * This file is subject to the terms and conditions of the GNU General Public @@ -9,15 +6,16 @@ * for more details. * * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka + * Copyright (C) 2006 ST Microelectronics Ltd. (denorm support) * - * FIXME! These routines can be optimized in big endian case. + * FIXME! These routines have not been tested for big endian case. */ - #include <linux/sched.h> #include <linux/signal.h> +#include <linux/io.h> +#include <asm/cpu/fpu.h> #include <asm/processor.h> #include <asm/system.h> -#include <asm/io.h> /* The PR (precision) bit in the FP Status Register must be clear when * an frchg instruction is executed, otherwise the instruction is undefined. @@ -25,177 +23,184 @@ */ #define FPSCR_RCHG 0x00000000 +extern unsigned long long float64_div(unsigned long long a, + unsigned long long b); +extern unsigned long int float32_div(unsigned long int a, unsigned long int b); +extern unsigned long long float64_mul(unsigned long long a, + unsigned long long b); +extern unsigned long int float32_mul(unsigned long int a, unsigned long int b); +extern unsigned long long float64_add(unsigned long long a, + unsigned long long b); +extern unsigned long int float32_add(unsigned long int a, unsigned long int b); +extern unsigned long long float64_sub(unsigned long long a, + unsigned long long b); +extern unsigned long int float32_sub(unsigned long int a, unsigned long int b); +static unsigned int fpu_exception_flags; /* * Save FPU registers onto task structure. * Assume called with FPU enabled (SR.FD=0). */ -void -save_fpu(struct task_struct *tsk, struct pt_regs *regs) +void save_fpu(struct task_struct *tsk, struct pt_regs *regs) { unsigned long dummy; clear_tsk_thread_flag(tsk, TIF_USEDFPU); enable_fpu(); - asm volatile("sts.l fpul, @-%0\n\t" - "sts.l fpscr, @-%0\n\t" - "lds %2, fpscr\n\t" - "frchg\n\t" - "fmov.s fr15, @-%0\n\t" - "fmov.s fr14, @-%0\n\t" - "fmov.s fr13, @-%0\n\t" - "fmov.s fr12, @-%0\n\t" - "fmov.s fr11, @-%0\n\t" - "fmov.s fr10, @-%0\n\t" - "fmov.s fr9, @-%0\n\t" - "fmov.s fr8, @-%0\n\t" - "fmov.s fr7, @-%0\n\t" - "fmov.s fr6, @-%0\n\t" - "fmov.s fr5, @-%0\n\t" - "fmov.s fr4, @-%0\n\t" - "fmov.s fr3, @-%0\n\t" - "fmov.s fr2, @-%0\n\t" - "fmov.s fr1, @-%0\n\t" - "fmov.s fr0, @-%0\n\t" - "frchg\n\t" - "fmov.s fr15, @-%0\n\t" - "fmov.s fr14, @-%0\n\t" - "fmov.s fr13, @-%0\n\t" - "fmov.s fr12, @-%0\n\t" - "fmov.s fr11, @-%0\n\t" - "fmov.s fr10, @-%0\n\t" - "fmov.s fr9, @-%0\n\t" - "fmov.s fr8, @-%0\n\t" - "fmov.s fr7, @-%0\n\t" - "fmov.s fr6, @-%0\n\t" - "fmov.s fr5, @-%0\n\t" - "fmov.s fr4, @-%0\n\t" - "fmov.s fr3, @-%0\n\t" - "fmov.s fr2, @-%0\n\t" - "fmov.s fr1, @-%0\n\t" - "fmov.s fr0, @-%0\n\t" - "lds %3, fpscr\n\t" - : "=r" (dummy) - : "0" ((char *)(&tsk->thread.fpu.hard.status)), - "r" (FPSCR_RCHG), - "r" (FPSCR_INIT) - : "memory"); - - disable_fpu(); - release_fpu(regs); + asm volatile ("sts.l fpul, @-%0\n\t" + "sts.l fpscr, @-%0\n\t" + "lds %2, fpscr\n\t" + "frchg\n\t" + "fmov.s fr15, @-%0\n\t" + "fmov.s fr14, @-%0\n\t" + "fmov.s fr13, @-%0\n\t" + "fmov.s fr12, @-%0\n\t" + "fmov.s fr11, @-%0\n\t" + "fmov.s fr10, @-%0\n\t" + "fmov.s fr9, @-%0\n\t" + "fmov.s fr8, @-%0\n\t" + "fmov.s fr7, @-%0\n\t" + "fmov.s fr6, @-%0\n\t" + "fmov.s fr5, @-%0\n\t" + "fmov.s fr4, @-%0\n\t" + "fmov.s fr3, @-%0\n\t" + "fmov.s fr2, @-%0\n\t" + "fmov.s fr1, @-%0\n\t" + "fmov.s fr0, @-%0\n\t" + "frchg\n\t" + "fmov.s fr15, @-%0\n\t" + "fmov.s fr14, @-%0\n\t" + "fmov.s fr13, @-%0\n\t" + "fmov.s fr12, @-%0\n\t" + "fmov.s fr11, @-%0\n\t" + "fmov.s fr10, @-%0\n\t" + "fmov.s fr9, @-%0\n\t" + "fmov.s fr8, @-%0\n\t" + "fmov.s fr7, @-%0\n\t" + "fmov.s fr6, @-%0\n\t" + "fmov.s fr5, @-%0\n\t" + "fmov.s fr4, @-%0\n\t" + "fmov.s fr3, @-%0\n\t" + "fmov.s fr2, @-%0\n\t" + "fmov.s fr1, @-%0\n\t" + "fmov.s fr0, @-%0\n\t" + "lds %3, fpscr\n\t":"=r" (dummy) + :"0"((char *)(&tsk->thread.fpu.hard.status)), + "r"(FPSCR_RCHG), "r"(FPSCR_INIT) + :"memory"); + + disable_fpu(); + release_fpu(regs); } -static void -restore_fpu(struct task_struct *tsk) +static void restore_fpu(struct task_struct *tsk) { unsigned long dummy; - enable_fpu(); - asm volatile("lds %2, fpscr\n\t" - "fmov.s @%0+, fr0\n\t" - "fmov.s @%0+, fr1\n\t" - "fmov.s @%0+, fr2\n\t" - "fmov.s @%0+, fr3\n\t" - "fmov.s @%0+, fr4\n\t" - "fmov.s @%0+, fr5\n\t" - "fmov.s @%0+, fr6\n\t" - "fmov.s @%0+, fr7\n\t" - "fmov.s @%0+, fr8\n\t" - "fmov.s @%0+, fr9\n\t" - "fmov.s @%0+, fr10\n\t" - "fmov.s @%0+, fr11\n\t" - "fmov.s @%0+, fr12\n\t" - "fmov.s @%0+, fr13\n\t" - "fmov.s @%0+, fr14\n\t" - "fmov.s @%0+, fr15\n\t" - "frchg\n\t" - "fmov.s @%0+, fr0\n\t" - "fmov.s @%0+, fr1\n\t" - "fmov.s @%0+, fr2\n\t" - "fmov.s @%0+, fr3\n\t" - "fmov.s @%0+, fr4\n\t" - "fmov.s @%0+, fr5\n\t" - "fmov.s @%0+, fr6\n\t" - "fmov.s @%0+, fr7\n\t" - "fmov.s @%0+, fr8\n\t" - "fmov.s @%0+, fr9\n\t" - "fmov.s @%0+, fr10\n\t" - "fmov.s @%0+, fr11\n\t" - "fmov.s @%0+, fr12\n\t" - "fmov.s @%0+, fr13\n\t" - "fmov.s @%0+, fr14\n\t" - "fmov.s @%0+, fr15\n\t" - "frchg\n\t" - "lds.l @%0+, fpscr\n\t" - "lds.l @%0+, fpul\n\t" - : "=r" (dummy) - : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG) - : "memory"); + enable_fpu(); + asm volatile ("lds %2, fpscr\n\t" + "fmov.s @%0+, fr0\n\t" + "fmov.s @%0+, fr1\n\t" + "fmov.s @%0+, fr2\n\t" + "fmov.s @%0+, fr3\n\t" + "fmov.s @%0+, fr4\n\t" + "fmov.s @%0+, fr5\n\t" + "fmov.s @%0+, fr6\n\t" + "fmov.s @%0+, fr7\n\t" + "fmov.s @%0+, fr8\n\t" + "fmov.s @%0+, fr9\n\t" + "fmov.s @%0+, fr10\n\t" + "fmov.s @%0+, fr11\n\t" + "fmov.s @%0+, fr12\n\t" + "fmov.s @%0+, fr13\n\t" + "fmov.s @%0+, fr14\n\t" + "fmov.s @%0+, fr15\n\t" + "frchg\n\t" + "fmov.s @%0+, fr0\n\t" + "fmov.s @%0+, fr1\n\t" + "fmov.s @%0+, fr2\n\t" + "fmov.s @%0+, fr3\n\t" + "fmov.s @%0+, fr4\n\t" + "fmov.s @%0+, fr5\n\t" + "fmov.s @%0+, fr6\n\t" + "fmov.s @%0+, fr7\n\t" + "fmov.s @%0+, fr8\n\t" + "fmov.s @%0+, fr9\n\t" + "fmov.s @%0+, fr10\n\t" + "fmov.s @%0+, fr11\n\t" + "fmov.s @%0+, fr12\n\t" + "fmov.s @%0+, fr13\n\t" + "fmov.s @%0+, fr14\n\t" + "fmov.s @%0+, fr15\n\t" + "frchg\n\t" + "lds.l @%0+, fpscr\n\t" + "lds.l @%0+, fpul\n\t" + :"=r" (dummy) + :"0"(&tsk->thread.fpu), "r"(FPSCR_RCHG) + :"memory"); disable_fpu(); } /* * Load the FPU with signalling NANS. This bit pattern we're using * has the property that no matter wether considered as single or as - * double precision represents signaling NANS. + * double precision represents signaling NANS. */ -static void -fpu_init(void) +static void fpu_init(void) { enable_fpu(); - asm volatile("lds %0, fpul\n\t" - "lds %1, fpscr\n\t" - "fsts fpul, fr0\n\t" - "fsts fpul, fr1\n\t" - "fsts fpul, fr2\n\t" - "fsts fpul, fr3\n\t" - "fsts fpul, fr4\n\t" - "fsts fpul, fr5\n\t" - "fsts fpul, fr6\n\t" - "fsts fpul, fr7\n\t" - "fsts fpul, fr8\n\t" - "fsts fpul, fr9\n\t" - "fsts fpul, fr10\n\t" - "fsts fpul, fr11\n\t" - "fsts fpul, fr12\n\t" - "fsts fpul, fr13\n\t" - "fsts fpul, fr14\n\t" - "fsts fpul, fr15\n\t" - "frchg\n\t" - "fsts fpul, fr0\n\t" - "fsts fpul, fr1\n\t" - "fsts fpul, fr2\n\t" - "fsts fpul, fr3\n\t" - "fsts fpul, fr4\n\t" - "fsts fpul, fr5\n\t" - "fsts fpul, fr6\n\t" - "fsts fpul, fr7\n\t" - "fsts fpul, fr8\n\t" - "fsts fpul, fr9\n\t" - "fsts fpul, fr10\n\t" - "fsts fpul, fr11\n\t" - "fsts fpul, fr12\n\t" - "fsts fpul, fr13\n\t" - "fsts fpul, fr14\n\t" - "fsts fpul, fr15\n\t" - "frchg\n\t" - "lds %2, fpscr\n\t" - : /* no output */ - : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT)); - disable_fpu(); + asm volatile ( "lds %0, fpul\n\t" + "lds %1, fpscr\n\t" + "fsts fpul, fr0\n\t" + "fsts fpul, fr1\n\t" + "fsts fpul, fr2\n\t" + "fsts fpul, fr3\n\t" + "fsts fpul, fr4\n\t" + "fsts fpul, fr5\n\t" + "fsts fpul, fr6\n\t" + "fsts fpul, fr7\n\t" + "fsts fpul, fr8\n\t" + "fsts fpul, fr9\n\t" + "fsts fpul, fr10\n\t" + "fsts fpul, fr11\n\t" + "fsts fpul, fr12\n\t" + "fsts fpul, fr13\n\t" + "fsts fpul, fr14\n\t" + "fsts fpul, fr15\n\t" + "frchg\n\t" + "fsts fpul, fr0\n\t" + "fsts fpul, fr1\n\t" + "fsts fpul, fr2\n\t" + "fsts fpul, fr3\n\t" + "fsts fpul, fr4\n\t" + "fsts fpul, fr5\n\t" + "fsts fpul, fr6\n\t" + "fsts fpul, fr7\n\t" + "fsts fpul, fr8\n\t" + "fsts fpul, fr9\n\t" + "fsts fpul, fr10\n\t" + "fsts fpul, fr11\n\t" + "fsts fpul, fr12\n\t" + "fsts fpul, fr13\n\t" + "fsts fpul, fr14\n\t" + "fsts fpul, fr15\n\t" + "frchg\n\t" + "lds %2, fpscr\n\t" + : /* no output */ + :"r" (0), "r"(FPSCR_RCHG), "r"(FPSCR_INIT)); + disable_fpu(); } /** - * denormal_to_double - Given denormalized float number, - * store double float + * denormal_to_double - Given denormalized float number, + * store double float * - * @fpu: Pointer to sh_fpu_hard structure - * @n: Index to FP register + * @fpu: Pointer to sh_fpu_hard structure + * @n: Index to FP register */ -static void -denormal_to_double (struct sh_fpu_hard_struct *fpu, int n) +static void denormal_to_double(struct sh_fpu_hard_struct *fpu, int n) { unsigned long du, dl; unsigned long x = fpu->fpul; @@ -212,7 +217,7 @@ denormal_to_double (struct sh_fpu_hard_struct *fpu, int n) dl = x << 29; fpu->fp_regs[n] = du; - fpu->fp_regs[n+1] = dl; + fpu->fp_regs[n + 1] = dl; } } @@ -223,68 +228,191 @@ denormal_to_double (struct sh_fpu_hard_struct *fpu, int n) * * Returns 1 when it's handled (should not cause exception). */ -static int -ieee_fpe_handler (struct pt_regs *regs) +static int ieee_fpe_handler(struct pt_regs *regs) { - unsigned short insn = *(unsigned short *) regs->pc; + unsigned short insn = *(unsigned short *)regs->pc; unsigned short finsn; unsigned long nextpc; int nib[4] = { (insn >> 12) & 0xf, (insn >> 8) & 0xf, (insn >> 4) & 0xf, - insn & 0xf}; - - if (nib[0] == 0xb || - (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ - regs->pr = regs->pc + 4; - - if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ - nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); - finsn = *(unsigned short *) (regs->pc + 2); - } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */ + insn & 0xf + }; + + if (nib[0] == 0xb || (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) + regs->pr = regs->pc + 4; /* bsr & jsr */ + + if (nib[0] == 0xa || nib[0] == 0xb) { + /* bra & bsr */ + nextpc = regs->pc + 4 + ((short)((insn & 0xfff) << 4) >> 3); + finsn = *(unsigned short *)(regs->pc + 2); + } else if (nib[0] == 0x8 && nib[1] == 0xd) { + /* bt/s */ if (regs->sr & 1) - nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); + nextpc = regs->pc + 4 + ((char)(insn & 0xff) << 1); else nextpc = regs->pc + 4; - finsn = *(unsigned short *) (regs->pc + 2); - } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */ + finsn = *(unsigned short *)(regs->pc + 2); + } else if (nib[0] == 0x8 && nib[1] == 0xf) { + /* bf/s */ if (regs->sr & 1) nextpc = regs->pc + 4; else - nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); - finsn = *(unsigned short *) (regs->pc + 2); + nextpc = regs->pc + 4 + ((char)(insn & 0xff) << 1); + finsn = *(unsigned short *)(regs->pc + 2); } else if (nib[0] == 0x4 && nib[3] == 0xb && - (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */ + (nib[2] == 0x0 || nib[2] == 0x2)) { + /* jmp & jsr */ nextpc = regs->regs[nib[1]]; - finsn = *(unsigned short *) (regs->pc + 2); + finsn = *(unsigned short *)(regs->pc + 2); } else if (nib[0] == 0x0 && nib[3] == 0x3 && - (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */ + (nib[2] == 0x0 || nib[2] == 0x2)) { + /* braf & bsrf */ nextpc = regs->pc + 4 + regs->regs[nib[1]]; - finsn = *(unsigned short *) (regs->pc + 2); - } else if (insn == 0x000b) { /* rts */ + finsn = *(unsigned short *)(regs->pc + 2); + } else if (insn == 0x000b) { + /* rts */ nextpc = regs->pr; - finsn = *(unsigned short *) (regs->pc + 2); + finsn = *(unsigned short *)(regs->pc + 2); } else { nextpc = regs->pc + instruction_size(insn); finsn = insn; } - if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ + if ((finsn & 0xf1ff) == 0xf0ad) { + /* fcnvsd */ struct task_struct *tsk = current; save_fpu(tsk, regs); - if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) { + if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR)) /* FPU error */ - denormal_to_double (&tsk->thread.fpu.hard, - (finsn >> 8) & 0xf); - tsk->thread.fpu.hard.fpscr &= - ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); - grab_fpu(regs); - restore_fpu(tsk); - set_tsk_thread_flag(tsk, TIF_USEDFPU); + denormal_to_double(&tsk->thread.fpu.hard, + (finsn >> 8) & 0xf); + else + return 0; + + regs->pc = nextpc; + return 1; + } else if ((finsn & 0xf00f) == 0xf002) { + /* fmul */ + struct task_struct *tsk = current; + int fpscr; + int n, m, prec; + unsigned int hx, hy; + + n = (finsn >> 8) & 0xf; + m = (finsn >> 4) & 0xf; + hx = tsk->thread.fpu.hard.fp_regs[n]; + hy = tsk->thread.fpu.hard.fp_regs[m]; + fpscr = tsk->thread.fpu.hard.fpscr; + prec = fpscr & FPSCR_DBL_PRECISION; + + if ((fpscr & FPSCR_CAUSE_ERROR) + && (prec && ((hx & 0x7fffffff) < 0x00100000 + || (hy & 0x7fffffff) < 0x00100000))) { + long long llx, lly; + + /* FPU error because of denormal (doubles) */ + llx = ((long long)hx << 32) + | tsk->thread.fpu.hard.fp_regs[n + 1]; + lly = ((long long)hy << 32) + | tsk->thread.fpu.hard.fp_regs[m + 1]; + llx = float64_mul(llx, lly); + tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; + tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; + } else if ((fpscr & FPSCR_CAUSE_ERROR) + && (!prec && ((hx & 0x7fffffff) < 0x00800000 + || (hy & 0x7fffffff) < 0x00800000))) { + /* FPU error because of denormal (floats) */ + hx = float32_mul(hx, hy); + tsk->thread.fpu.hard.fp_regs[n] = hx; + } else + return 0; + + regs->pc = nextpc; + return 1; + } else if ((finsn & 0xf00e) == 0xf000) { + /* fadd, fsub */ + struct task_struct *tsk = current; + int fpscr; + int n, m, prec; + unsigned int hx, hy; + + n = (finsn >> 8) & 0xf; + m = (finsn >> 4) & 0xf; + hx = tsk->thread.fpu.hard.fp_regs[n]; + hy = tsk->thread.fpu.hard.fp_regs[m]; + fpscr = tsk->thread.fpu.hard.fpscr; + prec = fpscr & FPSCR_DBL_PRECISION; + + if ((fpscr & FPSCR_CAUSE_ERROR) + && (prec && ((hx & 0x7fffffff) < 0x00100000 + || (hy & 0x7fffffff) < 0x00100000))) { + long long llx, lly; + + /* FPU error because of denormal (doubles) */ + llx = ((long long)hx << 32) + | tsk->thread.fpu.hard.fp_regs[n + 1]; + lly = ((long long)hy << 32) + | tsk->thread.fpu.hard.fp_regs[m + 1]; + if ((finsn & 0xf00f) == 0xf000) + llx = float64_add(llx, lly); + else + llx = float64_sub(llx, lly); + tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; + tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; + } else if ((fpscr & FPSCR_CAUSE_ERROR) + && (!prec && ((hx & 0x7fffffff) < 0x00800000 + || (hy & 0x7fffffff) < 0x00800000))) { + /* FPU error because of denormal (floats) */ + if ((finsn & 0xf00f) == 0xf000) + hx = float32_add(hx, hy); + else + hx = float32_sub(hx, hy); + tsk->thread.fpu.hard.fp_regs[n] = hx; + } else + return 0; + + regs->pc = nextpc; + return 1; + } else if ((finsn & 0xf003) == 0xf003) { + /* fdiv */ + struct task_struct *tsk = current; + int fpscr; + int n, m, prec; + unsigned int hx, hy; + + n = (finsn >> 8) & 0xf; + m = (finsn >> 4) & 0xf; + hx = tsk->thread.fpu.hard.fp_regs[n]; + hy = tsk->thread.fpu.hard.fp_regs[m]; + fpscr = tsk->thread.fpu.hard.fpscr; + prec = fpscr & FPSCR_DBL_PRECISION; + + if ((fpscr & FPSCR_CAUSE_ERROR) + && (prec && ((hx & 0x7fffffff) < 0x00100000 + || (hy & 0x7fffffff) < 0x00100000))) { + long long llx, lly; + + /* FPU error because of denormal (doubles) */ + llx = ((long long)hx << 32) + | tsk->thread.fpu.hard.fp_regs[n + 1]; + lly = ((long long)hy << 32) + | tsk->thread.fpu.hard.fp_regs[m + 1]; + + llx = float64_div(llx, lly); + + tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; + tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; + } else if ((fpscr & FPSCR_CAUSE_ERROR) + && (!prec && ((hx & 0x7fffffff) < 0x00800000 + || (hy & 0x7fffffff) < 0x00800000))) { + /* FPU error because of denormal (floats) */ + hx = float32_div(hx, hy); + tsk->thread.fpu.hard.fp_regs[n] = hx; } else - force_sig(SIGFPE, tsk); + return 0; regs->pc = nextpc; return 1; @@ -293,27 +421,48 @@ ieee_fpe_handler (struct pt_regs *regs) return 0; } -asmlinkage void -do_fpu_error(unsigned long r4, unsigned long r5, unsigned long r6, - unsigned long r7, struct pt_regs __regs) +void float_raise(unsigned int flags) +{ + fpu_exception_flags |= flags; +} + +int float_rounding_mode(void) { - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); struct task_struct *tsk = current; + int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.fpu.hard.fpscr); + return roundingMode; +} - if (ieee_fpe_handler(regs)) - return; +BUILD_TRAP_HANDLER(fpu_error) +{ + struct task_struct *tsk = current; + TRAP_HANDLER_DECL; - regs->pc += 2; save_fpu(tsk, regs); + fpu_exception_flags = 0; + if (ieee_fpe_handler(regs)) { + tsk->thread.fpu.hard.fpscr &= + ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); + tsk->thread.fpu.hard.fpscr |= fpu_exception_flags; + /* Set the FPSCR flag as well as cause bits - simply + * replicate the cause */ + tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10); + grab_fpu(regs); + restore_fpu(tsk); + set_tsk_thread_flag(tsk, TIF_USEDFPU); + if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) & + (fpu_exception_flags >> 2)) == 0) { + return; + } + } + force_sig(SIGFPE, tsk); } -asmlinkage void -do_fpu_state_restore(unsigned long r4, unsigned long r5, unsigned long r6, - unsigned long r7, struct pt_regs __regs) +BUILD_TRAP_HANDLER(fpu_state_restore) { - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); struct task_struct *tsk = current; + TRAP_HANDLER_DECL; grab_fpu(regs); if (!user_mode(regs)) { @@ -324,7 +473,7 @@ do_fpu_state_restore(unsigned long r4, unsigned long r5, unsigned long r6, if (used_math()) { /* Using the FPU again. */ restore_fpu(tsk); - } else { + } else { /* First time FPU user. */ fpu_init(); set_used_math(); diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index bc9c28a69bf1..f2b9238cda04 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -98,6 +98,8 @@ int __init detect_cpu_and_cache_system(void) case 0x200A: if (prr == 0x61) boot_cpu_data.type = CPU_SH7781; + else if (prr == 0xa1) + boot_cpu_data.type = CPU_SH7763; else boot_cpu_data.type = CPU_SH7780; diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c index 523f68a9ce0e..ae3603aca615 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c @@ -126,12 +126,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(REF, REF_RCMI, REF_ROVI), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(SCIF, 3), - INTC_PRIO(SCI1, 3), - INTC_PRIO(DMAC, 7), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } }, @@ -143,7 +137,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); /* SH7750, SH7750S, SH7751 and SH7091 all have 4-channel DMA controllers */ #if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ @@ -163,7 +157,7 @@ static struct intc_group groups_dma4[] __initdata = { static DECLARE_INTC_DESC(intc_desc_dma4, "sh7750_dma4", vectors_dma4, groups_dma4, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); #endif /* SH7750R and SH7751R both have 8-channel DMA controllers */ @@ -184,7 +178,7 @@ static struct intc_group groups_dma8[] __initdata = { static DECLARE_INTC_DESC(intc_desc_dma8, "sh7750_dma8", vectors_dma8, groups_dma8, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); #endif /* SH7750R, SH7751 and SH7751R all have two extra timer channels */ @@ -205,7 +199,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_tmu34, "sh7750_tmu34", - vectors_tmu34, NULL, priorities, + vectors_tmu34, NULL, mask_registers, prio_registers, NULL); #endif @@ -216,7 +210,7 @@ static struct intc_vect vectors_irlm[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irlm, "sh7750_irlm", vectors_irlm, NULL, - priorities, NULL, prio_registers, NULL); + NULL, prio_registers, NULL); /* SH7751 and SH7751R both have PCI */ #if defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7751R) @@ -233,7 +227,7 @@ static struct intc_group groups_pci[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_pci, "sh7750_pci", vectors_pci, groups_pci, - priorities, mask_registers, prio_registers, NULL); + mask_registers, prio_registers, NULL); #endif #if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c index 7a898cb1d940..85f81579b97e 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c @@ -92,15 +92,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(REF, REF_RCMI, REF_ROVI), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(SCIF0, 3), - INTC_PRIO(SCIF1, 3), - INTC_PRIO(SCIF2, 3), - INTC_PRIO(SIM, 3), - INTC_PRIO(DMAC, 7), - INTC_PRIO(DMABRG, 13), -}; - static struct intc_mask_reg mask_registers[] __initdata = { { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */ { IRQ4, IRQ5, IRQ6, IRQ7, 0, 0, HCAN20, HCAN21, @@ -132,7 +123,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc, "sh7760", vectors, groups, - priorities, mask_registers, prio_registers, NULL); + mask_registers, prio_registers, NULL); static struct intc_vect vectors_irq[] __initdata = { INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0), @@ -140,7 +131,7 @@ static struct intc_vect vectors_irq[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups, - priorities, mask_registers, prio_registers, NULL); + mask_registers, prio_registers, NULL); static struct plat_sci_port sci_platform_data[] = { { diff --git a/arch/sh/kernel/cpu/sh4/softfloat.c b/arch/sh/kernel/cpu/sh4/softfloat.c new file mode 100644 index 000000000000..7b2d337ee412 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4/softfloat.c @@ -0,0 +1,892 @@ +/* + * Floating point emulation support for subnormalised numbers on SH4 + * architecture This file is derived from the SoftFloat IEC/IEEE + * Floating-point Arithmetic Package, Release 2 the original license of + * which is reproduced below. + * + * ======================================================================== + * + * This C source file is part of the SoftFloat IEC/IEEE Floating-point + * Arithmetic Package, Release 2. + * + * Written by John R. Hauser. This work was made possible in part by the + * International Computer Science Institute, located at Suite 600, 1947 Center + * Street, Berkeley, California 94704. Funding was partially provided by the + * National Science Foundation under grant MIP-9311980. The original version + * of this code was written as part of a project to build a fixed-point vector + * processor in collaboration with the University of California at Berkeley, + * overseen by Profs. Nelson Morgan and John Wawrzynek. More information + * is available through the web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ + * arithmetic/softfloat.html'. + * + * THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort + * has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT + * TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO + * PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY + * AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. + * + * Derivative works are acceptable, even for commercial purposes, so long as + * (1) they include prominent notice that the work is derivative, and (2) they + * include prominent notice akin to these three paragraphs for those parts of + * this code that are retained. + * + * ======================================================================== + * + * SH4 modifications by Ismail Dhaoui <ismail.dhaoui@st.com> + * and Kamel Khelifi <kamel.khelifi@st.com> + */ +#include <linux/kernel.h> +#include <asm/cpu/fpu.h> + +#define LIT64( a ) a##LL + +typedef char flag; +typedef unsigned char uint8; +typedef signed char int8; +typedef int uint16; +typedef int int16; +typedef unsigned int uint32; +typedef signed int int32; + +typedef unsigned long long int bits64; +typedef signed long long int sbits64; + +typedef unsigned char bits8; +typedef signed char sbits8; +typedef unsigned short int bits16; +typedef signed short int sbits16; +typedef unsigned int bits32; +typedef signed int sbits32; + +typedef unsigned long long int uint64; +typedef signed long long int int64; + +typedef unsigned long int float32; +typedef unsigned long long float64; + +extern void float_raise(unsigned int flags); /* in fpu.c */ +extern int float_rounding_mode(void); /* in fpu.c */ + +inline bits64 extractFloat64Frac(float64 a); +inline flag extractFloat64Sign(float64 a); +inline int16 extractFloat64Exp(float64 a); +inline int16 extractFloat32Exp(float32 a); +inline flag extractFloat32Sign(float32 a); +inline bits32 extractFloat32Frac(float32 a); +inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig); +inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr); +inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig); +inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr); +float64 float64_sub(float64 a, float64 b); +float32 float32_sub(float32 a, float32 b); +float32 float32_add(float32 a, float32 b); +float64 float64_add(float64 a, float64 b); +float64 float64_div(float64 a, float64 b); +float32 float32_div(float32 a, float32 b); +float32 float32_mul(float32 a, float32 b); +float64 float64_mul(float64 a, float64 b); +inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, + bits64 * z1Ptr); +inline void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, + bits64 * z1Ptr); +inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr); + +static int8 countLeadingZeros32(bits32 a); +static int8 countLeadingZeros64(bits64 a); +static float64 normalizeRoundAndPackFloat64(flag zSign, int16 zExp, + bits64 zSig); +static float64 subFloat64Sigs(float64 a, float64 b, flag zSign); +static float64 addFloat64Sigs(float64 a, float64 b, flag zSign); +static float32 roundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig); +static float32 normalizeRoundAndPackFloat32(flag zSign, int16 zExp, + bits32 zSig); +static float64 roundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig); +static float32 subFloat32Sigs(float32 a, float32 b, flag zSign); +static float32 addFloat32Sigs(float32 a, float32 b, flag zSign); +static void normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr, + bits64 * zSigPtr); +static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b); +static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr, + bits32 * zSigPtr); + +inline bits64 extractFloat64Frac(float64 a) +{ + return a & LIT64(0x000FFFFFFFFFFFFF); +} + +inline flag extractFloat64Sign(float64 a) +{ + return a >> 63; +} + +inline int16 extractFloat64Exp(float64 a) +{ + return (a >> 52) & 0x7FF; +} + +inline int16 extractFloat32Exp(float32 a) +{ + return (a >> 23) & 0xFF; +} + +inline flag extractFloat32Sign(float32 a) +{ + return a >> 31; +} + +inline bits32 extractFloat32Frac(float32 a) +{ + return a & 0x007FFFFF; +} + +inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig) +{ + return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig; +} + +inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr) +{ + bits64 z; + + if (count == 0) { + z = a; + } else if (count < 64) { + z = (a >> count) | ((a << ((-count) & 63)) != 0); + } else { + z = (a != 0); + } + *zPtr = z; +} + +static int8 countLeadingZeros32(bits32 a) +{ + static const int8 countLeadingZerosHigh[] = { + 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + }; + int8 shiftCount; + + shiftCount = 0; + if (a < 0x10000) { + shiftCount += 16; + a <<= 16; + } + if (a < 0x1000000) { + shiftCount += 8; + a <<= 8; + } + shiftCount += countLeadingZerosHigh[a >> 24]; + return shiftCount; + +} + +static int8 countLeadingZeros64(bits64 a) +{ + int8 shiftCount; + + shiftCount = 0; + if (a < ((bits64) 1) << 32) { + shiftCount += 32; + } else { + a >>= 32; + } + shiftCount += countLeadingZeros32(a); + return shiftCount; + +} + +static float64 normalizeRoundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig) +{ + int8 shiftCount; + + shiftCount = countLeadingZeros64(zSig) - 1; + return roundAndPackFloat64(zSign, zExp - shiftCount, + zSig << shiftCount); + +} + +static float64 subFloat64Sigs(float64 a, float64 b, flag zSign) +{ + int16 aExp, bExp, zExp; + bits64 aSig, bSig, zSig; + int16 expDiff; + + aSig = extractFloat64Frac(a); + aExp = extractFloat64Exp(a); + bSig = extractFloat64Frac(b); + bExp = extractFloat64Exp(b); + expDiff = aExp - bExp; + aSig <<= 10; + bSig <<= 10; + if (0 < expDiff) + goto aExpBigger; + if (expDiff < 0) + goto bExpBigger; + if (aExp == 0) { + aExp = 1; + bExp = 1; + } + if (bSig < aSig) + goto aBigger; + if (aSig < bSig) + goto bBigger; + return packFloat64(float_rounding_mode() == FPSCR_RM_ZERO, 0, 0); + bExpBigger: + if (bExp == 0x7FF) { + return packFloat64(zSign ^ 1, 0x7FF, 0); + } + if (aExp == 0) { + ++expDiff; + } else { + aSig |= LIT64(0x4000000000000000); + } + shift64RightJamming(aSig, -expDiff, &aSig); + bSig |= LIT64(0x4000000000000000); + bBigger: + zSig = bSig - aSig; + zExp = bExp; + zSign ^= 1; + goto normalizeRoundAndPack; + aExpBigger: + if (aExp == 0x7FF) { + return a; + } + if (bExp == 0) { + --expDiff; + } else { + bSig |= LIT64(0x4000000000000000); + } + shift64RightJamming(bSig, expDiff, &bSig); + aSig |= LIT64(0x4000000000000000); + aBigger: + zSig = aSig - bSig; + zExp = aExp; + normalizeRoundAndPack: + --zExp; + return normalizeRoundAndPackFloat64(zSign, zExp, zSig); + +} +static float64 addFloat64Sigs(float64 a, float64 b, flag zSign) +{ + int16 aExp, bExp, zExp; + bits64 aSig, bSig, zSig; + int16 expDiff; + + aSig = extractFloat64Frac(a); + aExp = extractFloat64Exp(a); + bSig = extractFloat64Frac(b); + bExp = extractFloat64Exp(b); + expDiff = aExp - bExp; + aSig <<= 9; + bSig <<= 9; + if (0 < expDiff) { + if (aExp == 0x7FF) { + return a; + } + if (bExp == 0) { + --expDiff; + } else { + bSig |= LIT64(0x2000000000000000); + } + shift64RightJamming(bSig, expDiff, &bSig); + zExp = aExp; + } else if (expDiff < 0) { + if (bExp == 0x7FF) { + return packFloat64(zSign, 0x7FF, 0); + } + if (aExp == 0) { + ++expDiff; + } else { + aSig |= LIT64(0x2000000000000000); + } + shift64RightJamming(aSig, -expDiff, &aSig); + zExp = bExp; + } else { + if (aExp == 0x7FF) { + return a; + } + if (aExp == 0) + return packFloat64(zSign, 0, (aSig + bSig) >> 9); + zSig = LIT64(0x4000000000000000) + aSig + bSig; + zExp = aExp; + goto roundAndPack; + } + aSig |= LIT64(0x2000000000000000); + zSig = (aSig + bSig) << 1; + --zExp; + if ((sbits64) zSig < 0) { + zSig = aSig + bSig; + ++zExp; + } + roundAndPack: + return roundAndPackFloat64(zSign, zExp, zSig); + +} + +inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig) +{ + return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig; +} + +inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr) +{ + bits32 z; + if (count == 0) { + z = a; + } else if (count < 32) { + z = (a >> count) | ((a << ((-count) & 31)) != 0); + } else { + z = (a != 0); + } + *zPtr = z; +} + +static float32 roundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig) +{ + flag roundNearestEven; + int8 roundIncrement, roundBits; + flag isTiny; + + /* SH4 has only 2 rounding modes - round to nearest and round to zero */ + roundNearestEven = (float_rounding_mode() == FPSCR_RM_NEAREST); + roundIncrement = 0x40; + if (!roundNearestEven) { + roundIncrement = 0; + } + roundBits = zSig & 0x7F; + if (0xFD <= (bits16) zExp) { + if ((0xFD < zExp) + || ((zExp == 0xFD) + && ((sbits32) (zSig + roundIncrement) < 0)) + ) { + float_raise(FPSCR_CAUSE_OVERFLOW | FPSCR_CAUSE_INEXACT); + return packFloat32(zSign, 0xFF, + 0) - (roundIncrement == 0); + } + if (zExp < 0) { + isTiny = (zExp < -1) + || (zSig + roundIncrement < 0x80000000); + shift32RightJamming(zSig, -zExp, &zSig); + zExp = 0; + roundBits = zSig & 0x7F; + if (isTiny && roundBits) + float_raise(FPSCR_CAUSE_UNDERFLOW); + } + } + if (roundBits) + float_raise(FPSCR_CAUSE_INEXACT); + zSig = (zSig + roundIncrement) >> 7; + zSig &= ~(((roundBits ^ 0x40) == 0) & roundNearestEven); + if (zSig == 0) + zExp = 0; + return packFloat32(zSign, zExp, zSig); + +} + +static float32 normalizeRoundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig) +{ + int8 shiftCount; + + shiftCount = countLeadingZeros32(zSig) - 1; + return roundAndPackFloat32(zSign, zExp - shiftCount, + zSig << shiftCount); +} + +static float64 roundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig) +{ + flag roundNearestEven; + int16 roundIncrement, roundBits; + flag isTiny; + + /* SH4 has only 2 rounding modes - round to nearest and round to zero */ + roundNearestEven = (float_rounding_mode() == FPSCR_RM_NEAREST); + roundIncrement = 0x200; + if (!roundNearestEven) { + roundIncrement = 0; + } + roundBits = zSig & 0x3FF; + if (0x7FD <= (bits16) zExp) { + if ((0x7FD < zExp) + || ((zExp == 0x7FD) + && ((sbits64) (zSig + roundIncrement) < 0)) + ) { + float_raise(FPSCR_CAUSE_OVERFLOW | FPSCR_CAUSE_INEXACT); + return packFloat64(zSign, 0x7FF, + 0) - (roundIncrement == 0); + } + if (zExp < 0) { + isTiny = (zExp < -1) + || (zSig + roundIncrement < + LIT64(0x8000000000000000)); + shift64RightJamming(zSig, -zExp, &zSig); + zExp = 0; + roundBits = zSig & 0x3FF; + if (isTiny && roundBits) + float_raise(FPSCR_CAUSE_UNDERFLOW); + } + } + if (roundBits) + float_raise(FPSCR_CAUSE_INEXACT); + zSig = (zSig + roundIncrement) >> 10; + zSig &= ~(((roundBits ^ 0x200) == 0) & roundNearestEven); + if (zSig == 0) + zExp = 0; + return packFloat64(zSign, zExp, zSig); + +} + +static float32 subFloat32Sigs(float32 a, float32 b, flag zSign) +{ + int16 aExp, bExp, zExp; + bits32 aSig, bSig, zSig; + int16 expDiff; + + aSig = extractFloat32Frac(a); + aExp = extractFloat32Exp(a); + bSig = extractFloat32Frac(b); + bExp = extractFloat32Exp(b); + expDiff = aExp - bExp; + aSig <<= 7; + bSig <<= 7; + if (0 < expDiff) + goto aExpBigger; + if (expDiff < 0) + goto bExpBigger; + if (aExp == 0) { + aExp = 1; + bExp = 1; + } + if (bSig < aSig) + goto aBigger; + if (aSig < bSig) + goto bBigger; + return packFloat32(float_rounding_mode() == FPSCR_RM_ZERO, 0, 0); + bExpBigger: + if (bExp == 0xFF) { + return packFloat32(zSign ^ 1, 0xFF, 0); + } + if (aExp == 0) { + ++expDiff; + } else { + aSig |= 0x40000000; + } + shift32RightJamming(aSig, -expDiff, &aSig); + bSig |= 0x40000000; + bBigger: + zSig = bSig - aSig; + zExp = bExp; + zSign ^= 1; + goto normalizeRoundAndPack; + aExpBigger: + if (aExp == 0xFF) { + return a; + } + if (bExp == 0) { + --expDiff; + } else { + bSig |= 0x40000000; + } + shift32RightJamming(bSig, expDiff, &bSig); + aSig |= 0x40000000; + aBigger: + zSig = aSig - bSig; + zExp = aExp; + normalizeRoundAndPack: + --zExp; + return normalizeRoundAndPackFloat32(zSign, zExp, zSig); + +} + +static float32 addFloat32Sigs(float32 a, float32 b, flag zSign) +{ + int16 aExp, bExp, zExp; + bits32 aSig, bSig, zSig; + int16 expDiff; + + aSig = extractFloat32Frac(a); + aExp = extractFloat32Exp(a); + bSig = extractFloat32Frac(b); + bExp = extractFloat32Exp(b); + expDiff = aExp - bExp; + aSig <<= 6; + bSig <<= 6; + if (0 < expDiff) { + if (aExp == 0xFF) { + return a; + } + if (bExp == 0) { + --expDiff; + } else { + bSig |= 0x20000000; + } + shift32RightJamming(bSig, expDiff, &bSig); + zExp = aExp; + } else if (expDiff < 0) { + if (bExp == 0xFF) { + return packFloat32(zSign, 0xFF, 0); + } + if (aExp == 0) { + ++expDiff; + } else { + aSig |= 0x20000000; + } + shift32RightJamming(aSig, -expDiff, &aSig); + zExp = bExp; + } else { + if (aExp == 0xFF) { + return a; + } + if (aExp == 0) + return packFloat32(zSign, 0, (aSig + bSig) >> 6); + zSig = 0x40000000 + aSig + bSig; + zExp = aExp; + goto roundAndPack; + } + aSig |= 0x20000000; + zSig = (aSig + bSig) << 1; + --zExp; + if ((sbits32) zSig < 0) { + zSig = aSig + bSig; + ++zExp; + } + roundAndPack: + return roundAndPackFloat32(zSign, zExp, zSig); + +} + +float64 float64_sub(float64 a, float64 b) +{ + flag aSign, bSign; + + aSign = extractFloat64Sign(a); + bSign = extractFloat64Sign(b); + if (aSign == bSign) { + return subFloat64Sigs(a, b, aSign); + } else { + return addFloat64Sigs(a, b, aSign); + } + +} + +float32 float32_sub(float32 a, float32 b) +{ + flag aSign, bSign; + + aSign = extractFloat32Sign(a); + bSign = extractFloat32Sign(b); + if (aSign == bSign) { + return subFloat32Sigs(a, b, aSign); + } else { + return addFloat32Sigs(a, b, aSign); + } + +} + +float32 float32_add(float32 a, float32 b) +{ + flag aSign, bSign; + + aSign = extractFloat32Sign(a); + bSign = extractFloat32Sign(b); + if (aSign == bSign) { + return addFloat32Sigs(a, b, aSign); + } else { + return subFloat32Sigs(a, b, aSign); + } + +} + +float64 float64_add(float64 a, float64 b) +{ + flag aSign, bSign; + + aSign = extractFloat64Sign(a); + bSign = extractFloat64Sign(b); + if (aSign == bSign) { + return addFloat64Sigs(a, b, aSign); + } else { + return subFloat64Sigs(a, b, aSign); + } +} + +static void +normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr, bits64 * zSigPtr) +{ + int8 shiftCount; + + shiftCount = countLeadingZeros64(aSig) - 11; + *zSigPtr = aSig << shiftCount; + *zExpPtr = 1 - shiftCount; +} + +inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, + bits64 * z1Ptr) +{ + bits64 z1; + + z1 = a1 + b1; + *z1Ptr = z1; + *z0Ptr = a0 + b0 + (z1 < a1); +} + +inline void +sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, + bits64 * z1Ptr) +{ + *z1Ptr = a1 - b1; + *z0Ptr = a0 - b0 - (a1 < b1); +} + +static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b) +{ + bits64 b0, b1; + bits64 rem0, rem1, term0, term1; + bits64 z; + if (b <= a0) + return LIT64(0xFFFFFFFFFFFFFFFF); + b0 = b >> 32; + z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : (a0 / b0) << 32; + mul64To128(b, z, &term0, &term1); + sub128(a0, a1, term0, term1, &rem0, &rem1); + while (((sbits64) rem0) < 0) { + z -= LIT64(0x100000000); + b1 = b << 32; + add128(rem0, rem1, b0, b1, &rem0, &rem1); + } + rem0 = (rem0 << 32) | (rem1 >> 32); + z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : rem0 / b0; + return z; +} + +inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr) +{ + bits32 aHigh, aLow, bHigh, bLow; + bits64 z0, zMiddleA, zMiddleB, z1; + + aLow = a; + aHigh = a >> 32; + bLow = b; + bHigh = b >> 32; + z1 = ((bits64) aLow) * bLow; + zMiddleA = ((bits64) aLow) * bHigh; + zMiddleB = ((bits64) aHigh) * bLow; + z0 = ((bits64) aHigh) * bHigh; + zMiddleA += zMiddleB; + z0 += (((bits64) (zMiddleA < zMiddleB)) << 32) + (zMiddleA >> 32); + zMiddleA <<= 32; + z1 += zMiddleA; + z0 += (z1 < zMiddleA); + *z1Ptr = z1; + *z0Ptr = z0; + +} + +static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr, + bits32 * zSigPtr) +{ + int8 shiftCount; + + shiftCount = countLeadingZeros32(aSig) - 8; + *zSigPtr = aSig << shiftCount; + *zExpPtr = 1 - shiftCount; + +} + +float64 float64_div(float64 a, float64 b) +{ + flag aSign, bSign, zSign; + int16 aExp, bExp, zExp; + bits64 aSig, bSig, zSig; + bits64 rem0, rem1; + bits64 term0, term1; + + aSig = extractFloat64Frac(a); + aExp = extractFloat64Exp(a); + aSign = extractFloat64Sign(a); + bSig = extractFloat64Frac(b); + bExp = extractFloat64Exp(b); + bSign = extractFloat64Sign(b); + zSign = aSign ^ bSign; + if (aExp == 0x7FF) { + if (bExp == 0x7FF) { + } + return packFloat64(zSign, 0x7FF, 0); + } + if (bExp == 0x7FF) { + return packFloat64(zSign, 0, 0); + } + if (bExp == 0) { + if (bSig == 0) { + if ((aExp | aSig) == 0) { + float_raise(FPSCR_CAUSE_INVALID); + } + return packFloat64(zSign, 0x7FF, 0); + } + normalizeFloat64Subnormal(bSig, &bExp, &bSig); + } + if (aExp == 0) { + if (aSig == 0) + return packFloat64(zSign, 0, 0); + normalizeFloat64Subnormal(aSig, &aExp, &aSig); + } + zExp = aExp - bExp + 0x3FD; + aSig = (aSig | LIT64(0x0010000000000000)) << 10; + bSig = (bSig | LIT64(0x0010000000000000)) << 11; + if (bSig <= (aSig + aSig)) { + aSig >>= 1; + ++zExp; + } + zSig = estimateDiv128To64(aSig, 0, bSig); + if ((zSig & 0x1FF) <= 2) { + mul64To128(bSig, zSig, &term0, &term1); + sub128(aSig, 0, term0, term1, &rem0, &rem1); + while ((sbits64) rem0 < 0) { + --zSig; + add128(rem0, rem1, 0, bSig, &rem0, &rem1); + } + zSig |= (rem1 != 0); + } + return roundAndPackFloat64(zSign, zExp, zSig); + +} + +float32 float32_div(float32 a, float32 b) +{ + flag aSign, bSign, zSign; + int16 aExp, bExp, zExp; + bits32 aSig, bSig, zSig; + + aSig = extractFloat32Frac(a); + aExp = extractFloat32Exp(a); + aSign = extractFloat32Sign(a); + bSig = extractFloat32Frac(b); + bExp = extractFloat32Exp(b); + bSign = extractFloat32Sign(b); + zSign = aSign ^ bSign; + if (aExp == 0xFF) { + if (bExp == 0xFF) { + } + return packFloat32(zSign, 0xFF, 0); + } + if (bExp == 0xFF) { + return packFloat32(zSign, 0, 0); + } + if (bExp == 0) { + if (bSig == 0) { + return packFloat32(zSign, 0xFF, 0); + } + normalizeFloat32Subnormal(bSig, &bExp, &bSig); + } + if (aExp == 0) { + if (aSig == 0) + return packFloat32(zSign, 0, 0); + normalizeFloat32Subnormal(aSig, &aExp, &aSig); + } + zExp = aExp - bExp + 0x7D; + aSig = (aSig | 0x00800000) << 7; + bSig = (bSig | 0x00800000) << 8; + if (bSig <= (aSig + aSig)) { + aSig >>= 1; + ++zExp; + } + zSig = (((bits64) aSig) << 32) / bSig; + if ((zSig & 0x3F) == 0) { + zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32); + } + return roundAndPackFloat32(zSign, zExp, zSig); + +} + +float32 float32_mul(float32 a, float32 b) +{ + char aSign, bSign, zSign; + int aExp, bExp, zExp; + unsigned int aSig, bSig; + unsigned long long zSig64; + unsigned int zSig; + + aSig = extractFloat32Frac(a); + aExp = extractFloat32Exp(a); + aSign = extractFloat32Sign(a); + bSig = extractFloat32Frac(b); + bExp = extractFloat32Exp(b); + bSign = extractFloat32Sign(b); + zSign = aSign ^ bSign; + if (aExp == 0) { + if (aSig == 0) + return packFloat32(zSign, 0, 0); + normalizeFloat32Subnormal(aSig, &aExp, &aSig); + } + if (bExp == 0) { + if (bSig == 0) + return packFloat32(zSign, 0, 0); + normalizeFloat32Subnormal(bSig, &bExp, &bSig); + } + if ((bExp == 0xff && bSig == 0) || (aExp == 0xff && aSig == 0)) + return roundAndPackFloat32(zSign, 0xff, 0); + + zExp = aExp + bExp - 0x7F; + aSig = (aSig | 0x00800000) << 7; + bSig = (bSig | 0x00800000) << 8; + shift64RightJamming(((unsigned long long)aSig) * bSig, 32, &zSig64); + zSig = zSig64; + if (0 <= (signed int)(zSig << 1)) { + zSig <<= 1; + --zExp; + } + return roundAndPackFloat32(zSign, zExp, zSig); + +} + +float64 float64_mul(float64 a, float64 b) +{ + char aSign, bSign, zSign; + int aExp, bExp, zExp; + unsigned long long int aSig, bSig, zSig0, zSig1; + + aSig = extractFloat64Frac(a); + aExp = extractFloat64Exp(a); + aSign = extractFloat64Sign(a); + bSig = extractFloat64Frac(b); + bExp = extractFloat64Exp(b); + bSign = extractFloat64Sign(b); + zSign = aSign ^ bSign; + + if (aExp == 0) { + if (aSig == 0) + return packFloat64(zSign, 0, 0); + normalizeFloat64Subnormal(aSig, &aExp, &aSig); + } + if (bExp == 0) { + if (bSig == 0) + return packFloat64(zSign, 0, 0); + normalizeFloat64Subnormal(bSig, &bExp, &bSig); + } + if ((aExp == 0x7ff && aSig == 0) || (bExp == 0x7ff && bSig == 0)) + return roundAndPackFloat64(zSign, 0x7ff, 0); + + zExp = aExp + bExp - 0x3FF; + aSig = (aSig | 0x0010000000000000LL) << 10; + bSig = (bSig | 0x0010000000000000LL) << 11; + mul64To128(aSig, bSig, &zSig0, &zSig1); + zSig0 |= (zSig1 != 0); + if (0 <= (signed long long int)(zSig0 << 1)) { + zSig0 <<= 1; + --zExp; + } + return roundAndPackFloat64(zSign, zExp, zSig0); +} diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index 24539873943a..08ac6387bf17 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile @@ -3,6 +3,7 @@ # # CPU subtype setup +obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o @@ -14,6 +15,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o smp-$(CONFIG_CPU_SUBTYPE_SHX3) := smp-shx3.o # Primary on-chip clocks (common) +clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c new file mode 100644 index 000000000000..45889d412c80 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c @@ -0,0 +1,126 @@ +/* + * arch/sh/kernel/cpu/sh4a/clock-sh7763.c + * + * SH7763 support for the clock framework + * + * Copyright (C) 2005 Paul Mundt + * Copyright (C) 2007 Yoshihiro Shimoda + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/kernel.h> +#include <asm/clock.h> +#include <asm/freq.h> +#include <asm/io.h> + +static int bfc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 }; +static int p0fc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 }; +static int p1fc_divisors[] = { 1, 1, 1, 16, 1, 1, 1, 1 }; +static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 }; + +static void master_clk_init(struct clk *clk) +{ + clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07]; +} + +static struct clk_ops sh7763_master_clk_ops = { + .init = master_clk_init, +}; + +static void module_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07); + clk->rate = clk->parent->rate / p0fc_divisors[idx]; +} + +static struct clk_ops sh7763_module_clk_ops = { + .recalc = module_clk_recalc, +}; + +static void bus_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07); + clk->rate = clk->parent->rate / bfc_divisors[idx]; +} + +static struct clk_ops sh7763_bus_clk_ops = { + .recalc = bus_clk_recalc, +}; + +static void cpu_clk_recalc(struct clk *clk) +{ + clk->rate = clk->parent->rate; +} + +static struct clk_ops sh7763_cpu_clk_ops = { + .recalc = cpu_clk_recalc, +}; + +static struct clk_ops *sh7763_clk_ops[] = { + &sh7763_master_clk_ops, + &sh7763_module_clk_ops, + &sh7763_bus_clk_ops, + &sh7763_cpu_clk_ops, +}; + +void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +{ + if (idx < ARRAY_SIZE(sh7763_clk_ops)) + *ops = sh7763_clk_ops[idx]; +} + +static void shyway_clk_recalc(struct clk *clk) +{ + int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07); + clk->rate = clk->parent->rate / cfc_divisors[idx]; +} + +static struct clk_ops sh7763_shyway_clk_ops = { + .recalc = shyway_clk_recalc, +}; + +static struct clk sh7763_shyway_clk = { + .name = "shyway_clk", + .flags = CLK_ALWAYS_ENABLED, + .ops = &sh7763_shyway_clk_ops, +}; + +/* + * Additional SH7763-specific on-chip clocks that aren't already part of the + * clock framework + */ +static struct clk *sh7763_onchip_clocks[] = { + &sh7763_shyway_clk, +}; + +static int __init sh7763_clk_init(void) +{ + struct clk *clk = clk_get(NULL, "master_clk"); + int i; + + for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) { + struct clk *clkp = sh7763_onchip_clocks[i]; + + clkp->parent = clk; + clk_register(clkp); + clk_enable(clkp); + } + + /* + * Now that we have the rest of the clocks registered, we need to + * force the parent clock to propagate so that these clocks will + * automatically figure out their rate. We cheat by handing the + * parent clock its current rate and forcing child propagation. + */ + clk_set_rate(clk, clk_get_rate(clk)); + + clk_put(clk); + + return 0; +} + +arch_initcall(sh7763_clk_init); + diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index b9c6547c4a90..73c778d40d13 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -157,14 +157,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(SCIF0, 3), - INTC_PRIO(SCIF1, 3), - INTC_PRIO(SCIF2, 3), - INTC_PRIO(TMU0, 2), - INTC_PRIO(TMU1, 2), -}; - static struct intc_mask_reg mask_registers[] __initdata = { { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ { } }, @@ -217,7 +209,7 @@ static struct intc_sense_reg sense_registers[] __initdata = { { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, priorities, +static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, mask_registers, prio_registers, sense_registers); void __init plat_irq_setup(void) diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c new file mode 100644 index 000000000000..eabd5386812d --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c @@ -0,0 +1,390 @@ +/* + * SH7763 Setup + * + * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2007 Yoshihiro Shimoda + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/platform_device.h> +#include <linux/init.h> +#include <linux/serial.h> +#include <linux/io.h> +#include <asm/sci.h> + +static struct resource rtc_resources[] = { + [0] = { + .start = 0xffe80000, + .end = 0xffe80000 + 0x58 - 1, + .flags = IORESOURCE_IO, + }, + [1] = { + /* Period IRQ */ + .start = 21, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* Carry IRQ */ + .start = 22, + .flags = IORESOURCE_IRQ, + }, + [3] = { + /* Alarm IRQ */ + .start = 20, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device rtc_device = { + .name = "sh-rtc", + .id = -1, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; + +static struct plat_sci_port sci_platform_data[] = { + { + .mapbase = 0xffe00000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 40, 41, 43, 42 }, + }, { + .mapbase = 0xffe08000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 76, 77, 79, 78 }, + }, { + .flags = 0, + } +}; + +static struct platform_device sci_device = { + .name = "sh-sci", + .id = -1, + .dev = { + .platform_data = sci_platform_data, + }, +}; + +static struct resource usb_ohci_resources[] = { + [0] = { + .start = 0xffec8000, + .end = 0xffec80ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 83, + .end = 83, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 usb_ohci_dma_mask = 0xffffffffUL; +static struct platform_device usb_ohci_device = { + .name = "sh_ohci", + .id = -1, + .dev = { + .dma_mask = &usb_ohci_dma_mask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(usb_ohci_resources), + .resource = usb_ohci_resources, +}; + +static struct resource usbf_resources[] = { + [0] = { + .start = 0xffec0000, + .end = 0xffec00ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 84, + .end = 84, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device usbf_device = { + .name = "sh_udc", + .id = -1, + .dev = { + .dma_mask = NULL, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(usbf_resources), + .resource = usbf_resources, +}; + +static struct platform_device *sh7763_devices[] __initdata = { + &rtc_device, + &sci_device, + &usb_ohci_device, + &usbf_device, +}; + +static int __init sh7763_devices_setup(void) +{ + return platform_add_devices(sh7763_devices, + ARRAY_SIZE(sh7763_devices)); +} +__initcall(sh7763_devices_setup); + +enum { + UNUSED = 0, + + /* interrupt sources */ + + IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, + IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, + IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH, + IRL_HHLL, IRL_HHLH, IRL_HHHL, + + IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, + RTC_ATI, RTC_PRI, RTC_CUI, + WDT, TMU0, TMU1, TMU2, TMU2_TICPI, + HUDI, LCDC, + DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE, + SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI, + DMAC0_DMINT4, DMAC0_DMINT5, + IIC0, IIC1, + CMT, + GEINT0, GEINT1, GEINT2, + HAC, + PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, + PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0, + STIF0, STIF1, + SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI, + SIOF0, SIOF1, SIOF2, + USBH, USBFI0, USBFI1, + TPU, PCC, + MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY, + SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND, + TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3, + SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI, + GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3, + + /* interrupt groups */ + + TMU012, TMU345, RTC, DMAC, SCIF0, GETHER, PCIC5, + SCIF1, USBF, MMCIF, SIM, SCIF2, GPIO, +}; + +static struct intc_vect vectors[] __initdata = { + INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), + INTC_VECT(RTC_CUI, 0x4c0), + INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580), + INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0), + INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600), + INTC_VECT(LCDC, 0x620), + INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660), + INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0), + INTC_VECT(DMAC0_DMAE, 0x6c0), + INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720), + INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760), + INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0), + INTC_VECT(IIC0, 0x8A0), INTC_VECT(IIC1, 0x8C0), + INTC_VECT(CMT, 0x900), INTC_VECT(GEINT0, 0x920), + INTC_VECT(GEINT1, 0x940), INTC_VECT(GEINT2, 0x960), + INTC_VECT(HAC, 0x980), + INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20), + INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60), + INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0), + INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0), + INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20), + INTC_VECT(STIF0, 0xb40), INTC_VECT(STIF1, 0xb60), + INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0), + INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0), + INTC_VECT(SIOF0, 0xc00), INTC_VECT(SIOF1, 0xc20), + INTC_VECT(USBH, 0xc60), INTC_VECT(USBFI0, 0xc80), + INTC_VECT(USBFI1, 0xca0), + INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0), + INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20), + INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60), + INTC_VECT(SIM_ERI, 0xd80), INTC_VECT(SIM_RXI, 0xda0), + INTC_VECT(SIM_TXI, 0xdc0), INTC_VECT(SIM_TEND, 0xde0), + INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20), + INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60), + INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0), + INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0), + INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20), + INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60), + INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0), + INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0), +}; + +static struct intc_group groups[] __initdata = { + INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), + INTC_GROUP(TMU345, TMU3, TMU4, TMU5), + INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), + INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, + DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE), + INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), + INTC_GROUP(GETHER, GEINT0, GEINT1, GEINT2), + INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0), + INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), + INTC_GROUP(USBF, USBFI0, USBFI1), + INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY), + INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND), + INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI), + INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3), +}; + +static struct intc_prio priorities[] __initdata = { + INTC_PRIO(SCIF0, 3), + INTC_PRIO(SCIF1, 3), + INTC_PRIO(SCIF2, 3), +}; + +static struct intc_mask_reg mask_registers[] __initdata = { + { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ + { 0, 0, 0, 0, 0, 0, GPIO, 0, + SSI0, MMCIF, 0, SIOF0, PCIC5, PCIINTD, PCIINTC, PCIINTB, + PCIINTA, PCISERR, HAC, CMT, 0, 0, 0, DMAC, + HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, + { 0xffd400d0, 0xffd400d4, 32, /* INT2MSKR1 / INT2MSKCR1 */ + { 0, 0, 0, 0, 0, 0, SCIF2, USBF, + 0, 0, STIF1, STIF0, 0, 0, USBH, GETHER, + PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1, + LCDC, 0, IIC1, IIC0, SSI3, SSI2, SSI1, 0 } }, +}; + +static struct intc_prio_reg prio_registers[] __initdata = { + { 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1, + TMU2, TMU2_TICPI } }, + { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } }, + { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } }, + { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC, ADC } }, + { 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { CMT, HAC, + PCISERR, PCIINTA } }, + { 0xffd40014, 0, 32, 8, /* INT2PRI5 */ { PCIINTB, PCIINTC, + PCIINTD, PCIC5 } }, + { 0xffd40018, 0, 32, 8, /* INT2PRI6 */ { SIOF0, USBF, MMCIF, SSI0 } }, + { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { SCIF2, GPIO } }, + { 0xffd400a0, 0, 32, 8, /* INT2PRI8 */ { SSI3, SSI2, SSI1, 0 } }, + { 0xffd400a4, 0, 32, 8, /* INT2PRI9 */ { LCDC, 0, IIC1, IIC0 } }, + { 0xffd400a8, 0, 32, 8, /* INT2PRI10 */ { TPU, SIM, SIOF2, SIOF1 } }, + { 0xffd400ac, 0, 32, 8, /* INT2PRI11 */ { PCC } }, + { 0xffd400b0, 0, 32, 8, /* INT2PRI12 */ { 0, 0, USBH, GETHER } }, + { 0xffd400b4, 0, 32, 8, /* INT2PRI13 */ { 0, 0, STIF1, STIF0 } }, +}; + +static DECLARE_INTC_DESC(intc_desc, "sh7763", vectors, groups, priorities, + mask_registers, prio_registers, NULL); + +/* Support for external interrupt pins in IRQ mode */ + +static struct intc_vect irq_vectors[] __initdata = { + INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), + INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), + INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), + INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), +}; + +static struct intc_mask_reg irq_mask_registers[] __initdata = { + { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static struct intc_prio_reg irq_prio_registers[] __initdata = { + { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3, + IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static struct intc_sense_reg irq_sense_registers[] __initdata = { + { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3, + IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors, + NULL, NULL, irq_mask_registers, irq_prio_registers, + irq_sense_registers); + +/* External interrupt pins in IRL mode */ + +static struct intc_vect irl_vectors[] __initdata = { + INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220), + INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260), + INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0), + INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0), + INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320), + INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360), + INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0), + INTC_VECT(IRL_HHHL, 0x3c0), +}; + +static struct intc_mask_reg irl3210_mask_registers[] __initdata = { + { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */ + { IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, + IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, + IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH, + IRL_HHLL, IRL_HHLH, IRL_HHHL, } }, +}; + +static struct intc_mask_reg irl7654_mask_registers[] __initdata = { + { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, + IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, + IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH, + IRL_HHLL, IRL_HHLH, IRL_HHHL, } }, +}; + +static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7763-irl7654", irl_vectors, + NULL, NULL, irl7654_mask_registers, NULL, NULL); + +static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7763-irl3210", irl_vectors, + NULL, NULL, irl3210_mask_registers, NULL, NULL); + +#define INTC_ICR0 0xffd00000 +#define INTC_INTMSK0 0xffd00044 +#define INTC_INTMSK1 0xffd00048 +#define INTC_INTMSK2 0xffd40080 +#define INTC_INTMSKCLR1 0xffd00068 +#define INTC_INTMSKCLR2 0xffd40084 + +void __init plat_irq_setup(void) +{ + /* disable IRQ7-0 */ + ctrl_outl(0xff000000, INTC_INTMSK0); + + /* disable IRL3-0 + IRL7-4 */ + ctrl_outl(0xc0000000, INTC_INTMSK1); + ctrl_outl(0xfffefffe, INTC_INTMSK2); + + register_intc_controller(&intc_desc); +} + +void __init plat_irq_setup_pins(int mode) +{ + switch (mode) { + case IRQ_MODE_IRQ: + /* select IRQ mode for IRL3-0 + IRL7-4 */ + ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0); + register_intc_controller(&intc_irq_desc); + break; + case IRQ_MODE_IRL7654: + /* enable IRL7-4 but don't provide any masking */ + ctrl_outl(0x40000000, INTC_INTMSKCLR1); + ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); + break; + case IRQ_MODE_IRL3210: + /* enable IRL0-3 but don't provide any masking */ + ctrl_outl(0x80000000, INTC_INTMSKCLR1); + ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); + break; + case IRQ_MODE_IRL7654_MASK: + /* enable IRL7-4 and mask using cpu intc controller */ + ctrl_outl(0x40000000, INTC_INTMSKCLR1); + register_intc_controller(&intc_irl7654_desc); + break; + case IRQ_MODE_IRL3210_MASK: + /* enable IRL0-3 and mask using cpu intc controller */ + ctrl_outl(0x80000000, INTC_INTMSKCLR1); + register_intc_controller(&intc_irl3210_desc); + break; + default: + BUG(); + } +} diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index e8fd33ff0605..293004b526ff 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c @@ -168,11 +168,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(SCIF0, 3), - INTC_PRIO(SCIF1, 3), -}; - static struct intc_mask_reg mask_registers[] __initdata = { { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, @@ -195,7 +190,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities, +static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, mask_registers, prio_registers, NULL); /* Support for external interrupt pins in IRQ mode */ @@ -223,7 +218,7 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, - NULL, NULL, irq_mask_registers, irq_prio_registers, + NULL, irq_mask_registers, irq_prio_registers, irq_sense_registers); /* External interrupt pins in IRL mode */ @@ -257,10 +252,10 @@ static struct intc_mask_reg irl7654_mask_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors, - NULL, NULL, irl7654_mask_registers, NULL, NULL); + NULL, irl7654_mask_registers, NULL, NULL); static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors, - NULL, NULL, irl3210_mask_registers, NULL, NULL); + NULL, irl3210_mask_registers, NULL, NULL); #define INTC_ICR0 0xffd00000 #define INTC_INTMSK0 0xffd00044 diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index 39b215d6cee5..74b60e96cdf4 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -178,15 +178,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(SCIF0, 3), - INTC_PRIO(SCIF1, 3), - INTC_PRIO(SCIF2, 3), - INTC_PRIO(SCIF3, 3), - INTC_PRIO(SCIF4, 3), - INTC_PRIO(SCIF5, 3), -}; - static struct intc_mask_reg mask_registers[] __initdata = { { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, @@ -227,7 +218,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { { 0xffd40024, 0, 32, 8, /* INT2PRI9 */ { DU, GDTA, } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups, priorities, +static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups, mask_registers, prio_registers, NULL); /* Support for external interrupt pins in IRQ mode */ @@ -248,11 +239,11 @@ static struct intc_sense_reg sense_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, - NULL, NULL, mask_registers, prio_registers, + NULL, mask_registers, prio_registers, sense_registers); static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, - NULL, NULL, mask_registers, prio_registers, + NULL, mask_registers, prio_registers, sense_registers); /* External interrupt pins in IRL mode */ @@ -280,10 +271,10 @@ static struct intc_vect vectors_irl4567[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7785-irl0123", vectors_irl0123, - NULL, NULL, mask_registers, NULL, NULL); + NULL, mask_registers, NULL, NULL); static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567, - NULL, NULL, mask_registers, NULL, NULL); + NULL, mask_registers, NULL, NULL); #define INTC_ICR0 0xffd00000 #define INTC_INTMSK0 0xffd00044 diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c index c6cdd7e3b049..4dc958b6b314 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c @@ -165,13 +165,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS), }; -static struct intc_prio priorities[] __initdata = { - INTC_PRIO(SCIF0, 3), - INTC_PRIO(SCIF1, 3), - INTC_PRIO(SCIF2, 3), - INTC_PRIO(SCIF3, 3), -}; - static struct intc_mask_reg mask_registers[] __initdata = { { 0xfe410030, 0xfe410050, 32, /* CnINTMSK0 / CnINTMSKCLR0 */ { IRQ0, IRQ1, IRQ2, IRQ3 } }, @@ -218,7 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 4) }, }; -static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, priorities, +static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, mask_registers, prio_registers, NULL); /* Support for external interrupt pins in IRQ mode */ @@ -232,8 +225,7 @@ static struct intc_sense_reg sense_registers[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups, - priorities, mask_registers, prio_registers, - sense_registers); + mask_registers, prio_registers, sense_registers); /* External interrupt pins in IRL mode */ static struct intc_vect vectors_irl[] __initdata = { @@ -248,7 +240,7 @@ static struct intc_vect vectors_irl[] __initdata = { }; static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, - priorities, mask_registers, prio_registers, NULL); + mask_registers, prio_registers, NULL); void __init plat_irq_setup_pins(int mode) { diff --git a/arch/sh/kernel/cpu/sh5/Makefile b/arch/sh/kernel/cpu/sh5/Makefile new file mode 100644 index 000000000000..8646363e9ded --- /dev/null +++ b/arch/sh/kernel/cpu/sh5/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the Linux/SuperH SH-5 backends. +# +obj-y := entry.o probe.o switchto.o + +obj-$(CONFIG_SH_FPU) += fpu.o +obj-$(CONFIG_KALLSYMS) += unwind.o diff --git a/arch/sh64/kernel/entry.S b/arch/sh/kernel/cpu/sh5/entry.S index 7013fcb6665c..ba8750176d91 100644 --- a/arch/sh64/kernel/entry.S +++ b/arch/sh/kernel/cpu/sh5/entry.S @@ -1,21 +1,18 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/entry.S + * arch/sh/kernel/cpu/sh5/entry.S * * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2004, 2005 Paul Mundt - * Copyright (C) 2003, 2004 Richard Curnow + * Copyright (C) 2004 - 2007 Paul Mundt + * Copyright (C) 2003, 2004 Richard Curnow * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/errno.h> #include <linux/sys.h> - +#include <asm/cpu/registers.h> #include <asm/processor.h> -#include <asm/registers.h> #include <asm/unistd.h> #include <asm/thread_info.h> #include <asm/asm-offsets.h> @@ -163,7 +160,7 @@ trap_jtable: .long system_call /* 0x160 */ .long do_reserved_inst /* 0x180 */ .long do_illegal_slot_inst /* 0x1A0 */ - .long do_NMI /* 0x1C0 */ + .long do_exception_error /* 0x1C0 - NMI */ .long do_exception_error /* 0x1E0 */ .rept 15 .long do_IRQ /* 0x200 - 0x3C0 */ @@ -434,7 +431,7 @@ reset_or_panic: synco /* TAKum03020 (but probably a good idea anyway.) */ putcon SP, DCR /* First save r0-1 and tr0, as we need to use these */ - movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP + movi resvec_save_area-CONFIG_PAGE_OFFSET, SP st.q SP, 0, r0 st.q SP, 8, r1 gettr tr0, r0 @@ -444,7 +441,7 @@ reset_or_panic: getcon EXPEVT, r0 movi RESET_CAUSE, r1 sub r1, r0, r1 /* r1=0 if reset */ - movi _stext-CONFIG_CACHED_MEMORY_OFFSET, r0 + movi _stext-CONFIG_PAGE_OFFSET, r0 ori r0, 1, r0 ptabs r0, tr0 beqi r1, 0, tr0 /* Jump to start address if reset */ @@ -456,7 +453,7 @@ reset_or_panic: beqi r1, 0, tr0 /* jump if single step */ /* Now jump to where we save the registers. */ - movi panic_stash_regs-CONFIG_CACHED_MEMORY_OFFSET, r1 + movi panic_stash_regs-CONFIG_PAGE_OFFSET, r1 ptabs r1, tr0 blink tr0, r63 @@ -492,7 +489,7 @@ debug_exception: */ putcon SP, DCR /* Save SSR & SPC, together with R0 & R1, as we need to use 2 regs. */ - movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP + movi resvec_save_area-CONFIG_PAGE_OFFSET, SP /* With the MMU off, we are bypassing the cache, so purge any * data that will be made stale by the following stores. @@ -560,7 +557,7 @@ debug_interrupt: /* Save original stack pointer into KCR1 */ synco putcon SP, KCR1 - movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP + movi resvec_save_area-CONFIG_PAGE_OFFSET, SP ocbp SP, 0 ocbp SP, 32 synco @@ -609,7 +606,7 @@ debug_interrupt: movi EVENT_FAULT_NOT_TLB, r4 or SP, ZERO, r5 - movi CONFIG_CACHED_MEMORY_OFFSET, r6 + movi CONFIG_PAGE_OFFSET, r6 add r6, r5, r5 getcon KCR1, SP @@ -944,9 +941,6 @@ ret_with_reschedule: getcon KCR0, r6 ! r6 contains current_thread_info ld.l r6, TI_FLAGS, r7 ! r7 contains current_thread_info->flags - ! FIXME:!!! - ! no handling of TIF_SYSCALL_TRACE yet!! - movi _TIF_NEED_RESCHED, r8 and r8, r7, r8 pta work_resched, tr0 @@ -1282,14 +1276,17 @@ syscall_allowed: getcon KCR0, r2 ld.l r2, TI_FLAGS, r4 - movi (1 << TIF_SYSCALL_TRACE), r6 + movi (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | _TIF_SYSCALL_AUDIT), r6 and r6, r4, r6 beq/l r6, ZERO, tr0 /* Trace it by calling syscall_trace before and after */ movi syscall_trace, r4 + or SP, ZERO, r2 + or ZERO, ZERO, r3 ptabs r4, tr0 blink tr0, LINK + /* Reload syscall number as r5 is trashed by syscall_trace */ ld.q SP, FRAME_S(FSYSCALL_ID), r5 andi r5, 0x1ff, r5 @@ -1323,6 +1320,8 @@ syscall_ret_trace: st.q SP, FRAME_R(9), r2 /* Save return value */ movi syscall_trace, LINK + or SP, ZERO, r2 + movi 1, r3 ptabs LINK, tr0 blink tr0, LINK @@ -1368,7 +1367,7 @@ route_to_panic_handler: last-chance debugging, e.g. if no output wants to go to the console. */ - movi panic_handler - CONFIG_CACHED_MEMORY_OFFSET, r1 + movi panic_handler - CONFIG_PAGE_OFFSET, r1 ptabs r1, tr0 pta 1f, tr1 gettr tr1, r0 @@ -1410,7 +1409,7 @@ peek_real_address_q: andc r1, r36, r1 /* turn sr.mmu off in real mode section */ putcon r1, ssr - movi .peek0 - CONFIG_CACHED_MEMORY_OFFSET, r36 /* real mode target address */ + movi .peek0 - CONFIG_PAGE_OFFSET, r36 /* real mode target address */ movi 1f, r37 /* virtual mode return addr */ putcon r36, spc @@ -1459,7 +1458,7 @@ poke_real_address_q: andc r1, r36, r1 /* turn sr.mmu off in real mode section */ putcon r1, ssr - movi .poke0-CONFIG_CACHED_MEMORY_OFFSET, r36 /* real mode target address */ + movi .poke0-CONFIG_PAGE_OFFSET, r36 /* real mode target address */ movi 1f, r37 /* virtual mode return addr */ putcon r36, spc @@ -1956,7 +1955,7 @@ panic_stash_regs: getcon SSR,r3 getcon EXPEVT,r4 /* Prepare to jump to C - physical address */ - movi panic_handler-CONFIG_CACHED_MEMORY_OFFSET, r1 + movi panic_handler-CONFIG_PAGE_OFFSET, r1 ori r1, 1, r1 ptabs r1, tr0 getcon DCR, SP @@ -2057,7 +2056,7 @@ trap_init: andi r19, -4, r19 /* reset MMUOFF + reserved */ /* For RESVEC exceptions we force the MMU off, which means we need the physical address. */ - movi LRESVEC_block-CONFIG_CACHED_MEMORY_OFFSET, r20 + movi LRESVEC_block-CONFIG_PAGE_OFFSET, r20 andi r20, -4, r20 /* reset reserved */ ori r20, 1, r20 /* set MMUOFF */ putcon r19, VBR diff --git a/arch/sh64/kernel/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c index 8ad4ed6a6c9b..30b76a94abf2 100644 --- a/arch/sh64/kernel/fpu.c +++ b/arch/sh/kernel/cpu/sh5/fpu.c @@ -1,9 +1,5 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/fpu.c + * arch/sh/kernel/cpu/sh5/fpu.c * * Copyright (C) 2001 Manuela Cirronis, Paolo Alberelli * Copyright (C) 2002 STMicroelectronics Limited @@ -12,8 +8,10 @@ * Started from SH4 version: * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/sched.h> #include <linux/signal.h> #include <asm/processor.h> @@ -30,12 +28,12 @@ static union sh_fpu_union init_fpuregs = { .hard = { - .fp_regs = { [0 ... 63] = sNAN32 }, - .fpscr = FPSCR_INIT + .fp_regs = { [0 ... 63] = sNAN32 }, + .fpscr = FPSCR_INIT } }; -inline void fpsave(struct sh_fpu_hard_struct *fpregs) +void save_fpu(struct task_struct *tsk, struct pt_regs *regs) { asm volatile("fst.p %0, (0*8), fp0\n\t" "fst.p %0, (1*8), fp2\n\t" @@ -73,11 +71,10 @@ inline void fpsave(struct sh_fpu_hard_struct *fpregs) "fgetscr fr63\n\t" "fst.s %0, (32*8), fr63\n\t" : /* no output */ - : "r" (fpregs) + : "r" (&tsk->thread.fpu.hard) : "memory"); } - static inline void fpload(struct sh_fpu_hard_struct *fpregs) { @@ -152,11 +149,11 @@ do_fpu_state_restore(unsigned long ex, struct pt_regs *regs) if (last_task_used_math == current) return; - grab_fpu(); - if (last_task_used_math != NULL) { + enable_fpu(); + if (last_task_used_math != NULL) /* Other processes fpu state, save away */ - fpsave(&last_task_used_math->thread.fpu.hard); - } + save_fpu(last_task_used_math, regs); + last_task_used_math = current; if (used_math()) { fpload(¤t->thread.fpu.hard); @@ -165,6 +162,5 @@ do_fpu_state_restore(unsigned long ex, struct pt_regs *regs) fpload(&init_fpuregs.hard); set_used_math(); } - release_fpu(); + disable_fpu(); } - diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c new file mode 100644 index 000000000000..15d167fd0ae7 --- /dev/null +++ b/arch/sh/kernel/cpu/sh5/probe.c @@ -0,0 +1,76 @@ +/* + * arch/sh/kernel/cpu/sh5/probe.c + * + * CPU Subtype Probing for SH-5. + * + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 - 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/io.h> +#include <linux/string.h> +#include <asm/processor.h> +#include <asm/cache.h> + +int __init detect_cpu_and_cache_system(void) +{ + unsigned long long cir; + + /* Do peeks in real mode to avoid having to set up a mapping for the + WPC registers. On SH5-101 cut2, such a mapping would be exposed to + an address translation erratum which would make it hard to set up + correctly. */ + cir = peek_real_address_q(0x0d000008); + if ((cir & 0xffff) == 0x5103) { + boot_cpu_data.type = CPU_SH5_103; + } else if (((cir >> 32) & 0xffff) == 0x51e2) { + /* CPU.VCR aliased at CIR address on SH5-101 */ + boot_cpu_data.type = CPU_SH5_101; + } else { + boot_cpu_data.type = CPU_SH_NONE; + } + + /* + * First, setup some sane values for the I-cache. + */ + boot_cpu_data.icache.ways = 4; + boot_cpu_data.icache.sets = 256; + boot_cpu_data.icache.linesz = L1_CACHE_BYTES; + +#if 0 + /* + * FIXME: This can probably be cleaned up a bit as well.. for example, + * do we really need the way shift _and_ the way_step_shift ?? Judging + * by the existing code, I would guess no.. is there any valid reason + * why we need to be tracking this around? + */ + boot_cpu_data.icache.way_shift = 13; + boot_cpu_data.icache.entry_shift = 5; + boot_cpu_data.icache.set_shift = 4; + boot_cpu_data.icache.way_step_shift = 16; + boot_cpu_data.icache.asid_shift = 2; + + /* + * way offset = cache size / associativity, so just don't factor in + * associativity in the first place.. + */ + boot_cpu_data.icache.way_ofs = boot_cpu_data.icache.sets * + boot_cpu_data.icache.linesz; + + boot_cpu_data.icache.asid_mask = 0x3fc; + boot_cpu_data.icache.idx_mask = 0x1fe0; + boot_cpu_data.icache.epn_mask = 0xffffe000; +#endif + + boot_cpu_data.icache.flags = 0; + + /* A trivial starting point.. */ + memcpy(&boot_cpu_data.dcache, + &boot_cpu_data.icache, sizeof(struct cache_info)); + + return 0; +} diff --git a/arch/sh64/kernel/switchto.S b/arch/sh/kernel/cpu/sh5/switchto.S index 45b2d90eed7d..45c351b0f1ba 100644 --- a/arch/sh64/kernel/switchto.S +++ b/arch/sh/kernel/cpu/sh5/switchto.S @@ -1,5 +1,5 @@ /* - * arch/sh64/kernel/switchto.S + * arch/sh/kernel/cpu/sh5/switchto.S * * sh64 context switch * diff --git a/arch/sh64/kernel/unwind.c b/arch/sh/kernel/cpu/sh5/unwind.c index 1214c78e3584..119c20afd4e5 100644 --- a/arch/sh64/kernel/unwind.c +++ b/arch/sh/kernel/cpu/sh5/unwind.c @@ -1,5 +1,5 @@ /* - * arch/sh64/kernel/unwind.c + * arch/sh/kernel/cpu/sh5/unwind.c * * Copyright (C) 2004 Paul Mundt * Copyright (C) 2004 Richard Curnow diff --git a/arch/sh/kernel/dump_task.c b/arch/sh/kernel/dump_task.c new file mode 100644 index 000000000000..4a8a4083ff0b --- /dev/null +++ b/arch/sh/kernel/dump_task.c @@ -0,0 +1,31 @@ +#include <linux/elfcore.h> +#include <linux/sched.h> + +/* + * Capture the user space registers if the task is not running (in user space) + */ +int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs) +{ + struct pt_regs ptregs; + + ptregs = *task_pt_regs(tsk); + elf_core_copy_regs(regs, &ptregs); + + return 1; +} + +int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpu) +{ + int fpvalid = 0; + +#if defined(CONFIG_SH_FPU) + fpvalid = !!tsk_used_math(tsk); + if (fpvalid) { + unlazy_fpu(tsk, task_pt_regs(tsk)); + memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu)); + } +#endif + + return fpvalid; +} + diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c index 2f30977558ad..957f25611543 100644 --- a/arch/sh/kernel/early_printk.c +++ b/arch/sh/kernel/early_printk.c @@ -63,7 +63,8 @@ static struct console bios_console = { #include <linux/serial_core.h> #include "../../../drivers/serial/sh-sci.h" -#if defined(CONFIG_CPU_SUBTYPE_SH7720) +#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7721) #define EPK_SCSMR_VALUE 0x000 #define EPK_SCBRR_VALUE 0x00C #define EPK_FIFO_SIZE 64 @@ -117,7 +118,8 @@ static struct console scif_console = { }; #if !defined(CONFIG_SH_STANDARD_BIOS) -#if defined(CONFIG_CPU_SUBTYPE_SH7720) +#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7721) static void scif_sercon_init(char *s) { sci_out(&scif_port, SCSCR, 0x0000); /* clear TE and RE */ @@ -208,10 +210,12 @@ static int __init setup_early_printk(char *buf) if (!strncmp(buf, "serial", 6)) { early_console = &scif_console; -#if (defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720)) && \ - !defined(CONFIG_SH_STANDARD_BIOS) +#if !defined(CONFIG_SH_STANDARD_BIOS) +#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7721) scif_sercon_init(buf + 6); #endif +#endif } #endif diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S index e0317ed080c3..926b2e7b11c1 100644 --- a/arch/sh/kernel/entry-common.S +++ b/arch/sh/kernel/entry-common.S @@ -176,25 +176,6 @@ work_notifysig: jmp @r1 lds r0, pr work_resched: -#if defined(CONFIG_GUSA) && !defined(CONFIG_PREEMPT) - ! gUSA handling - mov.l @(OFF_SP,r15), r0 ! get user space stack pointer - mov r0, r1 - shll r0 - bf/s 1f - shll r0 - bf/s 1f - mov #OFF_PC, r0 - ! SP >= 0xc0000000 : gUSA mark - mov.l @(r0,r15), r2 ! get user space PC (program counter) - mov.l @(OFF_R0,r15), r3 ! end point - cmp/hs r3, r2 ! r2 >= r3? - bt 1f - add r3, r1 ! rewind point #2 - mov.l r1, @(r0,r15) ! reset PC to rewind point #2 - ! -1: -#endif mov.l 1f, r1 jsr @r1 ! schedule nop @@ -224,7 +205,7 @@ work_resched: syscall_exit_work: ! r0: current_thread_info->flags ! r8: current_thread_info - tst #_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP, r0 + tst #_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | _TIF_SYSCALL_AUDIT, r0 bt/s work_pending tst #_TIF_NEED_RESCHED, r0 #ifdef CONFIG_TRACE_IRQFLAGS @@ -234,6 +215,8 @@ syscall_exit_work: #endif sti ! XXX setup arguments... + mov r15, r4 + mov #1, r5 mov.l 4f, r0 ! do_syscall_trace jsr @r0 nop @@ -244,6 +227,8 @@ syscall_exit_work: syscall_trace_entry: ! Yes it is traced. ! XXX setup arguments... + mov r15, r4 + mov #0, r5 mov.l 4f, r11 ! Call do_syscall_trace which notifies jsr @r11 ! superior (will chomp R[0-7]) nop @@ -366,7 +351,7 @@ ENTRY(system_call) ! get_current_thread_info r8, r10 mov.l @(TI_FLAGS,r8), r8 - mov #_TIF_SYSCALL_TRACE, r10 + mov #(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT), r10 tst r10, r8 bf syscall_trace_entry ! diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head_32.S index 3338239717f1..d67d7ed09f22 100644 --- a/arch/sh/kernel/head.S +++ b/arch/sh/kernel/head_32.S @@ -32,7 +32,11 @@ ENTRY(empty_zero_page) .long 1 /* LOADER_TYPE */ .long 0x00360000 /* INITRD_START */ .long 0x000a0000 /* INITRD_SIZE */ - .long 0 +#ifdef CONFIG_32BIT + .long 0x53453f00 + 32 /* "SE?" = 32 bit */ +#else + .long 0x53453f00 + 29 /* "SE?" = 29 bit */ +#endif 1: .skip PAGE_SIZE - empty_zero_page - 1b diff --git a/arch/sh64/kernel/head.S b/arch/sh/kernel/head_64.S index 186406d3ad9c..f42d4c0feb76 100644 --- a/arch/sh64/kernel/head.S +++ b/arch/sh/kernel/head_64.S @@ -1,32 +1,18 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/head.S + * arch/sh/kernel/head_64.S * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003, 2004 Paul Mundt * - * - * benedict.gaster@superh.com: 2nd May 2002 - * Moved definition of empty_zero_page to its own section allowing - * it to be placed at an absolute address known at load time. - * - * lethal@linux-sh.org: 9th May 2003 - * Kill off GLOBAL_NAME() usage. - * - * lethal@linux-sh.org: 8th May 2004 - * Add early SCIF console DTLB mapping. + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - - #include <asm/page.h> -#include <asm/mmu_context.h> #include <asm/cache.h> #include <asm/tlb.h> -#include <asm/processor.h> -#include <asm/registers.h> +#include <asm/cpu/registers.h> +#include <asm/cpu/mmu_context.h> #include <asm/thread_info.h> /* @@ -41,9 +27,9 @@ #define MMUDR_END DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP #define MMUDR_STEP TLB_STEP -/* Safety check : CONFIG_CACHED_MEMORY_OFFSET has to be a multiple of 512Mb */ -#if (CONFIG_CACHED_MEMORY_OFFSET & ((1UL<<29)-1)) -#error "CONFIG_CACHED_MEMORY_OFFSET must be a multiple of 512Mb" +/* Safety check : CONFIG_PAGE_OFFSET has to be a multiple of 512Mb */ +#if (CONFIG_PAGE_OFFSET & ((1UL<<29)-1)) +#error "CONFIG_PAGE_OFFSET must be a multiple of 512Mb" #endif /* @@ -52,7 +38,7 @@ /* Deal safely with the case where the base of RAM is not 512Mb aligned */ #define ALIGN_512M_MASK (0xffffffffe0000000) -#define ALIGNED_EFFECTIVE ((CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START) & ALIGN_512M_MASK) +#define ALIGNED_EFFECTIVE ((CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START) & ALIGN_512M_MASK) #define ALIGNED_PHYSICAL (CONFIG_MEMORY_START & ALIGN_512M_MASK) #define MMUIR_TEXT_H (0x0000000000000003 | ALIGNED_EFFECTIVE) @@ -66,23 +52,23 @@ #define MMUDR_CACHED_L 0x000000000000015a | ALIGNED_PHYSICAL /* 512 Mb, Cacheable, Write-back, read/write, Not User, Ph. Add. */ -#ifdef CONFIG_ICACHE_DISABLED +#ifdef CONFIG_CACHE_OFF #define ICCR0_INIT_VAL ICCR0_OFF /* ICACHE off */ #else #define ICCR0_INIT_VAL ICCR0_ON | ICCR0_ICI /* ICE + ICI */ #endif #define ICCR1_INIT_VAL ICCR1_NOLOCK /* No locking */ -#if defined (CONFIG_DCACHE_DISABLED) +#if defined (CONFIG_CACHE_OFF) #define OCCR0_INIT_VAL OCCR0_OFF /* D-cache: off */ -#elif defined (CONFIG_DCACHE_WRITE_THROUGH) +#elif defined (CONFIG_CACHE_WRITETHROUGH) #define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WT /* D-cache: on, */ /* WT, invalidate */ -#elif defined (CONFIG_DCACHE_WRITE_BACK) +#elif defined (CONFIG_CACHE_WRITEBACK) #define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WB /* D-cache: on, */ /* WB, invalidate */ #else -#error preprocessor flag CONFIG_DCACHE_... not recognized! +#error preprocessor flag CONFIG_CACHE_... not recognized! #endif #define OCCR1_INIT_VAL OCCR1_NOLOCK /* No locking */ @@ -108,8 +94,8 @@ empty_zero_page: .section .data, "aw" .balign PAGE_SIZE - .global swapper_pg_dir -swapper_pg_dir: + .global mmu_pdtp_cache +mmu_pdtp_cache: .space PAGE_SIZE, 0 .global empty_bad_page @@ -368,5 +354,3 @@ hopeless: * (r32) _start_kernel address */ blink tr7, ZERO - - diff --git a/arch/sh/kernel/init_task.c b/arch/sh/kernel/init_task.c index 4b449c4a6bad..f9bcc606127e 100644 --- a/arch/sh/kernel/init_task.c +++ b/arch/sh/kernel/init_task.c @@ -11,8 +11,8 @@ static struct fs_struct init_fs = INIT_FS; static struct files_struct init_files = INIT_FILES; static struct signal_struct init_signals = INIT_SIGNALS(init_signals); static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); +struct pt_regs fake_swapper_regs; struct mm_struct init_mm = INIT_MM(init_mm); - EXPORT_SYMBOL(init_mm); /* @@ -22,7 +22,7 @@ EXPORT_SYMBOL(init_mm); * way process stacks are handled. This is done by having a special * "init_task" linker map entry.. */ -union thread_union init_thread_union +union thread_union init_thread_union __attribute__((__section__(".data.init_task"))) = { INIT_THREAD_INFO(init_task) }; diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c index 501fe03e3715..71c9fde2fd90 100644 --- a/arch/sh/kernel/io.c +++ b/arch/sh/kernel/io.c @@ -61,73 +61,6 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count) } EXPORT_SYMBOL(memset_io); -void __raw_readsl(unsigned long addr, void *datap, int len) -{ - u32 *data; - - for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--) - *data++ = ctrl_inl(addr); - - if (likely(len >= (0x20 >> 2))) { - int tmp2, tmp3, tmp4, tmp5, tmp6; - - __asm__ __volatile__( - "1: \n\t" - "mov.l @%7, r0 \n\t" - "mov.l @%7, %2 \n\t" -#ifdef CONFIG_CPU_SH4 - "movca.l r0, @%0 \n\t" -#else - "mov.l r0, @%0 \n\t" -#endif - "mov.l @%7, %3 \n\t" - "mov.l @%7, %4 \n\t" - "mov.l @%7, %5 \n\t" - "mov.l @%7, %6 \n\t" - "mov.l @%7, r7 \n\t" - "mov.l @%7, r0 \n\t" - "mov.l %2, @(0x04,%0) \n\t" - "mov #0x20>>2, %2 \n\t" - "mov.l %3, @(0x08,%0) \n\t" - "sub %2, %1 \n\t" - "mov.l %4, @(0x0c,%0) \n\t" - "cmp/hi %1, %2 ! T if 32 > len \n\t" - "mov.l %5, @(0x10,%0) \n\t" - "mov.l %6, @(0x14,%0) \n\t" - "mov.l r7, @(0x18,%0) \n\t" - "mov.l r0, @(0x1c,%0) \n\t" - "bf.s 1b \n\t" - " add #0x20, %0 \n\t" - : "=&r" (data), "=&r" (len), - "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4), - "=&r" (tmp5), "=&r" (tmp6) - : "r"(addr), "0" (data), "1" (len) - : "r0", "r7", "t", "memory"); - } - - for (; len != 0; len--) - *data++ = ctrl_inl(addr); -} -EXPORT_SYMBOL(__raw_readsl); - -void __raw_writesl(unsigned long addr, const void *data, int len) -{ - if (likely(len != 0)) { - int tmp1; - - __asm__ __volatile__ ( - "1: \n\t" - "mov.l @%0+, %1 \n\t" - "dt %3 \n\t" - "bf.s 1b \n\t" - " mov.l %1, @%4 \n\t" - : "=&r" (data), "=&r" (tmp1) - : "0" (data), "r" (len), "r"(addr) - : "t", "memory"); - } -} -EXPORT_SYMBOL(__raw_writesl); - void __iomem *ioport_map(unsigned long port, unsigned int nr) { return sh_mv.mv_ioport_map(port, nr); diff --git a/arch/sh/kernel/module.c b/arch/sh/kernel/module.c index 142a4e5b7ebc..b3d0a03b4c76 100644 --- a/arch/sh/kernel/module.c +++ b/arch/sh/kernel/module.c @@ -1,5 +1,15 @@ /* Kernel module help for SH. + SHcompact version by Kaz Kojima and Paul Mundt. + + SHmedia bits: + + Copyright 2004 SuperH (UK) Ltd + Author: Richard Curnow + + Based on the sh version, and on code from the sh64-specific parts of + modutils, originally written by Richard Curnow and Ben Gaster. + This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or @@ -21,12 +31,6 @@ #include <linux/string.h> #include <linux/kernel.h> -#if 0 -#define DEBUGP printk -#else -#define DEBUGP(fmt...) -#endif - void *module_alloc(unsigned long size) { if (size == 0) @@ -52,6 +56,7 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, return 0; } +#ifdef CONFIG_SUPERH32 #define COPY_UNALIGNED_WORD(sw, tw, align) \ { \ void *__s = &(sw), *__t = &(tw); \ @@ -74,6 +79,10 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, break; \ } \ } +#else +/* One thing SHmedia doesn't screw up! */ +#define COPY_UNALIGNED_WORD(sw, tw, align) { (tw) = (sw); } +#endif int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab, @@ -89,8 +98,8 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, uint32_t value; int align; - DEBUGP("Applying relocate section %u to %u\n", relsec, - sechdrs[relsec].sh_info); + pr_debug("Applying relocate section %u to %u\n", relsec, + sechdrs[relsec].sh_info); for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { /* This is where to make the change */ location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr @@ -102,17 +111,44 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, relocation = sym->st_value + rel[i].r_addend; align = (int)location & 3; +#ifdef CONFIG_SUPERH64 + /* For text addresses, bit2 of the st_other field indicates + * whether the symbol is SHmedia (1) or SHcompact (0). If + * SHmedia, the LSB of the symbol needs to be asserted + * for the CPU to be in SHmedia mode when it starts executing + * the branch target. */ + relocation |= (sym->st_other & 4); +#endif + switch (ELF32_R_TYPE(rel[i].r_info)) { case R_SH_DIR32: - COPY_UNALIGNED_WORD (*location, value, align); + COPY_UNALIGNED_WORD (*location, value, align); value += relocation; - COPY_UNALIGNED_WORD (value, *location, align); + COPY_UNALIGNED_WORD (value, *location, align); break; case R_SH_REL32: - relocation = (relocation - (Elf32_Addr) location); - COPY_UNALIGNED_WORD (*location, value, align); + relocation = (relocation - (Elf32_Addr) location); + COPY_UNALIGNED_WORD (*location, value, align); value += relocation; - COPY_UNALIGNED_WORD (value, *location, align); + COPY_UNALIGNED_WORD (value, *location, align); + break; + case R_SH_IMM_LOW16: + *location = (*location & ~0x3fffc00) | + ((relocation & 0xffff) << 10); + break; + case R_SH_IMM_MEDLOW16: + *location = (*location & ~0x3fffc00) | + (((relocation >> 16) & 0xffff) << 10); + break; + case R_SH_IMM_LOW16_PCREL: + relocation -= (Elf32_Addr) location; + *location = (*location & ~0x3fffc00) | + ((relocation & 0xffff) << 10); + break; + case R_SH_IMM_MEDLOW16_PCREL: + relocation -= (Elf32_Addr) location; + *location = (*location & ~0x3fffc00) | + (((relocation >> 16) & 0xffff) << 10); break; default: printk(KERN_ERR "module %s: Unknown relocation: %u\n", diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process_32.c index 6d7f2b07e491..9ab1926b9d10 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process_32.c @@ -230,34 +230,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu) return fpvalid; } -/* - * Capture the user space registers if the task is not running (in user space) - */ -int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs) -{ - struct pt_regs ptregs; - - ptregs = *task_pt_regs(tsk); - elf_core_copy_regs(regs, &ptregs); - - return 1; -} - -int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpu) -{ - int fpvalid = 0; - -#if defined(CONFIG_SH_FPU) - fpvalid = !!tsk_used_math(tsk); - if (fpvalid) { - unlazy_fpu(tsk, task_pt_regs(tsk)); - memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu)); - } -#endif - - return fpvalid; -} - asmlinkage void ret_from_fork(void); int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, @@ -350,25 +322,6 @@ struct task_struct *__switch_to(struct task_struct *prev, unlazy_fpu(prev, task_pt_regs(prev)); #endif -#if defined(CONFIG_GUSA) && defined(CONFIG_PREEMPT) - { - struct pt_regs *regs; - - preempt_disable(); - regs = task_pt_regs(prev); - if (user_mode(regs) && regs->regs[15] >= 0xc0000000) { - int offset = (int)regs->regs[15]; - - /* Reset stack pointer: clear critical region mark */ - regs->regs[15] = regs->regs[1]; - if (regs->pc < regs->regs[0]) - /* Go to rewind point */ - regs->pc = regs->regs[0] + offset; - } - preempt_enable_no_resched(); - } -#endif - #ifdef CONFIG_MMU /* * Restore the kernel mode register @@ -510,49 +463,3 @@ asmlinkage void break_point_trap(void) force_sig(SIGTRAP, current); } - -/* - * Generic trap handler. - */ -asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs) -{ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); - - /* Rewind */ - regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); - - if (notify_die(DIE_TRAP, "debug trap", regs, 0, regs->tra & 0xff, - SIGTRAP) == NOTIFY_STOP) - return; - - force_sig(SIGTRAP, current); -} - -/* - * Special handler for BUG() traps. - */ -asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs) -{ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); - - /* Rewind */ - regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); - - if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff, - SIGTRAP) == NOTIFY_STOP) - return; - -#ifdef CONFIG_BUG - if (__kernel_text_address(instruction_pointer(regs))) { - u16 insn = *(u16 *)instruction_pointer(regs); - if (insn == TRAPA_BUG_OPCODE) - handle_BUG(regs); - } -#endif - - force_sig(SIGTRAP, current); -} diff --git a/arch/sh64/kernel/process.c b/arch/sh/kernel/process_64.c index 0761af4d2a42..cff3b7dc9c56 100644 --- a/arch/sh64/kernel/process.c +++ b/arch/sh/kernel/process_64.c @@ -1,12 +1,10 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. + * arch/sh/kernel/process_64.c * - * arch/sh64/kernel/process.c + * This file handles the architecture-dependent parts of process handling.. * * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2003 - 2007 Paul Mundt * Copyright (C) 2003, 2004 Richard Curnow * * Started from SH3/4 version: @@ -15,10 +13,9 @@ * In turn started from i386 version: * Copyright (C) 1995 Linus Torvalds * - */ - -/* - * This file handles the architecture-dependent parts of process handling.. + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ #include <linux/mm.h> #include <linux/fs.h> @@ -27,8 +24,10 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/proc_fs.h> +#include <linux/io.h> #include <asm/uaccess.h> #include <asm/pgtable.h> +#include <asm/mmu_context.h> struct task_struct *last_task_used_math = NULL; @@ -106,9 +105,20 @@ void machine_halt(void) void machine_power_off(void) { - extern void enter_deep_standby(void); +#if 0 + /* Disable watchdog timer */ + ctrl_outl(0xa5000000, WTCSR); + /* Configure deep standby on sleep */ + ctrl_outl(0x03, STBCR); +#endif + + __asm__ __volatile__ ( + "sleep\n\t" + "synci\n\t" + "nop;nop;nop;nop\n\t" + ); - enter_deep_standby(); + panic("Unexpected wakeup!\n"); } void (*pm_power_off)(void) = machine_power_off; @@ -411,19 +421,22 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) */ void exit_thread(void) { - /* See arch/sparc/kernel/process.c for the precedent for doing this -- RPC. - - The SH-5 FPU save/restore approach relies on last_task_used_math - pointing to a live task_struct. When another task tries to use the - FPU for the 1st time, the FPUDIS trap handling (see - arch/sh64/kernel/fpu.c) will save the existing FPU state to the - FP regs field within last_task_used_math before re-loading the new - task's FPU state (or initialising it if the FPU has been used - before). So if last_task_used_math is stale, and its page has already been - re-allocated for another use, the consequences are rather grim. Unless we - null it here, there is no other path through which it would get safely - nulled. */ - + /* + * See arch/sparc/kernel/process.c for the precedent for doing + * this -- RPC. + * + * The SH-5 FPU save/restore approach relies on + * last_task_used_math pointing to a live task_struct. When + * another task tries to use the FPU for the 1st time, the FPUDIS + * trap handling (see arch/sh/kernel/cpu/sh5/fpu.c) will save the + * existing FPU state to the FP regs field within + * last_task_used_math before re-loading the new task's FPU state + * (or initialising it if the FPU has been used before). So if + * last_task_used_math is stale, and its page has already been + * re-allocated for another use, the consequences are rather + * grim. Unless we null it here, there is no other path through + * which it would get safely nulled. + */ #ifdef CONFIG_SH_FPU if (last_task_used_math == current) { last_task_used_math = NULL; @@ -469,9 +482,9 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu) fpvalid = !!tsk_used_math(tsk); if (fpvalid) { if (current == last_task_used_math) { - grab_fpu(); - fpsave(&tsk->thread.fpu.hard); - release_fpu(); + enable_fpu(); + save_fpu(tsk, regs); + disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } @@ -496,9 +509,9 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, #ifdef CONFIG_SH_FPU if(last_task_used_math == current) { - grab_fpu(); - fpsave(¤t->thread.fpu.hard); - release_fpu(); + enable_fpu(); + save_fpu(current, regs); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } @@ -665,17 +678,14 @@ asids_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void read_lock(&tasklist_lock); for_each_process(p) { int pid = p->pid; - struct mm_struct *mm; - if (!pid) continue; - mm = p->mm; - if (mm) { - unsigned long asid, context; - context = mm->context; - asid = (context & 0xff); - len += sprintf(buf+len, "%5d : %02lx\n", pid, asid); - } else { + + if (!pid) + continue; + if (p->mm) + len += sprintf(buf+len, "%5d : %02lx\n", pid, + asid_cache(smp_processor_id())); + else len += sprintf(buf+len, "%5d : (none)\n", pid); - } } read_unlock(&tasklist_lock); *eof = 1; diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace_32.c index ac725f0aeb72..ce0664a58b49 100644 --- a/arch/sh/kernel/ptrace.c +++ b/arch/sh/kernel/ptrace_32.c @@ -6,7 +6,7 @@ * edited by Linus Torvalds * * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka - * + * Audit support: Yuichi Nakamura <ynakam@hitachisoft.jp> */ #include <linux/kernel.h> #include <linux/sched.h> @@ -19,6 +19,7 @@ #include <linux/security.h> #include <linux/signal.h> #include <linux/io.h> +#include <linux/audit.h> #include <asm/uaccess.h> #include <asm/pgtable.h> #include <asm/system.h> @@ -248,15 +249,20 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) return ret; } -asmlinkage void do_syscall_trace(void) +asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit) { struct task_struct *tsk = current; + if (unlikely(current->audit_context) && entryexit) + audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]), + regs->regs[0]); + if (!test_thread_flag(TIF_SYSCALL_TRACE) && !test_thread_flag(TIF_SINGLESTEP)) - return; + goto out; if (!(tsk->ptrace & PT_PTRACED)) - return; + goto out; + /* the 0x80 provides a way for the tracing parent to distinguish between a syscall stop and SIGTRAP delivery */ ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) && @@ -271,4 +277,11 @@ asmlinkage void do_syscall_trace(void) send_sig(tsk->exit_code, tsk, 1); tsk->exit_code = 0; } + +out: + if (unlikely(current->audit_context) && !entryexit) + audit_syscall_entry(AUDIT_ARCH_SH, regs->regs[3], + regs->regs[4], regs->regs[5], + regs->regs[6], regs->regs[7]); + } diff --git a/arch/sh64/kernel/ptrace.c b/arch/sh/kernel/ptrace_64.c index 8a2d339cf760..f6fbdfa6876d 100644 --- a/arch/sh64/kernel/ptrace.c +++ b/arch/sh/kernel/ptrace_64.c @@ -1,12 +1,8 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/ptrace.c + * arch/sh/kernel/ptrace_64.c * * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2003 - 2007 Paul Mundt * * Started from SH3/4 version: * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka @@ -15,8 +11,10 @@ * By Ross Biro 1/23/92 * edited by Linus Torvalds * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/kernel.h> #include <linux/rwsem.h> #include <linux/sched.h> @@ -28,7 +26,7 @@ #include <linux/user.h> #include <linux/signal.h> #include <linux/syscalls.h> - +#include <linux/audit.h> #include <asm/io.h> #include <asm/uaccess.h> #include <asm/pgtable.h> @@ -74,9 +72,9 @@ get_fpu_long(struct task_struct *task, unsigned long addr) } if (last_task_used_math == task) { - grab_fpu(); - fpsave(&task->thread.fpu.hard); - release_fpu(); + enable_fpu(); + save_fpu(task, regs); + disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } @@ -110,9 +108,9 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data) fpinit(&task->thread.fpu.hard); set_stopped_child_used_math(task); } else if (last_task_used_math == task) { - grab_fpu(); - fpsave(&task->thread.fpu.hard); - release_fpu(); + enable_fpu(); + save_fpu(task, regs); + disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } @@ -253,7 +251,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) asmlinkage int sh64_ptrace(long request, long pid, long addr, long data) { - extern void poke_real_address_q(unsigned long long addr, unsigned long long data); #define WPC_DBRMODE 0x0d104008 static int first_call = 1; @@ -275,17 +272,23 @@ asmlinkage int sh64_ptrace(long request, long pid, long addr, long data) return sys_ptrace(request, pid, addr, data); } -asmlinkage void syscall_trace(void) +asmlinkage void syscall_trace(struct pt_regs *regs, int entryexit) { struct task_struct *tsk = current; - if (!test_thread_flag(TIF_SYSCALL_TRACE)) - return; + if (unlikely(current->audit_context) && entryexit) + audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]), + regs->regs[9]); + + if (!test_thread_flag(TIF_SYSCALL_TRACE) && + !test_thread_flag(TIF_SINGLESTEP)) + goto out; if (!(tsk->ptrace & PT_PTRACED)) - return; + goto out; + + ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) && + !test_thread_flag(TIF_SINGLESTEP) ? 0x80 : 0)); - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); /* * this isn't the same as continuing with a signal, but it will do * for normal use. strace only continues with a signal if the @@ -295,6 +298,12 @@ asmlinkage void syscall_trace(void) send_sig(tsk->exit_code, tsk, 1); tsk->exit_code = 0; } + +out: + if (unlikely(current->audit_context) && !entryexit) + audit_syscall_entry(AUDIT_ARCH_SH, regs->regs[1], + regs->regs[2], regs->regs[3], + regs->regs[4], regs->regs[5]); } /* Called with interrupts disabled */ diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 4156aac8c27d..855cdf9d85b1 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -26,6 +26,7 @@ #include <asm/uaccess.h> #include <asm/io.h> #include <asm/page.h> +#include <asm/elf.h> #include <asm/sections.h> #include <asm/irq.h> #include <asm/setup.h> @@ -78,12 +79,25 @@ EXPORT_SYMBOL(memory_start); unsigned long memory_end = 0; EXPORT_SYMBOL(memory_end); +int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; + static int __init early_parse_mem(char *p) { unsigned long size; - memory_start = (unsigned long)PAGE_OFFSET+__MEMORY_START; + memory_start = (unsigned long)__va(__MEMORY_START); size = memparse(p, &p); + + if (size > __MEMORY_SIZE) { + static char msg[] __initdata = KERN_ERR + "Using mem= to increase the size of kernel memory " + "is not allowed.\n" + " Recompile the kernel with the correct value for " + "CONFIG_MEMORY_SIZE.\n"; + printk(msg); + return 0; + } + memory_end = memory_start + size; return 0; @@ -243,7 +257,7 @@ void __init setup_arch(char **cmdline_p) data_resource.start = virt_to_phys(_etext); data_resource.end = virt_to_phys(_edata)-1; - memory_start = (unsigned long)PAGE_OFFSET+__MEMORY_START; + memory_start = (unsigned long)__va(__MEMORY_START); if (!memory_end) memory_end = memory_start + __MEMORY_SIZE; @@ -294,20 +308,23 @@ void __init setup_arch(char **cmdline_p) } static const char *cpu_name[] = { + [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", - [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", - [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", - [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", - [CPU_SH7760] = "SH7760", + [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729", + [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", + [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", + [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760", [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", - [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780", - [CPU_SH7781] = "SH7781", [CPU_SH7343] = "SH7343", - [CPU_SH7785] = "SH7785", [CPU_SH7722] = "SH7722", - [CPU_SHX3] = "SH-X3", [CPU_SH_NONE] = "Unknown" + [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", + [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", + [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", + [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", + [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", + [CPU_SH_NONE] = "Unknown" }; const char *get_cpu_subtype(struct sh_cpuinfo *c) @@ -410,7 +427,7 @@ static void *c_next(struct seq_file *m, void *v, loff_t *pos) static void c_stop(struct seq_file *m, void *v) { } -struct seq_operations cpuinfo_op = { +const struct seq_operations cpuinfo_op = { .start = c_start, .next = c_next, .stop = c_stop, diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms_32.c index e1a6de9088b5..e1a6de9088b5 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms_32.c diff --git a/arch/sh64/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms_64.c index b1705acc8e64..8004c38d3d37 100644 --- a/arch/sh64/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms_64.c @@ -1,14 +1,12 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/sh_ksyms.c + * arch/sh/kernel/sh_ksyms_64.c * * Copyright (C) 2000, 2001 Paolo Alberelli * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/rwsem.h> #include <linux/module.h> #include <linux/smp.h> @@ -18,7 +16,6 @@ #include <linux/in6.h> #include <linux/interrupt.h> #include <linux/screen_info.h> - #include <asm/semaphore.h> #include <asm/processor.h> #include <asm/uaccess.h> @@ -47,12 +44,8 @@ EXPORT_SYMBOL(__put_user_asm_l); EXPORT_SYMBOL(__get_user_asm_l); EXPORT_SYMBOL(__copy_user); EXPORT_SYMBOL(memcpy); -EXPORT_SYMBOL(udelay); EXPORT_SYMBOL(__udelay); -EXPORT_SYMBOL(ndelay); EXPORT_SYMBOL(__ndelay); -EXPORT_SYMBOL(flush_dcache_page); -EXPORT_SYMBOL(sh64_page_clear); /* Ugh. These come in from libgcc.a at link time. */ #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal_32.c index ca754fd42437..f6b5fbfe75c4 100644 --- a/arch/sh/kernel/signal.c +++ b/arch/sh/kernel/signal_32.c @@ -507,24 +507,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, ctrl_inw(regs->pc - 4)); break; } -#ifdef CONFIG_GUSA - } else { - /* gUSA handling */ - preempt_disable(); - - if (regs->regs[15] >= 0xc0000000) { - int offset = (int)regs->regs[15]; - - /* Reset stack pointer: clear critical region mark */ - regs->regs[15] = regs->regs[1]; - if (regs->pc < regs->regs[0]) - /* Go to rewind point #1 */ - regs->pc = regs->regs[0] + offset - - instruction_size(ctrl_inw(regs->pc-4)); - } - - preempt_enable_no_resched(); -#endif } /* Set up the stack frame */ diff --git a/arch/sh64/kernel/signal.c b/arch/sh/kernel/signal_64.c index 79fc48cf54c6..80bde19d445b 100644 --- a/arch/sh64/kernel/signal.c +++ b/arch/sh/kernel/signal_64.c @@ -1,16 +1,13 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/signal.c + * arch/sh/kernel/signal_64.c * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003 Paul Mundt * Copyright (C) 2004 Richard Curnow * - * Started from sh version. - * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ #include <linux/rwsem.h> #include <linux/sched.h> @@ -28,7 +25,7 @@ #include <asm/ucontext.h> #include <asm/uaccess.h> #include <asm/pgtable.h> - +#include <asm/cacheflush.h> #define REG_RET 9 #define REG_ARG1 2 @@ -211,9 +208,9 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc) return err; if (current == last_task_used_math) { - grab_fpu(); - fpsave(¤t->thread.fpu.hard); - release_fpu(); + enable_fpu(); + save_fpu(current, regs); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } @@ -227,10 +224,14 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc) #else static inline int restore_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc) -{} +{ + return 0; +} static inline int setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc) -{} +{ + return 0; +} #endif static int @@ -477,7 +478,7 @@ static void setup_frame(int sig, struct k_sigaction *ka, goto give_sigsegv; /* Cohere the trampoline with the I-cache. */ - flush_cache_sigtramp(DEREF_REG_PR-1, DEREF_REG_PR-1+16); + flush_cache_sigtramp(DEREF_REG_PR-1); } /* diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index d545a686a201..59cd2859ce9b 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c @@ -7,7 +7,6 @@ * * Taken from i386 version. */ - #include <linux/errno.h> #include <linux/sched.h> #include <linux/mm.h> @@ -27,28 +26,7 @@ #include <asm/uaccess.h> #include <asm/unistd.h> -/* - * sys_pipe() is the normal C calling standard for creating - * a pipe. It's not the way Unix traditionally does this, though. - */ -asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs) -{ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); - int fd[2]; - int error; - - error = do_pipe(fd); - if (!error) { - regs->regs[1] = fd[1]; - return fd[0]; - } - return error; -} - unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ - EXPORT_SYMBOL(shm_align_mask); #ifdef CONFIG_MMU @@ -140,7 +118,7 @@ full_search: #endif /* CONFIG_MMU */ static inline long -do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, +do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, int fd, unsigned long pgoff) { int error = -EBADF; @@ -195,12 +173,13 @@ asmlinkage int sys_ipc(uint call, int first, int second, if (call <= SEMCTL) switch (call) { case SEMOP: - return sys_semtimedop(first, (struct sembuf __user *)ptr, + return sys_semtimedop(first, + (struct sembuf __user *)ptr, second, NULL); case SEMTIMEDOP: - return sys_semtimedop(first, (struct sembuf __user *)ptr, - second, - (const struct timespec __user *)fifth); + return sys_semtimedop(first, + (struct sembuf __user *)ptr, second, + (const struct timespec __user *)fifth); case SEMGET: return sys_semget (first, second, third); case SEMCTL: { @@ -215,25 +194,28 @@ asmlinkage int sys_ipc(uint call, int first, int second, return -EINVAL; } - if (call <= MSGCTL) + if (call <= MSGCTL) switch (call) { case MSGSND: - return sys_msgsnd (first, (struct msgbuf __user *) ptr, + return sys_msgsnd (first, (struct msgbuf __user *) ptr, second, third); case MSGRCV: switch (version) { - case 0: { + case 0: + { struct ipc_kludge tmp; + if (!ptr) return -EINVAL; - + if (copy_from_user(&tmp, - (struct ipc_kludge __user *) ptr, + (struct ipc_kludge __user *) ptr, sizeof (tmp))) return -EFAULT; + return sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, third); - } + } default: return sys_msgrcv (first, (struct msgbuf __user *) ptr, @@ -247,7 +229,7 @@ asmlinkage int sys_ipc(uint call, int first, int second, default: return -EINVAL; } - if (call <= SHMCTL) + if (call <= SHMCTL) switch (call) { case SHMAT: switch (version) { @@ -265,7 +247,7 @@ asmlinkage int sys_ipc(uint call, int first, int second, return do_shmat (first, (char __user *) ptr, second, (ulong *) third); } - case SHMDT: + case SHMDT: return sys_shmdt ((char __user *)ptr); case SHMGET: return sys_shmget (first, second, third); @@ -275,7 +257,7 @@ asmlinkage int sys_ipc(uint call, int first, int second, default: return -EINVAL; } - + return -EINVAL; } @@ -289,49 +271,3 @@ asmlinkage int sys_uname(struct old_utsname * name) up_read(&uts_sem); return err?-EFAULT:0; } - -asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char * buf, - size_t count, long dummy, loff_t pos) -{ - return sys_pread64(fd, buf, count, pos); -} - -asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char * buf, - size_t count, long dummy, loff_t pos) -{ - return sys_pwrite64(fd, buf, count, pos); -} - -asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1, - u32 len0, u32 len1, int advice) -{ -#ifdef __LITTLE_ENDIAN__ - return sys_fadvise64_64(fd, (u64)offset1 << 32 | offset0, - (u64)len1 << 32 | len0, advice); -#else - return sys_fadvise64_64(fd, (u64)offset0 << 32 | offset1, - (u64)len0 << 32 | len1, advice); -#endif -} - -#if defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH2A) -#define SYSCALL_ARG3 "trapa #0x23" -#else -#define SYSCALL_ARG3 "trapa #0x13" -#endif - -/* - * Do a system call from kernel instead of calling sys_execve so we - * end up with proper pt_regs. - */ -int kernel_execve(const char *filename, char *const argv[], char *const envp[]) -{ - register long __sc0 __asm__ ("r3") = __NR_execve; - register long __sc4 __asm__ ("r4") = (long) filename; - register long __sc5 __asm__ ("r5") = (long) argv; - register long __sc6 __asm__ ("r6") = (long) envp; - __asm__ __volatile__ (SYSCALL_ARG3 : "=z" (__sc0) - : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6) - : "memory"); - return __sc0; -} diff --git a/arch/sh/kernel/sys_sh32.c b/arch/sh/kernel/sys_sh32.c new file mode 100644 index 000000000000..125e493ead82 --- /dev/null +++ b/arch/sh/kernel/sys_sh32.c @@ -0,0 +1,84 @@ +#include <linux/errno.h> +#include <linux/sched.h> +#include <linux/mm.h> +#include <linux/smp.h> +#include <linux/sem.h> +#include <linux/msg.h> +#include <linux/shm.h> +#include <linux/stat.h> +#include <linux/syscalls.h> +#include <linux/mman.h> +#include <linux/file.h> +#include <linux/utsname.h> +#include <linux/module.h> +#include <linux/fs.h> +#include <linux/ipc.h> +#include <asm/cacheflush.h> +#include <asm/uaccess.h> +#include <asm/unistd.h> + +/* + * sys_pipe() is the normal C calling standard for creating + * a pipe. It's not the way Unix traditionally does this, though. + */ +asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs) +{ + struct pt_regs *regs = RELOC_HIDE(&__regs, 0); + int fd[2]; + int error; + + error = do_pipe(fd); + if (!error) { + regs->regs[1] = fd[1]; + return fd[0]; + } + return error; +} + +asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char * buf, + size_t count, long dummy, loff_t pos) +{ + return sys_pread64(fd, buf, count, pos); +} + +asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char * buf, + size_t count, long dummy, loff_t pos) +{ + return sys_pwrite64(fd, buf, count, pos); +} + +asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1, + u32 len0, u32 len1, int advice) +{ +#ifdef __LITTLE_ENDIAN__ + return sys_fadvise64_64(fd, (u64)offset1 << 32 | offset0, + (u64)len1 << 32 | len0, advice); +#else + return sys_fadvise64_64(fd, (u64)offset0 << 32 | offset1, + (u64)len0 << 32 | len1, advice); +#endif +} + +#if defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH2A) +#define SYSCALL_ARG3 "trapa #0x23" +#else +#define SYSCALL_ARG3 "trapa #0x13" +#endif + +/* + * Do a system call from kernel instead of calling sys_execve so we + * end up with proper pt_regs. + */ +int kernel_execve(const char *filename, char *const argv[], char *const envp[]) +{ + register long __sc0 __asm__ ("r3") = __NR_execve; + register long __sc4 __asm__ ("r4") = (long) filename; + register long __sc5 __asm__ ("r5") = (long) argv; + register long __sc6 __asm__ ("r6") = (long) envp; + __asm__ __volatile__ (SYSCALL_ARG3 : "=z" (__sc0) + : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6) + : "memory"); + return __sc0; +} diff --git a/arch/sh/kernel/sys_sh64.c b/arch/sh/kernel/sys_sh64.c new file mode 100644 index 000000000000..578004d71e02 --- /dev/null +++ b/arch/sh/kernel/sys_sh64.c @@ -0,0 +1,66 @@ +/* + * arch/sh/kernel/sys_sh64.c + * + * Copyright (C) 2000, 2001 Paolo Alberelli + * + * This file contains various random system calls that + * have a non-standard calling sequence on the Linux/SH5 + * platform. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/errno.h> +#include <linux/rwsem.h> +#include <linux/sched.h> +#include <linux/mm.h> +#include <linux/fs.h> +#include <linux/smp.h> +#include <linux/sem.h> +#include <linux/msg.h> +#include <linux/shm.h> +#include <linux/stat.h> +#include <linux/mman.h> +#include <linux/file.h> +#include <linux/utsname.h> +#include <linux/syscalls.h> +#include <linux/ipc.h> +#include <asm/uaccess.h> +#include <asm/ptrace.h> +#include <asm/unistd.h> + +/* + * sys_pipe() is the normal C calling standard for creating + * a pipe. It's not the way Unix traditionally does this, though. + */ +asmlinkage int sys_pipe(unsigned long * fildes) +{ + int fd[2]; + int error; + + error = do_pipe(fd); + if (!error) { + if (copy_to_user(fildes, fd, 2*sizeof(int))) + error = -EFAULT; + } + return error; +} + +/* + * Do a system call from kernel instead of calling sys_execve so we + * end up with proper pt_regs. + */ +int kernel_execve(const char *filename, char *const argv[], char *const envp[]) +{ + register unsigned long __sc0 __asm__ ("r9") = ((0x13 << 16) | __NR_execve); + register unsigned long __sc2 __asm__ ("r2") = (unsigned long) filename; + register unsigned long __sc3 __asm__ ("r3") = (unsigned long) argv; + register unsigned long __sc4 __asm__ ("r4") = (unsigned long) envp; + __asm__ __volatile__ ("trapa %1 !\t\t\t execve(%2,%3,%4)" + : "=r" (__sc0) + : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) ); + __asm__ __volatile__ ("!dummy %0 %1 %2 %3" + : : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) : "memory"); + return __sc0; +} diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls_32.S index 10bec45415ba..10bec45415ba 100644 --- a/arch/sh/kernel/syscalls.S +++ b/arch/sh/kernel/syscalls_32.S diff --git a/arch/sh64/kernel/syscalls.S b/arch/sh/kernel/syscalls_64.S index abb94c05d07a..98a93efe3691 100644 --- a/arch/sh64/kernel/syscalls.S +++ b/arch/sh/kernel/syscalls_64.S @@ -1,5 +1,5 @@ /* - * arch/sh64/kernel/syscalls.S + * arch/sh/kernel/syscalls_64.S * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2004 - 2007 Paul Mundt diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time_32.c index 2bc04bfee738..2bc04bfee738 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time_32.c diff --git a/arch/sh64/kernel/time.c b/arch/sh/kernel/time_64.c index 06f3c179e345..f819ba38a6ce 100644 --- a/arch/sh64/kernel/time.c +++ b/arch/sh/kernel/time_64.c @@ -1,20 +1,19 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/time.c + * arch/sh/kernel/time_64.c * * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt + * Copyright (C) 2003 - 2007 Paul Mundt * Copyright (C) 2003 Richard Curnow * * Original TMU/RTC code taken from sh version. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka * Some code taken from i386 version. * Copyright (C) 1991, 1992, 1995 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/errno.h> #include <linux/rwsem.h> #include <linux/sched.h> @@ -30,37 +29,27 @@ #include <linux/smp.h> #include <linux/module.h> #include <linux/bcd.h> - -#include <asm/registers.h> /* required by inline __asm__ stmt. */ - +#include <linux/timex.h> +#include <linux/irq.h> +#include <linux/io.h> +#include <linux/platform_device.h> +#include <asm/cpu/registers.h> /* required by inline __asm__ stmt. */ +#include <asm/cpu/irq.h> +#include <asm/addrspace.h> #include <asm/processor.h> #include <asm/uaccess.h> -#include <asm/io.h> -#include <asm/irq.h> #include <asm/delay.h> -#include <linux/timex.h> -#include <linux/irq.h> -#include <asm/hardware.h> - #define TMU_TOCR_INIT 0x00 #define TMU0_TCR_INIT 0x0020 #define TMU_TSTR_INIT 1 #define TMU_TSTR_OFF 0 -/* RCR1 Bits */ -#define RCR1_CF 0x80 /* Carry Flag */ -#define RCR1_CIE 0x10 /* Carry Interrupt Enable */ -#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ -#define RCR1_AF 0x01 /* Alarm Flag */ - -/* RCR2 Bits */ -#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ -#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ -#define RCR2_RTCEN 0x08 /* ENable RTC */ -#define RCR2_ADJ 0x04 /* ADJustment (30-second) */ -#define RCR2_RESET 0x02 /* Reset bit */ -#define RCR2_START 0x01 /* Start bit */ +/* Real Time Clock */ +#define RTC_BLOCK_OFF 0x01040000 +#define RTC_BASE PHYS_PERIPHERAL_BLOCK + RTC_BLOCK_OFF +#define RTC_RCR1_CIE 0x10 /* Carry Interrupt Enable */ +#define RTC_RCR1 (rtc_base + 0x38) /* Clock, Power and Reset Controller */ #define CPRC_BLOCK_OFF 0x01010000 @@ -84,27 +73,6 @@ #define TMU0_TCNT TMU0_BASE+0x4 /* Long access */ #define TMU0_TCR TMU0_BASE+0x8 /* Word access */ -/* Real Time Clock */ -#define RTC_BLOCK_OFF 0x01040000 -#define RTC_BASE PHYS_PERIPHERAL_BLOCK + RTC_BLOCK_OFF - -#define R64CNT rtc_base+0x00 -#define RSECCNT rtc_base+0x04 -#define RMINCNT rtc_base+0x08 -#define RHRCNT rtc_base+0x0c -#define RWKCNT rtc_base+0x10 -#define RDAYCNT rtc_base+0x14 -#define RMONCNT rtc_base+0x18 -#define RYRCNT rtc_base+0x1c /* 16bit */ -#define RSECAR rtc_base+0x20 -#define RMINAR rtc_base+0x24 -#define RHRAR rtc_base+0x28 -#define RWKAR rtc_base+0x2c -#define RDAYAR rtc_base+0x30 -#define RMONAR rtc_base+0x34 -#define RCR1 rtc_base+0x38 -#define RCR2 rtc_base+0x3c - #define TICK_SIZE (tick_nsec / 1000) static unsigned long tmu_base, rtc_base; @@ -236,47 +204,23 @@ int do_settimeofday(struct timespec *tv) } EXPORT_SYMBOL(do_settimeofday); -static int set_rtc_time(unsigned long nowtime) +/* Dummy RTC ops */ +static void null_rtc_get_time(struct timespec *tv) { - int retval = 0; - int real_seconds, real_minutes, cmos_minutes; - - ctrl_outb(RCR2_RESET, RCR2); /* Reset pre-scaler & stop RTC */ - - cmos_minutes = ctrl_inb(RMINCNT); - BCD_TO_BIN(cmos_minutes); - - /* - * since we're only adjusting minutes and seconds, - * don't interfere with hour overflow. This avoids - * messing with unknown time zones but requires your - * RTC not to be off by more than 15 minutes - */ - real_seconds = nowtime % 60; - real_minutes = nowtime / 60; - if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) - real_minutes += 30; /* correct for half hour time zone */ - real_minutes %= 60; - - if (abs(real_minutes - cmos_minutes) < 30) { - BIN_TO_BCD(real_seconds); - BIN_TO_BCD(real_minutes); - ctrl_outb(real_seconds, RSECCNT); - ctrl_outb(real_minutes, RMINCNT); - } else { - printk(KERN_WARNING - "set_rtc_time: can't update from %d to %d\n", - cmos_minutes, real_minutes); - retval = -1; - } - - ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start RTC */ + tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0); + tv->tv_nsec = 0; +} - return retval; +static int null_rtc_set_time(const time_t secs) +{ + return 0; } +void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time; +int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time; + /* last time the RTC clock got updated */ -static long last_rtc_update = 0; +static long last_rtc_update; /* * timer_interrupt() needs to keep up the real-time clock, @@ -296,11 +240,8 @@ static inline void do_timer_interrupt(void) profile_tick(CPU_PROFILING); #ifdef CONFIG_HEARTBEAT - { - extern void heartbeat(void); - - heartbeat(); - } + if (sh_mv.mv_heartbeat != NULL) + sh_mv.mv_heartbeat(); #endif /* @@ -312,10 +253,11 @@ static inline void do_timer_interrupt(void) xtime.tv_sec > last_rtc_update + 660 && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { - if (set_rtc_time(xtime.tv_sec) == 0) + if (rtc_sh_set_time(xtime.tv_sec) == 0) last_rtc_update = xtime.tv_sec; else - last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ + /* do it again in 60 s */ + last_rtc_update = xtime.tv_sec - 600; } } @@ -347,50 +289,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static unsigned long get_rtc_time(void) -{ - unsigned int sec, min, hr, wk, day, mon, yr, yr100; - - again: - do { - ctrl_outb(0, RCR1); /* Clear CF-bit */ - sec = ctrl_inb(RSECCNT); - min = ctrl_inb(RMINCNT); - hr = ctrl_inb(RHRCNT); - wk = ctrl_inb(RWKCNT); - day = ctrl_inb(RDAYCNT); - mon = ctrl_inb(RMONCNT); - yr = ctrl_inw(RYRCNT); - yr100 = (yr >> 8); - yr &= 0xff; - } while ((ctrl_inb(RCR1) & RCR1_CF) != 0); - - BCD_TO_BIN(yr100); - BCD_TO_BIN(yr); - BCD_TO_BIN(mon); - BCD_TO_BIN(day); - BCD_TO_BIN(hr); - BCD_TO_BIN(min); - BCD_TO_BIN(sec); - - if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 || - hr > 23 || min > 59 || sec > 59) { - printk(KERN_ERR - "SH RTC: invalid value, resetting to 1 Jan 2000\n"); - ctrl_outb(RCR2_RESET, RCR2); /* Reset & Stop */ - ctrl_outb(0, RSECCNT); - ctrl_outb(0, RMINCNT); - ctrl_outb(0, RHRCNT); - ctrl_outb(6, RWKCNT); - ctrl_outb(1, RDAYCNT); - ctrl_outb(1, RMONCNT); - ctrl_outw(0x2000, RYRCNT); - ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start */ - goto again; - } - - return mktime(yr100 * 100 + yr, mon, day, hr, min, sec); -} static __init unsigned int get_cpu_hz(void) { @@ -406,8 +304,8 @@ static __init unsigned int get_cpu_hz(void) register unsigned long long __rtc_irq_flag __asm__ ("r3"); local_irq_enable(); - do {} while (ctrl_inb(R64CNT) != 0); - ctrl_outb(RCR1_CIE, RCR1); /* Enable carry interrupt */ + do {} while (ctrl_inb(rtc_base) != 0); + ctrl_outb(RTC_RCR1_CIE, RTC_RCR1); /* Enable carry interrupt */ /* * r3 is arbitrary. CDC does not support "=z". @@ -449,28 +347,19 @@ static __init unsigned int get_cpu_hz(void) count = ctc_val_init - ctc_val; /* CTC counts down */ -#if defined (CONFIG_SH_SIMULATOR) - /* - * Let's pretend we are a 5MHz SH-5 to avoid a too - * little timer interval. Also to keep delay - * calibration within a reasonable time. - */ - return 5000000; -#else /* * This really is count by the number of clock cycles * by the ratio between a complete R64CNT * wrap-around (128) and CUI interrupt being raised (64). */ return count*2; -#endif } static irqreturn_t sh64_rtc_interrupt(int irq, void *dev_id) { struct pt_regs *regs = get_irq_regs(); - ctrl_outb(0, RCR1); /* Disable Carry Interrupts */ + ctrl_outb(0, RTC_RCR1); /* Disable Carry Interrupts */ regs->regs[3] = 1; /* Using r3 */ return IRQ_HANDLED; @@ -513,8 +402,7 @@ void __init time_init(void) panic("Unable to remap CPRC\n"); } - xtime.tv_sec = get_rtc_time(); - xtime.tv_nsec = 0; + rtc_sh_get_time(&xtime); setup_irq(TIMER_IRQ, &irq0); setup_irq(RTC_IRQ, &irq1); @@ -525,7 +413,7 @@ void __init time_init(void) /* Note careful order of operations to maintain reasonable precision and avoid overflow. */ scaled_recip_ctc_ticks_per_jiffy = ((1ULL << CTC_JIFFY_SCALE_SHIFT) / (unsigned long long)(cpu_clock / HZ)); - disable_irq(RTC_IRQ); + free_irq(RTC_IRQ, NULL); printk("CPU clock: %d.%02dMHz\n", (cpu_clock / 1000000), (cpu_clock % 1000000)/10000); @@ -591,3 +479,41 @@ void enter_deep_standby(void) asm __volatile__ ("nop"); panic("Unexpected wakeup!\n"); } + +static struct resource rtc_resources[] = { + [0] = { + /* RTC base, filled in by rtc_init */ + .flags = IORESOURCE_IO, + }, + [1] = { + /* Period IRQ */ + .start = IRQ_PRI, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* Carry IRQ */ + .start = IRQ_CUI, + .flags = IORESOURCE_IRQ, + }, + [3] = { + /* Alarm IRQ */ + .start = IRQ_ATI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device rtc_device = { + .name = "sh-rtc", + .id = -1, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; + +static int __init rtc_init(void) +{ + rtc_resources[0].start = rtc_base; + rtc_resources[0].end = rtc_resources[0].start + 0x58 - 1; + + return platform_device_register(&rtc_device); +} +device_initcall(rtc_init); diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c index 82de6895ade5..499e07beebe2 100644 --- a/arch/sh/kernel/timers/timer-cmt.c +++ b/arch/sh/kernel/timers/timer-cmt.c @@ -31,7 +31,9 @@ #define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0) #define CMT_CMCSR_INIT 0x0040 #define CMT_CMCSR_CALIB 0x0000 -#elif defined(CONFIG_CPU_SUBTYPE_SH7206) +#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ + defined(CONFIG_CPU_SUBTYPE_SH7206) || \ + defined(CONFIG_CPU_SUBTYPE_SH7263) #define CMT_CMSTR 0xfffec000 #define CMT_CMCSR_0 0xfffec002 #define CMT_CMCNT_0 0xfffec004 diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c index 628ec9a15e38..8935570008d2 100644 --- a/arch/sh/kernel/timers/timer-tmu.c +++ b/arch/sh/kernel/timers/timer-tmu.c @@ -174,6 +174,7 @@ static int tmu_timer_init(void) tmu_timer_stop(); #if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7721) && \ !defined(CONFIG_CPU_SUBTYPE_SH7760) && \ !defined(CONFIG_CPU_SUBTYPE_SH7785) && \ !defined(CONFIG_CPU_SUBTYPE_SHX3) diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index cf99111cb33f..a3bdc68ef02c 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c @@ -1,947 +1,68 @@ -/* - * 'traps.c' handles hardware traps and faults after we have saved some - * state in 'entry.S'. - * - * SuperH version: Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2000 Philipp Rumpf - * Copyright (C) 2000 David Howells - * Copyright (C) 2002 - 2007 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/kernel.h> -#include <linux/ptrace.h> -#include <linux/init.h> -#include <linux/spinlock.h> -#include <linux/module.h> -#include <linux/kallsyms.h> -#include <linux/io.h> #include <linux/bug.h> -#include <linux/debug_locks.h> +#include <linux/io.h> +#include <linux/types.h> #include <linux/kdebug.h> -#include <linux/kexec.h> -#include <linux/limits.h> +#include <linux/signal.h> +#include <linux/sched.h> #include <asm/system.h> -#include <asm/uaccess.h> - -#ifdef CONFIG_SH_KGDB -#include <asm/kgdb.h> -#define CHK_REMOTE_DEBUG(regs) \ -{ \ - if (kgdb_debug_hook && !user_mode(regs))\ - (*kgdb_debug_hook)(regs); \ -} -#else -#define CHK_REMOTE_DEBUG(regs) -#endif - -#ifdef CONFIG_CPU_SH2 -# define TRAP_RESERVED_INST 4 -# define TRAP_ILLEGAL_SLOT_INST 6 -# define TRAP_ADDRESS_ERROR 9 -# ifdef CONFIG_CPU_SH2A -# define TRAP_DIVZERO_ERROR 17 -# define TRAP_DIVOVF_ERROR 18 -# endif -#else -#define TRAP_RESERVED_INST 12 -#define TRAP_ILLEGAL_SLOT_INST 13 -#endif - -static void dump_mem(const char *str, unsigned long bottom, unsigned long top) -{ - unsigned long p; - int i; - - printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top); - - for (p = bottom & ~31; p < top; ) { - printk("%04lx: ", p & 0xffff); - - for (i = 0; i < 8; i++, p += 4) { - unsigned int val; - - if (p < bottom || p >= top) - printk(" "); - else { - if (__get_user(val, (unsigned int __user *)p)) { - printk("\n"); - return; - } - printk("%08x ", val); - } - } - printk("\n"); - } -} - -static DEFINE_SPINLOCK(die_lock); - -void die(const char * str, struct pt_regs * regs, long err) -{ - static int die_counter; - - oops_enter(); - - console_verbose(); - spin_lock_irq(&die_lock); - bust_spinlocks(1); - - printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); - - CHK_REMOTE_DEBUG(regs); - print_modules(); - show_regs(regs); - - printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm, - task_pid_nr(current), task_stack_page(current) + 1); - - if (!user_mode(regs) || in_interrupt()) - dump_mem("Stack: ", regs->regs[15], THREAD_SIZE + - (unsigned long)task_stack_page(current)); - - bust_spinlocks(0); - add_taint(TAINT_DIE); - spin_unlock_irq(&die_lock); - - if (kexec_should_crash(current)) - crash_kexec(regs); - - if (in_interrupt()) - panic("Fatal exception in interrupt"); - - if (panic_on_oops) - panic("Fatal exception"); - - oops_exit(); - do_exit(SIGSEGV); -} - -static inline void die_if_kernel(const char *str, struct pt_regs *regs, - long err) -{ - if (!user_mode(regs)) - die(str, regs, err); -} - -/* - * try and fix up kernelspace address errors - * - userspace errors just cause EFAULT to be returned, resulting in SEGV - * - kernel/userspace interfaces cause a jump to an appropriate handler - * - other kernel errors are bad - * - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault - */ -static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err) -{ - if (!user_mode(regs)) { - const struct exception_table_entry *fixup; - fixup = search_exception_tables(regs->pc); - if (fixup) { - regs->pc = fixup->fixup; - return 0; - } - die(str, regs, err); - } - return -EFAULT; -} - -/* - * handle an instruction that does an unaligned memory access by emulating the - * desired behaviour - * - note that PC _may not_ point to the faulting instruction - * (if that instruction is in a branch delay slot) - * - return 0 if emulation okay, -EFAULT on existential error - */ -static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) -{ - int ret, index, count; - unsigned long *rm, *rn; - unsigned char *src, *dst; - - index = (instruction>>8)&15; /* 0x0F00 */ - rn = ®s->regs[index]; - - index = (instruction>>4)&15; /* 0x00F0 */ - rm = ®s->regs[index]; - - count = 1<<(instruction&3); - - ret = -EFAULT; - switch (instruction>>12) { - case 0: /* mov.[bwl] to/from memory via r0+rn */ - if (instruction & 8) { - /* from memory */ - src = (unsigned char*) *rm; - src += regs->regs[0]; - dst = (unsigned char*) rn; - *(unsigned long*)dst = 0; - -#ifdef __LITTLE_ENDIAN__ - if (copy_from_user(dst, src, count)) - goto fetch_fault; - - if ((count == 2) && dst[1] & 0x80) { - dst[2] = 0xff; - dst[3] = 0xff; - } -#else - dst += 4-count; - - if (__copy_user(dst, src, count)) - goto fetch_fault; - - if ((count == 2) && dst[2] & 0x80) { - dst[0] = 0xff; - dst[1] = 0xff; - } -#endif - } else { - /* to memory */ - src = (unsigned char*) rm; -#if !defined(__LITTLE_ENDIAN__) - src += 4-count; -#endif - dst = (unsigned char*) *rn; - dst += regs->regs[0]; - - if (copy_to_user(dst, src, count)) - goto fetch_fault; - } - ret = 0; - break; - - case 1: /* mov.l Rm,@(disp,Rn) */ - src = (unsigned char*) rm; - dst = (unsigned char*) *rn; - dst += (instruction&0x000F)<<2; - - if (copy_to_user(dst,src,4)) - goto fetch_fault; - ret = 0; - break; - - case 2: /* mov.[bwl] to memory, possibly with pre-decrement */ - if (instruction & 4) - *rn -= count; - src = (unsigned char*) rm; - dst = (unsigned char*) *rn; -#if !defined(__LITTLE_ENDIAN__) - src += 4-count; -#endif - if (copy_to_user(dst, src, count)) - goto fetch_fault; - ret = 0; - break; - - case 5: /* mov.l @(disp,Rm),Rn */ - src = (unsigned char*) *rm; - src += (instruction&0x000F)<<2; - dst = (unsigned char*) rn; - *(unsigned long*)dst = 0; - - if (copy_from_user(dst,src,4)) - goto fetch_fault; - ret = 0; - break; - case 6: /* mov.[bwl] from memory, possibly with post-increment */ - src = (unsigned char*) *rm; - if (instruction & 4) - *rm += count; - dst = (unsigned char*) rn; - *(unsigned long*)dst = 0; - -#ifdef __LITTLE_ENDIAN__ - if (copy_from_user(dst, src, count)) - goto fetch_fault; - - if ((count == 2) && dst[1] & 0x80) { - dst[2] = 0xff; - dst[3] = 0xff; - } -#else - dst += 4-count; - - if (copy_from_user(dst, src, count)) - goto fetch_fault; - - if ((count == 2) && dst[2] & 0x80) { - dst[0] = 0xff; - dst[1] = 0xff; - } -#endif - ret = 0; - break; - - case 8: - switch ((instruction&0xFF00)>>8) { - case 0x81: /* mov.w R0,@(disp,Rn) */ - src = (unsigned char*) ®s->regs[0]; -#if !defined(__LITTLE_ENDIAN__) - src += 2; -#endif - dst = (unsigned char*) *rm; /* called Rn in the spec */ - dst += (instruction&0x000F)<<1; - - if (copy_to_user(dst, src, 2)) - goto fetch_fault; - ret = 0; - break; - - case 0x85: /* mov.w @(disp,Rm),R0 */ - src = (unsigned char*) *rm; - src += (instruction&0x000F)<<1; - dst = (unsigned char*) ®s->regs[0]; - *(unsigned long*)dst = 0; - -#if !defined(__LITTLE_ENDIAN__) - dst += 2; -#endif - - if (copy_from_user(dst, src, 2)) - goto fetch_fault; - -#ifdef __LITTLE_ENDIAN__ - if (dst[1] & 0x80) { - dst[2] = 0xff; - dst[3] = 0xff; - } -#else - if (dst[2] & 0x80) { - dst[0] = 0xff; - dst[1] = 0xff; - } -#endif - ret = 0; - break; - } - break; - } - return ret; - - fetch_fault: - /* Argh. Address not only misaligned but also non-existent. - * Raise an EFAULT and see if it's trapped - */ - return die_if_no_fixup("Fault in unaligned fixup", regs, 0); -} - -/* - * emulate the instruction in the delay slot - * - fetches the instruction from PC+2 - */ -static inline int handle_unaligned_delayslot(struct pt_regs *regs) +#ifdef CONFIG_BUG +static void handle_BUG(struct pt_regs *regs) { - u16 instruction; - - if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) { - /* the instruction-fetch faulted */ - if (user_mode(regs)) - return -EFAULT; - - /* kernel */ - die("delay-slot-insn faulting in handle_unaligned_delayslot", - regs, 0); + enum bug_trap_type tt; + tt = report_bug(regs->pc, regs); + if (tt == BUG_TRAP_TYPE_WARN) { + regs->pc += instruction_size(regs->pc); + return; } - return handle_unaligned_ins(instruction,regs); + die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff); } -/* - * handle an instruction that does an unaligned memory access - * - have to be careful of branch delay-slot instructions that fault - * SH3: - * - if the branch would be taken PC points to the branch - * - if the branch would not be taken, PC points to delay-slot - * SH4: - * - PC always points to delayed branch - * - return 0 if handled, -EFAULT if failed (may not return if in kernel) - */ - -/* Macros to determine offset from current PC for branch instructions */ -/* Explicit type coercion is used to force sign extension where needed */ -#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4) -#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4) - -/* - * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit - * opcodes.. - */ -#ifndef CONFIG_CPU_SH2A -static int handle_unaligned_notify_count = 10; - -static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) +int is_valid_bugaddr(unsigned long addr) { - u_int rm; - int ret, index; - - index = (instruction>>8)&15; /* 0x0F00 */ - rm = regs->regs[index]; - - /* shout about the first ten userspace fixups */ - if (user_mode(regs) && handle_unaligned_notify_count>0) { - handle_unaligned_notify_count--; - - printk(KERN_NOTICE "Fixing up unaligned userspace access " - "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", - current->comm, task_pid_nr(current), - (u16 *)regs->pc, instruction); - } - - ret = -EFAULT; - switch (instruction&0xF000) { - case 0x0000: - if (instruction==0x000B) { - /* rts */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) - regs->pc = regs->pr; - } - else if ((instruction&0x00FF)==0x0023) { - /* braf @Rm */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) - regs->pc += rm + 4; - } - else if ((instruction&0x00FF)==0x0003) { - /* bsrf @Rm */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) { - regs->pr = regs->pc + 4; - regs->pc += rm + 4; - } - } - else { - /* mov.[bwl] to/from memory via r0+rn */ - goto simple; - } - break; - - case 0x1000: /* mov.l Rm,@(disp,Rn) */ - goto simple; - - case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */ - goto simple; - - case 0x4000: - if ((instruction&0x00FF)==0x002B) { - /* jmp @Rm */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) - regs->pc = rm; - } - else if ((instruction&0x00FF)==0x000B) { - /* jsr @Rm */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) { - regs->pr = regs->pc + 4; - regs->pc = rm; - } - } - else { - /* mov.[bwl] to/from memory via r0+rn */ - goto simple; - } - break; - - case 0x5000: /* mov.l @(disp,Rm),Rn */ - goto simple; - - case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */ - goto simple; - - case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */ - switch (instruction&0x0F00) { - case 0x0100: /* mov.w R0,@(disp,Rm) */ - goto simple; - case 0x0500: /* mov.w @(disp,Rm),R0 */ - goto simple; - case 0x0B00: /* bf lab - no delayslot*/ - break; - case 0x0F00: /* bf/s lab */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) { -#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) - if ((regs->sr & 0x00000001) != 0) - regs->pc += 4; /* next after slot */ - else -#endif - regs->pc += SH_PC_8BIT_OFFSET(instruction); - } - break; - case 0x0900: /* bt lab - no delayslot */ - break; - case 0x0D00: /* bt/s lab */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) { -#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) - if ((regs->sr & 0x00000001) == 0) - regs->pc += 4; /* next after slot */ - else -#endif - regs->pc += SH_PC_8BIT_OFFSET(instruction); - } - break; - } - break; - - case 0xA000: /* bra label */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) - regs->pc += SH_PC_12BIT_OFFSET(instruction); - break; - - case 0xB000: /* bsr label */ - ret = handle_unaligned_delayslot(regs); - if (ret==0) { - regs->pr = regs->pc + 4; - regs->pc += SH_PC_12BIT_OFFSET(instruction); - } - break; - } - return ret; - - /* handle non-delay-slot instruction */ - simple: - ret = handle_unaligned_ins(instruction,regs); - if (ret==0) - regs->pc += instruction_size(instruction); - return ret; + return addr >= PAGE_OFFSET; } -#endif /* CONFIG_CPU_SH2A */ - -#ifdef CONFIG_CPU_HAS_SR_RB -#define lookup_exception_vector(x) \ - __asm__ __volatile__ ("stc r2_bank, %0\n\t" : "=r" ((x))) -#else -#define lookup_exception_vector(x) \ - __asm__ __volatile__ ("mov r4, %0\n\t" : "=r" ((x))) #endif /* - * Handle various address error exceptions: - * - instruction address error: - * misaligned PC - * PC >= 0x80000000 in user mode - * - data address error (read and write) - * misaligned data access - * access to >= 0x80000000 is user mode - * Unfortuntaly we can't distinguish between instruction address error - * and data address errors caused by read accesses. + * Generic trap handler. */ -asmlinkage void do_address_error(struct pt_regs *regs, - unsigned long writeaccess, - unsigned long address) +BUILD_TRAP_HANDLER(debug) { - unsigned long error_code = 0; - mm_segment_t oldfs; - siginfo_t info; -#ifndef CONFIG_CPU_SH2A - u16 instruction; - int tmp; -#endif - - /* Intentional ifdef */ -#ifdef CONFIG_CPU_HAS_SR_RB - lookup_exception_vector(error_code); -#endif - - oldfs = get_fs(); - - if (user_mode(regs)) { - int si_code = BUS_ADRERR; - - local_irq_enable(); + TRAP_HANDLER_DECL; - /* bad PC is not something we can fix */ - if (regs->pc & 1) { - si_code = BUS_ADRALN; - goto uspace_segv; - } + /* Rewind */ + regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); -#ifndef CONFIG_CPU_SH2A - set_fs(USER_DS); - if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) { - /* Argh. Fault on the instruction itself. - This should never happen non-SMP - */ - set_fs(oldfs); - goto uspace_segv; - } - - tmp = handle_unaligned_access(instruction, regs); - set_fs(oldfs); - - if (tmp==0) - return; /* sorted */ -#endif - -uspace_segv: - printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned " - "access (PC %lx PR %lx)\n", current->comm, regs->pc, - regs->pr); - - info.si_signo = SIGBUS; - info.si_errno = 0; - info.si_code = si_code; - info.si_addr = (void __user *)address; - force_sig_info(SIGBUS, &info, current); - } else { - if (regs->pc & 1) - die("unaligned program counter", regs, error_code); - -#ifndef CONFIG_CPU_SH2A - set_fs(KERNEL_DS); - if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) { - /* Argh. Fault on the instruction itself. - This should never happen non-SMP - */ - set_fs(oldfs); - die("insn faulting in do_address_error", regs, 0); - } - - handle_unaligned_access(instruction, regs); - set_fs(oldfs); -#else - printk(KERN_NOTICE "Killing process \"%s\" due to unaligned " - "access\n", current->comm); + if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff, + SIGTRAP) == NOTIFY_STOP) + return; - force_sig(SIGSEGV, current); -#endif - } + force_sig(SIGTRAP, current); } -#ifdef CONFIG_SH_DSP /* - * SH-DSP support gerg@snapgear.com. + * Special handler for BUG() traps. */ -int is_dsp_inst(struct pt_regs *regs) +BUILD_TRAP_HANDLER(bug) { - unsigned short inst = 0; - - /* - * Safe guard if DSP mode is already enabled or we're lacking - * the DSP altogether. - */ - if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP)) - return 0; - - get_user(inst, ((unsigned short *) regs->pc)); - - inst &= 0xf000; - - /* Check for any type of DSP or support instruction */ - if ((inst == 0xf000) || (inst == 0x4000)) - return 1; - - return 0; -} -#else -#define is_dsp_inst(regs) (0) -#endif /* CONFIG_SH_DSP */ + TRAP_HANDLER_DECL; -#ifdef CONFIG_CPU_SH2A -asmlinkage void do_divide_error(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs) -{ - siginfo_t info; - - switch (r4) { - case TRAP_DIVZERO_ERROR: - info.si_code = FPE_INTDIV; - break; - case TRAP_DIVOVF_ERROR: - info.si_code = FPE_INTOVF; - break; - } - - force_sig_info(SIGFPE, &info, current); -} -#endif - -/* arch/sh/kernel/cpu/sh4/fpu.c */ -extern int do_fpu_inst(unsigned short, struct pt_regs *); -extern asmlinkage void do_fpu_state_restore(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, struct pt_regs __regs); - -asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs) -{ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); - unsigned long error_code; - struct task_struct *tsk = current; - -#ifdef CONFIG_SH_FPU_EMU - unsigned short inst = 0; - int err; - - get_user(inst, (unsigned short*)regs->pc); - - err = do_fpu_inst(inst, regs); - if (!err) { - regs->pc += instruction_size(inst); - return; - } - /* not a FPU inst. */ -#endif + /* Rewind */ + regs->pc -= instruction_size(ctrl_inw(regs->pc - 4)); -#ifdef CONFIG_SH_DSP - /* Check if it's a DSP instruction */ - if (is_dsp_inst(regs)) { - /* Enable DSP mode, and restart instruction. */ - regs->sr |= SR_DSP; + if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff, + SIGTRAP) == NOTIFY_STOP) return; - } -#endif - - lookup_exception_vector(error_code); - - local_irq_enable(); - CHK_REMOTE_DEBUG(regs); - force_sig(SIGILL, tsk); - die_if_no_fixup("reserved instruction", regs, error_code); -} - -#ifdef CONFIG_SH_FPU_EMU -static int emulate_branch(unsigned short inst, struct pt_regs* regs) -{ - /* - * bfs: 8fxx: PC+=d*2+4; - * bts: 8dxx: PC+=d*2+4; - * bra: axxx: PC+=D*2+4; - * bsr: bxxx: PC+=D*2+4 after PR=PC+4; - * braf:0x23: PC+=Rn*2+4; - * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4; - * jmp: 4x2b: PC=Rn; - * jsr: 4x0b: PC=Rn after PR=PC+4; - * rts: 000b: PC=PR; - */ - if ((inst & 0xfd00) == 0x8d00) { - regs->pc += SH_PC_8BIT_OFFSET(inst); - return 0; - } - - if ((inst & 0xe000) == 0xa000) { - regs->pc += SH_PC_12BIT_OFFSET(inst); - return 0; - } - - if ((inst & 0xf0df) == 0x0003) { - regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4; - return 0; - } - - if ((inst & 0xf0df) == 0x400b) { - regs->pc = regs->regs[(inst & 0x0f00) >> 8]; - return 0; - } - - if ((inst & 0xffff) == 0x000b) { - regs->pc = regs->pr; - return 0; - } - - return 1; -} -#endif - -asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs) -{ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); - unsigned long error_code; - struct task_struct *tsk = current; -#ifdef CONFIG_SH_FPU_EMU - unsigned short inst = 0; - - get_user(inst, (unsigned short *)regs->pc + 1); - if (!do_fpu_inst(inst, regs)) { - get_user(inst, (unsigned short *)regs->pc); - if (!emulate_branch(inst, regs)) - return; - /* fault in branch.*/ - } - /* not a FPU inst. */ -#endif - - lookup_exception_vector(error_code); - - local_irq_enable(); - CHK_REMOTE_DEBUG(regs); - force_sig(SIGILL, tsk); - die_if_no_fixup("illegal slot instruction", regs, error_code); -} - -asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs) -{ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); - long ex; - - lookup_exception_vector(ex); - die_if_kernel("exception", regs, ex); -} - -#if defined(CONFIG_SH_STANDARD_BIOS) -void *gdb_vbr_vector; - -static inline void __init gdb_vbr_init(void) -{ - register unsigned long vbr; - - /* - * Read the old value of the VBR register to initialise - * the vector through which debug and BIOS traps are - * delegated by the Linux trap handler. - */ - asm volatile("stc vbr, %0" : "=r" (vbr)); - - gdb_vbr_vector = (void *)(vbr + 0x100); - printk("Setting GDB trap vector to 0x%08lx\n", - (unsigned long)gdb_vbr_vector); -} -#endif - -void __cpuinit per_cpu_trap_init(void) -{ - extern void *vbr_base; - -#ifdef CONFIG_SH_STANDARD_BIOS - if (raw_smp_processor_id() == 0) - gdb_vbr_init(); -#endif - - /* NOTE: The VBR value should be at P1 - (or P2, virtural "fixed" address space). - It's definitely should not in physical address. */ - - asm volatile("ldc %0, vbr" - : /* no output */ - : "r" (&vbr_base) - : "memory"); -} - -void *set_exception_table_vec(unsigned int vec, void *handler) -{ - extern void *exception_handling_table[]; - void *old_handler; - - old_handler = exception_handling_table[vec]; - exception_handling_table[vec] = handler; - return old_handler; -} - -extern asmlinkage void address_error_handler(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); - -void __init trap_init(void) -{ - set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst); - set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst); - -#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \ - defined(CONFIG_SH_FPU_EMU) - /* - * For SH-4 lacking an FPU, treat floating point instructions as - * reserved. They'll be handled in the math-emu case, or faulted on - * otherwise. - */ - set_exception_table_evt(0x800, do_reserved_inst); - set_exception_table_evt(0x820, do_illegal_slot_inst); -#elif defined(CONFIG_SH_FPU) -#ifdef CONFIG_CPU_SUBTYPE_SHX3 - set_exception_table_evt(0xd80, do_fpu_state_restore); - set_exception_table_evt(0xda0, do_fpu_state_restore); -#else - set_exception_table_evt(0x800, do_fpu_state_restore); - set_exception_table_evt(0x820, do_fpu_state_restore); -#endif -#endif - -#ifdef CONFIG_CPU_SH2 - set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_handler); -#endif -#ifdef CONFIG_CPU_SH2A - set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error); - set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error); -#endif - - /* Setup VBR for boot cpu */ - per_cpu_trap_init(); -} #ifdef CONFIG_BUG -void handle_BUG(struct pt_regs *regs) -{ - enum bug_trap_type tt; - tt = report_bug(regs->pc, regs); - if (tt == BUG_TRAP_TYPE_WARN) { - regs->pc += 2; - return; + if (__kernel_text_address(instruction_pointer(regs))) { + opcode_t insn = *(opcode_t *)instruction_pointer(regs); + if (insn == TRAPA_BUG_OPCODE) + handle_BUG(regs); } - - die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff); -} - -int is_valid_bugaddr(unsigned long addr) -{ - return addr >= PAGE_OFFSET; -} -#endif - -void show_trace(struct task_struct *tsk, unsigned long *sp, - struct pt_regs *regs) -{ - unsigned long addr; - - if (regs && user_mode(regs)) - return; - - printk("\nCall trace: "); -#ifdef CONFIG_KALLSYMS - printk("\n"); #endif - while (!kstack_end(sp)) { - addr = *sp++; - if (kernel_text_address(addr)) - print_ip_sym(addr); - } - - printk("\n"); - - if (!tsk) - tsk = current; - - debug_show_held_locks(tsk); -} - -void show_stack(struct task_struct *tsk, unsigned long *sp) -{ - unsigned long stack; - - if (!tsk) - tsk = current; - if (tsk == current) - sp = (unsigned long *)current_stack_pointer; - else - sp = (unsigned long *)tsk->thread.sp; - - stack = (unsigned long)sp; - dump_mem("Stack: ", stack, THREAD_SIZE + - (unsigned long)task_stack_page(tsk)); - show_trace(tsk, sp, NULL); -} - -void dump_stack(void) -{ - show_stack(NULL, NULL); + force_sig(SIGTRAP, current); } -EXPORT_SYMBOL(dump_stack); diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c new file mode 100644 index 000000000000..2e58f7a6b746 --- /dev/null +++ b/arch/sh/kernel/traps_32.c @@ -0,0 +1,919 @@ +/* + * 'traps.c' handles hardware traps and faults after we have saved some + * state in 'entry.S'. + * + * SuperH version: Copyright (C) 1999 Niibe Yutaka + * Copyright (C) 2000 Philipp Rumpf + * Copyright (C) 2000 David Howells + * Copyright (C) 2002 - 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/kernel.h> +#include <linux/ptrace.h> +#include <linux/init.h> +#include <linux/spinlock.h> +#include <linux/module.h> +#include <linux/kallsyms.h> +#include <linux/io.h> +#include <linux/bug.h> +#include <linux/debug_locks.h> +#include <linux/kdebug.h> +#include <linux/kexec.h> +#include <linux/limits.h> +#include <asm/system.h> +#include <asm/uaccess.h> + +#ifdef CONFIG_SH_KGDB +#include <asm/kgdb.h> +#define CHK_REMOTE_DEBUG(regs) \ +{ \ + if (kgdb_debug_hook && !user_mode(regs))\ + (*kgdb_debug_hook)(regs); \ +} +#else +#define CHK_REMOTE_DEBUG(regs) +#endif + +#ifdef CONFIG_CPU_SH2 +# define TRAP_RESERVED_INST 4 +# define TRAP_ILLEGAL_SLOT_INST 6 +# define TRAP_ADDRESS_ERROR 9 +# ifdef CONFIG_CPU_SH2A +# define TRAP_DIVZERO_ERROR 17 +# define TRAP_DIVOVF_ERROR 18 +# endif +#else +#define TRAP_RESERVED_INST 12 +#define TRAP_ILLEGAL_SLOT_INST 13 +#endif + +static void dump_mem(const char *str, unsigned long bottom, unsigned long top) +{ + unsigned long p; + int i; + + printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top); + + for (p = bottom & ~31; p < top; ) { + printk("%04lx: ", p & 0xffff); + + for (i = 0; i < 8; i++, p += 4) { + unsigned int val; + + if (p < bottom || p >= top) + printk(" "); + else { + if (__get_user(val, (unsigned int __user *)p)) { + printk("\n"); + return; + } + printk("%08x ", val); + } + } + printk("\n"); + } +} + +static DEFINE_SPINLOCK(die_lock); + +void die(const char * str, struct pt_regs * regs, long err) +{ + static int die_counter; + + oops_enter(); + + console_verbose(); + spin_lock_irq(&die_lock); + bust_spinlocks(1); + + printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); + + CHK_REMOTE_DEBUG(regs); + print_modules(); + show_regs(regs); + + printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm, + task_pid_nr(current), task_stack_page(current) + 1); + + if (!user_mode(regs) || in_interrupt()) + dump_mem("Stack: ", regs->regs[15], THREAD_SIZE + + (unsigned long)task_stack_page(current)); + + bust_spinlocks(0); + add_taint(TAINT_DIE); + spin_unlock_irq(&die_lock); + + if (kexec_should_crash(current)) + crash_kexec(regs); + + if (in_interrupt()) + panic("Fatal exception in interrupt"); + + if (panic_on_oops) + panic("Fatal exception"); + + oops_exit(); + do_exit(SIGSEGV); +} + +static inline void die_if_kernel(const char *str, struct pt_regs *regs, + long err) +{ + if (!user_mode(regs)) + die(str, regs, err); +} + +/* + * try and fix up kernelspace address errors + * - userspace errors just cause EFAULT to be returned, resulting in SEGV + * - kernel/userspace interfaces cause a jump to an appropriate handler + * - other kernel errors are bad + * - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault + */ +static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err) +{ + if (!user_mode(regs)) { + const struct exception_table_entry *fixup; + fixup = search_exception_tables(regs->pc); + if (fixup) { + regs->pc = fixup->fixup; + return 0; + } + die(str, regs, err); + } + return -EFAULT; +} + +/* + * handle an instruction that does an unaligned memory access by emulating the + * desired behaviour + * - note that PC _may not_ point to the faulting instruction + * (if that instruction is in a branch delay slot) + * - return 0 if emulation okay, -EFAULT on existential error + */ +static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs) +{ + int ret, index, count; + unsigned long *rm, *rn; + unsigned char *src, *dst; + + index = (instruction>>8)&15; /* 0x0F00 */ + rn = ®s->regs[index]; + + index = (instruction>>4)&15; /* 0x00F0 */ + rm = ®s->regs[index]; + + count = 1<<(instruction&3); + + ret = -EFAULT; + switch (instruction>>12) { + case 0: /* mov.[bwl] to/from memory via r0+rn */ + if (instruction & 8) { + /* from memory */ + src = (unsigned char*) *rm; + src += regs->regs[0]; + dst = (unsigned char*) rn; + *(unsigned long*)dst = 0; + +#ifdef __LITTLE_ENDIAN__ + if (copy_from_user(dst, src, count)) + goto fetch_fault; + + if ((count == 2) && dst[1] & 0x80) { + dst[2] = 0xff; + dst[3] = 0xff; + } +#else + dst += 4-count; + + if (__copy_user(dst, src, count)) + goto fetch_fault; + + if ((count == 2) && dst[2] & 0x80) { + dst[0] = 0xff; + dst[1] = 0xff; + } +#endif + } else { + /* to memory */ + src = (unsigned char*) rm; +#if !defined(__LITTLE_ENDIAN__) + src += 4-count; +#endif + dst = (unsigned char*) *rn; + dst += regs->regs[0]; + + if (copy_to_user(dst, src, count)) + goto fetch_fault; + } + ret = 0; + break; + + case 1: /* mov.l Rm,@(disp,Rn) */ + src = (unsigned char*) rm; + dst = (unsigned char*) *rn; + dst += (instruction&0x000F)<<2; + + if (copy_to_user(dst,src,4)) + goto fetch_fault; + ret = 0; + break; + + case 2: /* mov.[bwl] to memory, possibly with pre-decrement */ + if (instruction & 4) + *rn -= count; + src = (unsigned char*) rm; + dst = (unsigned char*) *rn; +#if !defined(__LITTLE_ENDIAN__) + src += 4-count; +#endif + if (copy_to_user(dst, src, count)) + goto fetch_fault; + ret = 0; + break; + + case 5: /* mov.l @(disp,Rm),Rn */ + src = (unsigned char*) *rm; + src += (instruction&0x000F)<<2; + dst = (unsigned char*) rn; + *(unsigned long*)dst = 0; + + if (copy_from_user(dst,src,4)) + goto fetch_fault; + ret = 0; + break; + + case 6: /* mov.[bwl] from memory, possibly with post-increment */ + src = (unsigned char*) *rm; + if (instruction & 4) + *rm += count; + dst = (unsigned char*) rn; + *(unsigned long*)dst = 0; + +#ifdef __LITTLE_ENDIAN__ + if (copy_from_user(dst, src, count)) + goto fetch_fault; + + if ((count == 2) && dst[1] & 0x80) { + dst[2] = 0xff; + dst[3] = 0xff; + } +#else + dst += 4-count; + + if (copy_from_user(dst, src, count)) + goto fetch_fault; + + if ((count == 2) && dst[2] & 0x80) { + dst[0] = 0xff; + dst[1] = 0xff; + } +#endif + ret = 0; + break; + + case 8: + switch ((instruction&0xFF00)>>8) { + case 0x81: /* mov.w R0,@(disp,Rn) */ + src = (unsigned char*) ®s->regs[0]; +#if !defined(__LITTLE_ENDIAN__) + src += 2; +#endif + dst = (unsigned char*) *rm; /* called Rn in the spec */ + dst += (instruction&0x000F)<<1; + + if (copy_to_user(dst, src, 2)) + goto fetch_fault; + ret = 0; + break; + + case 0x85: /* mov.w @(disp,Rm),R0 */ + src = (unsigned char*) *rm; + src += (instruction&0x000F)<<1; + dst = (unsigned char*) ®s->regs[0]; + *(unsigned long*)dst = 0; + +#if !defined(__LITTLE_ENDIAN__) + dst += 2; +#endif + + if (copy_from_user(dst, src, 2)) + goto fetch_fault; + +#ifdef __LITTLE_ENDIAN__ + if (dst[1] & 0x80) { + dst[2] = 0xff; + dst[3] = 0xff; + } +#else + if (dst[2] & 0x80) { + dst[0] = 0xff; + dst[1] = 0xff; + } +#endif + ret = 0; + break; + } + break; + } + return ret; + + fetch_fault: + /* Argh. Address not only misaligned but also non-existent. + * Raise an EFAULT and see if it's trapped + */ + return die_if_no_fixup("Fault in unaligned fixup", regs, 0); +} + +/* + * emulate the instruction in the delay slot + * - fetches the instruction from PC+2 + */ +static inline int handle_unaligned_delayslot(struct pt_regs *regs) +{ + u16 instruction; + + if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) { + /* the instruction-fetch faulted */ + if (user_mode(regs)) + return -EFAULT; + + /* kernel */ + die("delay-slot-insn faulting in handle_unaligned_delayslot", + regs, 0); + } + + return handle_unaligned_ins(instruction,regs); +} + +/* + * handle an instruction that does an unaligned memory access + * - have to be careful of branch delay-slot instructions that fault + * SH3: + * - if the branch would be taken PC points to the branch + * - if the branch would not be taken, PC points to delay-slot + * SH4: + * - PC always points to delayed branch + * - return 0 if handled, -EFAULT if failed (may not return if in kernel) + */ + +/* Macros to determine offset from current PC for branch instructions */ +/* Explicit type coercion is used to force sign extension where needed */ +#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4) +#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4) + +/* + * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit + * opcodes.. + */ +#ifndef CONFIG_CPU_SH2A +static int handle_unaligned_notify_count = 10; + +static int handle_unaligned_access(u16 instruction, struct pt_regs *regs) +{ + u_int rm; + int ret, index; + + index = (instruction>>8)&15; /* 0x0F00 */ + rm = regs->regs[index]; + + /* shout about the first ten userspace fixups */ + if (user_mode(regs) && handle_unaligned_notify_count>0) { + handle_unaligned_notify_count--; + + printk(KERN_NOTICE "Fixing up unaligned userspace access " + "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", + current->comm, task_pid_nr(current), + (u16 *)regs->pc, instruction); + } + + ret = -EFAULT; + switch (instruction&0xF000) { + case 0x0000: + if (instruction==0x000B) { + /* rts */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) + regs->pc = regs->pr; + } + else if ((instruction&0x00FF)==0x0023) { + /* braf @Rm */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) + regs->pc += rm + 4; + } + else if ((instruction&0x00FF)==0x0003) { + /* bsrf @Rm */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) { + regs->pr = regs->pc + 4; + regs->pc += rm + 4; + } + } + else { + /* mov.[bwl] to/from memory via r0+rn */ + goto simple; + } + break; + + case 0x1000: /* mov.l Rm,@(disp,Rn) */ + goto simple; + + case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */ + goto simple; + + case 0x4000: + if ((instruction&0x00FF)==0x002B) { + /* jmp @Rm */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) + regs->pc = rm; + } + else if ((instruction&0x00FF)==0x000B) { + /* jsr @Rm */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) { + regs->pr = regs->pc + 4; + regs->pc = rm; + } + } + else { + /* mov.[bwl] to/from memory via r0+rn */ + goto simple; + } + break; + + case 0x5000: /* mov.l @(disp,Rm),Rn */ + goto simple; + + case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */ + goto simple; + + case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */ + switch (instruction&0x0F00) { + case 0x0100: /* mov.w R0,@(disp,Rm) */ + goto simple; + case 0x0500: /* mov.w @(disp,Rm),R0 */ + goto simple; + case 0x0B00: /* bf lab - no delayslot*/ + break; + case 0x0F00: /* bf/s lab */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) { +#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) + if ((regs->sr & 0x00000001) != 0) + regs->pc += 4; /* next after slot */ + else +#endif + regs->pc += SH_PC_8BIT_OFFSET(instruction); + } + break; + case 0x0900: /* bt lab - no delayslot */ + break; + case 0x0D00: /* bt/s lab */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) { +#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) + if ((regs->sr & 0x00000001) == 0) + regs->pc += 4; /* next after slot */ + else +#endif + regs->pc += SH_PC_8BIT_OFFSET(instruction); + } + break; + } + break; + + case 0xA000: /* bra label */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) + regs->pc += SH_PC_12BIT_OFFSET(instruction); + break; + + case 0xB000: /* bsr label */ + ret = handle_unaligned_delayslot(regs); + if (ret==0) { + regs->pr = regs->pc + 4; + regs->pc += SH_PC_12BIT_OFFSET(instruction); + } + break; + } + return ret; + + /* handle non-delay-slot instruction */ + simple: + ret = handle_unaligned_ins(instruction,regs); + if (ret==0) + regs->pc += instruction_size(instruction); + return ret; +} +#endif /* CONFIG_CPU_SH2A */ + +#ifdef CONFIG_CPU_HAS_SR_RB +#define lookup_exception_vector(x) \ + __asm__ __volatile__ ("stc r2_bank, %0\n\t" : "=r" ((x))) +#else +#define lookup_exception_vector(x) \ + __asm__ __volatile__ ("mov r4, %0\n\t" : "=r" ((x))) +#endif + +/* + * Handle various address error exceptions: + * - instruction address error: + * misaligned PC + * PC >= 0x80000000 in user mode + * - data address error (read and write) + * misaligned data access + * access to >= 0x80000000 is user mode + * Unfortuntaly we can't distinguish between instruction address error + * and data address errors caused by read accesses. + */ +asmlinkage void do_address_error(struct pt_regs *regs, + unsigned long writeaccess, + unsigned long address) +{ + unsigned long error_code = 0; + mm_segment_t oldfs; + siginfo_t info; +#ifndef CONFIG_CPU_SH2A + u16 instruction; + int tmp; +#endif + + /* Intentional ifdef */ +#ifdef CONFIG_CPU_HAS_SR_RB + lookup_exception_vector(error_code); +#endif + + oldfs = get_fs(); + + if (user_mode(regs)) { + int si_code = BUS_ADRERR; + + local_irq_enable(); + + /* bad PC is not something we can fix */ + if (regs->pc & 1) { + si_code = BUS_ADRALN; + goto uspace_segv; + } + +#ifndef CONFIG_CPU_SH2A + set_fs(USER_DS); + if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) { + /* Argh. Fault on the instruction itself. + This should never happen non-SMP + */ + set_fs(oldfs); + goto uspace_segv; + } + + tmp = handle_unaligned_access(instruction, regs); + set_fs(oldfs); + + if (tmp==0) + return; /* sorted */ +#endif + +uspace_segv: + printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned " + "access (PC %lx PR %lx)\n", current->comm, regs->pc, + regs->pr); + + info.si_signo = SIGBUS; + info.si_errno = 0; + info.si_code = si_code; + info.si_addr = (void __user *)address; + force_sig_info(SIGBUS, &info, current); + } else { + if (regs->pc & 1) + die("unaligned program counter", regs, error_code); + +#ifndef CONFIG_CPU_SH2A + set_fs(KERNEL_DS); + if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) { + /* Argh. Fault on the instruction itself. + This should never happen non-SMP + */ + set_fs(oldfs); + die("insn faulting in do_address_error", regs, 0); + } + + handle_unaligned_access(instruction, regs); + set_fs(oldfs); +#else + printk(KERN_NOTICE "Killing process \"%s\" due to unaligned " + "access\n", current->comm); + + force_sig(SIGSEGV, current); +#endif + } +} + +#ifdef CONFIG_SH_DSP +/* + * SH-DSP support gerg@snapgear.com. + */ +int is_dsp_inst(struct pt_regs *regs) +{ + unsigned short inst = 0; + + /* + * Safe guard if DSP mode is already enabled or we're lacking + * the DSP altogether. + */ + if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP)) + return 0; + + get_user(inst, ((unsigned short *) regs->pc)); + + inst &= 0xf000; + + /* Check for any type of DSP or support instruction */ + if ((inst == 0xf000) || (inst == 0x4000)) + return 1; + + return 0; +} +#else +#define is_dsp_inst(regs) (0) +#endif /* CONFIG_SH_DSP */ + +#ifdef CONFIG_CPU_SH2A +asmlinkage void do_divide_error(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs) +{ + siginfo_t info; + + switch (r4) { + case TRAP_DIVZERO_ERROR: + info.si_code = FPE_INTDIV; + break; + case TRAP_DIVOVF_ERROR: + info.si_code = FPE_INTOVF; + break; + } + + force_sig_info(SIGFPE, &info, current); +} +#endif + +asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs) +{ + struct pt_regs *regs = RELOC_HIDE(&__regs, 0); + unsigned long error_code; + struct task_struct *tsk = current; + +#ifdef CONFIG_SH_FPU_EMU + unsigned short inst = 0; + int err; + + get_user(inst, (unsigned short*)regs->pc); + + err = do_fpu_inst(inst, regs); + if (!err) { + regs->pc += instruction_size(inst); + return; + } + /* not a FPU inst. */ +#endif + +#ifdef CONFIG_SH_DSP + /* Check if it's a DSP instruction */ + if (is_dsp_inst(regs)) { + /* Enable DSP mode, and restart instruction. */ + regs->sr |= SR_DSP; + return; + } +#endif + + lookup_exception_vector(error_code); + + local_irq_enable(); + CHK_REMOTE_DEBUG(regs); + force_sig(SIGILL, tsk); + die_if_no_fixup("reserved instruction", regs, error_code); +} + +#ifdef CONFIG_SH_FPU_EMU +static int emulate_branch(unsigned short inst, struct pt_regs* regs) +{ + /* + * bfs: 8fxx: PC+=d*2+4; + * bts: 8dxx: PC+=d*2+4; + * bra: axxx: PC+=D*2+4; + * bsr: bxxx: PC+=D*2+4 after PR=PC+4; + * braf:0x23: PC+=Rn*2+4; + * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4; + * jmp: 4x2b: PC=Rn; + * jsr: 4x0b: PC=Rn after PR=PC+4; + * rts: 000b: PC=PR; + */ + if ((inst & 0xfd00) == 0x8d00) { + regs->pc += SH_PC_8BIT_OFFSET(inst); + return 0; + } + + if ((inst & 0xe000) == 0xa000) { + regs->pc += SH_PC_12BIT_OFFSET(inst); + return 0; + } + + if ((inst & 0xf0df) == 0x0003) { + regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4; + return 0; + } + + if ((inst & 0xf0df) == 0x400b) { + regs->pc = regs->regs[(inst & 0x0f00) >> 8]; + return 0; + } + + if ((inst & 0xffff) == 0x000b) { + regs->pc = regs->pr; + return 0; + } + + return 1; +} +#endif + +asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs) +{ + struct pt_regs *regs = RELOC_HIDE(&__regs, 0); + unsigned long error_code; + struct task_struct *tsk = current; +#ifdef CONFIG_SH_FPU_EMU + unsigned short inst = 0; + + get_user(inst, (unsigned short *)regs->pc + 1); + if (!do_fpu_inst(inst, regs)) { + get_user(inst, (unsigned short *)regs->pc); + if (!emulate_branch(inst, regs)) + return; + /* fault in branch.*/ + } + /* not a FPU inst. */ +#endif + + lookup_exception_vector(error_code); + + local_irq_enable(); + CHK_REMOTE_DEBUG(regs); + force_sig(SIGILL, tsk); + die_if_no_fixup("illegal slot instruction", regs, error_code); +} + +asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs) +{ + struct pt_regs *regs = RELOC_HIDE(&__regs, 0); + long ex; + + lookup_exception_vector(ex); + die_if_kernel("exception", regs, ex); +} + +#if defined(CONFIG_SH_STANDARD_BIOS) +void *gdb_vbr_vector; + +static inline void __init gdb_vbr_init(void) +{ + register unsigned long vbr; + + /* + * Read the old value of the VBR register to initialise + * the vector through which debug and BIOS traps are + * delegated by the Linux trap handler. + */ + asm volatile("stc vbr, %0" : "=r" (vbr)); + + gdb_vbr_vector = (void *)(vbr + 0x100); + printk("Setting GDB trap vector to 0x%08lx\n", + (unsigned long)gdb_vbr_vector); +} +#endif + +void __cpuinit per_cpu_trap_init(void) +{ + extern void *vbr_base; + +#ifdef CONFIG_SH_STANDARD_BIOS + if (raw_smp_processor_id() == 0) + gdb_vbr_init(); +#endif + + /* NOTE: The VBR value should be at P1 + (or P2, virtural "fixed" address space). + It's definitely should not in physical address. */ + + asm volatile("ldc %0, vbr" + : /* no output */ + : "r" (&vbr_base) + : "memory"); +} + +void *set_exception_table_vec(unsigned int vec, void *handler) +{ + extern void *exception_handling_table[]; + void *old_handler; + + old_handler = exception_handling_table[vec]; + exception_handling_table[vec] = handler; + return old_handler; +} + +void __init trap_init(void) +{ + set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst); + set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst); + +#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \ + defined(CONFIG_SH_FPU_EMU) + /* + * For SH-4 lacking an FPU, treat floating point instructions as + * reserved. They'll be handled in the math-emu case, or faulted on + * otherwise. + */ + set_exception_table_evt(0x800, do_reserved_inst); + set_exception_table_evt(0x820, do_illegal_slot_inst); +#elif defined(CONFIG_SH_FPU) +#ifdef CONFIG_CPU_SUBTYPE_SHX3 + set_exception_table_evt(0xd80, fpu_state_restore_trap_handler); + set_exception_table_evt(0xda0, fpu_state_restore_trap_handler); +#else + set_exception_table_evt(0x800, fpu_state_restore_trap_handler); + set_exception_table_evt(0x820, fpu_state_restore_trap_handler); +#endif +#endif + +#ifdef CONFIG_CPU_SH2 + set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler); +#endif +#ifdef CONFIG_CPU_SH2A + set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error); + set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error); +#endif + + /* Setup VBR for boot cpu */ + per_cpu_trap_init(); +} + +void show_trace(struct task_struct *tsk, unsigned long *sp, + struct pt_regs *regs) +{ + unsigned long addr; + + if (regs && user_mode(regs)) + return; + + printk("\nCall trace: "); +#ifdef CONFIG_KALLSYMS + printk("\n"); +#endif + + while (!kstack_end(sp)) { + addr = *sp++; + if (kernel_text_address(addr)) + print_ip_sym(addr); + } + + printk("\n"); + + if (!tsk) + tsk = current; + + debug_show_held_locks(tsk); +} + +void show_stack(struct task_struct *tsk, unsigned long *sp) +{ + unsigned long stack; + + if (!tsk) + tsk = current; + if (tsk == current) + sp = (unsigned long *)current_stack_pointer; + else + sp = (unsigned long *)tsk->thread.sp; + + stack = (unsigned long)sp; + dump_mem("Stack: ", stack, THREAD_SIZE + + (unsigned long)task_stack_page(tsk)); + show_trace(tsk, sp, NULL); +} + +void dump_stack(void) +{ + show_stack(NULL, NULL); +} +EXPORT_SYMBOL(dump_stack); diff --git a/arch/sh64/kernel/traps.c b/arch/sh/kernel/traps_64.c index f32df3831f45..c0b3c6f6edb5 100644 --- a/arch/sh64/kernel/traps.c +++ b/arch/sh/kernel/traps_64.c @@ -1,19 +1,13 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/traps.c + * arch/sh/kernel/traps_64.c * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003, 2004 Paul Mundt * Copyright (C) 2003, 2004 Richard Curnow * - */ - -/* - * 'Traps.c' handles hardware traps and faults after we have saved some - * state in 'entry.S'. + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ #include <linux/sched.h> #include <linux/kernel.h> @@ -244,7 +238,6 @@ DO_ERROR(12, SIGILL, "reserved instruction", reserved_inst, current) /* Called with interrupts disabled */ asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs) { - PLS(); show_excp_regs(__FUNCTION__, -1, -1, regs); die_if_kernel("exception", regs, ex); } @@ -618,9 +611,9 @@ static int misaligned_fpu_load(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { - grab_fpu(); - fpsave(¤t->thread.fpu.hard); - release_fpu(); + enable_fpu(); + save_fpu(current, regs); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } @@ -691,9 +684,9 @@ static int misaligned_fpu_store(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { - grab_fpu(); - fpsave(¤t->thread.fpu.hard); - release_fpu(); + enable_fpu(); + save_fpu(current, regs); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index 0956fb3681a3..d7d4991f32af 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -1,138 +1,5 @@ -/* - * ld script to make SuperH Linux kernel - * Written by Niibe Yutaka - */ -#include <asm/thread_info.h> -#include <asm/cache.h> -#include <asm-generic/vmlinux.lds.h> - -#ifdef CONFIG_CPU_LITTLE_ENDIAN -OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +#ifdef CONFIG_SUPERH32 +# include "vmlinux_32.lds.S" #else -OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux") +# include "vmlinux_64.lds.S" #endif -OUTPUT_ARCH(sh) -ENTRY(_start) -SECTIONS -{ - . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET; - _text = .; /* Text and read-only data */ - - .empty_zero_page : { - *(.empty_zero_page) - } = 0 - - .text : { - *(.text.head) - TEXT_TEXT - SCHED_TEXT - LOCK_TEXT - KPROBES_TEXT - *(.fixup) - *(.gnu.warning) - } = 0x0009 - - . = ALIGN(16); /* Exception table */ - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - _etext = .; /* End of text section */ - - BUG_TABLE - NOTES - RO_DATA(PAGE_SIZE) - - . = ALIGN(THREAD_SIZE); - .data : { /* Data */ - *(.data.init_task) - - . = ALIGN(L1_CACHE_BYTES); - *(.data.cacheline_aligned) - - . = ALIGN(L1_CACHE_BYTES); - *(.data.read_mostly) - - . = ALIGN(PAGE_SIZE); - *(.data.page_aligned) - - __nosave_begin = .; - *(.data.nosave) - . = ALIGN(PAGE_SIZE); - __nosave_end = .; - - DATA_DATA - CONSTRUCTORS - } - - _edata = .; /* End of data section */ - - . = ALIGN(PAGE_SIZE); /* Init code and data */ - __init_begin = .; - _sinittext = .; - .init.text : { *(.init.text) } - _einittext = .; - .init.data : { *(.init.data) } - - . = ALIGN(16); - __setup_start = .; - .init.setup : { *(.init.setup) } - __setup_end = .; - - __initcall_start = .; - .initcall.init : { - INITCALLS - } - __initcall_end = .; - __con_initcall_start = .; - .con_initcall.init : { *(.con_initcall.init) } - __con_initcall_end = .; - - SECURITY_INIT - -#ifdef CONFIG_BLK_DEV_INITRD - . = ALIGN(PAGE_SIZE); - __initramfs_start = .; - .init.ramfs : { *(.init.ramfs) } - __initramfs_end = .; -#endif - - . = ALIGN(4); - __machvec_start = .; - .machvec.init : { *(.machvec.init) } - __machvec_end = .; - - PERCPU(PAGE_SIZE) - - /* - * .exit.text is discarded at runtime, not link time, to deal with - * references from __bug_table - */ - .exit.text : { *(.exit.text) } - .exit.data : { *(.exit.data) } - - . = ALIGN(PAGE_SIZE); - .bss : { - __init_end = .; - __bss_start = .; /* BSS */ - *(.bss.page_aligned) - *(.bss) - *(COMMON) - . = ALIGN(4); - _ebss = .; /* uClinux MTD sucks */ - _end = . ; - } - - /* - * When something in the kernel is NOT compiled as a module, the - * module cleanup code and data are put into these segments. Both - * can then be thrown away, as cleanup code is never called unless - * it's a module. - */ - /DISCARD/ : { - *(.exitcall.exit) - } - - STABS_DEBUG - DWARF_DEBUG -} diff --git a/arch/sh/kernel/vmlinux_32.lds.S b/arch/sh/kernel/vmlinux_32.lds.S new file mode 100644 index 000000000000..d549fac6d3e7 --- /dev/null +++ b/arch/sh/kernel/vmlinux_32.lds.S @@ -0,0 +1,152 @@ +/* + * ld script to make SuperH Linux kernel + * Written by Niibe Yutaka + */ +#include <asm/thread_info.h> +#include <asm/cache.h> +#include <asm-generic/vmlinux.lds.h> + +#ifdef CONFIG_CPU_LITTLE_ENDIAN +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +#else +OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux") +#endif +OUTPUT_ARCH(sh) +ENTRY(_start) +SECTIONS +{ +#ifdef CONFIG_32BIT + . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET; +#else + . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET; +#endif + + _text = .; /* Text and read-only data */ + + .empty_zero_page : { + *(.empty_zero_page) + } = 0 + + .text : { + *(.text.head) + TEXT_TEXT + SCHED_TEXT + LOCK_TEXT + KPROBES_TEXT + *(.fixup) + *(.gnu.warning) + } = 0x0009 + + . = ALIGN(16); /* Exception table */ + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + _etext = .; /* End of text section */ + + BUG_TABLE + NOTES + RO_DATA(PAGE_SIZE) + + /* + * Code which must be executed uncached and the associated data + */ + . = ALIGN(PAGE_SIZE); + __uncached_start = .; + .uncached.text : { *(.uncached.text) } + .uncached.data : { *(.uncached.data) } + __uncached_end = .; + + . = ALIGN(THREAD_SIZE); + .data : { /* Data */ + *(.data.init_task) + + . = ALIGN(L1_CACHE_BYTES); + *(.data.cacheline_aligned) + + . = ALIGN(L1_CACHE_BYTES); + *(.data.read_mostly) + + . = ALIGN(PAGE_SIZE); + *(.data.page_aligned) + + __nosave_begin = .; + *(.data.nosave) + . = ALIGN(PAGE_SIZE); + __nosave_end = .; + + DATA_DATA + CONSTRUCTORS + } + + _edata = .; /* End of data section */ + + . = ALIGN(PAGE_SIZE); /* Init code and data */ + __init_begin = .; + _sinittext = .; + .init.text : { *(.init.text) } + _einittext = .; + .init.data : { *(.init.data) } + + . = ALIGN(16); + __setup_start = .; + .init.setup : { *(.init.setup) } + __setup_end = .; + + __initcall_start = .; + .initcall.init : { + INITCALLS + } + __initcall_end = .; + __con_initcall_start = .; + .con_initcall.init : { *(.con_initcall.init) } + __con_initcall_end = .; + + SECURITY_INIT + +#ifdef CONFIG_BLK_DEV_INITRD + . = ALIGN(PAGE_SIZE); + __initramfs_start = .; + .init.ramfs : { *(.init.ramfs) } + __initramfs_end = .; +#endif + + . = ALIGN(4); + __machvec_start = .; + .machvec.init : { *(.machvec.init) } + __machvec_end = .; + + PERCPU(PAGE_SIZE) + + /* + * .exit.text is discarded at runtime, not link time, to deal with + * references from __bug_table + */ + .exit.text : { *(.exit.text) } + .exit.data : { *(.exit.data) } + + . = ALIGN(PAGE_SIZE); + .bss : { + __init_end = .; + __bss_start = .; /* BSS */ + *(.bss.page_aligned) + *(.bss) + *(COMMON) + . = ALIGN(4); + _ebss = .; /* uClinux MTD sucks */ + _end = . ; + } + + /* + * When something in the kernel is NOT compiled as a module, the + * module cleanup code and data are put into these segments. Both + * can then be thrown away, as cleanup code is never called unless + * it's a module. + */ + /DISCARD/ : { + *(.exitcall.exit) + } + + STABS_DEBUG + DWARF_DEBUG +} diff --git a/arch/sh/kernel/vmlinux_64.lds.S b/arch/sh/kernel/vmlinux_64.lds.S new file mode 100644 index 000000000000..2fd0f7401484 --- /dev/null +++ b/arch/sh/kernel/vmlinux_64.lds.S @@ -0,0 +1,164 @@ +/* + * ld script to make SH64 Linux kernel + * + * Copyright (C) 2000, 2001 Paolo Alberelli + * + * benedict.gaster@superh.com: 2nd May 2002 + * Add definition of empty_zero_page to be the first page of kernel image. + * + * benedict.gaster@superh.com: 3rd May 2002 + * Added support for ramdisk, removing statically linked romfs at the + * same time. + * + * lethal@linux-sh.org: 9th May 2003 + * Kill off GLOBAL_NAME() usage and other CDC-isms. + * + * lethal@linux-sh.org: 19th May 2003 + * Remove support for ancient toolchains. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <asm/page.h> +#include <asm/cache.h> +#include <asm/thread_info.h> + +#define LOAD_OFFSET CONFIG_PAGE_OFFSET +#include <asm-generic/vmlinux.lds.h> + +OUTPUT_ARCH(sh:sh5) + +#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET) + +ENTRY(__start) +SECTIONS +{ + . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE; + _text = .; /* Text and read-only data */ + + .empty_zero_page : C_PHYS(.empty_zero_page) { + *(.empty_zero_page) + } = 0 + + .text : C_PHYS(.text) { + *(.text.head) + TEXT_TEXT + *(.text64) + *(.text..SHmedia32) + SCHED_TEXT + LOCK_TEXT + KPROBES_TEXT + *(.fixup) + *(.gnu.warning) +#ifdef CONFIG_LITTLE_ENDIAN + } = 0x6ff0fff0 +#else + } = 0xf0fff06f +#endif + + /* We likely want __ex_table to be Cache Line aligned */ + . = ALIGN(L1_CACHE_BYTES); /* Exception table */ + __start___ex_table = .; + __ex_table : C_PHYS(__ex_table) { *(__ex_table) } + __stop___ex_table = .; + + _etext = .; /* End of text section */ + + BUG_TABLE + NOTES + RO_DATA(PAGE_SIZE) + + . = ALIGN(THREAD_SIZE); + .data : C_PHYS(.data) { /* Data */ + *(.data.init_task) + + . = ALIGN(L1_CACHE_BYTES); + *(.data.cacheline_aligned) + + . = ALIGN(L1_CACHE_BYTES); + *(.data.read_mostly) + + . = ALIGN(PAGE_SIZE); + *(.data.page_aligned) + + __nosave_begin = .; + *(.data.nosave) + . = ALIGN(PAGE_SIZE); + __nosave_end = .; + + DATA_DATA + CONSTRUCTORS + } + + _edata = .; /* End of data section */ + + . = ALIGN(PAGE_SIZE); /* Init code and data */ + __init_begin = .; + _sinittext = .; + .init.text : C_PHYS(.init.text) { *(.init.text) } + _einittext = .; + .init.data : C_PHYS(.init.data) { *(.init.data) } + . = ALIGN(L1_CACHE_BYTES); /* Better if Cache Line aligned */ + __setup_start = .; + .init.setup : C_PHYS(.init.setup) { *(.init.setup) } + __setup_end = .; + __initcall_start = .; + .initcall.init : C_PHYS(.initcall.init) { + INITCALLS + } + __initcall_end = .; + __con_initcall_start = .; + .con_initcall.init : C_PHYS(.con_initcall.init) { + *(.con_initcall.init) + } + __con_initcall_end = .; + + SECURITY_INIT + +#ifdef CONFIG_BLK_DEV_INITRD + . = ALIGN(PAGE_SIZE); + __initramfs_start = .; + .init.ramfs : C_PHYS(.init.ramfs) { *(.init.ramfs) } + __initramfs_end = .; +#endif + + . = ALIGN(8); + __machvec_start = .; + .machvec.init : C_PHYS(.machvec.init) { *(.machvec.init) } + __machvec_end = .; + + PERCPU(PAGE_SIZE) + + /* + * .exit.text is discarded at runtime, not link time, to deal with + * references from __bug_table + */ + .exit.text : C_PHYS(.exit.text) { *(.exit.text) } + .exit.data : C_PHYS(.exit.data) { *(.exit.data) } + + . = ALIGN(PAGE_SIZE); + .bss : C_PHYS(.bss) { + __init_end = .; + __bss_start = .; /* BSS */ + *(.bss.page_aligned) + *(.bss) + *(COMMON) + . = ALIGN(4); + _ebss = .; /* uClinux MTD sucks */ + _end = . ; + } + + /* + * When something in the kernel is NOT compiled as a module, the + * module cleanup code and data are put into these segments. Both + * can then be thrown away, as cleanup code is never called unless + * it's a module. + */ + /DISCARD/ : { + *(.exitcall.exit) + } + + STABS_DEBUG + DWARF_DEBUG +} diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index 9dc7b6985052..ebb55d1149f5 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -2,12 +2,13 @@ # Makefile for SuperH-specific library files.. # -lib-y = delay.o memset.o memmove.o memchr.o \ +lib-y = delay.o io.o memset.o memmove.o memchr.o \ checksum.o strlen.o div64.o div64-generic.o memcpy-y := memcpy.o memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o -lib-y += $(memcpy-y) +lib-$(CONFIG_MMU) += copy_page.o clear_page.o +lib-y += $(memcpy-y) EXTRA_CFLAGS += -Werror diff --git a/arch/sh/mm/clear_page.S b/arch/sh/lib/clear_page.S index 7a7c81ee3f01..3539123fe517 100644 --- a/arch/sh/mm/clear_page.S +++ b/arch/sh/lib/clear_page.S @@ -9,10 +9,10 @@ #include <asm/page.h> /* - * clear_page_slow + * clear_page * @to: P1 address * - * void clear_page_slow(void *to) + * void clear_page(void *to) */ /* @@ -20,7 +20,7 @@ * r4 --- to * r5 --- to + PAGE_SIZE */ -ENTRY(clear_page_slow) +ENTRY(clear_page) mov r4,r5 mov.l .Llimit,r0 add r0,r5 @@ -50,6 +50,8 @@ ENTRY(clear_page_slow) ! rts nop + + .balign 4 .Llimit: .long (PAGE_SIZE-28) ENTRY(__clear_user) diff --git a/arch/sh/mm/copy_page.S b/arch/sh/lib/copy_page.S index 40685018b952..e002b91c8752 100644 --- a/arch/sh/mm/copy_page.S +++ b/arch/sh/lib/copy_page.S @@ -9,11 +9,11 @@ #include <asm/page.h> /* - * copy_page_slow + * copy_page * @to: P1 address * @from: P1 address * - * void copy_page_slow(void *to, void *from) + * void copy_page(void *to, void *from) */ /* @@ -23,7 +23,7 @@ * r10 --- to * r11 --- from */ -ENTRY(copy_page_slow) +ENTRY(copy_page) mov.l r8,@-r15 mov.l r10,@-r15 mov.l r11,@-r15 @@ -68,8 +68,9 @@ ENTRY(copy_page_slow) rts nop - .align 2 + .balign 4 .Lpsz: .long PAGE_SIZE + /* * __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); * Return the number of bytes NOT copied diff --git a/arch/sh/lib/io.c b/arch/sh/lib/io.c new file mode 100644 index 000000000000..4f54ec43516f --- /dev/null +++ b/arch/sh/lib/io.c @@ -0,0 +1,82 @@ +/* + * arch/sh/lib/io.c - SH32 optimized I/O routines + * + * Copyright (C) 2000 Stuart Menefy + * Copyright (C) 2005 Paul Mundt + * + * Provide real functions which expand to whatever the header file defined. + * Also definitions of machine independent IO functions. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/module.h> +#include <linux/io.h> + +void __raw_readsl(unsigned long addr, void *datap, int len) +{ + u32 *data; + + for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--) + *data++ = ctrl_inl(addr); + + if (likely(len >= (0x20 >> 2))) { + int tmp2, tmp3, tmp4, tmp5, tmp6; + + __asm__ __volatile__( + "1: \n\t" + "mov.l @%7, r0 \n\t" + "mov.l @%7, %2 \n\t" +#ifdef CONFIG_CPU_SH4 + "movca.l r0, @%0 \n\t" +#else + "mov.l r0, @%0 \n\t" +#endif + "mov.l @%7, %3 \n\t" + "mov.l @%7, %4 \n\t" + "mov.l @%7, %5 \n\t" + "mov.l @%7, %6 \n\t" + "mov.l @%7, r7 \n\t" + "mov.l @%7, r0 \n\t" + "mov.l %2, @(0x04,%0) \n\t" + "mov #0x20>>2, %2 \n\t" + "mov.l %3, @(0x08,%0) \n\t" + "sub %2, %1 \n\t" + "mov.l %4, @(0x0c,%0) \n\t" + "cmp/hi %1, %2 ! T if 32 > len \n\t" + "mov.l %5, @(0x10,%0) \n\t" + "mov.l %6, @(0x14,%0) \n\t" + "mov.l r7, @(0x18,%0) \n\t" + "mov.l r0, @(0x1c,%0) \n\t" + "bf.s 1b \n\t" + " add #0x20, %0 \n\t" + : "=&r" (data), "=&r" (len), + "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4), + "=&r" (tmp5), "=&r" (tmp6) + : "r"(addr), "0" (data), "1" (len) + : "r0", "r7", "t", "memory"); + } + + for (; len != 0; len--) + *data++ = ctrl_inl(addr); +} +EXPORT_SYMBOL(__raw_readsl); + +void __raw_writesl(unsigned long addr, const void *data, int len) +{ + if (likely(len != 0)) { + int tmp1; + + __asm__ __volatile__ ( + "1: \n\t" + "mov.l @%0+, %1 \n\t" + "dt %3 \n\t" + "bf.s 1b \n\t" + " mov.l %1, @%4 \n\t" + : "=&r" (data), "=&r" (tmp1) + : "0" (data), "r" (len), "r"(addr) + : "t", "memory"); + } +} +EXPORT_SYMBOL(__raw_writesl); diff --git a/arch/sh64/lib/.gitignore b/arch/sh/lib64/.gitignore index 3508c2cb23c4..3508c2cb23c4 100644 --- a/arch/sh64/lib/.gitignore +++ b/arch/sh/lib64/.gitignore diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile new file mode 100644 index 000000000000..9950966923a0 --- /dev/null +++ b/arch/sh/lib64/Makefile @@ -0,0 +1,15 @@ +# +# Makefile for the SH-5 specific library files.. +# +# Copyright (C) 2000, 2001 Paolo Alberelli +# Copyright (C) 2003 Paul Mundt +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# + +# Panic should really be compiled as PIC +lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o copy_user_memcpy.o \ + copy_page.o clear_page.o + diff --git a/arch/sh64/lib/c-checksum.c b/arch/sh/lib64/c-checksum.c index 053137abd8a0..5dfbd8b5e558 100644 --- a/arch/sh64/lib/c-checksum.c +++ b/arch/sh/lib64/c-checksum.c @@ -1,12 +1,9 @@ /* - * arch/sh64/lib/c-checksum.c + * arch/sh/lib64/c-checksum.c * * This file contains network checksum routines that are better done * in an architecture-specific manner due to speed.. */ - -#undef DEBUG - #include <linux/string.h> #include <linux/errno.h> #include <linux/kernel.h> diff --git a/arch/sh64/lib/page_clear.S b/arch/sh/lib64/clear_page.S index ac0111d669a3..007ab48ecc1c 100644 --- a/arch/sh64/lib/page_clear.S +++ b/arch/sh/lib64/clear_page.S @@ -25,8 +25,8 @@ .little .balign 8 - .global sh64_page_clear -sh64_page_clear: + .global clear_page +clear_page: pta/l 1f, tr1 pta/l 2f, tr2 ptabs/l r18, tr0 diff --git a/arch/sh64/lib/page_copy.S b/arch/sh/lib64/copy_page.S index e159c3cd2582..0ec6fca63b56 100644 --- a/arch/sh64/lib/page_copy.S +++ b/arch/sh/lib64/copy_page.S @@ -10,8 +10,8 @@ of SH5-101 cut2 eval chip with Cayman board DDR memory. Parameters: - r2 : source effective address (start of page) - r3 : destination effective address (start of page) + r2 : destination effective address (start of page) + r3 : source effective address (start of page) Always copies 4096 bytes. @@ -27,10 +27,10 @@ .little .balign 8 - .global sh64_page_copy -sh64_page_copy: + .global copy_page +copy_page: - /* Copy 4096 bytes worth of data from r2 to r3. + /* Copy 4096 bytes worth of data from r3 to r2. Do prefetches 4 lines ahead. Do alloco 2 lines ahead */ @@ -41,21 +41,21 @@ sh64_page_copy: #if 0 /* TAKum03020 */ - ld.q r2, 0x00, r63 - ld.q r2, 0x20, r63 - ld.q r2, 0x40, r63 - ld.q r2, 0x60, r63 + ld.q r3, 0x00, r63 + ld.q r3, 0x20, r63 + ld.q r3, 0x40, r63 + ld.q r3, 0x60, r63 #endif - alloco r3, 0x00 + alloco r2, 0x00 synco ! TAKum03020 - alloco r3, 0x20 + alloco r2, 0x20 synco ! TAKum03020 movi 3968, r6 - add r3, r6, r6 + add r2, r6, r6 addi r6, 64, r7 addi r7, 64, r8 - sub r2, r3, r60 + sub r3, r2, r60 addi r60, 8, r61 addi r61, 8, r62 addi r62, 8, r23 @@ -67,25 +67,23 @@ sh64_page_copy: 1: #if 0 /* TAKum03020 */ - bge/u r3, r6, tr2 ! skip prefetch for last 4 lines - ldx.q r3, r22, r63 ! prefetch 4 lines hence + bge/u r2, r6, tr2 ! skip prefetch for last 4 lines + ldx.q r2, r22, r63 ! prefetch 4 lines hence #endif 2: - bge/u r3, r7, tr3 ! skip alloco for last 2 lines - alloco r3, 0x40 ! alloc destination line 2 lines ahead + bge/u r2, r7, tr3 ! skip alloco for last 2 lines + alloco r2, 0x40 ! alloc destination line 2 lines ahead synco ! TAKum03020 3: - ldx.q r3, r60, r36 - ldx.q r3, r61, r37 - ldx.q r3, r62, r38 - ldx.q r3, r23, r39 - st.q r3, 0, r36 - st.q r3, 8, r37 - st.q r3, 16, r38 - st.q r3, 24, r39 - addi r3, 32, r3 - bgt/l r8, r3, tr1 + ldx.q r2, r60, r36 + ldx.q r2, r61, r37 + ldx.q r2, r62, r38 + ldx.q r2, r23, r39 + st.q r2, 0, r36 + st.q r2, 8, r37 + st.q r2, 16, r38 + st.q r2, 24, r39 + addi r2, 32, r2 + bgt/l r8, r2, tr1 blink tr0, r63 ! return - - diff --git a/arch/sh64/lib/copy_user_memcpy.S b/arch/sh/lib64/copy_user_memcpy.S index 2a62816d2ddd..2a62816d2ddd 100644 --- a/arch/sh64/lib/copy_user_memcpy.S +++ b/arch/sh/lib64/copy_user_memcpy.S diff --git a/arch/sh64/lib/dbg.c b/arch/sh/lib64/dbg.c index 97816e0baf19..75825ef6e084 100644 --- a/arch/sh64/lib/dbg.c +++ b/arch/sh/lib64/dbg.c @@ -2,7 +2,7 @@ -- -- Identity : Linux50 Debug Funcions -- --- File : arch/sh64/lib/dbg.C +-- File : arch/sh/lib64/dbg.c -- -- Copyright 2000, 2001 STMicroelectronics Limited. -- Copyright 2004 Richard Curnow (evt_debug etc) diff --git a/arch/sh64/lib/memcpy.c b/arch/sh/lib64/memcpy.c index fba436a92bfa..fba436a92bfa 100644 --- a/arch/sh64/lib/memcpy.c +++ b/arch/sh/lib64/memcpy.c diff --git a/arch/sh64/lib/panic.c b/arch/sh/lib64/panic.c index c9eb1cb50d97..ff559e2a96f7 100644 --- a/arch/sh64/lib/panic.c +++ b/arch/sh/lib64/panic.c @@ -8,7 +8,7 @@ #include <linux/kernel.h> #include <asm/io.h> -#include <asm/registers.h> +#include <asm/cpu/registers.h> /* THIS IS A PHYSICAL ADDRESS */ #define HDSP2534_ADDR (0x04002100) diff --git a/arch/sh64/lib/udelay.c b/arch/sh/lib64/udelay.c index 327653914007..23c7d17fb9f7 100644 --- a/arch/sh64/lib/udelay.c +++ b/arch/sh/lib64/udelay.c @@ -1,5 +1,5 @@ /* - * arch/sh64/lib/udelay.c + * arch/sh/lib64/udelay.c * * Delay routines, using a pre-computed "loops_per_jiffy" value. * @@ -13,8 +13,6 @@ #include <linux/sched.h> #include <asm/param.h> -extern unsigned long loops_per_jiffy; - /* * Use only for very small delays (< 1 msec). * @@ -49,11 +47,10 @@ void __ndelay(unsigned long long nsecs, unsigned long lpj) void udelay(unsigned long usecs) { - __udelay(usecs, loops_per_jiffy); + __udelay(usecs, cpu_data[raw_smp_processor_id()].loops_per_jiffy); } void ndelay(unsigned long nsecs) { - __ndelay(nsecs, loops_per_jiffy); + __ndelay(nsecs, cpu_data[raw_smp_processor_id()].loops_per_jiffy); } - diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 1265f204f7d1..f549b8cd2501 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -1,193 +1,3 @@ -# -# Processor families -# -config CPU_SH2 - bool - -config CPU_SH2A - bool - select CPU_SH2 - -config CPU_SH3 - bool - select CPU_HAS_INTEVT - select CPU_HAS_SR_RB - -config CPU_SH4 - bool - select CPU_HAS_INTEVT - select CPU_HAS_SR_RB - select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2 - select CPU_HAS_FPU if !CPU_SH4AL_DSP - -config CPU_SH4A - bool - select CPU_SH4 - -config CPU_SH4AL_DSP - bool - select CPU_SH4A - select CPU_HAS_DSP - -config CPU_SHX2 - bool - -config CPU_SHX3 - bool - -choice - prompt "Processor sub-type selection" - -# -# Processor subtypes -# - -# SH-2 Processor Support - -config CPU_SUBTYPE_SH7619 - bool "Support SH7619 processor" - select CPU_SH2 - -# SH-2A Processor Support - -config CPU_SUBTYPE_SH7206 - bool "Support SH7206 processor" - select CPU_SH2A - -# SH-3 Processor Support - -config CPU_SUBTYPE_SH7705 - bool "Support SH7705 processor" - select CPU_SH3 - -config CPU_SUBTYPE_SH7706 - bool "Support SH7706 processor" - select CPU_SH3 - help - Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. - -config CPU_SUBTYPE_SH7707 - bool "Support SH7707 processor" - select CPU_SH3 - help - Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. - -config CPU_SUBTYPE_SH7708 - bool "Support SH7708 processor" - select CPU_SH3 - help - Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or - if you have a 100 Mhz SH-3 HD6417708R CPU. - -config CPU_SUBTYPE_SH7709 - bool "Support SH7709 processor" - select CPU_SH3 - help - Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. - -config CPU_SUBTYPE_SH7710 - bool "Support SH7710 processor" - select CPU_SH3 - select CPU_HAS_DSP - help - Select SH7710 if you have a SH3-DSP SH7710 CPU. - -config CPU_SUBTYPE_SH7712 - bool "Support SH7712 processor" - select CPU_SH3 - select CPU_HAS_DSP - help - Select SH7712 if you have a SH3-DSP SH7712 CPU. - -config CPU_SUBTYPE_SH7720 - bool "Support SH7720 processor" - select CPU_SH3 - select CPU_HAS_DSP - help - Select SH7720 if you have a SH3-DSP SH7720 CPU. - -# SH-4 Processor Support - -config CPU_SUBTYPE_SH7750 - bool "Support SH7750 processor" - select CPU_SH4 - help - Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. - -config CPU_SUBTYPE_SH7091 - bool "Support SH7091 processor" - select CPU_SH4 - help - Select SH7091 if you have an SH-4 based Sega device (such as - the Dreamcast, Naomi, and Naomi 2). - -config CPU_SUBTYPE_SH7750R - bool "Support SH7750R processor" - select CPU_SH4 - -config CPU_SUBTYPE_SH7750S - bool "Support SH7750S processor" - select CPU_SH4 - -config CPU_SUBTYPE_SH7751 - bool "Support SH7751 processor" - select CPU_SH4 - help - Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, - or if you have a HD6417751R CPU. - -config CPU_SUBTYPE_SH7751R - bool "Support SH7751R processor" - select CPU_SH4 - -config CPU_SUBTYPE_SH7760 - bool "Support SH7760 processor" - select CPU_SH4 - -config CPU_SUBTYPE_SH4_202 - bool "Support SH4-202 processor" - select CPU_SH4 - -# SH-4A Processor Support - -config CPU_SUBTYPE_SH7770 - bool "Support SH7770 processor" - select CPU_SH4A - -config CPU_SUBTYPE_SH7780 - bool "Support SH7780 processor" - select CPU_SH4A - -config CPU_SUBTYPE_SH7785 - bool "Support SH7785 processor" - select CPU_SH4A - select CPU_SHX2 - select ARCH_SPARSEMEM_ENABLE - select SYS_SUPPORTS_NUMA - -config CPU_SUBTYPE_SHX3 - bool "Support SH-X3 processor" - select CPU_SH4A - select CPU_SHX3 - select ARCH_SPARSEMEM_ENABLE - select SYS_SUPPORTS_NUMA - select SYS_SUPPORTS_SMP - -# SH4AL-DSP Processor Support - -config CPU_SUBTYPE_SH7343 - bool "Support SH7343 processor" - select CPU_SH4AL_DSP - -config CPU_SUBTYPE_SH7722 - bool "Support SH7722 processor" - select CPU_SH4AL_DSP - select CPU_SHX2 - select ARCH_SPARSEMEM_ENABLE - select SYS_SUPPORTS_NUMA - -endchoice - menu "Memory management options" config QUICKLIST @@ -207,7 +17,8 @@ config MMU config PAGE_OFFSET hex - default "0x80000000" if MMU + default "0x80000000" if MMU && SUPERH32 + default "0x20000000" if MMU && SUPERH64 default "0x00000000" config MEMORY_START @@ -228,17 +39,28 @@ config MEMORY_START config MEMORY_SIZE hex "Physical memory size" - default "0x00400000" + default "0x04000000" help This sets the default memory size assumed by your SH kernel. It can be overridden as normal by the 'mem=' argument on the kernel command line. If unsure, consult your board specifications or just leave it - as 0x00400000 which was the default value before this became + as 0x04000000 which was the default value before this became configurable. +# Physical addressing modes + +config 29BIT + def_bool !32BIT + depends on SUPERH32 + config 32BIT + bool + default y if CPU_SH5 + +config PMB bool "Support 32-bit physical addressing through PMB" depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) + select 32BIT default y help If you say Y here, physical addressing will be extended to @@ -256,7 +78,7 @@ config X2TLB config VSYSCALL bool "Support vsyscall page" - depends on MMU + depends on MMU && (CPU_SH3 || CPU_SH4) default y help This will enable support for the kernel mapping a vDSO page @@ -335,7 +157,7 @@ config PAGE_SIZE_8KB config PAGE_SIZE_64KB bool "64kB" - depends on CPU_SH4 + depends on CPU_SH4 || CPU_SH5 help This enables support for 64kB pages, possible on all SH-4 CPUs and later. @@ -344,7 +166,7 @@ endchoice choice prompt "HugeTLB page size" - depends on HUGETLB_PAGE && CPU_SH4 && MMU + depends on HUGETLB_PAGE && (CPU_SH4 || CPU_SH5) && MMU default HUGETLB_PAGE_SIZE_64K config HUGETLB_PAGE_SIZE_64K @@ -365,6 +187,10 @@ config HUGETLB_PAGE_SIZE_64MB bool "64MB" depends on X2TLB +config HUGETLB_PAGE_SIZE_512MB + bool "512MB" + depends on CPU_SH5 + endchoice source "mm/Kconfig" @@ -392,12 +218,12 @@ config SH_DIRECT_MAPPED choice prompt "Cache mode" - default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 + default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 || CPU_SH5 default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A) config CACHE_WRITEBACK bool "Write-back" - depends on CPU_SH2A || CPU_SH3 || CPU_SH4 + depends on CPU_SH2A || CPU_SH3 || CPU_SH4 || CPU_SH5 config CACHE_WRITETHROUGH bool "Write-through" diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile index aa44607f072d..9f4bc3d90b1e 100644 --- a/arch/sh/mm/Makefile +++ b/arch/sh/mm/Makefile @@ -1,37 +1,5 @@ -# -# Makefile for the Linux SuperH-specific parts of the memory manager. -# - -obj-y := init.o extable.o consistent.o - -ifndef CONFIG_CACHE_OFF -obj-$(CONFIG_CPU_SH2) += cache-sh2.o -obj-$(CONFIG_CPU_SH3) += cache-sh3.o -obj-$(CONFIG_CPU_SH4) += cache-sh4.o -obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o +ifeq ($(CONFIG_SUPERH32),y) +include ${srctree}/arch/sh/mm/Makefile_32 +else +include ${srctree}/arch/sh/mm/Makefile_64 endif - -mmu-y := tlb-nommu.o pg-nommu.o -mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \ - ioremap.o - -obj-y += $(mmu-y) - -ifdef CONFIG_DEBUG_FS -obj-$(CONFIG_CPU_SH4) += cache-debugfs.o -endif - -ifdef CONFIG_MMU -obj-$(CONFIG_CPU_SH3) += tlb-sh3.o -obj-$(CONFIG_CPU_SH4) += tlb-sh4.o -ifndef CONFIG_CACHE_OFF -obj-$(CONFIG_CPU_SH4) += pg-sh4.o -obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o -endif -endif - -obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o -obj-$(CONFIG_32BIT) += pmb.o -obj-$(CONFIG_NUMA) += numa.o - -EXTRA_CFLAGS += -Werror diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32 new file mode 100644 index 000000000000..e295db60b91b --- /dev/null +++ b/arch/sh/mm/Makefile_32 @@ -0,0 +1,36 @@ +# +# Makefile for the Linux SuperH-specific parts of the memory manager. +# + +obj-y := init.o extable_32.o consistent.o + +ifndef CONFIG_CACHE_OFF +obj-$(CONFIG_CPU_SH2) += cache-sh2.o +obj-$(CONFIG_CPU_SH3) += cache-sh3.o +obj-$(CONFIG_CPU_SH4) += cache-sh4.o +obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o +endif + +mmu-y := tlb-nommu.o pg-nommu.o +mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o + +obj-y += $(mmu-y) + +ifdef CONFIG_DEBUG_FS +obj-$(CONFIG_CPU_SH4) += cache-debugfs.o +endif + +ifdef CONFIG_MMU +obj-$(CONFIG_CPU_SH3) += tlb-sh3.o +obj-$(CONFIG_CPU_SH4) += tlb-sh4.o +ifndef CONFIG_CACHE_OFF +obj-$(CONFIG_CPU_SH4) += pg-sh4.o +obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o +endif +endif + +obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o +obj-$(CONFIG_PMB) += pmb.o +obj-$(CONFIG_NUMA) += numa.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/sh64/mm/Makefile b/arch/sh/mm/Makefile_64 index d0e813632480..cbd6aa33c5ac 100644 --- a/arch/sh64/mm/Makefile +++ b/arch/sh/mm/Makefile_64 @@ -1,24 +1,24 @@ # -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 2000, 2001 Paolo Alberelli -# Copyright (C) 2003, 2004 Paul Mundt -# -# Makefile for the sh64-specific parts of the Linux memory manager. -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). +# Makefile for the Linux SuperH-specific parts of the memory manager. # -obj-y := cache.o consistent.o extable.o fault.o init.o ioremap.o \ - tlbmiss.o tlb.o +obj-y := init.o extable_64.o consistent.o + +mmu-y := tlb-nommu.o pg-nommu.o +mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o + +ifndef CONFIG_CACHE_OFF +obj-y += cache-sh5.o +endif + +obj-y += $(mmu-y) obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o +obj-$(CONFIG_NUMA) += numa.o + +EXTRA_CFLAGS += -Werror -# Special flags for tlbmiss.o. This puts restrictions on the number of +# Special flags for fault_64.o. This puts restrictions on the number of # caller-save registers that the compiler can target when building this file. # This is required because the code is called from a context in entry.S where # very few registers have been saved in the exception handler (for speed @@ -33,7 +33,7 @@ obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o # The resources not listed below are callee save, i.e. the compiler is free to # use any of them and will spill them to the stack itself. -CFLAGS_tlbmiss.o += -ffixed-r7 \ +CFLAGS_fault_64.o += -ffixed-r7 \ -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \ -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \ -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \ diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c index de6d2c9aa477..db6d950b6f5e 100644 --- a/arch/sh/mm/cache-debugfs.c +++ b/arch/sh/mm/cache-debugfs.c @@ -22,7 +22,8 @@ enum cache_type { CACHE_TYPE_UNIFIED, }; -static int cache_seq_show(struct seq_file *file, void *iter) +static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file, + void *iter) { unsigned int cache_type = (unsigned int)file->private; struct cache_info *cache; @@ -34,11 +35,11 @@ static int cache_seq_show(struct seq_file *file, void *iter) * Go uncached immediately so we don't skew the results any * more than we already are.. */ - jump_to_P2(); + jump_to_uncached(); ccr = ctrl_inl(CCR); if ((ccr & CCR_CACHE_ENABLE) == 0) { - back_to_P1(); + back_to_cached(); seq_printf(file, "disabled\n"); return 0; @@ -104,7 +105,7 @@ static int cache_seq_show(struct seq_file *file, void *iter) addrstart += cache->way_incr; } - back_to_P1(); + back_to_cached(); return 0; } diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 226b190c5b9c..43d7ff6b6ec7 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -190,7 +190,7 @@ void flush_icache_range(unsigned long start, unsigned long end) * .. which happens to be the same behavior as flush_icache_range(). * So, we simply flush out a line. */ -void flush_cache_sigtramp(unsigned long addr) +void __uses_jump_to_uncached flush_cache_sigtramp(unsigned long addr) { unsigned long v, index; unsigned long flags; @@ -205,13 +205,13 @@ void flush_cache_sigtramp(unsigned long addr) (v & boot_cpu_data.icache.entry_mask); local_irq_save(flags); - jump_to_P2(); + jump_to_uncached(); for (i = 0; i < boot_cpu_data.icache.ways; i++, index += boot_cpu_data.icache.way_incr) ctrl_outl(0, index); /* Clear out Valid-bit */ - back_to_P1(); + back_to_cached(); wmb(); local_irq_restore(flags); } @@ -256,12 +256,12 @@ void flush_dcache_page(struct page *page) } /* TODO: Selective icache invalidation through IC address array.. */ -static inline void flush_icache_all(void) +static inline void __uses_jump_to_uncached flush_icache_all(void) { unsigned long flags, ccr; local_irq_save(flags); - jump_to_P2(); + jump_to_uncached(); /* Flush I-cache */ ccr = ctrl_inl(CCR); @@ -269,11 +269,11 @@ static inline void flush_icache_all(void) ctrl_outl(ccr, CCR); /* - * back_to_P1() will take care of the barrier for us, don't add + * back_to_cached() will take care of the barrier for us, don't add * another one! */ - back_to_P1(); + back_to_cached(); local_irq_restore(flags); } diff --git a/arch/sh64/mm/cache.c b/arch/sh/mm/cache-sh5.c index 421487cfff4c..4617e3aeee73 100644 --- a/arch/sh64/mm/cache.c +++ b/arch/sh/mm/cache-sh5.c @@ -1,18 +1,15 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mm/cache.c + * arch/sh/mm/cache-sh5.c * * Original version Copyright (C) 2000, 2001 Paolo Alberelli * Second version Copyright (C) benedict.gaster@superh.com 2002 * Third version Copyright Richard.Curnow@superh.com 2003 * Hacks to third version Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - -/****************************************************************************/ - #include <linux/init.h> #include <linux/mman.h> #include <linux/mm.h> @@ -146,7 +143,7 @@ int __init sh64_cache_init(void) /* The following group of functions deal with mapping and unmapping a temporary page into the DTLB slot that have been set aside for our exclusive use. */ /* In order to accomplish this, we use the generic interface for adding and - removing a wired slot entry as defined in arch/sh64/mm/tlb.c */ + removing a wired slot entry as defined in arch/sh/mm/tlb-sh5.c */ /****************************************************************************/ static unsigned long slot_own_flags; diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c index 4896d7376926..22dacc778823 100644 --- a/arch/sh/mm/cache-sh7705.c +++ b/arch/sh/mm/cache-sh7705.c @@ -71,7 +71,7 @@ void flush_icache_range(unsigned long start, unsigned long end) /* * Writeback&Invalidate the D-cache of the page */ -static void __flush_dcache_page(unsigned long phys) +static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys) { unsigned long ways, waysize, addrstart; unsigned long flags; @@ -92,7 +92,7 @@ static void __flush_dcache_page(unsigned long phys) * possible. */ local_irq_save(flags); - jump_to_P2(); + jump_to_uncached(); ways = current_cpu_data.dcache.ways; waysize = current_cpu_data.dcache.sets; @@ -118,7 +118,7 @@ static void __flush_dcache_page(unsigned long phys) addrstart += current_cpu_data.dcache.way_incr; } while (--ways); - back_to_P1(); + back_to_cached(); local_irq_restore(flags); } @@ -132,15 +132,15 @@ void flush_dcache_page(struct page *page) __flush_dcache_page(PHYSADDR(page_address(page))); } -void flush_cache_all(void) +void __uses_jump_to_uncached flush_cache_all(void) { unsigned long flags; local_irq_save(flags); - jump_to_P2(); + jump_to_uncached(); cache_wback_all(); - back_to_P1(); + back_to_cached(); local_irq_restore(flags); } diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c index e220c29a3c00..7b2131c9eeda 100644 --- a/arch/sh/mm/consistent.c +++ b/arch/sh/mm/consistent.c @@ -1,7 +1,9 @@ /* * arch/sh/mm/consistent.c * - * Copyright (C) 2004 Paul Mundt + * Copyright (C) 2004 - 2007 Paul Mundt + * + * Declared coherent memory functions based on arch/x86/kernel/pci-dma_32.c * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -13,58 +15,152 @@ #include <asm/addrspace.h> #include <asm/io.h> -void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle) +struct dma_coherent_mem { + void *virt_base; + u32 device_base; + int size; + int flags; + unsigned long *bitmap; +}; + +void *dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp) { - struct page *page, *end, *free; void *ret; - int order; + struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; + int order = get_order(size); - size = PAGE_ALIGN(size); - order = get_order(size); + if (mem) { + int page = bitmap_find_free_region(mem->bitmap, mem->size, + order); + if (page >= 0) { + *dma_handle = mem->device_base + (page << PAGE_SHIFT); + ret = mem->virt_base + (page << PAGE_SHIFT); + memset(ret, 0, size); + return ret; + } + if (mem->flags & DMA_MEMORY_EXCLUSIVE) + return NULL; + } - page = alloc_pages(gfp, order); - if (!page) - return NULL; - split_page(page, order); + ret = (void *)__get_free_pages(gfp, order); - ret = page_address(page); - memset(ret, 0, size); - *handle = virt_to_phys(ret); + if (ret != NULL) { + memset(ret, 0, size); + /* + * Pages from the page allocator may have data present in + * cache. So flush the cache before using uncached memory. + */ + dma_cache_sync(NULL, ret, size, DMA_BIDIRECTIONAL); + *dma_handle = virt_to_phys(ret); + } + return ret; +} +EXPORT_SYMBOL(dma_alloc_coherent); - /* - * We must flush the cache before we pass it on to the device - */ - __flush_purge_region(ret, size); +void dma_free_coherent(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; + int order = get_order(size); - page = virt_to_page(ret); - free = page + (size >> PAGE_SHIFT); - end = page + (1 << order); + if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) { + int page = (vaddr - mem->virt_base) >> PAGE_SHIFT; - while (++page < end) { - /* Free any unused pages */ - if (page >= free) { - __free_page(page); - } + bitmap_release_region(mem->bitmap, page, order); + } else { + WARN_ON(irqs_disabled()); /* for portability */ + BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE); + free_pages((unsigned long)vaddr, order); } +} +EXPORT_SYMBOL(dma_free_coherent); + +int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, + dma_addr_t device_addr, size_t size, int flags) +{ + void __iomem *mem_base = NULL; + int pages = size >> PAGE_SHIFT; + int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long); + + if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0) + goto out; + if (!size) + goto out; + if (dev->dma_mem) + goto out; + + /* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */ - return P2SEGADDR(ret); + mem_base = ioremap_nocache(bus_addr, size); + if (!mem_base) + goto out; + + dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL); + if (!dev->dma_mem) + goto out; + dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL); + if (!dev->dma_mem->bitmap) + goto free1_out; + + dev->dma_mem->virt_base = mem_base; + dev->dma_mem->device_base = device_addr; + dev->dma_mem->size = pages; + dev->dma_mem->flags = flags; + + if (flags & DMA_MEMORY_MAP) + return DMA_MEMORY_MAP; + + return DMA_MEMORY_IO; + + free1_out: + kfree(dev->dma_mem); + out: + if (mem_base) + iounmap(mem_base); + return 0; } +EXPORT_SYMBOL(dma_declare_coherent_memory); -void consistent_free(void *vaddr, size_t size) +void dma_release_declared_memory(struct device *dev) { - unsigned long addr = P1SEGADDR((unsigned long)vaddr); - struct page *page=virt_to_page(addr); - int num_pages=(size+PAGE_SIZE-1) >> PAGE_SHIFT; - int i; + struct dma_coherent_mem *mem = dev->dma_mem; - for(i=0;i<num_pages;i++) { - __free_page((page+i)); - } + if (!mem) + return; + dev->dma_mem = NULL; + iounmap(mem->virt_base); + kfree(mem->bitmap); + kfree(mem); } +EXPORT_SYMBOL(dma_release_declared_memory); -void consistent_sync(void *vaddr, size_t size, int direction) +void *dma_mark_declared_memory_occupied(struct device *dev, + dma_addr_t device_addr, size_t size) { - void * p1addr = (void*) P1SEGADDR((unsigned long)vaddr); + struct dma_coherent_mem *mem = dev->dma_mem; + int pages = (size + (device_addr & ~PAGE_MASK) + PAGE_SIZE - 1) >> PAGE_SHIFT; + int pos, err; + + if (!mem) + return ERR_PTR(-EINVAL); + + pos = (device_addr - mem->device_base) >> PAGE_SHIFT; + err = bitmap_allocate_region(mem->bitmap, pos, get_order(pages)); + if (err != 0) + return ERR_PTR(err); + return mem->virt_base + (pos << PAGE_SHIFT); +} +EXPORT_SYMBOL(dma_mark_declared_memory_occupied); + +void dma_cache_sync(struct device *dev, void *vaddr, size_t size, + enum dma_data_direction direction) +{ +#ifdef CONFIG_CPU_SH5 + void *p1addr = vaddr; +#else + void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); +#endif switch (direction) { case DMA_FROM_DEVICE: /* invalidate only */ @@ -80,8 +176,4 @@ void consistent_sync(void *vaddr, size_t size, int direction) BUG(); } } - -EXPORT_SYMBOL(consistent_alloc); -EXPORT_SYMBOL(consistent_free); -EXPORT_SYMBOL(consistent_sync); - +EXPORT_SYMBOL(dma_cache_sync); diff --git a/arch/sh/mm/extable.c b/arch/sh/mm/extable_32.c index c1cf4463d09d..c1cf4463d09d 100644 --- a/arch/sh/mm/extable.c +++ b/arch/sh/mm/extable_32.c diff --git a/arch/sh64/mm/extable.c b/arch/sh/mm/extable_64.c index a2e6e0563772..f05499688d88 100644 --- a/arch/sh64/mm/extable.c +++ b/arch/sh/mm/extable_64.c @@ -1,14 +1,14 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mm/extable.c + * arch/sh/mm/extable_64.c * * Copyright (C) 2003 Richard Curnow * Copyright (C) 2003, 2004 Paul Mundt * * Cloned from the 2.5 SH version.. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ #include <linux/rwsem.h> #include <linux/module.h> @@ -21,13 +21,16 @@ static const struct exception_table_entry __copy_user_fixup_ex = { .fixup = (unsigned long)&__copy_user_fixup, }; -/* Some functions that may trap due to a bad user-mode address have too many loads - and stores in them to make it at all practical to label each one and put them all in - the main exception table. - - In particular, the fast memcpy routine is like this. It's fix-up is just to fall back - to a slow byte-at-a-time copy, which is handled the conventional way. So it's functionally - OK to just handle any trap occurring in the fast memcpy with that fixup. */ +/* + * Some functions that may trap due to a bad user-mode address have too + * many loads and stores in them to make it at all practical to label + * each one and put them all in the main exception table. + * + * In particular, the fast memcpy routine is like this. It's fix-up is + * just to fall back to a slow byte-at-a-time copy, which is handled the + * conventional way. So it's functionally OK to just handle any trap + * occurring in the fast memcpy with that fixup. + */ static const struct exception_table_entry *check_exception_ranges(unsigned long addr) { if ((addr >= (unsigned long)©_user_memcpy) && @@ -77,4 +80,3 @@ int fixup_exception(struct pt_regs *regs) return 0; } - diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault_32.c index 60d74f793a1d..33b43d20e9f6 100644 --- a/arch/sh/mm/fault.c +++ b/arch/sh/mm/fault_32.c @@ -172,7 +172,7 @@ no_context: bust_spinlocks(1); if (oops_may_print()) { - __typeof__(pte_val(__pte(0))) page; + unsigned long page; if (address < PAGE_SIZE) printk(KERN_ALERT "Unable to handle kernel NULL " diff --git a/arch/sh64/mm/tlbmiss.c b/arch/sh/mm/fault_64.c index b767d6cff72f..399d53710d2f 100644 --- a/arch/sh64/mm/tlbmiss.c +++ b/arch/sh/mm/fault_64.c @@ -1,9 +1,5 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mm/tlbmiss.c + * The SH64 TLB miss. * * Original code from fault.c * Copyright (C) 2000, 2001 Paolo Alberelli @@ -12,16 +8,20 @@ * Copyright (C) 2003 Richard.Curnow@superh.com * * IMPORTANT NOTES : - * The do_fast_page_fault function is called from a context in entry.S where very few registers - * have been saved. In particular, the code in this file must be compiled not to use ANY - * caller-save registers that are not part of the restricted save set. Also, it means that - * code in this file must not make calls to functions elsewhere in the kernel, or else the - * excepting context will see corruption in its caller-save registers. Plus, the entry.S save - * area is non-reentrant, so this code has to run with SR.BL==1, i.e. no interrupts taken inside - * it and panic on any exception. + * The do_fast_page_fault function is called from a context in entry.S + * where very few registers have been saved. In particular, the code in + * this file must be compiled not to use ANY caller-save registers that + * are not part of the restricted save set. Also, it means that code in + * this file must not make calls to functions elsewhere in the kernel, or + * else the excepting context will see corruption in its caller-save + * registers. Plus, the entry.S save area is non-reentrant, so this code + * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic + * on any exception. * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/signal.h> #include <linux/sched.h> #include <linux/kernel.h> @@ -33,14 +33,13 @@ #include <linux/mm.h> #include <linux/smp.h> #include <linux/interrupt.h> - #include <asm/system.h> #include <asm/tlb.h> #include <asm/io.h> #include <asm/uaccess.h> #include <asm/pgalloc.h> #include <asm/mmu_context.h> -#include <asm/registers.h> /* required by inline asm statements */ +#include <asm/cpu/registers.h> /* Callable from fault.c, so not static */ inline void __do_tlb_refill(unsigned long address, @@ -88,48 +87,47 @@ inline void __do_tlb_refill(unsigned long address, } -static int handle_vmalloc_fault(struct mm_struct *mm, unsigned long protection_flags, +static int handle_vmalloc_fault(struct mm_struct *mm, + unsigned long protection_flags, unsigned long long textaccess, unsigned long address) { pgd_t *dir; + pud_t *pud; pmd_t *pmd; static pte_t *pte; pte_t entry; dir = pgd_offset_k(address); - pmd = pmd_offset(dir, address); - if (pmd_none(*pmd)) { + pud = pud_offset(dir, address); + if (pud_none_or_clear_bad(pud)) return 0; - } - if (pmd_bad(*pmd)) { - pmd_clear(pmd); + pmd = pmd_offset(pud, address); + if (pmd_none_or_clear_bad(pmd)) return 0; - } pte = pte_offset_kernel(pmd, address); entry = *pte; - if (pte_none(entry) || !pte_present(entry)) { + if (pte_none(entry) || !pte_present(entry)) return 0; - } - - if ((pte_val(entry) & protection_flags) != protection_flags) { + if ((pte_val(entry) & protection_flags) != protection_flags) return 0; - } __do_tlb_refill(address, textaccess, pte); return 1; } -static int handle_tlbmiss(struct mm_struct *mm, unsigned long long protection_flags, - unsigned long long textaccess, - unsigned long address) +static int handle_tlbmiss(struct mm_struct *mm, + unsigned long long protection_flags, + unsigned long long textaccess, + unsigned long address) { pgd_t *dir; + pud_t *pud; pmd_t *pmd; pte_t *pte; pte_t entry; @@ -144,49 +142,49 @@ static int handle_tlbmiss(struct mm_struct *mm, unsigned long long protection_fl See how mm->pgd is allocated and initialised in pgd_alloc to see why the next test is necessary. - RPC */ - if (address >= (unsigned long) TASK_SIZE) { + if (address >= (unsigned long) TASK_SIZE) /* upper half - never has page table entries. */ return 0; - } + dir = pgd_offset(mm, address); - if (pgd_none(*dir)) { + if (pgd_none(*dir) || !pgd_present(*dir)) return 0; - } - if (!pgd_present(*dir)) { + if (!pgd_present(*dir)) return 0; - } - pmd = pmd_offset(dir, address); - if (pmd_none(*pmd)) { + pud = pud_offset(dir, address); + if (pud_none(*pud) || !pud_present(*pud)) return 0; - } - if (!pmd_present(*pmd)) { + + pmd = pmd_offset(pud, address); + if (pmd_none(*pmd) || !pmd_present(*pmd)) return 0; - } + pte = pte_offset_kernel(pmd, address); entry = *pte; - if (pte_none(entry)) { - return 0; - } - if (!pte_present(entry)) { + + if (pte_none(entry) || !pte_present(entry)) return 0; - } - /* If the page doesn't have sufficient protection bits set to service the - kind of fault being handled, there's not much point doing the TLB refill. - Punt the fault to the general handler. */ - if ((pte_val(entry) & protection_flags) != protection_flags) { + /* + * If the page doesn't have sufficient protection bits set to + * service the kind of fault being handled, there's not much + * point doing the TLB refill. Punt the fault to the general + * handler. + */ + if ((pte_val(entry) & protection_flags) != protection_flags) return 0; - } __do_tlb_refill(address, textaccess, pte); return 1; } -/* Put all this information into one structure so that everything is just arithmetic - relative to a single base address. This reduces the number of movi/shori pairs needed - just to load addresses of static data. */ +/* + * Put all this information into one structure so that everything is just + * arithmetic relative to a single base address. This reduces the number + * of movi/shori pairs needed just to load addresses of static data. + */ struct expevt_lookup { unsigned short protection_flags[8]; unsigned char is_text_access[8]; @@ -216,7 +214,8 @@ static struct expevt_lookup expevt_lookup_table = { general fault handling in fault.c which deals with mapping file-backed pages, stack growth, segmentation faults, swapping etc etc) */ -asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt, +asmlinkage int do_fast_page_fault(unsigned long long ssr_md, + unsigned long long expevt, unsigned long address) { struct task_struct *tsk; @@ -226,26 +225,23 @@ asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long unsigned long long index; unsigned long long expevt4; - /* The next few lines implement a way of hashing EXPEVT into a small array index - which can be used to lookup parameters specific to the type of TLBMISS being - handled. Note: - ITLBMISS has EXPEVT==0xa40 - RTLBMISS has EXPEVT==0x040 - WTLBMISS has EXPEVT==0x060 - */ - + /* The next few lines implement a way of hashing EXPEVT into a + * small array index which can be used to lookup parameters + * specific to the type of TLBMISS being handled. + * + * Note: + * ITLBMISS has EXPEVT==0xa40 + * RTLBMISS has EXPEVT==0x040 + * WTLBMISS has EXPEVT==0x060 + */ expevt4 = (expevt >> 4); - /* TODO : xor ssr_md into this expression too. Then we can check that PRU is set - when it needs to be. */ + /* TODO : xor ssr_md into this expression too. Then we can check + * that PRU is set when it needs to be. */ index = expevt4 ^ (expevt4 >> 5); index &= 7; protection_flags = expevt_lookup_table.protection_flags[index]; textaccess = expevt_lookup_table.is_text_access[index]; -#ifdef CONFIG_SH64_PROC_TLB - ++calls_to_do_fast_page_fault; -#endif - /* SIM * Note this is now called with interrupts still disabled * This is to cope with being called for a missing IO port @@ -262,18 +258,18 @@ asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long if ((address >= VMALLOC_START && address < VMALLOC_END) || (address >= IOBASE_VADDR && address < IOBASE_END)) { - if (ssr_md) { - /* Process-contexts can never have this address range mapped */ - if (handle_vmalloc_fault(mm, protection_flags, textaccess, address)) { + if (ssr_md) + /* + * Process-contexts can never have this address + * range mapped + */ + if (handle_vmalloc_fault(mm, protection_flags, + textaccess, address)) return 1; - } - } } else if (!in_interrupt() && mm) { - if (handle_tlbmiss(mm, protection_flags, textaccess, address)) { + if (handle_tlbmiss(mm, protection_flags, textaccess, address)) return 1; - } } return 0; } - diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index d5e160da64b2..2918c6b14659 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c @@ -23,9 +23,7 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); pgd_t swapper_pg_dir[PTRS_PER_PGD]; - -void (*copy_page)(void *from, void *to); -void (*clear_page)(void *to); +unsigned long cached_to_uncached = 0; void show_mem(void) { @@ -102,7 +100,8 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); - flush_tlb_one(get_asid(), addr); + if (cached_to_uncached) + flush_tlb_one(get_asid(), addr); } /* @@ -131,6 +130,37 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) set_pte_phys(address, phys, prot); } + +void __init page_table_range_init(unsigned long start, unsigned long end, + pgd_t *pgd_base) +{ + pgd_t *pgd; + pud_t *pud; + pmd_t *pmd; + int pgd_idx; + unsigned long vaddr; + + vaddr = start & PMD_MASK; + end = (end + PMD_SIZE - 1) & PMD_MASK; + pgd_idx = pgd_index(vaddr); + pgd = pgd_base + pgd_idx; + + for ( ; (pgd_idx < PTRS_PER_PGD) && (vaddr != end); pgd++, pgd_idx++) { + BUG_ON(pgd_none(*pgd)); + pud = pud_offset(pgd, 0); + BUG_ON(pud_none(*pud)); + pmd = pmd_offset(pud, 0); + + if (!pmd_present(*pmd)) { + pte_t *pte_table; + pte_table = (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE); + memset(pte_table, 0, PAGE_SIZE); + pmd_populate_kernel(&init_mm, pmd, pte_table); + } + + vaddr += PMD_SIZE; + } +} #endif /* CONFIG_MMU */ /* @@ -150,6 +180,11 @@ void __init paging_init(void) * check for a null value. */ set_TTB(swapper_pg_dir); + /* Populate the relevant portions of swapper_pg_dir so that + * we can use the fixmap entries without calling kmalloc. + * pte's will be filled in by __set_fixmap(). */ + page_table_range_init(FIXADDR_START, FIXADDR_TOP, swapper_pg_dir); + memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); for_each_online_node(nid) { @@ -167,9 +202,22 @@ void __init paging_init(void) } free_area_init_nodes(max_zone_pfns); + + /* Set up the uncached fixmap */ + set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start)); + +#ifdef CONFIG_29BIT + /* + * Handle trivial transitions between cached and uncached + * segments, making use of the 1:1 mapping relationship in + * 512MB lowmem. + */ + cached_to_uncached = P2SEG - P1SEG; +#endif } static struct kcore_list kcore_mem, kcore_vmalloc; +int after_bootmem = 0; void __init mem_init(void) { @@ -202,17 +250,7 @@ void __init mem_init(void) memset(empty_zero_page, 0, PAGE_SIZE); __flush_wback_region(empty_zero_page, PAGE_SIZE); - /* - * Setup wrappers for copy/clear_page(), these will get overridden - * later in the boot process if a better method is available. - */ -#ifdef CONFIG_MMU - copy_page = copy_page_slow; - clear_page = clear_page_slow; -#else - copy_page = copy_page_nommu; - clear_page = clear_page_nommu; -#endif + after_bootmem = 1; codesize = (unsigned long) &_etext - (unsigned long) &_text; datasize = (unsigned long) &_edata - (unsigned long) &_etext; diff --git a/arch/sh/mm/ioremap.c b/arch/sh/mm/ioremap_32.c index 0c7b7e33abdc..0c7b7e33abdc 100644 --- a/arch/sh/mm/ioremap.c +++ b/arch/sh/mm/ioremap_32.c diff --git a/arch/sh64/mm/ioremap.c b/arch/sh/mm/ioremap_64.c index 535304e6601f..e27d16519235 100644 --- a/arch/sh64/mm/ioremap.c +++ b/arch/sh/mm/ioremap_64.c @@ -1,30 +1,31 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mm/ioremap.c + * arch/sh/mm/ioremap_64.c * * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt + * Copyright (C) 2003 - 2007 Paul Mundt * * Mostly derived from arch/sh/mm/ioremap.c which, in turn is mostly * derived from arch/i386/mm/ioremap.c . * * (C) Copyright 1995 1996 Linus Torvalds + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ -#include <linux/kernel.h> -#include <linux/slab.h> #include <linux/vmalloc.h> -#include <linux/sched.h> -#include <linux/string.h> -#include <linux/io.h> #include <linux/ioport.h> +#include <linux/module.h> +#include <linux/mm.h> +#include <linux/io.h> #include <linux/bootmem.h> #include <linux/proc_fs.h> -#include <linux/module.h> +#include <asm/page.h> #include <asm/pgalloc.h> +#include <asm/addrspace.h> +#include <asm/cacheflush.h> #include <asm/tlbflush.h> +#include <asm/mmu.h> static void shmedia_mapioaddr(unsigned long, unsigned long); static unsigned long shmedia_ioremap(struct resource *, u32, int); @@ -42,7 +43,8 @@ static unsigned long shmedia_ioremap(struct resource *, u32, int); * have to convert them into an offset in a page-aligned mapping, but the * caller shouldn't need to know that small detail. */ -void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags) +void *__ioremap(unsigned long phys_addr, unsigned long size, + unsigned long flags) { void * addr; struct vm_struct * area; @@ -83,7 +85,7 @@ void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flag } EXPORT_SYMBOL(__ioremap); -void iounmap(void *addr) +void __iounmap(void *addr) { struct vm_struct *area; @@ -96,7 +98,7 @@ void iounmap(void *addr) kfree(area); } -EXPORT_SYMBOL(iounmap); +EXPORT_SYMBOL(__iounmap); static struct resource shmedia_iomap = { .name = "shmedia_iomap", @@ -265,6 +267,7 @@ static __init_refok void *sh64_get_page(void) static void shmedia_mapioaddr(unsigned long pa, unsigned long va) { pgd_t *pgdp; + pud_t *pudp; pmd_t *pmdp; pte_t *ptep, pte; pgprot_t prot; @@ -274,11 +277,17 @@ static void shmedia_mapioaddr(unsigned long pa, unsigned long va) pgdp = pgd_offset_k(va); if (pgd_none(*pgdp) || !pgd_present(*pgdp)) { + pudp = (pud_t *)sh64_get_page(); + set_pgd(pgdp, __pgd((unsigned long)pudp | _KERNPG_TABLE)); + } + + pudp = pud_offset(pgdp, va); + if (pud_none(*pudp) || !pud_present(*pudp)) { pmdp = (pmd_t *)sh64_get_page(); - set_pgd(pgdp, __pgd((unsigned long)pmdp | _KERNPG_TABLE)); + set_pud(pudp, __pud((unsigned long)pmdp | _KERNPG_TABLE)); } - pmdp = pmd_offset(pgdp, va); + pmdp = pmd_offset(pudp, va); if (pmd_none(*pmdp) || !pmd_present(*pmdp) ) { ptep = (pte_t *)sh64_get_page(); set_pmd(pmdp, __pmd((unsigned long)ptep + _PAGE_TABLE)); @@ -302,12 +311,19 @@ static void shmedia_mapioaddr(unsigned long pa, unsigned long va) static void shmedia_unmapioaddr(unsigned long vaddr) { pgd_t *pgdp; + pud_t *pudp; pmd_t *pmdp; pte_t *ptep; pgdp = pgd_offset_k(vaddr); - pmdp = pmd_offset(pgdp, vaddr); + if (pgd_none(*pgdp) || pgd_bad(*pgdp)) + return; + + pudp = pud_offset(pgdp, vaddr); + if (pud_none(*pudp) || pud_bad(*pudp)) + return; + pmdp = pmd_offset(pudp, vaddr); if (pmd_none(*pmdp) || pmd_bad(*pmdp)) return; diff --git a/arch/sh/mm/pg-nommu.c b/arch/sh/mm/pg-nommu.c index d15221beaa16..677dd57f0877 100644 --- a/arch/sh/mm/pg-nommu.c +++ b/arch/sh/mm/pg-nommu.c @@ -14,12 +14,12 @@ #include <linux/string.h> #include <asm/page.h> -void copy_page_nommu(void *to, void *from) +void copy_page(void *to, void *from) { memcpy(to, from, PAGE_SIZE); } -void clear_page_nommu(void *to) +void clear_page(void *to) { memset(to, 0, PAGE_SIZE); } diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index 1d45b82f0a63..ab81c602295f 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -27,6 +27,7 @@ #include <asm/pgtable.h> #include <asm/mmu.h> #include <asm/io.h> +#include <asm/mmu_context.h> #define NR_PMB_ENTRIES 16 @@ -162,18 +163,18 @@ repeat: return 0; } -int set_pmb_entry(struct pmb_entry *pmbe) +int __uses_jump_to_uncached set_pmb_entry(struct pmb_entry *pmbe) { int ret; - jump_to_P2(); + jump_to_uncached(); ret = __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry); - back_to_P1(); + back_to_cached(); return ret; } -void clear_pmb_entry(struct pmb_entry *pmbe) +void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe) { unsigned int entry = pmbe->entry; unsigned long addr; @@ -187,7 +188,7 @@ void clear_pmb_entry(struct pmb_entry *pmbe) entry >= NR_PMB_ENTRIES)) return; - jump_to_P2(); + jump_to_uncached(); /* Clear V-bit */ addr = mk_pmb_addr(entry); @@ -196,7 +197,7 @@ void clear_pmb_entry(struct pmb_entry *pmbe) addr = mk_pmb_data(entry); ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr); - back_to_P1(); + back_to_cached(); clear_bit(entry, &pmb_map); } @@ -301,17 +302,17 @@ static void pmb_cache_ctor(struct kmem_cache *cachep, void *pmb) pmbe->entry = PMB_NO_ENTRY; } -static int __init pmb_init(void) +static int __uses_jump_to_uncached pmb_init(void) { unsigned int nr_entries = ARRAY_SIZE(pmb_init_map); - unsigned int entry; + unsigned int entry, i; BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES)); pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry), 0, SLAB_PANIC, pmb_cache_ctor); - jump_to_P2(); + jump_to_uncached(); /* * Ordering is important, P2 must be mapped in the PMB before we @@ -329,7 +330,12 @@ static int __init pmb_init(void) /* PMB.SE and UB[7] */ ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR); - back_to_P1(); + /* Flush out the TLB */ + i = ctrl_inl(MMUCR); + i |= MMUCR_TI; + ctrl_outl(i, MMUCR); + + back_to_cached(); return 0; } diff --git a/arch/sh/mm/tlb-nommu.c b/arch/sh/mm/tlb-nommu.c index 1ccca7c0532e..15111bc7ddd6 100644 --- a/arch/sh/mm/tlb-nommu.c +++ b/arch/sh/mm/tlb-nommu.c @@ -9,6 +9,7 @@ */ #include <linux/kernel.h> #include <linux/mm.h> +#include <asm/pgtable.h> /* * Nothing too terribly exciting here .. @@ -49,3 +50,12 @@ void update_mmu_cache(struct vm_area_struct * vma, { BUG(); } + +void __init page_table_range_init(unsigned long start, unsigned long end, + pgd_t *pgd_base) +{ +} + +void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) +{ +} diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c index 2d1dd6044307..f0c7b7397fa6 100644 --- a/arch/sh/mm/tlb-sh4.c +++ b/arch/sh/mm/tlb-sh4.c @@ -79,7 +79,8 @@ void update_mmu_cache(struct vm_area_struct * vma, local_irq_restore(flags); } -void local_flush_tlb_one(unsigned long asid, unsigned long page) +void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid, + unsigned long page) { unsigned long addr, data; @@ -91,7 +92,7 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page) */ addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT; data = page | asid; /* VALID bit is off */ - jump_to_P2(); + jump_to_uncached(); ctrl_outl(data, addr); - back_to_P1(); + back_to_cached(); } diff --git a/arch/sh64/mm/tlb.c b/arch/sh/mm/tlb-sh5.c index d517e7d70340..f34274a1ded3 100644 --- a/arch/sh64/mm/tlb.c +++ b/arch/sh/mm/tlb-sh5.c @@ -1,5 +1,5 @@ /* - * arch/sh64/mm/tlb.c + * arch/sh/mm/tlb-sh5.c * * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> * Copyright (C) 2003 Richard Curnow <richard.curnow@superh.com> @@ -7,7 +7,6 @@ * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. - * */ #include <linux/mm.h> #include <linux/init.h> @@ -163,4 +162,3 @@ inline void sh64_setup_tlb_slot(unsigned long long config_addr, */ inline void sh64_teardown_tlb_slot(unsigned long long config_addr) __attribute__ ((alias("__flush_tlb_slot"))); - diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlbflush_32.c index 6f45c1f8a7fe..6f45c1f8a7fe 100644 --- a/arch/sh/mm/tlb-flush.c +++ b/arch/sh/mm/tlbflush_32.c diff --git a/arch/sh64/mm/fault.c b/arch/sh/mm/tlbflush_64.c index 7c79a1ba8059..2a98c9ec88ff 100644 --- a/arch/sh64/mm/fault.c +++ b/arch/sh/mm/tlbflush_64.c @@ -1,16 +1,14 @@ /* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mm/fault.c + * arch/sh/mm/tlb-flush_64.c * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003 Richard Curnow (/proc/tlb, bug fixes) * Copyright (C) 2003 Paul Mundt * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ - #include <linux/signal.h> #include <linux/rwsem.h> #include <linux/sched.h> @@ -23,39 +21,12 @@ #include <linux/mm.h> #include <linux/smp.h> #include <linux/interrupt.h> - #include <asm/system.h> #include <asm/io.h> #include <asm/tlb.h> #include <asm/uaccess.h> #include <asm/pgalloc.h> #include <asm/mmu_context.h> -#include <asm/registers.h> /* required by inline asm statements */ - -#if defined(CONFIG_SH64_PROC_TLB) -#include <linux/init.h> -#include <linux/proc_fs.h> -/* Count numbers of tlb refills in each region */ -static unsigned long long calls_to_update_mmu_cache = 0ULL; -static unsigned long long calls_to_flush_tlb_page = 0ULL; -static unsigned long long calls_to_flush_tlb_range = 0ULL; -static unsigned long long calls_to_flush_tlb_mm = 0ULL; -static unsigned long long calls_to_flush_tlb_all = 0ULL; -unsigned long long calls_to_do_slow_page_fault = 0ULL; -unsigned long long calls_to_do_fast_page_fault = 0ULL; - -/* Count size of ranges for flush_tlb_range */ -static unsigned long long flush_tlb_range_1 = 0ULL; -static unsigned long long flush_tlb_range_2 = 0ULL; -static unsigned long long flush_tlb_range_3_4 = 0ULL; -static unsigned long long flush_tlb_range_5_7 = 0ULL; -static unsigned long long flush_tlb_range_8_11 = 0ULL; -static unsigned long long flush_tlb_range_12_15 = 0ULL; -static unsigned long long flush_tlb_range_16_up = 0ULL; - -static unsigned long long page_not_present = 0ULL; - -#endif extern void die(const char *,struct pt_regs *,long); @@ -87,29 +58,27 @@ static inline void print_task(struct task_struct *tsk) static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address) { pgd_t *dir; + pud_t *pud; pmd_t *pmd; pte_t *pte; pte_t entry; dir = pgd_offset(mm, address); - if (pgd_none(*dir)) { + if (pgd_none(*dir)) return NULL; - } - pmd = pmd_offset(dir, address); - if (pmd_none(*pmd)) { + pud = pud_offset(dir, address); + if (pud_none(*pud)) + return NULL; + + pmd = pmd_offset(pud, address); + if (pmd_none(*pmd)) return NULL; - } pte = pte_offset_kernel(pmd, address); entry = *pte; - - if (pte_none(entry)) { + if (pte_none(entry) || !pte_present(entry)) return NULL; - } - if (!pte_present(entry)) { - return NULL; - } return pte; } @@ -129,10 +98,6 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess, pte_t *pte; int fault; -#if defined(CONFIG_SH64_PROC_TLB) - ++calls_to_do_slow_page_fault; -#endif - /* SIM * Note this is now called with interrupts still disabled * This is to cope with being called for a missing IO port @@ -355,16 +320,9 @@ do_sigbus: goto no_context; } - -void flush_tlb_all(void); - void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte) { -#if defined(CONFIG_SH64_PROC_TLB) - ++calls_to_update_mmu_cache; -#endif - /* * This appears to get called once for every pte entry that gets * established => I don't think it's efficient to try refilling the @@ -378,40 +336,29 @@ void update_mmu_cache(struct vm_area_struct * vma, */ } -static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void local_flush_tlb_one(unsigned long asid, unsigned long page) { unsigned long long match, pteh=0, lpage; unsigned long tlb; - struct mm_struct *mm; - - mm = vma->vm_mm; - - if (mm->context == NO_CONTEXT) - return; /* * Sign-extend based on neff. */ lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page; - match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID; + match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID; match |= lpage; - /* Do ITLB : don't bother for pages in non-exectutable VMAs */ - if (vma->vm_flags & VM_EXEC) { - for_each_itlb_entry(tlb) { - asm volatile ("getcfg %1, 0, %0" - : "=r" (pteh) - : "r" (tlb) ); - - if (pteh == match) { - __flush_tlb_slot(tlb); - break; - } + for_each_itlb_entry(tlb) { + asm volatile ("getcfg %1, 0, %0" + : "=r" (pteh) + : "r" (tlb) ); + if (pteh == match) { + __flush_tlb_slot(tlb); + break; } } - /* Do DTLB : any page could potentially be in here. */ for_each_dtlb_entry(tlb) { asm volatile ("getcfg %1, 0, %0" : "=r" (pteh) @@ -425,52 +372,29 @@ static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page) } } -void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { unsigned long flags; -#if defined(CONFIG_SH64_PROC_TLB) - ++calls_to_flush_tlb_page; -#endif - if (vma->vm_mm) { page &= PAGE_MASK; local_irq_save(flags); - __flush_tlb_page(vma, page); + local_flush_tlb_one(get_asid(), page); local_irq_restore(flags); } } -void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end) +void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end) { unsigned long flags; unsigned long long match, pteh=0, pteh_epn, pteh_low; unsigned long tlb; + unsigned int cpu = smp_processor_id(); struct mm_struct *mm; mm = vma->vm_mm; - -#if defined(CONFIG_SH64_PROC_TLB) - ++calls_to_flush_tlb_range; - - { - unsigned long size = (end - 1) - start; - size >>= 12; /* divide by PAGE_SIZE */ - size++; /* end=start+4096 => 1 page */ - switch (size) { - case 1 : flush_tlb_range_1++; break; - case 2 : flush_tlb_range_2++; break; - case 3 ... 4 : flush_tlb_range_3_4++; break; - case 5 ... 7 : flush_tlb_range_5_7++; break; - case 8 ... 11 : flush_tlb_range_8_11++; break; - case 12 ... 15 : flush_tlb_range_12_15++; break; - default : flush_tlb_range_16_up++; break; - } - } -#endif - - if (mm->context == NO_CONTEXT) + if (cpu_context(cpu, mm) == NO_CONTEXT) return; local_irq_save(flags); @@ -478,7 +402,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, start &= PAGE_MASK; end &= PAGE_MASK; - match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID; + match = (cpu_asid(cpu, mm) << PTEH_ASID_SHIFT) | PTEH_VALID; /* Flush ITLB */ for_each_itlb_entry(tlb) { @@ -509,94 +433,43 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, local_irq_restore(flags); } -void flush_tlb_mm(struct mm_struct *mm) +void local_flush_tlb_mm(struct mm_struct *mm) { unsigned long flags; + unsigned int cpu = smp_processor_id(); -#if defined(CONFIG_SH64_PROC_TLB) - ++calls_to_flush_tlb_mm; -#endif - - if (mm->context == NO_CONTEXT) + if (cpu_context(cpu, mm) == NO_CONTEXT) return; local_irq_save(flags); - mm->context=NO_CONTEXT; - if(mm==current->mm) - activate_context(mm); + cpu_context(cpu, mm) = NO_CONTEXT; + if (mm == current->mm) + activate_context(mm, cpu); local_irq_restore(flags); - } -void flush_tlb_all(void) +void local_flush_tlb_all(void) { /* Invalidate all, including shared pages, excluding fixed TLBs */ - unsigned long flags, tlb; -#if defined(CONFIG_SH64_PROC_TLB) - ++calls_to_flush_tlb_all; -#endif - local_irq_save(flags); /* Flush each ITLB entry */ - for_each_itlb_entry(tlb) { + for_each_itlb_entry(tlb) __flush_tlb_slot(tlb); - } /* Flush each DTLB entry */ - for_each_dtlb_entry(tlb) { + for_each_dtlb_entry(tlb) __flush_tlb_slot(tlb); - } local_irq_restore(flags); } -void flush_tlb_kernel_range(unsigned long start, unsigned long end) +void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) { /* FIXME: Optimize this later.. */ flush_tlb_all(); } - -#if defined(CONFIG_SH64_PROC_TLB) -/* Procfs interface to read the performance information */ - -static int -tlb_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void *data) -{ - int len=0; - len += sprintf(buf+len, "do_fast_page_fault called %12lld times\n", calls_to_do_fast_page_fault); - len += sprintf(buf+len, "do_slow_page_fault called %12lld times\n", calls_to_do_slow_page_fault); - len += sprintf(buf+len, "update_mmu_cache called %12lld times\n", calls_to_update_mmu_cache); - len += sprintf(buf+len, "flush_tlb_page called %12lld times\n", calls_to_flush_tlb_page); - len += sprintf(buf+len, "flush_tlb_range called %12lld times\n", calls_to_flush_tlb_range); - len += sprintf(buf+len, "flush_tlb_mm called %12lld times\n", calls_to_flush_tlb_mm); - len += sprintf(buf+len, "flush_tlb_all called %12lld times\n", calls_to_flush_tlb_all); - len += sprintf(buf+len, "flush_tlb_range_sizes\n" - " 1 : %12lld\n" - " 2 : %12lld\n" - " 3 - 4 : %12lld\n" - " 5 - 7 : %12lld\n" - " 8 - 11 : %12lld\n" - "12 - 15 : %12lld\n" - "16+ : %12lld\n", - flush_tlb_range_1, flush_tlb_range_2, flush_tlb_range_3_4, - flush_tlb_range_5_7, flush_tlb_range_8_11, flush_tlb_range_12_15, - flush_tlb_range_16_up); - len += sprintf(buf+len, "page not present %12lld times\n", page_not_present); - *eof = 1; - return len; -} - -static int __init register_proc_tlb(void) -{ - create_proc_read_entry("tlb", 0, NULL, tlb_proc_info, NULL); - return 0; -} - -__initcall(register_proc_tlb); - -#endif diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index ff071693325c..25810670a0fa 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types @@ -29,7 +29,6 @@ HP6XX SH_HP6XX DREAMCAST SH_DREAMCAST MPC1211 SH_MPC1211 SNAPGEAR SH_SECUREEDGE5410 -HS7751RVOIP SH_HS7751RVOIP EDOSK7705 SH_EDOSK7705 SH4202_MICRODEV SH_SH4202_MICRODEV SH03 SH_SH03 @@ -45,3 +44,4 @@ X3PROTO SH_X3PROTO MAGICPANELR2 SH_MAGIC_PANEL_R2 R2D_PLUS RTS7751R2D_PLUS R2D_1 RTS7751R2D_1 +CAYMAN SH_CAYMAN diff --git a/arch/sh64/Kconfig b/arch/sh64/Kconfig deleted file mode 100644 index 6884d5a518ad..000000000000 --- a/arch/sh64/Kconfig +++ /dev/null @@ -1,295 +0,0 @@ -# -# For a description of the syntax of this configuration file, -# see Documentation/kbuild/kconfig-language.txt. -# - -mainmenu "Linux/SH64 Kernel Configuration" - -config SUPERH - bool - default y - -config SUPERH64 - bool - default y - -config MMU - bool - default y - -config QUICKLIST - def_bool y - -config RWSEM_GENERIC_SPINLOCK - bool - default y - -config GENERIC_FIND_NEXT_BIT - bool - default y - -config GENERIC_HWEIGHT - bool - default y - -config GENERIC_CALIBRATE_DELAY - bool - default y - -config GENERIC_HARDIRQS - bool - default y - -config GENERIC_IRQ_PROBE - bool - default y - -config RWSEM_XCHGADD_ALGORITHM - bool - -config ARCH_HAS_ILOG2_U32 - bool - default n - -config ARCH_HAS_ILOG2_U64 - bool - default n - -config ARCH_NO_VIRT_TO_BUS - def_bool y - -source init/Kconfig - -menu "System type" - -choice - prompt "SuperH system type" - default SH_SIMULATOR - -config SH_SIMULATOR - bool "Simulator" - -config SH_CAYMAN - bool "Cayman" - -config SH_HARP - bool "ST50-Harp" - -endchoice - -choice - prompt "Processor family" - default CPU_SH5 - -config CPU_SH5 - bool "SH-5" - -endchoice - -choice - prompt "Processor type" - -config CPU_SUBTYPE_SH5_101 - bool "SH5-101" - depends on CPU_SH5 - -config CPU_SUBTYPE_SH5_103 - bool "SH5-103" - depends on CPU_SH5 - -endchoice - -choice - prompt "Endianness" - default LITTLE_ENDIAN - -config LITTLE_ENDIAN - bool "Little-Endian" - -config BIG_ENDIAN - bool "Big-Endian" - -endchoice - -config SH_FPU - bool "FPU support" - default y - -config SH64_FPU_DENORM_FLUSH - depends on SH_FPU - bool "Flush floating point denorms to zero" - -choice - prompt "Page table levels" - default SH64_PGTABLE_2_LEVEL - -config SH64_PGTABLE_2_LEVEL - bool "2" - -config SH64_PGTABLE_3_LEVEL - bool "3" - -endchoice - -choice - prompt "HugeTLB page size" - depends on HUGETLB_PAGE && MMU - default HUGETLB_PAGE_SIZE_64K - -config HUGETLB_PAGE_SIZE_64K - bool "64K" - -config HUGETLB_PAGE_SIZE_1MB - bool "1MB" - -config HUGETLB_PAGE_SIZE_512MB - bool "512MB" - -endchoice - -config SH64_USER_MISALIGNED_FIXUP - bool "Fixup misaligned loads/stores occurring in user mode" - -comment "Memory options" - -config CACHED_MEMORY_OFFSET - hex "Cached Area Offset" - default "20000000" - -config MEMORY_START - hex "Physical memory start address" - default "80000000" - -config MEMORY_SIZE_IN_MB - int "Memory size (in MB)" - default "8" if SH_SIMULATOR - default "64" - -comment "Cache options" - -choice - prompt "DCache mode" - default DCACHE_DISABLED if SH_SIMULATOR - default DCACHE_WRITE_BACK - -config DCACHE_WRITE_BACK - bool "Write-back" - depends on !SH_SIMULATOR - -config DCACHE_WRITE_THROUGH - bool "Write-through" - depends on !SH_SIMULATOR - -config DCACHE_DISABLED - bool "Disabled" - -endchoice - -config ICACHE_DISABLED - bool "ICache Disabling" - -config PCIDEVICE_MEMORY_START - hex - default "C0000000" - -config DEVICE_MEMORY_START - hex - default "E0000000" - -config FLASH_MEMORY_START - hex "Flash memory/on-chip devices start address" - default "00000000" - -config PCI_BLOCK_START - hex "PCI block start address" - default "40000000" - -comment "CPU Subtype specific options" - -config SH64_ID2815_WORKAROUND - bool "Include workaround for SH5-101 cut2 silicon defect ID2815" - -comment "Misc options" - -config HEARTBEAT - bool "Heartbeat LED" - depends on SH_CAYMAN - -config HDSP253_LED - bool "Support for HDSP-253 LED" - depends on SH_CAYMAN - -config SH_DMA - tristate "DMA controller (DMAC) support" - -config PREEMPT - bool "Preemptible Kernel (EXPERIMENTAL)" - depends on EXPERIMENTAL - -source "mm/Kconfig" - -endmenu - -menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" - -config ISA - bool - -config SBUS - bool - -config PCI - bool "PCI support" - depends on SH_CAYMAN - help - Find out whether you have a PCI motherboard. PCI is the name of a - bus system, i.e. the way the CPU talks to the other stuff inside - your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or - VESA. If you have PCI, say Y, otherwise N. - - The PCI-HOWTO, available from - <http://www.tldp.org/docs.html#howto>, contains valuable - information about which PCI hardware does work under Linux and which - doesn't. - -config SH_PCIDMA_NONCOHERENT - bool "Cache and PCI noncoherent" - depends on PCI - default y - help - Enable this option if your platform does not have a CPU cache which - remains coherent with PCI DMA. It is safest to say 'Y', although you - will see better performance if you can say 'N', because the PCI DMA - code will not have to flush the CPU's caches. If you have a PCI host - bridge integrated with your SH CPU, refer carefully to the chip specs - to see if you can say 'N' here. Otherwise, leave it as 'Y'. - -source "drivers/pci/Kconfig" - -source "drivers/pcmcia/Kconfig" - -source "drivers/pci/hotplug/Kconfig" - -endmenu - -menu "Executable file formats" - -source "fs/Kconfig.binfmt" - -endmenu - -source "net/Kconfig" - -source "drivers/Kconfig" - -source "fs/Kconfig" - -source "kernel/Kconfig.instrumentation" - -source "arch/sh64/Kconfig.debug" - -source "security/Kconfig" - -source "crypto/Kconfig" - -source "lib/Kconfig" diff --git a/arch/sh64/Kconfig.debug b/arch/sh64/Kconfig.debug deleted file mode 100644 index 05c07c4e4ed6..000000000000 --- a/arch/sh64/Kconfig.debug +++ /dev/null @@ -1,33 +0,0 @@ -menu "Kernel hacking" - -source "lib/Kconfig.debug" - -config EARLY_PRINTK - bool "Early SCIF console support" - -config SH64_PROC_TLB - bool "Debug: report TLB fill/purge activity through /proc/tlb" - depends on PROC_FS - -config SH64_PROC_ASIDS - bool "Debug: report ASIDs through /proc/asids" - depends on PROC_FS - -config SH64_SR_WATCH - bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" - -config POOR_MANS_STRACE - bool "Debug: enable rudimentary strace facility" - help - This option allows system calls to be traced to the console. It also - aids in detecting kernel stack underflow. It is useful for debugging - early-userland problems (e.g. init incurring fatal exceptions.) - -config SH_ALPHANUMERIC - bool "Enable debug outputs to on-board alphanumeric display" - depends on SH_CAYMAN - -config SH_NO_BSS_INIT - bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" - -endmenu diff --git a/arch/sh64/Makefile b/arch/sh64/Makefile deleted file mode 100644 index 8dac7e1a2be6..000000000000 --- a/arch/sh64/Makefile +++ /dev/null @@ -1,111 +0,0 @@ -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 2000, 2001 Paolo Alberelli -# Copyright (C) 2003, 2004 Paul Mundt -# -# This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. Remember to do have actions -# for "archclean" and "archdep" for cleaning up and making dependencies for -# this architecture -# - -cpu-y := -mb -cpu-$(CONFIG_LITTLE_ENDIAN) := -ml - -cpu-$(CONFIG_CPU_SH5) += -m5-32media-nofpu - -ifdef CONFIG_LITTLE_ENDIAN -LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' -LDFLAGS += -EL -mshlelf32_linux -else -LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' -LDFLAGS += -EB -mshelf32_linux -endif - -# No requirements for endianess support from AFLAGS, 'as' always run through gcc -KBUILD_CFLAGS += $(cpu-y) - -LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_CACHED_MEMORY_OFFSET) \ - --defsym phys_stext_shmedia=phys_stext+1 \ - -e phys_stext_shmedia - -OBJCOPYFLAGS := -O binary -R .note -R .comment -R .stab -R .stabstr -S - -# -# arch/sh64/defconfig never had any hope of being -# frequently updated, so use one that does -# -KBUILD_DEFCONFIG := cayman_defconfig - -KBUILD_IMAGE := arch/$(ARCH)/boot/zImage - -ifdef LOADADDR -LINKFLAGS += -Ttext $(word 1,$(LOADADDR)) -endif - -machine-$(CONFIG_SH_CAYMAN) := cayman -machine-$(CONFIG_SH_SIMULATOR) := sim -machine-$(CONFIG_SH_HARP) := harp - -head-y := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o - -core-y += arch/sh64/kernel/ arch/sh64/mm/ - -ifneq ($(machine-y),) -core-y += arch/sh64/mach-$(machine-y)/ -endif - -LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) -libs-y += arch/$(ARCH)/lib/ $(LIBGCC) - -drivers-$(CONFIG_OPROFILE) += arch/sh64/oprofile/ - -boot := arch/$(ARCH)/boot - -zImage: vmlinux - $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ - -compressed: zImage - -archclean: - $(Q)$(MAKE) $(clean)=$(boot) - -archprepare: arch/$(ARCH)/lib/syscalltab.h - -define filechk_gen-syscalltab - (set -e; \ - echo "/*"; \ - echo " * DO NOT MODIFY."; \ - echo " *"; \ - echo " * This file was generated by arch/$(ARCH)/Makefile"; \ - echo " * Any changes will be reverted at build time."; \ - echo " */"; \ - echo ""; \ - echo "#ifndef __SYSCALLTAB_H"; \ - echo "#define __SYSCALLTAB_H"; \ - echo ""; \ - echo "#include <linux/kernel.h>"; \ - echo ""; \ - echo "struct syscall_info {"; \ - echo " const char *name;"; \ - echo "} syscall_info_table[] = {"; \ - sed -e '/^.*\.long /!d;s// { "/;s/\(\([^/]*\)\/\)\{1\}.*/\2/; \ - s/[ \t]*$$//g;s/$$/" },/;s/\("\)sys_/\1/g'; \ - echo "};"; \ - echo ""; \ - echo "#define NUM_SYSCALL_INFO_ENTRIES ARRAY_SIZE(syscall_info_table)"; \ - echo ""; \ - echo "#endif /* __SYSCALLTAB_H */" ) -endef - -arch/$(ARCH)/lib/syscalltab.h: arch/sh64/kernel/syscalls.S - $(call filechk,gen-syscalltab) - -CLEAN_FILES += arch/$(ARCH)/lib/syscalltab.h - -define archhelp - @echo '* zImage - Compressed kernel image' -endef diff --git a/arch/sh64/boot/Makefile b/arch/sh64/boot/Makefile deleted file mode 100644 index fb71087b7b8a..000000000000 --- a/arch/sh64/boot/Makefile +++ /dev/null @@ -1,20 +0,0 @@ -# -# arch/sh64/boot/Makefile -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 2002 Stuart Menefy -# - -targets := zImage -subdir- := compressed - -$(obj)/zImage: $(obj)/compressed/vmlinux FORCE - $(call if_changed,objcopy) - @echo 'Kernel: $@ is ready' - -$(obj)/compressed/vmlinux: FORCE - $(Q)$(MAKE) $(build)=$(obj)/compressed $@ - diff --git a/arch/sh64/boot/compressed/cache.c b/arch/sh64/boot/compressed/cache.c deleted file mode 100644 index 708707355ffa..000000000000 --- a/arch/sh64/boot/compressed/cache.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * arch/shmedia/boot/compressed/cache.c -- simple cache management functions - * - * Code extracted from sh-ipl+g, sh-stub.c, which has the copyright: - * - * This is originally based on an m68k software stub written by Glenn - * Engel at HP, but has changed quite a bit. - * - * Modifications for the SH by Ben Lee and Steve Chamberlain - * -**************************************************************************** - - THIS SOFTWARE IS NOT COPYRIGHTED - - HP offers the following for use in the public domain. HP makes no - warranty with regard to the software or it's performance and the - user accepts the software "AS IS" with all faults. - - HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD - TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES - OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - -****************************************************************************/ - -#define CACHE_ENABLE 0 -#define CACHE_DISABLE 1 - -int cache_control(unsigned int command) -{ - volatile unsigned int *p = (volatile unsigned int *) 0x80000000; - int i; - - for (i = 0; i < (32 * 1024); i += 32) { - (void *) *p; - p += (32 / sizeof (int)); - } - - return 0; -} diff --git a/arch/sh64/boot/compressed/install.sh b/arch/sh64/boot/compressed/install.sh deleted file mode 100644 index 90589f0fec12..000000000000 --- a/arch/sh64/boot/compressed/install.sh +++ /dev/null @@ -1,56 +0,0 @@ -#!/bin/sh -# -# arch/sh/boot/install.sh -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 1995 by Linus Torvalds -# -# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin -# Adapted from code in arch/i386/boot/install.sh by Russell King -# Adapted from code in arch/arm/boot/install.sh by Stuart Menefy -# -# "make install" script for sh architecture -# -# Arguments: -# $1 - kernel version -# $2 - kernel image file -# $3 - kernel map file -# $4 - default install path (blank if root directory) -# - -# User may have a custom install script - -if [ -x /sbin/installkernel ]; then - exec /sbin/installkernel "$@" -fi - -if [ "$2" = "zImage" ]; then -# Compressed install - echo "Installing compressed kernel" - if [ -f $4/vmlinuz-$1 ]; then - mv $4/vmlinuz-$1 $4/vmlinuz.old - fi - - if [ -f $4/System.map-$1 ]; then - mv $4/System.map-$1 $4/System.old - fi - - cat $2 > $4/vmlinuz-$1 - cp $3 $4/System.map-$1 -else -# Normal install - echo "Installing normal kernel" - if [ -f $4/vmlinux-$1 ]; then - mv $4/vmlinux-$1 $4/vmlinux.old - fi - - if [ -f $4/System.map ]; then - mv $4/System.map $4/System.old - fi - - cat $2 > $4/vmlinux-$1 - cp $3 $4/System.map -fi diff --git a/arch/sh64/configs/sim_defconfig b/arch/sh64/configs/sim_defconfig deleted file mode 100644 index 18476cc522c3..000000000000 --- a/arch/sh64/configs/sim_defconfig +++ /dev/null @@ -1,558 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.24-rc1 -# Fri Nov 2 14:36:08 2007 -# -CONFIG_SUPERH=y -CONFIG_SUPERH64=y -CONFIG_MMU=y -CONFIG_QUICKLIST=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_NO_VIRT_TO_BUS=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -# CONFIG_SYSVIPC is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_USER_NS is not set -# CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CGROUPS is not set -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_FAIR_USER_SCHED=y -# CONFIG_FAIR_CGROUP_SCHED is not set -CONFIG_SYSFS_DEPRECATED=y -# CONFIG_RELAY is not set -# CONFIG_BLK_DEV_INITRD is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -# CONFIG_EMBEDDED is not set -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_MODULES is not set -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" - -# -# System type -# -CONFIG_SH_SIMULATOR=y -# CONFIG_SH_CAYMAN is not set -# CONFIG_SH_HARP is not set -CONFIG_CPU_SH5=y -CONFIG_CPU_SUBTYPE_SH5_101=y -# CONFIG_CPU_SUBTYPE_SH5_103 is not set -CONFIG_LITTLE_ENDIAN=y -# CONFIG_BIG_ENDIAN is not set -CONFIG_SH_FPU=y -# CONFIG_SH64_FPU_DENORM_FLUSH is not set -CONFIG_SH64_PGTABLE_2_LEVEL=y -# CONFIG_SH64_PGTABLE_3_LEVEL is not set -CONFIG_HUGETLB_PAGE_SIZE_64K=y -# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set -# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set -CONFIG_SH64_USER_MISALIGNED_FIXUP=y - -# -# Memory options -# -CONFIG_CACHED_MEMORY_OFFSET=0x20000000 -CONFIG_MEMORY_START=0x80000000 -CONFIG_MEMORY_SIZE_IN_MB=128 - -# -# Cache options -# -# CONFIG_DCACHE_WRITE_BACK is not set -# CONFIG_DCACHE_WRITE_THROUGH is not set -CONFIG_DCACHE_DISABLED=y -# CONFIG_ICACHE_DISABLED is not set -CONFIG_PCIDEVICE_MEMORY_START=C0000000 -CONFIG_DEVICE_MEMORY_START=E0000000 -CONFIG_FLASH_MEMORY_START=0x00000000 -CONFIG_PCI_BLOCK_START=0x40000000 - -# -# CPU Subtype specific options -# -CONFIG_SH64_ID2815_WORKAROUND=y - -# -# Misc options -# -# CONFIG_SH_DMA is not set -CONFIG_PREEMPT=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_NR_QUICK=1 - -# -# Bus options (PCI, PCMCIA, EISA, MCA, ISA) -# -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set - -# -# Networking -# -# CONFIG_NET is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_MTD is not set -# CONFIG_PARPORT is not set -# CONFIG_BLK_DEV is not set -# CONFIG_MISC_DEVICES is not set -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_SCSI_DEBUG is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=2 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_WATCHDOG is not set - -# -# Sonics Silicon Backplane -# -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -CONFIG_DAB=y - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -# CONFIG_FB_DDC is not set -# CONFIG_FB_CFB_FILLRECT is not set -# CONFIG_FB_CFB_COPYAREA is not set -# CONFIG_FB_CFB_IMAGEBLIT is not set -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_SYS_FOPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -CONFIG_FONTS=y -# CONFIG_FONT_8x8 is not set -CONFIG_FONT_8x16=y -# CONFIG_FONT_6x11 is not set -# CONFIG_FONT_7x14 is not set -# CONFIG_FONT_PEARL_8x8 is not set -# CONFIG_FONT_ACORN_8x8 is not set -# CONFIG_FONT_MINI_4x6 is not set -# CONFIG_FONT_SUN8x16 is not set -# CONFIG_FONT_SUN12x22 is not set -# CONFIG_FONT_10x18 is not set -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -# CONFIG_LOGO_LINUX_CLUT224 is not set -# CONFIG_LOGO_SUPERH_MONO is not set -# CONFIG_LOGO_SUPERH_VGA16 is not set -CONFIG_LOGO_SUPERH_CLUT224=y - -# -# Sound -# -# CONFIG_SOUND is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_MMC is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_RTC_CLASS is not set - -# -# Userspace I/O -# -# CONFIG_UIO is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4DEV_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -CONFIG_MINIX_FS=y -CONFIG_ROMFS_FS=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -# CONFIG_NLS is not set -CONFIG_INSTRUMENTATION=y -CONFIG_PROFILING=y -# CONFIG_OPROFILE is not set -# CONFIG_MARKERS is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -CONFIG_FRAME_POINTER=y -CONFIG_FORCED_INLINING=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_SAMPLES is not set -# CONFIG_EARLY_PRINTK is not set -CONFIG_SH64_PROC_TLB=y -CONFIG_SH64_PROC_ASIDS=y -CONFIG_SH64_SR_WATCH=y -# CONFIG_POOR_MANS_STRACE is not set -CONFIG_SH_NO_BSS_INIT=y - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_CRYPTO is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/arch/sh64/kernel/Makefile b/arch/sh64/kernel/Makefile deleted file mode 100644 index e3467bda6167..000000000000 --- a/arch/sh64/kernel/Makefile +++ /dev/null @@ -1,36 +0,0 @@ -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 2000, 2001 Paolo Alberelli -# Copyright (C) 2003 Paul Mundt -# -# Makefile for the Linux sh64 kernel. -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# - -extra-y := head.o init_task.o vmlinux.lds - -obj-y := process.o signal.o entry.o traps.o irq.o irq_intc.o \ - ptrace.o setup.o time.o sys_sh64.o semaphore.o sh_ksyms.o \ - switchto.o syscalls.o - -obj-$(CONFIG_HEARTBEAT) += led.o -obj-$(CONFIG_SH_ALPHANUMERIC) += alphanum.o -obj-$(CONFIG_SH_DMA) += dma.o -obj-$(CONFIG_SH_FPU) += fpu.o -obj-$(CONFIG_EARLY_PRINTK) += early_printk.o -obj-$(CONFIG_KALLSYMS) += unwind.o -obj-$(CONFIG_PCI) += pcibios.o -obj-$(CONFIG_MODULES) += module.o - -ifeq ($(CONFIG_PCI),y) -obj-$(CONFIG_CPU_SH5) += pci_sh5.o -endif - -USE_STANDARD_AS_RULE := true - diff --git a/arch/sh64/kernel/alphanum.c b/arch/sh64/kernel/alphanum.c deleted file mode 100644 index d1619d95fbaa..000000000000 --- a/arch/sh64/kernel/alphanum.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * arch/sh64/kernel/alphanum.c - * - * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Machine-independent functions for handling 8-digit alphanumeric display - * (e.g. Agilent HDSP-253x) - */ -#include <linux/stddef.h> -#include <linux/sched.h> - -void mach_alphanum(int pos, unsigned char val); - -void print_seg(char *file, int line) -{ - int i; - unsigned int nibble; - - for (i = 0; i < 5; i++) { - mach_alphanum(i, file[i]); - } - - for (i = 0; i < 3; i++) { - nibble = ((line >> (i * 4)) & 0xf); - mach_alphanum(7 - i, nibble + ((nibble > 9) ? 55 : 48)); - } -} - -void print_seg_num(unsigned num) -{ - int i; - unsigned int nibble; - - for (i = 0; i < 8; i++) { - nibble = ((num >> (i * 4)) & 0xf); - - mach_alphanum(7 - i, nibble + ((nibble > 9) ? 55 : 48)); - } -} - diff --git a/arch/sh64/kernel/asm-offsets.c b/arch/sh64/kernel/asm-offsets.c deleted file mode 100644 index ca76537c16c0..000000000000 --- a/arch/sh64/kernel/asm-offsets.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This program is used to generate definitions needed by - * assembly language modules. - * - * We use the technique used in the OSF Mach kernel code: - * generate asm statements containing #defines, - * compile this file to assembler, and then extract the - * #defines from the assembly-language output. - */ - -#include <linux/stddef.h> -#include <linux/types.h> -#include <linux/mm.h> -#include <asm/thread_info.h> - -#define DEFINE(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val)) - -#define BLANK() asm volatile("\n->" : : ) - -int main(void) -{ - /* offsets into the thread_info struct */ - DEFINE(TI_TASK, offsetof(struct thread_info, task)); - DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); - DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); - DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); - DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); - DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); - DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block)); - - return 0; -} diff --git a/arch/sh64/kernel/dma.c b/arch/sh64/kernel/dma.c deleted file mode 100644 index 32c6f0549bf1..000000000000 --- a/arch/sh64/kernel/dma.c +++ /dev/null @@ -1,297 +0,0 @@ -/* - * arch/sh64/kernel/dma.c - * - * DMA routines for the SH-5 DMAC. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/types.h> -#include <linux/irq.h> -#include <linux/spinlock.h> -#include <linux/mm.h> -#include <asm/hardware.h> -#include <asm/dma.h> -#include <asm/signal.h> -#include <asm/errno.h> -#include <asm/io.h> - -typedef struct { - unsigned long dev_addr; - unsigned long mem_addr; - - unsigned int mode; - unsigned int count; -} dma_info_t; - -static dma_info_t dma_info[MAX_DMA_CHANNELS]; -static DEFINE_SPINLOCK(dma_spin_lock); - -/* arch/sh64/kernel/irq_intc.c */ -extern void make_intc_irq(unsigned int irq); - -/* DMAC Interrupts */ -#define DMA_IRQ_DMTE0 18 -#define DMA_IRQ_DERR 22 - -#define DMAC_COMMON_BASE (dmac_base + 0x08) -#define DMAC_SAR_BASE (dmac_base + 0x10) -#define DMAC_DAR_BASE (dmac_base + 0x18) -#define DMAC_COUNT_BASE (dmac_base + 0x20) -#define DMAC_CTRL_BASE (dmac_base + 0x28) -#define DMAC_STATUS_BASE (dmac_base + 0x30) - -#define DMAC_SAR(n) (DMAC_SAR_BASE + ((n) * 0x28)) -#define DMAC_DAR(n) (DMAC_DAR_BASE + ((n) * 0x28)) -#define DMAC_COUNT(n) (DMAC_COUNT_BASE + ((n) * 0x28)) -#define DMAC_CTRL(n) (DMAC_CTRL_BASE + ((n) * 0x28)) -#define DMAC_STATUS(n) (DMAC_STATUS_BASE + ((n) * 0x28)) - -/* DMAC.COMMON Bit Definitions */ -#define DMAC_COMMON_PR 0x00000001 /* Priority */ - /* Bits 1-2 Reserved */ -#define DMAC_COMMON_ME 0x00000008 /* Master Enable */ -#define DMAC_COMMON_NMI 0x00000010 /* NMI Flag */ - /* Bits 5-6 Reserved */ -#define DMAC_COMMON_ER 0x00000780 /* Error Response */ -#define DMAC_COMMON_AAE 0x00007800 /* Address Alignment Error */ - /* Bits 15-63 Reserved */ - -/* DMAC.SAR Bit Definitions */ -#define DMAC_SAR_ADDR 0xffffffff /* Source Address */ - -/* DMAC.DAR Bit Definitions */ -#define DMAC_DAR_ADDR 0xffffffff /* Destination Address */ - -/* DMAC.COUNT Bit Definitions */ -#define DMAC_COUNT_CNT 0xffffffff /* Transfer Count */ - -/* DMAC.CTRL Bit Definitions */ -#define DMAC_CTRL_TS 0x00000007 /* Transfer Size */ -#define DMAC_CTRL_SI 0x00000018 /* Source Increment */ -#define DMAC_CTRL_DI 0x00000060 /* Destination Increment */ -#define DMAC_CTRL_RS 0x00000780 /* Resource Select */ -#define DMAC_CTRL_IE 0x00000800 /* Interrupt Enable */ -#define DMAC_CTRL_TE 0x00001000 /* Transfer Enable */ - /* Bits 15-63 Reserved */ - -/* DMAC.STATUS Bit Definitions */ -#define DMAC_STATUS_TE 0x00000001 /* Transfer End */ -#define DMAC_STATUS_AAE 0x00000002 /* Address Alignment Error */ - /* Bits 2-63 Reserved */ - -static unsigned long dmac_base; - -void set_dma_count(unsigned int chan, unsigned int count); -void set_dma_addr(unsigned int chan, unsigned int addr); - -static irqreturn_t dma_mte(int irq, void *dev_id, struct pt_regs *regs) -{ - unsigned int chan = irq - DMA_IRQ_DMTE0; - dma_info_t *info = dma_info + chan; - u64 status; - - if (info->mode & DMA_MODE_WRITE) { - sh64_out64(info->mem_addr & DMAC_SAR_ADDR, DMAC_SAR(chan)); - } else { - sh64_out64(info->mem_addr & DMAC_DAR_ADDR, DMAC_DAR(chan)); - } - - set_dma_count(chan, info->count); - - /* Clear the TE bit */ - status = sh64_in64(DMAC_STATUS(chan)); - status &= ~DMAC_STATUS_TE; - sh64_out64(status, DMAC_STATUS(chan)); - - return IRQ_HANDLED; -} - -static struct irqaction irq_dmte = { - .handler = dma_mte, - .flags = IRQF_DISABLED, - .name = "DMA MTE", -}; - -static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs) -{ - u64 tmp; - u8 chan; - - printk(KERN_NOTICE "DMAC: Got a DMA Error!\n"); - - tmp = sh64_in64(DMAC_COMMON_BASE); - - /* Check for the type of error */ - if ((chan = tmp & DMAC_COMMON_AAE)) { - /* It's an address alignment error.. */ - printk(KERN_NOTICE "DMAC: Alignment error on channel %d, ", chan); - - printk(KERN_NOTICE "SAR: 0x%08llx, DAR: 0x%08llx, COUNT: %lld\n", - (sh64_in64(DMAC_SAR(chan)) & DMAC_SAR_ADDR), - (sh64_in64(DMAC_DAR(chan)) & DMAC_DAR_ADDR), - (sh64_in64(DMAC_COUNT(chan)) & DMAC_COUNT_CNT)); - - } else if ((chan = tmp & DMAC_COMMON_ER)) { - /* Something else went wrong.. */ - printk(KERN_NOTICE "DMAC: Error on channel %d\n", chan); - } - - /* Reset the ME bit to clear the interrupt */ - tmp |= DMAC_COMMON_ME; - sh64_out64(tmp, DMAC_COMMON_BASE); - - return IRQ_HANDLED; -} - -static struct irqaction irq_derr = { - .handler = dma_err, - .flags = IRQF_DISABLED, - .name = "DMA Error", -}; - -static inline unsigned long calc_xmit_shift(unsigned int chan) -{ - return sh64_in64(DMAC_CTRL(chan)) & 0x03; -} - -void setup_dma(unsigned int chan, dma_info_t *info) -{ - unsigned int irq = DMA_IRQ_DMTE0 + chan; - dma_info_t *dma = dma_info + chan; - - make_intc_irq(irq); - setup_irq(irq, &irq_dmte); - dma = info; -} - -void enable_dma(unsigned int chan) -{ - u64 ctrl; - - ctrl = sh64_in64(DMAC_CTRL(chan)); - ctrl |= DMAC_CTRL_TE; - sh64_out64(ctrl, DMAC_CTRL(chan)); -} - -void disable_dma(unsigned int chan) -{ - u64 ctrl; - - ctrl = sh64_in64(DMAC_CTRL(chan)); - ctrl &= ~DMAC_CTRL_TE; - sh64_out64(ctrl, DMAC_CTRL(chan)); -} - -void set_dma_mode(unsigned int chan, char mode) -{ - dma_info_t *info = dma_info + chan; - - info->mode = mode; - - set_dma_addr(chan, info->mem_addr); - set_dma_count(chan, info->count); -} - -void set_dma_addr(unsigned int chan, unsigned int addr) -{ - dma_info_t *info = dma_info + chan; - unsigned long sar, dar; - - info->mem_addr = addr; - sar = (info->mode & DMA_MODE_WRITE) ? info->mem_addr : info->dev_addr; - dar = (info->mode & DMA_MODE_WRITE) ? info->dev_addr : info->mem_addr; - - sh64_out64(sar & DMAC_SAR_ADDR, DMAC_SAR(chan)); - sh64_out64(dar & DMAC_SAR_ADDR, DMAC_DAR(chan)); -} - -void set_dma_count(unsigned int chan, unsigned int count) -{ - dma_info_t *info = dma_info + chan; - u64 tmp; - - info->count = count; - - tmp = (info->count >> calc_xmit_shift(chan)) & DMAC_COUNT_CNT; - - sh64_out64(tmp, DMAC_COUNT(chan)); -} - -unsigned long claim_dma_lock(void) -{ - unsigned long flags; - - spin_lock_irqsave(&dma_spin_lock, flags); - - return flags; -} - -void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -int get_dma_residue(unsigned int chan) -{ - return sh64_in64(DMAC_COUNT(chan) << calc_xmit_shift(chan)); -} - -int __init init_dma(void) -{ - struct vcr_info vcr; - u64 tmp; - - /* Remap the DMAC */ - dmac_base = onchip_remap(PHYS_DMAC_BLOCK, 1024, "DMAC"); - if (!dmac_base) { - printk(KERN_ERR "Unable to remap DMAC\n"); - return -ENOMEM; - } - - /* Report DMAC.VCR Info */ - vcr = sh64_get_vcr_info(dmac_base); - printk("DMAC: Module ID: 0x%04x, Module version: 0x%04x\n", - vcr.mod_id, vcr.mod_vers); - - /* Set the ME bit */ - tmp = sh64_in64(DMAC_COMMON_BASE); - tmp |= DMAC_COMMON_ME; - sh64_out64(tmp, DMAC_COMMON_BASE); - - /* Enable the DMAC Error Interrupt */ - make_intc_irq(DMA_IRQ_DERR); - setup_irq(DMA_IRQ_DERR, &irq_derr); - - return 0; -} - -static void __exit exit_dma(void) -{ - onchip_unmap(dmac_base); - free_irq(DMA_IRQ_DERR, 0); -} - -module_init(init_dma); -module_exit(exit_dma); - -MODULE_AUTHOR("Paul Mundt"); -MODULE_DESCRIPTION("DMA API for SH-5 DMAC"); -MODULE_LICENSE("GPL"); - -EXPORT_SYMBOL(setup_dma); -EXPORT_SYMBOL(claim_dma_lock); -EXPORT_SYMBOL(release_dma_lock); -EXPORT_SYMBOL(enable_dma); -EXPORT_SYMBOL(disable_dma); -EXPORT_SYMBOL(set_dma_mode); -EXPORT_SYMBOL(set_dma_addr); -EXPORT_SYMBOL(set_dma_count); -EXPORT_SYMBOL(get_dma_residue); - diff --git a/arch/sh64/kernel/early_printk.c b/arch/sh64/kernel/early_printk.c deleted file mode 100644 index 4f9131123672..000000000000 --- a/arch/sh64/kernel/early_printk.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * arch/sh64/kernel/early_printk.c - * - * SH-5 Early SCIF console (cloned and hacked from sh implementation) - * - * Copyright (C) 2003, 2004 Paul Mundt <lethal@linux-sh.org> - * Copyright (C) 2002 M. R. Brown <mrbrown@0xd6.org> - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/console.h> -#include <linux/tty.h> -#include <linux/init.h> -#include <asm/io.h> -#include <asm/hardware.h> - -#define SCIF_BASE_ADDR 0x01030000 -#define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR - -/* - * Fixed virtual address where SCIF is mapped (should already be done - * in arch/sh64/kernel/head.S!). - */ -#define SCIF_REG 0xfa030000 - -enum { - SCIF_SCSMR2 = SCIF_REG + 0x00, - SCIF_SCBRR2 = SCIF_REG + 0x04, - SCIF_SCSCR2 = SCIF_REG + 0x08, - SCIF_SCFTDR2 = SCIF_REG + 0x0c, - SCIF_SCFSR2 = SCIF_REG + 0x10, - SCIF_SCFRDR2 = SCIF_REG + 0x14, - SCIF_SCFCR2 = SCIF_REG + 0x18, - SCIF_SCFDR2 = SCIF_REG + 0x1c, - SCIF_SCSPTR2 = SCIF_REG + 0x20, - SCIF_SCLSR2 = SCIF_REG + 0x24, -}; - -static void sh_console_putc(int c) -{ - while (!(ctrl_inw(SCIF_SCFSR2) & 0x20)) - cpu_relax(); - - ctrl_outb(c, SCIF_SCFTDR2); - ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0x9f), SCIF_SCFSR2); - - if (c == '\n') - sh_console_putc('\r'); -} - -static void sh_console_flush(void) -{ - ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0xbf), SCIF_SCFSR2); - - while (!(ctrl_inw(SCIF_SCFSR2) & 0x40)) - cpu_relax(); - - ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0xbf), SCIF_SCFSR2); -} - -static void sh_console_write(struct console *con, const char *s, unsigned count) -{ - while (count-- > 0) - sh_console_putc(*s++); - - sh_console_flush(); -} - -static int __init sh_console_setup(struct console *con, char *options) -{ - con->cflag = CREAD | HUPCL | CLOCAL | B19200 | CS8; - - return 0; -} - -static struct console sh_console = { - .name = "scifcon", - .write = sh_console_write, - .setup = sh_console_setup, - .flags = CON_PRINTBUFFER | CON_BOOT, - .index = -1, -}; - -void __init enable_early_printk(void) -{ - ctrl_outb(0x2a, SCIF_SCBRR2); /* 19200bps */ - - ctrl_outw(0x04, SCIF_SCFCR2); /* Reset TFRST */ - ctrl_outw(0x10, SCIF_SCFCR2); /* TTRG0=1 */ - - ctrl_outw(0, SCIF_SCSPTR2); - ctrl_outw(0x60, SCIF_SCFSR2); - ctrl_outw(0, SCIF_SCLSR2); - ctrl_outw(0x30, SCIF_SCSCR2); - - register_console(&sh_console); -} diff --git a/arch/sh64/kernel/init_task.c b/arch/sh64/kernel/init_task.c deleted file mode 100644 index deee8bfd3270..000000000000 --- a/arch/sh64/kernel/init_task.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/init_task.c - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * - */ -#include <linux/rwsem.h> -#include <linux/mm.h> -#include <linux/sched.h> -#include <linux/init_task.h> -#include <linux/mqueue.h> -#include <linux/fs.h> -#include <asm/uaccess.h> -#include <asm/pgtable.h> - -static struct fs_struct init_fs = INIT_FS; -static struct files_struct init_files = INIT_FILES; -static struct signal_struct init_signals = INIT_SIGNALS(init_signals); -static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); -struct mm_struct init_mm = INIT_MM(init_mm); - -struct pt_regs fake_swapper_regs; - -/* - * Initial thread structure. - * - * We need to make sure that this is THREAD_SIZE-byte aligned due - * to the way process stacks are handled. This is done by having a - * special "init_task" linker map entry.. - */ -union thread_union init_thread_union - __attribute__((__section__(".data.init_task"))) = - { INIT_THREAD_INFO(init_task) }; - -/* - * Initial task structure. - * - * All other task structs will be allocated on slabs in fork.c - */ -struct task_struct init_task = INIT_TASK(init_task); - diff --git a/arch/sh64/kernel/irq.c b/arch/sh64/kernel/irq.c deleted file mode 100644 index 9412b7166700..000000000000 --- a/arch/sh64/kernel/irq.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/irq.c - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * - */ - -/* - * IRQs are in fact implemented a bit like signal handlers for the kernel. - * Naturally it's not a 1:1 relation, but there are similarities. - */ - -#include <linux/errno.h> -#include <linux/kernel_stat.h> -#include <linux/signal.h> -#include <linux/rwsem.h> -#include <linux/sched.h> -#include <linux/ioport.h> -#include <linux/interrupt.h> -#include <linux/timex.h> -#include <linux/slab.h> -#include <linux/random.h> -#include <linux/smp.h> -#include <linux/init.h> -#include <linux/seq_file.h> -#include <linux/bitops.h> -#include <asm/system.h> -#include <asm/io.h> -#include <asm/smp.h> -#include <asm/pgalloc.h> -#include <asm/delay.h> -#include <asm/irq.h> -#include <linux/irq.h> - -void ack_bad_irq(unsigned int irq) -{ - printk("unexpected IRQ trap at irq %02x\n", irq); -} - -#if defined(CONFIG_PROC_FS) -int show_interrupts(struct seq_file *p, void *v) -{ - int i = *(loff_t *) v, j; - struct irqaction * action; - unsigned long flags; - - if (i == 0) { - seq_puts(p, " "); - for_each_online_cpu(j) - seq_printf(p, "CPU%d ",j); - seq_putc(p, '\n'); - } - - if (i < NR_IRQS) { - spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (!action) - goto unlock; - seq_printf(p, "%3d: ",i); - seq_printf(p, "%10u ", kstat_irqs(i)); - seq_printf(p, " %14s", irq_desc[i].chip->typename); - seq_printf(p, " %s", action->name); - - for (action=action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - seq_putc(p, '\n'); -unlock: - spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } - return 0; -} -#endif - -/* - * do_NMI handles all Non-Maskable Interrupts. - */ -asmlinkage void do_NMI(unsigned long vector_num, struct pt_regs * regs) -{ - if (regs->sr & 0x40000000) - printk("unexpected NMI trap in system mode\n"); - else - printk("unexpected NMI trap in user mode\n"); - - /* No statistics */ -} - -/* - * do_IRQ handles all normal device IRQ's. - */ -asmlinkage int do_IRQ(unsigned long vector_num, struct pt_regs * regs) -{ - struct pt_regs *old_regs = set_irq_regs(regs); - int irq; - - irq_enter(); - - irq = irq_demux(vector_num); - - if (irq >= 0) { - __do_IRQ(irq); - } else { - printk("unexpected IRQ trap at vector %03lx\n", vector_num); - } - - irq_exit(); - - set_irq_regs(old_regs); - return 1; -} - diff --git a/arch/sh64/kernel/led.c b/arch/sh64/kernel/led.c deleted file mode 100644 index e35d3f667fb4..000000000000 --- a/arch/sh64/kernel/led.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * arch/sh64/kernel/led.c - * - * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Flash the LEDs - */ -#include <linux/stddef.h> -#include <linux/sched.h> - -void mach_led(int pos, int val); - -/* acts like an actual heart beat -- ie thump-thump-pause... */ -void heartbeat(void) -{ - static unsigned int cnt = 0, period = 0, dist = 0; - - if (cnt == 0 || cnt == dist) { - mach_led(-1, 1); - } else if (cnt == 7 || cnt == dist + 7) { - mach_led(-1, 0); - } - - if (++cnt > period) { - cnt = 0; - - /* - * The hyperbolic function below modifies the heartbeat period - * length in dependency of the current (5min) load. It goes - * through the points f(0)=126, f(1)=86, f(5)=51, f(inf)->30. - */ - period = ((672 << FSHIFT) / (5 * avenrun[0] + - (7 << FSHIFT))) + 30; - dist = period / 4; - } -} - diff --git a/arch/sh64/kernel/module.c b/arch/sh64/kernel/module.c deleted file mode 100644 index 2598f6b88b44..000000000000 --- a/arch/sh64/kernel/module.c +++ /dev/null @@ -1,161 +0,0 @@ -/* Kernel module help for sh64. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - Copyright 2004 SuperH (UK) Ltd - Author: Richard Curnow - - Based on the sh version, and on code from the sh64-specific parts of - modutils, originally written by Richard Curnow and Ben Gaster. - -*/ -#include <linux/moduleloader.h> -#include <linux/elf.h> -#include <linux/vmalloc.h> -#include <linux/fs.h> -#include <linux/string.h> -#include <linux/kernel.h> - -#if 0 -#define DEBUGP printk -#else -#define DEBUGP(fmt...) -#endif - -void *module_alloc(unsigned long size) -{ - if (size == 0) - return NULL; - return vmalloc(size); -} - - -/* Free memory returned from module_alloc */ -void module_free(struct module *mod, void *module_region) -{ - vfree(module_region); - /* FIXME: If module_region == mod->init_region, trim exception - table entries. */ -} - -/* We don't need anything special. */ -int module_frob_arch_sections(Elf_Ehdr *hdr, - Elf_Shdr *sechdrs, - char *secstrings, - struct module *mod) -{ - return 0; -} - -int apply_relocate_add(Elf32_Shdr *sechdrs, - const char *strtab, - unsigned int symindex, - unsigned int relsec, - struct module *me) -{ - unsigned int i; - Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr; - Elf32_Sym *sym; - Elf32_Addr relocation; - uint32_t *location; - int align; - int is_shmedia; - - DEBUGP("Applying relocate section %u to %u\n", relsec, - sechdrs[relsec].sh_info); - for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { - /* This is where to make the change */ - location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr - + rel[i].r_offset; - /* This is the symbol it is referring to. Note that all - undefined symbols have been resolved. */ - sym = (Elf32_Sym *)sechdrs[symindex].sh_addr - + ELF32_R_SYM(rel[i].r_info); - relocation = sym->st_value + rel[i].r_addend; - align = (int)location & 3; - - /* For text addresses, bit2 of the st_other field indicates - * whether the symbol is SHmedia (1) or SHcompact (0). If - * SHmedia, the LSB of the symbol needs to be asserted - * for the CPU to be in SHmedia mode when it starts executing - * the branch target. */ - is_shmedia = (sym->st_other & 4) ? 1 : 0; - if (is_shmedia) { - relocation |= 1; - } - - switch (ELF32_R_TYPE(rel[i].r_info)) { - case R_SH_DIR32: - DEBUGP("R_SH_DIR32 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation); - *location += relocation; - break; - case R_SH_REL32: - DEBUGP("R_SH_REL32 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation); - relocation -= (Elf32_Addr) location; - *location += relocation; - break; - case R_SH_IMM_LOW16: - DEBUGP("R_SH_IMM_LOW16 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation); - *location = (*location & ~0x3fffc00) | - ((relocation & 0xffff) << 10); - break; - case R_SH_IMM_MEDLOW16: - DEBUGP("R_SH_IMM_MEDLOW16 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation); - *location = (*location & ~0x3fffc00) | - (((relocation >> 16) & 0xffff) << 10); - break; - case R_SH_IMM_LOW16_PCREL: - DEBUGP("R_SH_IMM_LOW16_PCREL @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation); - relocation -= (Elf32_Addr) location; - *location = (*location & ~0x3fffc00) | - ((relocation & 0xffff) << 10); - break; - case R_SH_IMM_MEDLOW16_PCREL: - DEBUGP("R_SH_IMM_MEDLOW16_PCREL @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation); - relocation -= (Elf32_Addr) location; - *location = (*location & ~0x3fffc00) | - (((relocation >> 16) & 0xffff) << 10); - break; - default: - printk(KERN_ERR "module %s: Unknown relocation: %u\n", - me->name, ELF32_R_TYPE(rel[i].r_info)); - return -ENOEXEC; - } - } - return 0; -} - -int apply_relocate(Elf32_Shdr *sechdrs, - const char *strtab, - unsigned int symindex, - unsigned int relsec, - struct module *me) -{ - printk(KERN_ERR "module %s: REL RELOCATION unsupported\n", - me->name); - return -ENOEXEC; -} - -int module_finalize(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, - struct module *me) -{ - return 0; -} - -void module_arch_cleanup(struct module *mod) -{ -} - diff --git a/arch/sh64/kernel/pci_sh5.c b/arch/sh64/kernel/pci_sh5.c deleted file mode 100644 index b4d9534d2b0e..000000000000 --- a/arch/sh64/kernel/pci_sh5.c +++ /dev/null @@ -1,536 +0,0 @@ -/* - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * Copyright (C) 2003, 2004 Paul Mundt - * Copyright (C) 2004 Richard Curnow - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Support functions for the SH5 PCI hardware. - */ - -#include <linux/kernel.h> -#include <linux/rwsem.h> -#include <linux/smp.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/errno.h> -#include <linux/pci.h> -#include <linux/delay.h> -#include <linux/types.h> -#include <asm/pci.h> -#include <linux/irq.h> - -#include <asm/io.h> -#include <asm/hardware.h> -#include "pci_sh5.h" - -static unsigned long pcicr_virt; -unsigned long pciio_virt; - -static void __init pci_fixup_ide_bases(struct pci_dev *d) -{ - int i; - - /* - * PCI IDE controllers use non-standard I/O port decoding, respect it. - */ - if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) - return; - printk("PCI: IDE base address fixup for %s\n", pci_name(d)); - for(i=0; i<4; i++) { - struct resource *r = &d->resource[i]; - if ((r->start & ~0x80) == 0x374) { - r->start |= 2; - r->end = r->start; - } - } -} -DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); - -char * __devinit pcibios_setup(char *str) -{ - return str; -} - -/* Rounds a number UP to the nearest power of two. Used for - * sizing the PCI window. - */ -static u32 __init r2p2(u32 num) -{ - int i = 31; - u32 tmp = num; - - if (num == 0) - return 0; - - do { - if (tmp & (1 << 31)) - break; - i--; - tmp <<= 1; - } while (i >= 0); - - tmp = 1 << i; - /* If the original number isn't a power of 2, round it up */ - if (tmp != num) - tmp <<= 1; - - return tmp; -} - -extern unsigned long long memory_start, memory_end; - -int __init sh5pci_init(unsigned memStart, unsigned memSize) -{ - u32 lsr0; - u32 uval; - - pcicr_virt = onchip_remap(SH5PCI_ICR_BASE, 1024, "PCICR"); - if (!pcicr_virt) { - panic("Unable to remap PCICR\n"); - } - - pciio_virt = onchip_remap(SH5PCI_IO_BASE, 0x10000, "PCIIO"); - if (!pciio_virt) { - panic("Unable to remap PCIIO\n"); - } - - pr_debug("Register base addres is 0x%08lx\n", pcicr_virt); - - /* Clear snoop registers */ - SH5PCI_WRITE(CSCR0, 0); - SH5PCI_WRITE(CSCR1, 0); - - pr_debug("Wrote to reg\n"); - - /* Switch off interrupts */ - SH5PCI_WRITE(INTM, 0); - SH5PCI_WRITE(AINTM, 0); - SH5PCI_WRITE(PINTM, 0); - - /* Set bus active, take it out of reset */ - uval = SH5PCI_READ(CR); - - /* Set command Register */ - SH5PCI_WRITE(CR, uval | CR_LOCK_MASK | CR_CFINT| CR_FTO | CR_PFE | CR_PFCS | CR_BMAM); - - uval=SH5PCI_READ(CR); - pr_debug("CR is actually 0x%08x\n",uval); - - /* Allow it to be a master */ - /* NB - WE DISABLE I/O ACCESS to stop overlap */ - /* set WAIT bit to enable stepping, an attempt to improve stability */ - SH5PCI_WRITE_SHORT(CSR_CMD, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_WAIT); - - /* - ** Set translation mapping memory in order to convert the address - ** used for the main bus, to the PCI internal address. - */ - SH5PCI_WRITE(MBR,0x40000000); - - /* Always set the max size 512M */ - SH5PCI_WRITE(MBMR, PCISH5_MEM_SIZCONV(512*1024*1024)); - - /* - ** I/O addresses are mapped at internal PCI specific address - ** as is described into the configuration bridge table. - ** These are changed to 0, to allow cards that have legacy - ** io such as vga to function correctly. We set the SH5 IOBAR to - ** 256K, which is a bit big as we can only have 64K of address space - */ - - SH5PCI_WRITE(IOBR,0x0); - - pr_debug("PCI:Writing 0x%08x to IOBR\n",0); - - /* Set up a 256K window. Totally pointless waste of address space */ - SH5PCI_WRITE(IOBMR,0); - pr_debug("PCI:Writing 0x%08x to IOBMR\n",0); - - /* The SH5 has a HUGE 256K I/O region, which breaks the PCI spec. Ideally, - * we would want to map the I/O region somewhere, but it is so big this is not - * that easy! - */ - SH5PCI_WRITE(CSR_IBAR0,~0); - /* Set memory size value */ - memSize = memory_end - memory_start; - - /* Now we set up the mbars so the PCI bus can see the memory of the machine */ - if (memSize < (1024 * 1024)) { - printk(KERN_ERR "PCISH5: Ridiculous memory size of 0x%x?\n", memSize); - return -EINVAL; - } - - /* Set LSR 0 */ - lsr0 = (memSize > (512 * 1024 * 1024)) ? 0x1ff00001 : ((r2p2(memSize) - 0x100000) | 0x1); - SH5PCI_WRITE(LSR0, lsr0); - - pr_debug("PCI:Writing 0x%08x to LSR0\n",lsr0); - - /* Set MBAR 0 */ - SH5PCI_WRITE(CSR_MBAR0, memory_start); - SH5PCI_WRITE(LAR0, memory_start); - - SH5PCI_WRITE(CSR_MBAR1,0); - SH5PCI_WRITE(LAR1,0); - SH5PCI_WRITE(LSR1,0); - - pr_debug("PCI:Writing 0x%08llx to CSR_MBAR0\n",memory_start); - pr_debug("PCI:Writing 0x%08llx to LAR0\n",memory_start); - - /* Enable the PCI interrupts on the device */ - SH5PCI_WRITE(INTM, ~0); - SH5PCI_WRITE(AINTM, ~0); - SH5PCI_WRITE(PINTM, ~0); - - pr_debug("Switching on all error interrupts\n"); - - return(0); -} - -static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 *val) -{ - SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); - - switch (size) { - case 1: - *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3)); - break; - case 2: - *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2)); - break; - case 4: - *val = SH5PCI_READ(PDR); - break; - } - - return PCIBIOS_SUCCESSFUL; -} - -static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 val) -{ - SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); - - switch (size) { - case 1: - SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val); - break; - case 2: - SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val); - break; - case 4: - SH5PCI_WRITE(PDR, val); - break; - } - - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops pci_config_ops = { - .read = sh5pci_read, - .write = sh5pci_write, -}; - -/* Everything hangs off this */ -static struct pci_bus *pci_root_bus; - - -static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin) -{ - pr_debug("swizzle for dev %d on bus %d slot %d pin is %d\n", - dev->devfn,dev->bus->number, PCI_SLOT(dev->devfn),*pin); - return PCI_SLOT(dev->devfn); -} - -static inline u8 bridge_swizzle(u8 pin, u8 slot) -{ - return (((pin-1) + slot) % 4) + 1; -} - -u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp) -{ - if (dev->bus->number != 0) { - u8 pin = *pinp; - do { - pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); - /* Move up the chain of bridges. */ - dev = dev->bus->self; - } while (dev->bus->self); - *pinp = pin; - - /* The slot is the slot of the last bridge. */ - } - - return PCI_SLOT(dev->devfn); -} - -/* This needs to be shunted out of here into the board specific bit */ - -static int __init map_cayman_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int result = -1; - - /* The complication here is that the PCI IRQ lines from the Cayman's 2 - 5V slots get into the CPU via a different path from the IRQ lines - from the 3 3.3V slots. Thus, we have to detect whether the card's - interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling' - at the point where we cross from 5V to 3.3V is not the normal case. - - The added complication is that we don't know that the 5V slots are - always bus 2, because a card containing a PCI-PCI bridge may be - plugged into a 3.3V slot, and this changes the bus numbering. - - Also, the Cayman has an intermediate PCI bus that goes a custom - expansion board header (and to the secondary bridge). This bus has - never been used in practice. - - The 1ary onboard PCI-PCI bridge is device 3 on bus 0 - The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of the 1ary bridge. - */ - - struct slot_pin { - int slot; - int pin; - } path[4]; - int i=0; - - while (dev->bus->number > 0) { - - slot = path[i].slot = PCI_SLOT(dev->devfn); - pin = path[i].pin = bridge_swizzle(pin, slot); - dev = dev->bus->self; - i++; - if (i > 3) panic("PCI path to root bus too long!\n"); - } - - slot = PCI_SLOT(dev->devfn); - /* This is the slot on bus 0 through which the device is eventually - reachable. */ - - /* Now work back up. */ - if ((slot < 3) || (i == 0)) { - /* Bus 0 (incl. PCI-PCI bridge itself) : perform the final - swizzle now. */ - result = IRQ_INTA + bridge_swizzle(pin, slot) - 1; - } else { - i--; - slot = path[i].slot; - pin = path[i].pin; - if (slot > 0) { - panic("PCI expansion bus device found - not handled!\n"); - } else { - if (i > 0) { - /* 5V slots */ - i--; - slot = path[i].slot; - pin = path[i].pin; - /* 'pin' was swizzled earlier wrt slot, don't do it again. */ - result = IRQ_P2INTA + (pin - 1); - } else { - /* IRQ for 2ary PCI-PCI bridge : unused */ - result = -1; - } - } - } - - return result; -} - -static irqreturn_t pcish5_err_irq(int irq, void *dev_id) -{ - struct pt_regs *regs = get_irq_regs(); - unsigned pci_int, pci_air, pci_cir, pci_aint; - - pci_int = SH5PCI_READ(INT); - pci_cir = SH5PCI_READ(CIR); - pci_air = SH5PCI_READ(AIR); - - if (pci_int) { - printk("PCI INTERRUPT (at %08llx)!\n", regs->pc); - printk("PCI INT -> 0x%x\n", pci_int & 0xffff); - printk("PCI AIR -> 0x%x\n", pci_air); - printk("PCI CIR -> 0x%x\n", pci_cir); - SH5PCI_WRITE(INT, ~0); - } - - pci_aint = SH5PCI_READ(AINT); - if (pci_aint) { - printk("PCI ARB INTERRUPT!\n"); - printk("PCI AINT -> 0x%x\n", pci_aint); - printk("PCI AIR -> 0x%x\n", pci_air); - printk("PCI CIR -> 0x%x\n", pci_cir); - SH5PCI_WRITE(AINT, ~0); - } - - return IRQ_HANDLED; -} - -static irqreturn_t pcish5_serr_irq(int irq, void *dev_id) -{ - printk("SERR IRQ\n"); - - return IRQ_NONE; -} - -static void __init -pcibios_size_bridge(struct pci_bus *bus, struct resource *ior, - struct resource *memr) -{ - struct resource io_res, mem_res; - struct pci_dev *dev; - struct pci_dev *bridge = bus->self; - struct list_head *ln; - - if (!bridge) - return; /* host bridge, nothing to do */ - - /* set reasonable default locations for pcibios_align_resource */ - io_res.start = PCIBIOS_MIN_IO; - mem_res.start = PCIBIOS_MIN_MEM; - - io_res.end = io_res.start; - mem_res.end = mem_res.start; - - /* Collect information about how our direct children are layed out. */ - for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) { - int i; - dev = pci_dev_b(ln); - - /* Skip bridges for now */ - if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI) - continue; - - for (i = 0; i < PCI_NUM_RESOURCES; i++) { - struct resource res; - unsigned long size; - - memcpy(&res, &dev->resource[i], sizeof(res)); - size = res.end - res.start + 1; - - if (res.flags & IORESOURCE_IO) { - res.start = io_res.end; - pcibios_align_resource(dev, &res, size, 0); - io_res.end = res.start + size; - } else if (res.flags & IORESOURCE_MEM) { - res.start = mem_res.end; - pcibios_align_resource(dev, &res, size, 0); - mem_res.end = res.start + size; - } - } - } - - /* And for all of the subordinate busses. */ - for (ln=bus->children.next; ln != &bus->children; ln=ln->next) - pcibios_size_bridge(pci_bus_b(ln), &io_res, &mem_res); - - /* turn the ending locations into sizes (subtract start) */ - io_res.end -= io_res.start; - mem_res.end -= mem_res.start; - - /* Align the sizes up by bridge rules */ - io_res.end = ALIGN(io_res.end, 4*1024) - 1; - mem_res.end = ALIGN(mem_res.end, 1*1024*1024) - 1; - - /* Adjust the bridge's allocation requirements */ - bridge->resource[0].end = bridge->resource[0].start + io_res.end; - bridge->resource[1].end = bridge->resource[1].start + mem_res.end; - - bridge->resource[PCI_BRIDGE_RESOURCES].end = - bridge->resource[PCI_BRIDGE_RESOURCES].start + io_res.end; - bridge->resource[PCI_BRIDGE_RESOURCES+1].end = - bridge->resource[PCI_BRIDGE_RESOURCES+1].start + mem_res.end; - - /* adjust parent's resource requirements */ - if (ior) { - ior->end = ALIGN(ior->end, 4*1024); - ior->end += io_res.end; - } - - if (memr) { - memr->end = ALIGN(memr->end, 1*1024*1024); - memr->end += mem_res.end; - } -} - -static void __init pcibios_size_bridges(void) -{ - struct resource io_res, mem_res; - - memset(&io_res, 0, sizeof(io_res)); - memset(&mem_res, 0, sizeof(mem_res)); - - pcibios_size_bridge(pci_root_bus, &io_res, &mem_res); -} - -static int __init pcibios_init(void) -{ - if (request_irq(IRQ_ERR, pcish5_err_irq, - IRQF_DISABLED, "PCI Error",NULL) < 0) { - printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n"); - return -EINVAL; - } - - if (request_irq(IRQ_SERR, pcish5_serr_irq, - IRQF_DISABLED, "PCI SERR interrupt", NULL) < 0) { - printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n"); - return -EINVAL; - } - - /* The pci subsystem needs to know where memory is and how much - * of it there is. I've simply made these globals. A better mechanism - * is probably needed. - */ - sh5pci_init(__pa(memory_start), - __pa(memory_end) - __pa(memory_start)); - - pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL); - pcibios_size_bridges(); - pci_assign_unassigned_resources(); - pci_fixup_irqs(no_swizzle, map_cayman_irq); - - return 0; -} - -subsys_initcall(pcibios_init); - -void __devinit pcibios_fixup_bus(struct pci_bus *bus) -{ - struct pci_dev *dev = bus->self; - int i; - -#if 1 - if(dev) { - for(i=0; i<3; i++) { - bus->resource[i] = - &dev->resource[PCI_BRIDGE_RESOURCES+i]; - bus->resource[i]->name = bus->name; - } - bus->resource[0]->flags |= IORESOURCE_IO; - bus->resource[1]->flags |= IORESOURCE_MEM; - - /* For now, propagate host limits to the bus; - * we'll adjust them later. */ - -#if 1 - bus->resource[0]->end = 64*1024 - 1 ; - bus->resource[1]->end = PCIBIOS_MIN_MEM+(256*1024*1024)-1; - bus->resource[0]->start = PCIBIOS_MIN_IO; - bus->resource[1]->start = PCIBIOS_MIN_MEM; -#else - bus->resource[0]->end = 0; - bus->resource[1]->end = 0; - bus->resource[0]->start =0; - bus->resource[1]->start = 0; -#endif - /* Turn off downstream PF memory address range by default */ - bus->resource[2]->start = 1024*1024; - bus->resource[2]->end = bus->resource[2]->start - 1; - } -#endif - -} - diff --git a/arch/sh64/kernel/pcibios.c b/arch/sh64/kernel/pcibios.c deleted file mode 100644 index 945920bc24db..000000000000 --- a/arch/sh64/kernel/pcibios.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * $Id: pcibios.c,v 1.1 2001/08/24 12:38:19 dwmw2 Exp $ - * - * arch/sh/kernel/pcibios.c - * - * Copyright (C) 2002 STMicroelectronics Limited - * Author : David J. McKay - * - * Copyright (C) 2004 Richard Curnow, SuperH UK Limited - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * This is GPL'd. - * - * Provided here are generic versions of: - * pcibios_update_resource() - * pcibios_align_resource() - * pcibios_enable_device() - * pcibios_set_master() - * pcibios_update_irq() - * - * These functions are collected here to reduce duplication of common - * code amongst the many platform-specific PCI support code files. - * - * Platform-specific files are expected to provide: - * pcibios_fixup_bus() - * pcibios_init() - * pcibios_setup() - * pcibios_fixup_pbus_ranges() - */ - -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/init.h> - -void -pcibios_update_resource(struct pci_dev *dev, struct resource *root, - struct resource *res, int resource) -{ - u32 new, check; - int reg; - - new = res->start | (res->flags & PCI_REGION_FLAG_MASK); - if (resource < 6) { - reg = PCI_BASE_ADDRESS_0 + 4*resource; - } else if (resource == PCI_ROM_RESOURCE) { - res->flags |= IORESOURCE_ROM_ENABLE; - new |= PCI_ROM_ADDRESS_ENABLE; - reg = dev->rom_base_reg; - } else { - /* Somebody might have asked allocation of a non-standard resource */ - return; - } - - pci_write_config_dword(dev, reg, new); - pci_read_config_dword(dev, reg, &check); - if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) { - printk(KERN_ERR "PCI: Error while updating region " - "%s/%d (%08x != %08x)\n", pci_name(dev), resource, - new, check); - } -} - -/* - * We need to avoid collisions with `mirrored' VGA ports - * and other strange ISA hardware, so we always want the - * addresses to be allocated in the 0x000-0x0ff region - * modulo 0x400. - */ -void pcibios_align_resource(void *data, struct resource *res, - resource_size_t size, resource_size_t align) -{ - if (res->flags & IORESOURCE_IO) { - resource_size_t start = res->start; - - if (start & 0x300) { - start = (start + 0x3ff) & ~0x3ff; - res->start = start; - } - } -} - -static void pcibios_enable_bridge(struct pci_dev *dev) -{ - struct pci_bus *bus = dev->subordinate; - u16 cmd, old_cmd; - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - old_cmd = cmd; - - if (bus->resource[0]->flags & IORESOURCE_IO) { - cmd |= PCI_COMMAND_IO; - } - if ((bus->resource[1]->flags & IORESOURCE_MEM) || - (bus->resource[2]->flags & IORESOURCE_PREFETCH)) { - cmd |= PCI_COMMAND_MEMORY; - } - - if (cmd != old_cmd) { - pci_write_config_word(dev, PCI_COMMAND, cmd); - } - - printk("PCI bridge %s, command register -> %04x\n", - pci_name(dev), cmd); - -} - - - -int pcibios_enable_device(struct pci_dev *dev, int mask) -{ - u16 cmd, old_cmd; - int idx; - struct resource *r; - - if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { - pcibios_enable_bridge(dev); - } - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - old_cmd = cmd; - for(idx=0; idx<6; idx++) { - if (!(mask & (1 << idx))) - continue; - r = &dev->resource[idx]; - if (!r->start && r->end) { - printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); - return -EINVAL; - } - if (r->flags & IORESOURCE_IO) - cmd |= PCI_COMMAND_IO; - if (r->flags & IORESOURCE_MEM) - cmd |= PCI_COMMAND_MEMORY; - } - if (dev->resource[PCI_ROM_RESOURCE].start) - cmd |= PCI_COMMAND_MEMORY; - if (cmd != old_cmd) { - printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); - pci_write_config_word(dev, PCI_COMMAND, cmd); - } - return 0; -} - -/* - * If we set up a device for bus mastering, we need to check and set - * the latency timer as it may not be properly set. - */ -unsigned int pcibios_max_latency = 255; - -void pcibios_set_master(struct pci_dev *dev) -{ - u8 lat; - pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); - if (lat < 16) - lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; - else if (lat > pcibios_max_latency) - lat = pcibios_max_latency; - else - return; - printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); - pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); -} - -void __init pcibios_update_irq(struct pci_dev *dev, int irq) -{ - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); -} diff --git a/arch/sh64/kernel/semaphore.c b/arch/sh64/kernel/semaphore.c deleted file mode 100644 index 72c16533436e..000000000000 --- a/arch/sh64/kernel/semaphore.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Just taken from alpha implementation. - * This can't work well, perhaps. - */ -/* - * Generic semaphore code. Buyer beware. Do your own - * specific changes in <asm/semaphore-helper.h> - */ - -#include <linux/errno.h> -#include <linux/rwsem.h> -#include <linux/sched.h> -#include <linux/wait.h> -#include <linux/init.h> -#include <asm/semaphore.h> -#include <asm/semaphore-helper.h> - -spinlock_t semaphore_wake_lock; - -/* - * Semaphores are implemented using a two-way counter: - * The "count" variable is decremented for each process - * that tries to sleep, while the "waking" variable is - * incremented when the "up()" code goes to wake up waiting - * processes. - * - * Notably, the inline "up()" and "down()" functions can - * efficiently test if they need to do any extra work (up - * needs to do something only if count was negative before - * the increment operation. - * - * waking_non_zero() (from asm/semaphore.h) must execute - * atomically. - * - * When __up() is called, the count was negative before - * incrementing it, and we need to wake up somebody. - * - * This routine adds one to the count of processes that need to - * wake up and exit. ALL waiting processes actually wake up but - * only the one that gets to the "waking" field first will gate - * through and acquire the semaphore. The others will go back - * to sleep. - * - * Note that these functions are only called when there is - * contention on the lock, and as such all this is the - * "non-critical" part of the whole semaphore business. The - * critical part is the inline stuff in <asm/semaphore.h> - * where we want to avoid any extra jumps and calls. - */ -void __up(struct semaphore *sem) -{ - wake_one_more(sem); - wake_up(&sem->wait); -} - -/* - * Perform the "down" function. Return zero for semaphore acquired, - * return negative for signalled out of the function. - * - * If called from __down, the return is ignored and the wait loop is - * not interruptible. This means that a task waiting on a semaphore - * using "down()" cannot be killed until someone does an "up()" on - * the semaphore. - * - * If called from __down_interruptible, the return value gets checked - * upon return. If the return value is negative then the task continues - * with the negative value in the return register (it can be tested by - * the caller). - * - * Either form may be used in conjunction with "up()". - * - */ - -#define DOWN_VAR \ - struct task_struct *tsk = current; \ - wait_queue_t wait; \ - init_waitqueue_entry(&wait, tsk); - -#define DOWN_HEAD(task_state) \ - \ - \ - tsk->state = (task_state); \ - add_wait_queue(&sem->wait, &wait); \ - \ - /* \ - * Ok, we're set up. sem->count is known to be less than zero \ - * so we must wait. \ - * \ - * We can let go the lock for purposes of waiting. \ - * We re-acquire it after awaking so as to protect \ - * all semaphore operations. \ - * \ - * If "up()" is called before we call waking_non_zero() then \ - * we will catch it right away. If it is called later then \ - * we will have to go through a wakeup cycle to catch it. \ - * \ - * Multiple waiters contend for the semaphore lock to see \ - * who gets to gate through and who has to wait some more. \ - */ \ - for (;;) { - -#define DOWN_TAIL(task_state) \ - tsk->state = (task_state); \ - } \ - tsk->state = TASK_RUNNING; \ - remove_wait_queue(&sem->wait, &wait); - -void __sched __down(struct semaphore * sem) -{ - DOWN_VAR - DOWN_HEAD(TASK_UNINTERRUPTIBLE) - if (waking_non_zero(sem)) - break; - schedule(); - DOWN_TAIL(TASK_UNINTERRUPTIBLE) -} - -int __sched __down_interruptible(struct semaphore * sem) -{ - int ret = 0; - DOWN_VAR - DOWN_HEAD(TASK_INTERRUPTIBLE) - - ret = waking_non_zero_interruptible(sem, tsk); - if (ret) - { - if (ret == 1) - /* ret != 0 only if we get interrupted -arca */ - ret = 0; - break; - } - schedule(); - DOWN_TAIL(TASK_INTERRUPTIBLE) - return ret; -} - -int __down_trylock(struct semaphore * sem) -{ - return waking_non_zero_trylock(sem); -} diff --git a/arch/sh64/kernel/setup.c b/arch/sh64/kernel/setup.c deleted file mode 100644 index 2b7264c0c6f7..000000000000 --- a/arch/sh64/kernel/setup.c +++ /dev/null @@ -1,379 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/setup.c - * - * sh64 Arch Support - * - * This file handles the architecture-dependent parts of initialization - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt - * - * benedict.gaster@superh.com: 2nd May 2002 - * Modified to use the empty_zero_page to pass command line arguments. - * - * benedict.gaster@superh.com: 3rd May 2002 - * Added support for ramdisk, removing statically linked romfs at the same time. - * - * lethal@linux-sh.org: 15th May 2003 - * Added generic procfs cpuinfo reporting. Make boards just export their name. - * - * lethal@linux-sh.org: 25th May 2003 - * Added generic get_cpu_subtype() for subtype reporting from cpu_data->type. - * - */ -#include <linux/errno.h> -#include <linux/rwsem.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/stddef.h> -#include <linux/unistd.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/user.h> -#include <linux/a.out.h> -#include <linux/screen_info.h> -#include <linux/ioport.h> -#include <linux/delay.h> -#include <linux/init.h> -#include <linux/seq_file.h> -#include <linux/blkdev.h> -#include <linux/bootmem.h> -#include <linux/console.h> -#include <linux/root_dev.h> -#include <linux/cpu.h> -#include <linux/initrd.h> -#include <linux/pfn.h> -#include <asm/processor.h> -#include <asm/page.h> -#include <asm/pgtable.h> -#include <asm/platform.h> -#include <asm/uaccess.h> -#include <asm/system.h> -#include <asm/io.h> -#include <asm/sections.h> -#include <asm/setup.h> -#include <asm/smp.h> - -struct screen_info screen_info; - -#ifdef CONFIG_BLK_DEV_RAM -extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */ -extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */ -extern int rd_image_start; /* starting block # of image */ -#endif - -extern int root_mountflags; -extern char *get_system_type(void); -extern void platform_setup(void); -extern void platform_monitor(void); -extern void platform_reserve(void); -extern int sh64_cache_init(void); -extern int sh64_tlb_init(void); - -#define RAMDISK_IMAGE_START_MASK 0x07FF -#define RAMDISK_PROMPT_FLAG 0x8000 -#define RAMDISK_LOAD_FLAG 0x4000 - -static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, }; -unsigned long long memory_start = CONFIG_MEMORY_START; -unsigned long long memory_end = CONFIG_MEMORY_START + (CONFIG_MEMORY_SIZE_IN_MB * 1024 * 1024); - -struct sh_cpuinfo boot_cpu_data; - -static inline void parse_mem_cmdline (char ** cmdline_p) -{ - char c = ' ', *to = command_line, *from = COMMAND_LINE; - int len = 0; - - /* Save unparsed command line copy for /proc/cmdline */ - memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE); - boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; - - for (;;) { - /* - * "mem=XXX[kKmM]" defines a size of memory. - */ - if (c == ' ' && !memcmp(from, "mem=", 4)) { - if (to != command_line) - to--; - { - unsigned long mem_size; - - mem_size = memparse(from+4, &from); - memory_end = memory_start + mem_size; - } - } - c = *(from++); - if (!c) - break; - if (COMMAND_LINE_SIZE <= ++len) - break; - *(to++) = c; - } - *to = '\0'; - - *cmdline_p = command_line; -} - -static void __init sh64_cpu_type_detect(void) -{ - extern unsigned long long peek_real_address_q(unsigned long long addr); - unsigned long long cir; - /* Do peeks in real mode to avoid having to set up a mapping for the - WPC registers. On SH5-101 cut2, such a mapping would be exposed to - an address translation erratum which would make it hard to set up - correctly. */ - cir = peek_real_address_q(0x0d000008); - - if ((cir & 0xffff) == 0x5103) { - boot_cpu_data.type = CPU_SH5_103; - } else if (((cir >> 32) & 0xffff) == 0x51e2) { - /* CPU.VCR aliased at CIR address on SH5-101 */ - boot_cpu_data.type = CPU_SH5_101; - } else { - boot_cpu_data.type = CPU_SH_NONE; - } -} - -void __init setup_arch(char **cmdline_p) -{ - unsigned long bootmap_size, i; - unsigned long first_pfn, start_pfn, last_pfn, pages; - -#ifdef CONFIG_EARLY_PRINTK - extern void enable_early_printk(void); - - /* - * Setup Early SCIF console - */ - enable_early_printk(); -#endif - - /* - * Setup TLB mappings - */ - sh64_tlb_init(); - - /* - * Caches are already initialized by the time we get here, so we just - * fill in cpu_data info for the caches. - */ - sh64_cache_init(); - - platform_setup(); - platform_monitor(); - - sh64_cpu_type_detect(); - - ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); - -#ifdef CONFIG_BLK_DEV_RAM - rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; - rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); - rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); -#endif - - if (!MOUNT_ROOT_RDONLY) - root_mountflags &= ~MS_RDONLY; - init_mm.start_code = (unsigned long) _text; - init_mm.end_code = (unsigned long) _etext; - init_mm.end_data = (unsigned long) _edata; - init_mm.brk = (unsigned long) _end; - - code_resource.start = __pa(_text); - code_resource.end = __pa(_etext)-1; - data_resource.start = __pa(_etext); - data_resource.end = __pa(_edata)-1; - - parse_mem_cmdline(cmdline_p); - - /* - * Find the lowest and highest page frame numbers we have available - */ - first_pfn = PFN_DOWN(memory_start); - last_pfn = PFN_DOWN(memory_end); - pages = last_pfn - first_pfn; - - /* - * Partially used pages are not usable - thus - * we are rounding upwards: - */ - start_pfn = PFN_UP(__pa(_end)); - - /* - * Find a proper area for the bootmem bitmap. After this - * bootstrap step all allocations (until the page allocator - * is intact) must be done via bootmem_alloc(). - */ - bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, - first_pfn, - last_pfn); - /* - * Round it up. - */ - bootmap_size = PFN_PHYS(PFN_UP(bootmap_size)); - - /* - * Register fully available RAM pages with the bootmem allocator. - */ - free_bootmem_node(NODE_DATA(0), PFN_PHYS(first_pfn), PFN_PHYS(pages)); - - /* - * Reserve all kernel sections + bootmem bitmap + a guard page. - */ - reserve_bootmem_node(NODE_DATA(0), PFN_PHYS(first_pfn), - (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE) - PFN_PHYS(first_pfn)); - - /* - * Reserve platform dependent sections - */ - platform_reserve(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (LOADER_TYPE && INITRD_START) { - if (INITRD_START + INITRD_SIZE <= (PFN_PHYS(last_pfn))) { - reserve_bootmem_node(NODE_DATA(0), INITRD_START + __MEMORY_START, INITRD_SIZE); - - initrd_start = (long) INITRD_START + PAGE_OFFSET + __MEMORY_START; - initrd_end = initrd_start + INITRD_SIZE; - } else { - printk("initrd extends beyond end of memory " - "(0x%08lx > 0x%08lx)\ndisabling initrd\n", - (long) INITRD_START + INITRD_SIZE, - PFN_PHYS(last_pfn)); - initrd_start = 0; - } - } -#endif - - /* - * Claim all RAM, ROM, and I/O resources. - */ - - /* Kernel RAM */ - request_resource(&iomem_resource, &code_resource); - request_resource(&iomem_resource, &data_resource); - - /* Other KRAM space */ - for (i = 0; i < STANDARD_KRAM_RESOURCES - 2; i++) - request_resource(&iomem_resource, - &platform_parms.kram_res_p[i]); - - /* XRAM space */ - for (i = 0; i < STANDARD_XRAM_RESOURCES; i++) - request_resource(&iomem_resource, - &platform_parms.xram_res_p[i]); - - /* ROM space */ - for (i = 0; i < STANDARD_ROM_RESOURCES; i++) - request_resource(&iomem_resource, - &platform_parms.rom_res_p[i]); - - /* I/O space */ - for (i = 0; i < STANDARD_IO_RESOURCES; i++) - request_resource(&ioport_resource, - &platform_parms.io_res_p[i]); - - -#ifdef CONFIG_VT -#if defined(CONFIG_VGA_CONSOLE) - conswitchp = &vga_con; -#elif defined(CONFIG_DUMMY_CONSOLE) - conswitchp = &dummy_con; -#endif -#endif - - printk("Hardware FPU: %s\n", fpu_in_use ? "enabled" : "disabled"); - - paging_init(); -} - -void __xchg_called_with_bad_pointer(void) -{ - printk(KERN_EMERG "xchg() called with bad pointer !\n"); -} - -static struct cpu cpu[1]; - -static int __init topology_init(void) -{ - return register_cpu(cpu, 0); -} - -subsys_initcall(topology_init); - -/* - * Get CPU information - */ -static const char *cpu_name[] = { - [CPU_SH5_101] = "SH5-101", - [CPU_SH5_103] = "SH5-103", - [CPU_SH_NONE] = "Unknown", -}; - -const char *get_cpu_subtype(void) -{ - return cpu_name[boot_cpu_data.type]; -} - -#ifdef CONFIG_PROC_FS -static int show_cpuinfo(struct seq_file *m,void *v) -{ - unsigned int cpu = smp_processor_id(); - - if (!cpu) - seq_printf(m, "machine\t\t: %s\n", get_system_type()); - - seq_printf(m, "processor\t: %d\n", cpu); - seq_printf(m, "cpu family\t: SH-5\n"); - seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype()); - - seq_printf(m, "icache size\t: %dK-bytes\n", - (boot_cpu_data.icache.ways * - boot_cpu_data.icache.sets * - boot_cpu_data.icache.linesz) >> 10); - seq_printf(m, "dcache size\t: %dK-bytes\n", - (boot_cpu_data.dcache.ways * - boot_cpu_data.dcache.sets * - boot_cpu_data.dcache.linesz) >> 10); - seq_printf(m, "itlb entries\t: %d\n", boot_cpu_data.itlb.entries); - seq_printf(m, "dtlb entries\t: %d\n", boot_cpu_data.dtlb.entries); - -#define PRINT_CLOCK(name, value) \ - seq_printf(m, name " clock\t: %d.%02dMHz\n", \ - ((value) / 1000000), ((value) % 1000000)/10000) - - PRINT_CLOCK("cpu", boot_cpu_data.cpu_clock); - PRINT_CLOCK("bus", boot_cpu_data.bus_clock); - PRINT_CLOCK("module", boot_cpu_data.module_clock); - - seq_printf(m, "bogomips\t: %lu.%02lu\n\n", - (loops_per_jiffy*HZ+2500)/500000, - ((loops_per_jiffy*HZ+2500)/5000) % 100); - - return 0; -} - -static void *c_start(struct seq_file *m, loff_t *pos) -{ - return (void*)(*pos == 0); -} -static void *c_next(struct seq_file *m, void *v, loff_t *pos) -{ - return NULL; -} -static void c_stop(struct seq_file *m, void *v) -{ -} -struct seq_operations cpuinfo_op = { - .start = c_start, - .next = c_next, - .stop = c_stop, - .show = show_cpuinfo, -}; -#endif /* CONFIG_PROC_FS */ diff --git a/arch/sh64/kernel/sys_sh64.c b/arch/sh64/kernel/sys_sh64.c deleted file mode 100644 index de0a303ba26f..000000000000 --- a/arch/sh64/kernel/sys_sh64.c +++ /dev/null @@ -1,304 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/kernel/sys_sh64.c - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * This file contains various random system calls that - * have a non-standard calling sequence on the Linux/SH5 - * platform. - * - * Mostly taken from i386 version. - * - */ - -#include <linux/errno.h> -#include <linux/rwsem.h> -#include <linux/sched.h> -#include <linux/mm.h> -#include <linux/fs.h> -#include <linux/smp.h> -#include <linux/sem.h> -#include <linux/msg.h> -#include <linux/shm.h> -#include <linux/stat.h> -#include <linux/mman.h> -#include <linux/file.h> -#include <linux/utsname.h> -#include <linux/syscalls.h> -#include <linux/ipc.h> -#include <asm/uaccess.h> -#include <asm/ptrace.h> -#include <asm/unistd.h> - -#define REG_3 3 - -/* - * sys_pipe() is the normal C calling standard for creating - * a pipe. It's not the way Unix traditionally does this, though. - */ -#ifdef NEW_PIPE_IMPLEMENTATION -asmlinkage int sys_pipe(unsigned long * fildes, - unsigned long dummy_r3, - unsigned long dummy_r4, - unsigned long dummy_r5, - unsigned long dummy_r6, - unsigned long dummy_r7, - struct pt_regs * regs) /* r8 = pt_regs forced by entry.S */ -{ - int fd[2]; - int ret; - - ret = do_pipe(fd); - if (ret == 0) - /* - *********************************************************************** - * To avoid the copy_to_user we prefer to break the ABIs convention, * - * packing the valid pair of file IDs into a single register (r3); * - * while r2 is the return code as defined by the sh5-ABIs. * - * BE CAREFUL: pipe stub, into glibc, must be aware of this solution * - *********************************************************************** - -#ifdef __LITTLE_ENDIAN__ - regs->regs[REG_3] = (((unsigned long long) fd[1]) << 32) | ((unsigned long long) fd[0]); -#else - regs->regs[REG_3] = (((unsigned long long) fd[0]) << 32) | ((unsigned long long) fd[1]); -#endif - - */ - /* although not very clever this is endianess independent */ - regs->regs[REG_3] = (unsigned long long) *((unsigned long long *) fd); - - return ret; -} - -#else -asmlinkage int sys_pipe(unsigned long * fildes) -{ - int fd[2]; - int error; - - error = do_pipe(fd); - if (!error) { - if (copy_to_user(fildes, fd, 2*sizeof(int))) - error = -EFAULT; - } - return error; -} - -#endif - -/* - * To avoid cache alias, we map the shard page with same color. - */ -#define COLOUR_ALIGN(addr) (((addr)+SHMLBA-1)&~(SHMLBA-1)) - -unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, - unsigned long len, unsigned long pgoff, unsigned long flags) -{ - struct vm_area_struct *vma; - - if (flags & MAP_FIXED) { - /* We do not accept a shared mapping if it would violate - * cache aliasing constraints. - */ - if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1))) - return -EINVAL; - return addr; - } - - if (len > TASK_SIZE) - return -ENOMEM; - if (!addr) - addr = TASK_UNMAPPED_BASE; - - if (flags & MAP_PRIVATE) - addr = PAGE_ALIGN(addr); - else - addr = COLOUR_ALIGN(addr); - - for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { - /* At this point: (!vma || addr < vma->vm_end). */ - if (TASK_SIZE - len < addr) - return -ENOMEM; - if (!vma || addr + len <= vma->vm_start) - return addr; - addr = vma->vm_end; - if (!(flags & MAP_PRIVATE)) - addr = COLOUR_ALIGN(addr); - } -} - -/* common code for old and new mmaps */ -static inline long do_mmap2( - unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - return do_mmap2(addr, len, prot, flags, fd, pgoff); -} - -asmlinkage int old_mmap(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - int fd, unsigned long off) -{ - if (off & ~PAGE_MASK) - return -EINVAL; - return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT); -} - -/* - * sys_ipc() is the de-multiplexer for the SysV IPC calls.. - * - * This is really horribly ugly. - */ -asmlinkage int sys_ipc(uint call, int first, int second, - int third, void __user *ptr, long fifth) -{ - int version, ret; - - version = call >> 16; /* hack for backward compatibility */ - call &= 0xffff; - - if (call <= SEMCTL) - switch (call) { - case SEMOP: - return sys_semtimedop(first, (struct sembuf __user *)ptr, - second, NULL); - case SEMTIMEDOP: - return sys_semtimedop(first, (struct sembuf __user *)ptr, - second, - (const struct timespec __user *)fifth); - case SEMGET: - return sys_semget (first, second, third); - case SEMCTL: { - union semun fourth; - if (!ptr) - return -EINVAL; - if (get_user(fourth.__pad, (void * __user *) ptr)) - return -EFAULT; - return sys_semctl (first, second, third, fourth); - } - default: - return -EINVAL; - } - - if (call <= MSGCTL) - switch (call) { - case MSGSND: - return sys_msgsnd (first, (struct msgbuf __user *) ptr, - second, third); - case MSGRCV: - switch (version) { - case 0: { - struct ipc_kludge tmp; - if (!ptr) - return -EINVAL; - - if (copy_from_user(&tmp, - (struct ipc_kludge __user *) ptr, - sizeof (tmp))) - return -EFAULT; - return sys_msgrcv (first, tmp.msgp, second, - tmp.msgtyp, third); - } - default: - return sys_msgrcv (first, - (struct msgbuf __user *) ptr, - second, fifth, third); - } - case MSGGET: - return sys_msgget ((key_t) first, second); - case MSGCTL: - return sys_msgctl (first, second, - (struct msqid_ds __user *) ptr); - default: - return -EINVAL; - } - if (call <= SHMCTL) - switch (call) { - case SHMAT: - switch (version) { - default: { - ulong raddr; - ret = do_shmat (first, (char __user *) ptr, - second, &raddr); - if (ret) - return ret; - return put_user (raddr, (ulong __user *) third); - } - case 1: /* iBCS2 emulator entry point */ - if (!segment_eq(get_fs(), get_ds())) - return -EINVAL; - return do_shmat (first, (char __user *) ptr, - second, (ulong *) third); - } - case SHMDT: - return sys_shmdt ((char __user *)ptr); - case SHMGET: - return sys_shmget (first, second, third); - case SHMCTL: - return sys_shmctl (first, second, - (struct shmid_ds __user *) ptr); - default: - return -EINVAL; - } - - return -EINVAL; -} - -asmlinkage int sys_uname(struct old_utsname * name) -{ - int err; - if (!name) - return -EFAULT; - down_read(&uts_sem); - err = copy_to_user(name, utsname(), sizeof (*name)); - up_read(&uts_sem); - return err?-EFAULT:0; -} - -/* - * Do a system call from kernel instead of calling sys_execve so we - * end up with proper pt_regs. - */ -int kernel_execve(const char *filename, char *const argv[], char *const envp[]) -{ - register unsigned long __sc0 __asm__ ("r9") = ((0x13 << 16) | __NR_execve); - register unsigned long __sc2 __asm__ ("r2") = (unsigned long) filename; - register unsigned long __sc3 __asm__ ("r3") = (unsigned long) argv; - register unsigned long __sc4 __asm__ ("r4") = (unsigned long) envp; - __asm__ __volatile__ ("trapa %1 !\t\t\t execve(%2,%3,%4)" - : "=r" (__sc0) - : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) ); - __asm__ __volatile__ ("!dummy %0 %1 %2 %3" - : : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) : "memory"); - return __sc0; -} diff --git a/arch/sh64/kernel/vmlinux.lds.S b/arch/sh64/kernel/vmlinux.lds.S deleted file mode 100644 index f533a064da5f..000000000000 --- a/arch/sh64/kernel/vmlinux.lds.S +++ /dev/null @@ -1,140 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh5/vmlinux.lds.S - * - * ld script to make ST50 Linux kernel - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * benedict.gaster@superh.com: 2nd May 2002 - * Add definition of empty_zero_page to be the first page of kernel image. - * - * benedict.gaster@superh.com: 3rd May 2002 - * Added support for ramdisk, removing statically linked romfs at the same time. - * - * lethal@linux-sh.org: 9th May 2003 - * Kill off GLOBAL_NAME() usage and other CDC-isms. - * - * lethal@linux-sh.org: 19th May 2003 - * Remove support for ancient toolchains. - */ - -#include <asm/page.h> -#include <asm/cache.h> -#include <asm/processor.h> -#include <asm/thread_info.h> - -#define LOAD_OFFSET CONFIG_CACHED_MEMORY_OFFSET -#include <asm-generic/vmlinux.lds.h> - -OUTPUT_ARCH(sh:sh5) - -#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET) - -ENTRY(__start) -SECTIONS -{ - . = CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE; - _text = .; /* Text and read-only data */ - text = .; /* Text and read-only data */ - - .empty_zero_page : C_PHYS(.empty_zero_page) { - *(.empty_zero_page) - } = 0 - - .text : C_PHYS(.text) { - *(.text.head) - TEXT_TEXT - *(.text64) - *(.text..SHmedia32) - SCHED_TEXT - LOCK_TEXT - *(.fixup) - *(.gnu.warning) -#ifdef CONFIG_LITTLE_ENDIAN - } = 0x6ff0fff0 -#else - } = 0xf0fff06f -#endif - - /* We likely want __ex_table to be Cache Line aligned */ - . = ALIGN(L1_CACHE_BYTES); /* Exception table */ - __start___ex_table = .; - __ex_table : C_PHYS(__ex_table) { *(__ex_table) } - __stop___ex_table = .; - - _etext = .; /* End of text section */ - - NOTES - - RODATA - - .data : C_PHYS(.data) { /* Data */ - DATA_DATA - CONSTRUCTORS - } - - . = ALIGN(PAGE_SIZE); - .data.page_aligned : C_PHYS(.data.page_aligned) { *(.data.page_aligned) } - - PERCPU(PAGE_SIZE) - - . = ALIGN(L1_CACHE_BYTES); - .data.cacheline_aligned : C_PHYS(.data.cacheline_aligned) { *(.data.cacheline_aligned) } - - _edata = .; /* End of data section */ - - . = ALIGN(THREAD_SIZE); /* init_task: structure size aligned */ - .data.init_task : C_PHYS(.data.init_task) { *(.data.init_task) } - - . = ALIGN(PAGE_SIZE); /* Init code and data */ - __init_begin = .; - _sinittext = .; - .init.text : C_PHYS(.init.text) { *(.init.text) } - _einittext = .; - .init.data : C_PHYS(.init.data) { *(.init.data) } - . = ALIGN(L1_CACHE_BYTES); /* Better if Cache Line aligned */ - __setup_start = .; - .init.setup : C_PHYS(.init.setup) { *(.init.setup) } - __setup_end = .; - __initcall_start = .; - .initcall.init : C_PHYS(.initcall.init) { - INITCALLS - } - __initcall_end = .; - __con_initcall_start = .; - .con_initcall.init : C_PHYS(.con_initcall.init) { *(.con_initcall.init) } - __con_initcall_end = .; - SECURITY_INIT - -#ifdef CONFIG_BLK_DEV_INITRD - __initramfs_start = .; - .init.ramfs : C_PHYS(.init.ramfs) { *(.init.ramfs) } - __initramfs_end = .; -#endif - - . = ALIGN(PAGE_SIZE); - __init_end = .; - - /* Align to the biggest single data representation, head and tail */ - . = ALIGN(8); - __bss_start = .; /* BSS */ - .bss : C_PHYS(.bss) { - *(.bss) - } - . = ALIGN(8); - _end = . ; - - /* Sections to be discarded */ - /DISCARD/ : { - *(.exit.text) - *(.exit.data) - *(.exitcall.exit) - } - - STABS_DEBUG - DWARF_DEBUG -} diff --git a/arch/sh64/lib/Makefile b/arch/sh64/lib/Makefile deleted file mode 100644 index 6a4cc3f9c0b1..000000000000 --- a/arch/sh64/lib/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 2000, 2001 Paolo Alberelli -# Coprygith (C) 2003 Paul Mundt -# -# Makefile for the SH-5 specific library files.. -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# - -# Panic should really be compiled as PIC -lib-y := udelay.o c-checksum.o dbg.o io.o panic.o memcpy.o copy_user_memcpy.o \ - page_copy.o page_clear.o iomap.o - diff --git a/arch/sh64/lib/io.c b/arch/sh64/lib/io.c deleted file mode 100644 index a3f3a2b8e25b..000000000000 --- a/arch/sh64/lib/io.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * This file contains the I/O routines for use on the overdrive board - * - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/delay.h> -#include <linux/module.h> -#include <asm/system.h> -#include <asm/processor.h> -#include <asm/io.h> - -/* Now for the string version of these functions */ -void outsb(unsigned long port, const void *addr, unsigned long count) -{ - int i; - unsigned char *p = (unsigned char *) addr; - - for (i = 0; i < count; i++, p++) { - outb(*p, port); - } -} -EXPORT_SYMBOL(outsb); - -void insb(unsigned long port, void *addr, unsigned long count) -{ - int i; - unsigned char *p = (unsigned char *) addr; - - for (i = 0; i < count; i++, p++) { - *p = inb(port); - } -} -EXPORT_SYMBOL(insb); - -/* For the 16 and 32 bit string functions, we have to worry about alignment. - * The SH does not do unaligned accesses, so we have to read as bytes and - * then write as a word or dword. - * This can be optimised a lot more, especially in the case where the data - * is aligned - */ - -void outsw(unsigned long port, const void *addr, unsigned long count) -{ - int i; - unsigned short tmp; - unsigned char *p = (unsigned char *) addr; - - for (i = 0; i < count; i++, p += 2) { - tmp = (*p) | ((*(p + 1)) << 8); - outw(tmp, port); - } -} -EXPORT_SYMBOL(outsw); - -void insw(unsigned long port, void *addr, unsigned long count) -{ - int i; - unsigned short tmp; - unsigned char *p = (unsigned char *) addr; - - for (i = 0; i < count; i++, p += 2) { - tmp = inw(port); - p[0] = tmp & 0xff; - p[1] = (tmp >> 8) & 0xff; - } -} -EXPORT_SYMBOL(insw); - -void outsl(unsigned long port, const void *addr, unsigned long count) -{ - int i; - unsigned tmp; - unsigned char *p = (unsigned char *) addr; - - for (i = 0; i < count; i++, p += 4) { - tmp = (*p) | ((*(p + 1)) << 8) | ((*(p + 2)) << 16) | - ((*(p + 3)) << 24); - outl(tmp, port); - } -} -EXPORT_SYMBOL(outsl); - -void insl(unsigned long port, void *addr, unsigned long count) -{ - int i; - unsigned tmp; - unsigned char *p = (unsigned char *) addr; - - for (i = 0; i < count; i++, p += 4) { - tmp = inl(port); - p[0] = tmp & 0xff; - p[1] = (tmp >> 8) & 0xff; - p[2] = (tmp >> 16) & 0xff; - p[3] = (tmp >> 24) & 0xff; - - } -} -EXPORT_SYMBOL(insl); - -void memcpy_toio(void __iomem *to, const void *from, long count) -{ - unsigned char *p = (unsigned char *) from; - - while (count) { - count--; - writeb(*p++, to++); - } -} -EXPORT_SYMBOL(memcpy_toio); - -void memcpy_fromio(void *to, void __iomem *from, long count) -{ - int i; - unsigned char *p = (unsigned char *) to; - - for (i = 0; i < count; i++) { - p[i] = readb(from); - from++; - } -} -EXPORT_SYMBOL(memcpy_fromio); diff --git a/arch/sh64/lib/iomap.c b/arch/sh64/lib/iomap.c deleted file mode 100644 index 253d1e351d49..000000000000 --- a/arch/sh64/lib/iomap.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * arch/sh64/lib/iomap.c - * - * Generic sh64 iomap interface - * - * Copyright (C) 2004 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/pci.h> -#include <asm/io.h> - -void __iomem *__attribute__ ((weak)) -ioport_map(unsigned long port, unsigned int len) -{ - return (void __iomem *)port; -} -EXPORT_SYMBOL(ioport_map); - -void ioport_unmap(void __iomem *addr) -{ - /* Nothing .. */ -} -EXPORT_SYMBOL(ioport_unmap); - -#ifdef CONFIG_PCI -void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max) -{ - unsigned long start = pci_resource_start(dev, bar); - unsigned long len = pci_resource_len(dev, bar); - unsigned long flags = pci_resource_flags(dev, bar); - - if (!len) - return NULL; - if (max && len > max) - len = max; - if (flags & IORESOURCE_IO) - return ioport_map(start + pciio_virt, len); - if (flags & IORESOURCE_MEM) - return (void __iomem *)start; - - /* What? */ - return NULL; -} -EXPORT_SYMBOL(pci_iomap); - -void pci_iounmap(struct pci_dev *dev, void __iomem *addr) -{ - /* Nothing .. */ -} -EXPORT_SYMBOL(pci_iounmap); -#endif diff --git a/arch/sh64/mach-cayman/Makefile b/arch/sh64/mach-cayman/Makefile deleted file mode 100644 index 67a2258bf8c4..000000000000 --- a/arch/sh64/mach-cayman/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# Makefile for the Hitachi Cayman specific parts of the kernel -# -# Note! Dependencies are done automagically by 'make dep', which also -# removes any old dependencies. DON'T put your own dependencies here -# unless it's something special (ie not a .c file). -# - -obj-y := setup.o irq.o iomap.o -obj-$(CONFIG_HEARTBEAT) += led.o - diff --git a/arch/sh64/mach-cayman/iomap.c b/arch/sh64/mach-cayman/iomap.c deleted file mode 100644 index a5c645f02d57..000000000000 --- a/arch/sh64/mach-cayman/iomap.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/sh64/mach-cayman/iomap.c - * - * Cayman iomap interface - * - * Copyright (C) 2004 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <asm/io.h> -#include <asm/cayman.h> - -void __iomem *ioport_map(unsigned long port, unsigned int len) -{ - if (port < 0x400) - return (void __iomem *)((port << 2) | smsc_superio_virt); - - return (void __iomem *)port; -} - diff --git a/arch/sh64/mach-harp/Makefile b/arch/sh64/mach-harp/Makefile deleted file mode 100644 index 2f2963fa2131..000000000000 --- a/arch/sh64/mach-harp/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y := setup.o diff --git a/arch/sh64/mach-harp/setup.c b/arch/sh64/mach-harp/setup.c deleted file mode 100644 index 05011cb369bb..000000000000 --- a/arch/sh64/mach-harp/setup.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mach-harp/setup.c - * - * SH-5 Simulator Platform Support - * - * This file handles the architecture-dependent parts of initialization - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * benedict.gaster@superh.com: 3rd May 2002 - * Added support for ramdisk, removing statically linked romfs at the same time. * - * - * lethal@linux-sh.org: 15th May 2003 - * Use the generic procfs cpuinfo interface, just return a valid board name. - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <asm/platform.h> -#include <asm/irq.h> - -/* - * Platform Dependent Interrupt Priorities. - */ - -/* Using defaults defined in irq.h */ -#define RES NO_PRIORITY /* Disabled */ -#define IR0 IRL0_PRIORITY /* IRLs */ -#define IR1 IRL1_PRIORITY -#define IR2 IRL2_PRIORITY -#define IR3 IRL3_PRIORITY -#define PCA INTA_PRIORITY /* PCI Ints */ -#define PCB INTB_PRIORITY -#define PCC INTC_PRIORITY -#define PCD INTD_PRIORITY -#define SER TOP_PRIORITY -#define ERR TOP_PRIORITY -#define PW0 TOP_PRIORITY -#define PW1 TOP_PRIORITY -#define PW2 TOP_PRIORITY -#define PW3 TOP_PRIORITY -#define DM0 NO_PRIORITY /* DMA Ints */ -#define DM1 NO_PRIORITY -#define DM2 NO_PRIORITY -#define DM3 NO_PRIORITY -#define DAE NO_PRIORITY -#define TU0 TIMER_PRIORITY /* TMU Ints */ -#define TU1 NO_PRIORITY -#define TU2 NO_PRIORITY -#define TI2 NO_PRIORITY -#define ATI NO_PRIORITY /* RTC Ints */ -#define PRI NO_PRIORITY -#define CUI RTC_PRIORITY -#define ERI SCIF_PRIORITY /* SCIF Ints */ -#define RXI SCIF_PRIORITY -#define BRI SCIF_PRIORITY -#define TXI SCIF_PRIORITY -#define ITI TOP_PRIORITY /* WDT Ints */ - -/* - * Platform dependent structures: maps and parms block. - */ -struct resource io_resources[] = { - /* To be updated with external devices */ -}; - -struct resource kram_resources[] = { - /* These must be last in the array */ - { .name = "Kernel code", .start = 0, .end = 0 }, - /* These must be last in the array */ - { .name = "Kernel data", .start = 0, .end = 0 } -}; - -struct resource xram_resources[] = { - /* To be updated with external devices */ -}; - -struct resource rom_resources[] = { - /* To be updated with external devices */ -}; - -struct sh64_platform platform_parms = { - .readonly_rootfs = 1, - .initial_root_dev = 0x0100, - .loader_type = 1, - .io_res_p = io_resources, - .io_res_count = ARRAY_SIZE(io_resources), - .kram_res_p = kram_resources, - .kram_res_count = ARRAY_SIZE(kram_resources), - .xram_res_p = xram_resources, - .xram_res_count = ARRAY_SIZE(xram_resources), - .rom_res_p = rom_resources, - .rom_res_count = ARRAY_SIZE(rom_resources), -}; - -int platform_int_priority[NR_INTC_IRQS] = { - IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ - RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ - PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ - TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ - RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ - RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ -}; - -void __init platform_setup(void) -{ - /* Harp platform leaves the decision to head.S, for now */ - platform_parms.fpu_flags = fpu_in_use; -} - -void __init platform_monitor(void) -{ - /* Nothing yet .. */ -} - -void __init platform_reserve(void) -{ - /* Nothing yet .. */ -} - -const char *get_system_type(void) -{ - return "ST50 Harp"; -} diff --git a/arch/sh64/mach-sim/Makefile b/arch/sh64/mach-sim/Makefile deleted file mode 100644 index 2f2963fa2131..000000000000 --- a/arch/sh64/mach-sim/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y := setup.o diff --git a/arch/sh64/mach-sim/setup.c b/arch/sh64/mach-sim/setup.c deleted file mode 100644 index e3386ec1ce1f..000000000000 --- a/arch/sh64/mach-sim/setup.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mach-sim/setup.c - * - * ST50 Simulator Platform Support - * - * This file handles the architecture-dependent parts of initialization - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * lethal@linux-sh.org: 15th May 2003 - * Use the generic procfs cpuinfo interface, just return a valid board name. - */ -#include <linux/init.h> -#include <linux/kernel.h> -#include <asm/platform.h> -#include <asm/irq.h> - -/* - * Platform Dependent Interrupt Priorities. - */ - -/* Using defaults defined in irq.h */ -#define RES NO_PRIORITY /* Disabled */ -#define IR0 IRL0_PRIORITY /* IRLs */ -#define IR1 IRL1_PRIORITY -#define IR2 IRL2_PRIORITY -#define IR3 IRL3_PRIORITY -#define PCA INTA_PRIORITY /* PCI Ints */ -#define PCB INTB_PRIORITY -#define PCC INTC_PRIORITY -#define PCD INTD_PRIORITY -#define SER TOP_PRIORITY -#define ERR TOP_PRIORITY -#define PW0 TOP_PRIORITY -#define PW1 TOP_PRIORITY -#define PW2 TOP_PRIORITY -#define PW3 TOP_PRIORITY -#define DM0 NO_PRIORITY /* DMA Ints */ -#define DM1 NO_PRIORITY -#define DM2 NO_PRIORITY -#define DM3 NO_PRIORITY -#define DAE NO_PRIORITY -#define TU0 TIMER_PRIORITY /* TMU Ints */ -#define TU1 NO_PRIORITY -#define TU2 NO_PRIORITY -#define TI2 NO_PRIORITY -#define ATI NO_PRIORITY /* RTC Ints */ -#define PRI NO_PRIORITY -#define CUI RTC_PRIORITY -#define ERI SCIF_PRIORITY /* SCIF Ints */ -#define RXI SCIF_PRIORITY -#define BRI SCIF_PRIORITY -#define TXI SCIF_PRIORITY -#define ITI TOP_PRIORITY /* WDT Ints */ - -/* - * Platform dependent structures: maps and parms block. - */ -struct resource io_resources[] = { - /* Nothing yet .. */ -}; - -struct resource kram_resources[] = { - /* These must be last in the array */ - { .name = "Kernel code", .start = 0, .end = 0 }, - /* These must be last in the array */ - { .name = "Kernel data", .start = 0, .end = 0 } -}; - -struct resource xram_resources[] = { - /* Nothing yet .. */ -}; - -struct resource rom_resources[] = { - /* Nothing yet .. */ -}; - -struct sh64_platform platform_parms = { - .readonly_rootfs = 1, - .initial_root_dev = 0x0100, - .loader_type = 1, - .io_res_p = io_resources, - .io_res_count = ARRAY_SIZE(io_resources), - .kram_res_p = kram_resources, - .kram_res_count = ARRAY_SIZE(kram_resources), - .xram_res_p = xram_resources, - .xram_res_count = ARRAY_SIZE(xram_resources), - .rom_res_p = rom_resources, - .rom_res_count = ARRAY_SIZE(rom_resources), -}; - -int platform_int_priority[NR_IRQS] = { - IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ - RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ - PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ - TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ - RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ - RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ -}; - -void __init platform_setup(void) -{ - /* Simulator platform leaves the decision to head.S */ - platform_parms.fpu_flags = fpu_in_use; -} - -void __init platform_monitor(void) -{ - /* Nothing yet .. */ -} - -void __init platform_reserve(void) -{ - /* Nothing yet .. */ -} - -const char *get_system_type(void) -{ - return "SH-5 Simulator"; -} diff --git a/arch/sh64/mm/consistent.c b/arch/sh64/mm/consistent.c deleted file mode 100644 index c439620402cb..000000000000 --- a/arch/sh64/mm/consistent.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * Copyright (C) 2003 Paul Mundt (lethal@linux-sh.org) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Dynamic DMA mapping support. - */ -#include <linux/types.h> -#include <linux/mm.h> -#include <linux/string.h> -#include <linux/pci.h> -#include <linux/dma-mapping.h> -#include <linux/module.h> -#include <asm/io.h> - -void *consistent_alloc(struct pci_dev *hwdev, size_t size, - dma_addr_t *dma_handle) -{ - void *ret; - int gfp = GFP_ATOMIC; - void *vp; - - if (hwdev == NULL || hwdev->dma_mask != 0xffffffff) - gfp |= GFP_DMA; - - ret = (void *)__get_free_pages(gfp, get_order(size)); - - /* now call our friend ioremap_nocache to give us an uncached area */ - vp = ioremap_nocache(virt_to_phys(ret), size); - - if (vp != NULL) { - memset(vp, 0, size); - *dma_handle = virt_to_phys(ret); - dma_cache_sync(NULL, ret, size, DMA_BIDIRECTIONAL); - } - - return vp; -} -EXPORT_SYMBOL(consistent_alloc); - -void consistent_free(struct pci_dev *hwdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - void *alloc; - - alloc = phys_to_virt((unsigned long)dma_handle); - free_pages((unsigned long)alloc, get_order(size)); - - iounmap(vaddr); -} -EXPORT_SYMBOL(consistent_free); diff --git a/arch/sh64/mm/hugetlbpage.c b/arch/sh64/mm/hugetlbpage.c deleted file mode 100644 index fa66daa2dfa9..000000000000 --- a/arch/sh64/mm/hugetlbpage.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * arch/sh64/mm/hugetlbpage.c - * - * SuperH HugeTLB page support. - * - * Cloned from sparc64 by Paul Mundt. - * - * Copyright (C) 2002, 2003 David S. Miller (davem@redhat.com) - */ - -#include <linux/init.h> -#include <linux/fs.h> -#include <linux/mm.h> -#include <linux/hugetlb.h> -#include <linux/pagemap.h> -#include <linux/slab.h> -#include <linux/sysctl.h> - -#include <asm/mman.h> -#include <asm/pgalloc.h> -#include <asm/tlb.h> -#include <asm/tlbflush.h> -#include <asm/cacheflush.h> - -pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr) -{ - pgd_t *pgd; - pmd_t *pmd; - pte_t *pte = NULL; - - pgd = pgd_offset(mm, addr); - if (pgd) { - pmd = pmd_alloc(mm, pgd, addr); - if (pmd) - pte = pte_alloc_map(mm, pmd, addr); - } - return pte; -} - -pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr) -{ - pgd_t *pgd; - pmd_t *pmd; - pte_t *pte = NULL; - - pgd = pgd_offset(mm, addr); - if (pgd) { - pmd = pmd_offset(pgd, addr); - if (pmd) - pte = pte_offset_map(pmd, addr); - } - return pte; -} - -int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep) -{ - return 0; -} - -void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t entry) -{ - int i; - - for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) { - set_pte_at(mm, addr, ptep, entry); - ptep++; - addr += PAGE_SIZE; - pte_val(entry) += PAGE_SIZE; - } -} - -pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, - pte_t *ptep) -{ - pte_t entry; - int i; - - entry = *ptep; - - for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) { - pte_clear(mm, addr, ptep); - addr += PAGE_SIZE; - ptep++; - } - - return entry; -} - -struct page *follow_huge_addr(struct mm_struct *mm, - unsigned long address, int write) -{ - return ERR_PTR(-EINVAL); -} - -int pmd_huge(pmd_t pmd) -{ - return 0; -} - -struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address, - pmd_t *pmd, int write) -{ - return NULL; -} diff --git a/arch/sh64/mm/init.c b/arch/sh64/mm/init.c deleted file mode 100644 index 21cf42de23e2..000000000000 --- a/arch/sh64/mm/init.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * arch/sh64/mm/init.c - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt - * - */ - -#include <linux/init.h> -#include <linux/rwsem.h> -#include <linux/mm.h> -#include <linux/swap.h> -#include <linux/bootmem.h> - -#include <asm/mmu_context.h> -#include <asm/page.h> -#include <asm/pgalloc.h> -#include <asm/pgtable.h> -#include <asm/tlb.h> - -DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); - -/* - * Cache of MMU context last used. - */ -unsigned long mmu_context_cache; -pgd_t * mmu_pdtp_cache; -int after_bootmem = 0; - -/* - * BAD_PAGE is the page that is used for page faults when linux - * is out-of-memory. Older versions of linux just did a - * do_exit(), but using this instead means there is less risk - * for a process dying in kernel mode, possibly leaving an inode - * unused etc.. - * - * BAD_PAGETABLE is the accompanying page-table: it is initialized - * to point to BAD_PAGE entries. - * - * ZERO_PAGE is a special page that is used for zero-initialized - * data and COW. - */ - -extern unsigned char empty_zero_page[PAGE_SIZE]; -extern unsigned char empty_bad_page[PAGE_SIZE]; -extern pte_t empty_bad_pte_table[PTRS_PER_PTE]; -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; - -extern char _text, _etext, _edata, __bss_start, _end; -extern char __init_begin, __init_end; - -/* It'd be good if these lines were in the standard header file. */ -#define START_PFN (NODE_DATA(0)->bdata->node_boot_start >> PAGE_SHIFT) -#define MAX_LOW_PFN (NODE_DATA(0)->bdata->node_low_pfn) - - -void show_mem(void) -{ - int i, total = 0, reserved = 0; - int shared = 0, cached = 0; - - printk("Mem-info:\n"); - show_free_areas(); - printk("Free swap: %6ldkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); - i = max_mapnr; - while (i-- > 0) { - total++; - if (PageReserved(mem_map+i)) - reserved++; - else if (PageSwapCache(mem_map+i)) - cached++; - else if (page_count(mem_map+i)) - shared += page_count(mem_map+i) - 1; - } - printk("%d pages of RAM\n",total); - printk("%d reserved pages\n",reserved); - printk("%d pages shared\n",shared); - printk("%d pages swap cached\n",cached); - printk("%ld pages in page table cache\n", quicklist_total_size()); -} - -/* - * paging_init() sets up the page tables. - * - * head.S already did a lot to set up address translation for the kernel. - * Here we comes with: - * . MMU enabled - * . ASID set (SR) - * . some 512MB regions being mapped of which the most relevant here is: - * . CACHED segment (ASID 0 [irrelevant], shared AND NOT user) - * . possible variable length regions being mapped as: - * . UNCACHED segment (ASID 0 [irrelevant], shared AND NOT user) - * . All of the memory regions are placed, independently from the platform - * on high addresses, above 0x80000000. - * . swapper_pg_dir is already cleared out by the .space directive - * in any case swapper does not require a real page directory since - * it's all kernel contained. - * - * Those pesky NULL-reference errors in the kernel are then - * dealt with by not mapping address 0x00000000 at all. - * - */ -void __init paging_init(void) -{ - unsigned long zones_size[MAX_NR_ZONES] = {0, }; - - pgd_init((unsigned long)swapper_pg_dir); - pgd_init((unsigned long)swapper_pg_dir + - sizeof(pgd_t) * USER_PTRS_PER_PGD); - - mmu_context_cache = MMU_CONTEXT_FIRST_VERSION; - - zones_size[ZONE_NORMAL] = MAX_LOW_PFN - START_PFN; - NODE_DATA(0)->node_mem_map = NULL; - free_area_init_node(0, NODE_DATA(0), zones_size, __MEMORY_START >> PAGE_SHIFT, 0); -} - -void __init mem_init(void) -{ - int codesize, reservedpages, datasize, initsize; - int tmp; - - max_mapnr = num_physpages = MAX_LOW_PFN - START_PFN; - high_memory = (void *)__va(MAX_LOW_PFN * PAGE_SIZE); - - /* - * Clear the zero-page. - * This is not required but we might want to re-use - * this very page to pass boot parameters, one day. - */ - memset(empty_zero_page, 0, PAGE_SIZE); - - /* this will put all low memory onto the freelists */ - totalram_pages += free_all_bootmem_node(NODE_DATA(0)); - reservedpages = 0; - for (tmp = 0; tmp < num_physpages; tmp++) - /* - * Only count reserved RAM pages - */ - if (PageReserved(mem_map+tmp)) - reservedpages++; - - after_bootmem = 1; - - codesize = (unsigned long) &_etext - (unsigned long) &_text; - datasize = (unsigned long) &_edata - (unsigned long) &_etext; - initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; - - printk("Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init)\n", - (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), - max_mapnr << (PAGE_SHIFT-10), - codesize >> 10, - reservedpages << (PAGE_SHIFT-10), - datasize >> 10, - initsize >> 10); -} - -void free_initmem(void) -{ - unsigned long addr; - - addr = (unsigned long)(&__init_begin); - for (; addr < (unsigned long)(&__init_end); addr += PAGE_SIZE) { - ClearPageReserved(virt_to_page(addr)); - init_page_count(virt_to_page(addr)); - free_page(addr); - totalram_pages++; - } - printk ("Freeing unused kernel memory: %ldk freed\n", (&__init_end - &__init_begin) >> 10); -} - -#ifdef CONFIG_BLK_DEV_INITRD -void free_initrd_mem(unsigned long start, unsigned long end) -{ - unsigned long p; - for (p = start; p < end; p += PAGE_SIZE) { - ClearPageReserved(virt_to_page(p)); - init_page_count(virt_to_page(p)); - free_page(p); - totalram_pages++; - } - printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10); -} -#endif - diff --git a/arch/sh64/oprofile/Makefile b/arch/sh64/oprofile/Makefile deleted file mode 100644 index 11a451f6a9c3..000000000000 --- a/arch/sh64/oprofile/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -obj-$(CONFIG_OPROFILE) += oprofile.o - -DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ - oprof.o cpu_buffer.o buffer_sync.o \ - event_buffer.o oprofile_files.o \ - oprofilefs.o oprofile_stats.o \ - timer_int.o ) - -profdrvr-y := op_model_null.o - -oprofile-y := $(DRIVER_OBJS) $(profdrvr-y) - diff --git a/arch/sh64/oprofile/op_model_null.c b/arch/sh64/oprofile/op_model_null.c deleted file mode 100644 index a750ea1fee98..000000000000 --- a/arch/sh64/oprofile/op_model_null.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/sh64/oprofile/op_model_null.c - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/kernel.h> -#include <linux/oprofile.h> -#include <linux/init.h> -#include <linux/errno.h> - -int __init oprofile_arch_init(struct oprofile_operations *ops) -{ - return -ENODEV; -} - -void oprofile_arch_exit(void) -{ -} - diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c index b1a77b11f089..99f9f9605e9c 100644 --- a/arch/um/drivers/ubd_kern.c +++ b/arch/um/drivers/ubd_kern.c @@ -475,17 +475,9 @@ static void do_ubd_request(struct request_queue * q); /* Only changed by ubd_init, which is an initcall. */ int thread_fd = -1; -static void ubd_end_request(struct request *req, int bytes, int uptodate) +static void ubd_end_request(struct request *req, int bytes, int error) { - if (!end_that_request_first(req, uptodate, bytes >> 9)) { - struct ubd *dev = req->rq_disk->private_data; - unsigned long flags; - - add_disk_randomness(req->rq_disk); - spin_lock_irqsave(&dev->lock, flags); - end_that_request_last(req, uptodate); - spin_unlock_irqrestore(&dev->lock, flags); - } + blk_end_request(req, error, bytes); } /* Callable only from interrupt context - otherwise you need to do @@ -493,10 +485,10 @@ static void ubd_end_request(struct request *req, int bytes, int uptodate) static inline void ubd_finish(struct request *req, int bytes) { if(bytes < 0){ - ubd_end_request(req, 0, 0); + ubd_end_request(req, 0, -EIO); return; } - ubd_end_request(req, bytes, 1); + ubd_end_request(req, bytes, 0); } static LIST_HEAD(restart); diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c index 3b20613325dc..beb45c9c0835 100644 --- a/arch/x86/kernel/cpu/mtrr/main.c +++ b/arch/x86/kernel/cpu/mtrr/main.c @@ -349,7 +349,7 @@ int mtrr_add_page(unsigned long base, unsigned long size, replace = -1; /* No CPU hotplug when we change MTRR entries */ - lock_cpu_hotplug(); + get_online_cpus(); /* Search for existing MTRR */ mutex_lock(&mtrr_mutex); for (i = 0; i < num_var_ranges; ++i) { @@ -405,7 +405,7 @@ int mtrr_add_page(unsigned long base, unsigned long size, error = i; out: mutex_unlock(&mtrr_mutex); - unlock_cpu_hotplug(); + put_online_cpus(); return error; } @@ -495,7 +495,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size) max = num_var_ranges; /* No CPU hotplug when we change MTRR entries */ - lock_cpu_hotplug(); + get_online_cpus(); mutex_lock(&mtrr_mutex); if (reg < 0) { /* Search for existing MTRR */ @@ -536,7 +536,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size) error = reg; out: mutex_unlock(&mtrr_mutex); - unlock_cpu_hotplug(); + put_online_cpus(); return error; } /** diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 3a058bb16409..e70f3881d7e4 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -283,7 +283,7 @@ sysret_careful: sysret_signal: TRACE_IRQS_ON sti - testl $(_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY),%edx + testl $_TIF_DO_NOTIFY_MASK,%edx jz 1f /* Really a signal */ @@ -377,7 +377,7 @@ int_very_careful: jmp int_restore_rest int_signal: - testl $(_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY),%edx + testl $_TIF_DO_NOTIFY_MASK,%edx jz 1f movq %rsp,%rdi # &ptregs -> arg1 xorl %esi,%esi # oldset -> arg2 @@ -603,7 +603,7 @@ retint_careful: jmp retint_check retint_signal: - testl $(_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY),%edx + testl $_TIF_DO_NOTIFY_MASK,%edx jz retint_swapgs TRACE_IRQS_ON sti diff --git a/arch/x86/kernel/microcode.c b/arch/x86/kernel/microcode.c index 09c315214a5e..40cfd5488719 100644 --- a/arch/x86/kernel/microcode.c +++ b/arch/x86/kernel/microcode.c @@ -436,7 +436,7 @@ static ssize_t microcode_write (struct file *file, const char __user *buf, size_ return -EINVAL; } - lock_cpu_hotplug(); + get_online_cpus(); mutex_lock(µcode_mutex); user_buffer = (void __user *) buf; @@ -447,7 +447,7 @@ static ssize_t microcode_write (struct file *file, const char __user *buf, size_ ret = (ssize_t)len; mutex_unlock(µcode_mutex); - unlock_cpu_hotplug(); + put_online_cpus(); return ret; } @@ -658,14 +658,14 @@ static ssize_t reload_store(struct sys_device *dev, const char *buf, size_t sz) old = current->cpus_allowed; - lock_cpu_hotplug(); + get_online_cpus(); set_cpus_allowed(current, cpumask_of_cpu(cpu)); mutex_lock(µcode_mutex); if (uci->valid) err = cpu_request_microcode(cpu); mutex_unlock(µcode_mutex); - unlock_cpu_hotplug(); + put_online_cpus(); set_cpus_allowed(current, old); } if (err) @@ -817,9 +817,9 @@ static int __init microcode_init (void) return PTR_ERR(microcode_pdev); } - lock_cpu_hotplug(); + get_online_cpus(); error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); - unlock_cpu_hotplug(); + put_online_cpus(); if (error) { microcode_dev_exit(); platform_device_unregister(microcode_pdev); @@ -839,9 +839,9 @@ static void __exit microcode_exit (void) unregister_hotcpu_notifier(&mc_cpu_notifier); - lock_cpu_hotplug(); + get_online_cpus(); sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); - unlock_cpu_hotplug(); + put_online_cpus(); platform_device_unregister(microcode_pdev); } diff --git a/arch/x86/kernel/signal_32.c b/arch/x86/kernel/signal_32.c index 9bdd83022f5f..20f29e4c1d33 100644 --- a/arch/x86/kernel/signal_32.c +++ b/arch/x86/kernel/signal_32.c @@ -658,6 +658,9 @@ void do_notify_resume(struct pt_regs *regs, void *_unused, /* deal with pending signal delivery */ if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) do_signal(regs); + + if (thread_info_flags & _TIF_HRTICK_RESCHED) + hrtick_resched(); clear_thread_flag(TIF_IRET); } diff --git a/arch/x86/kernel/signal_64.c b/arch/x86/kernel/signal_64.c index ab086b0357fc..38d806467c0f 100644 --- a/arch/x86/kernel/signal_64.c +++ b/arch/x86/kernel/signal_64.c @@ -480,6 +480,9 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags) /* deal with pending signal delivery */ if (thread_info_flags & (_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK)) do_signal(regs); + + if (thread_info_flags & _TIF_HRTICK_RESCHED) + hrtick_resched(); } void signal_fault(struct pt_regs *regs, void __user *frame, char *where) diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c index 6fa6cf036c70..55771fd7e545 100644 --- a/arch/x86/kernel/stacktrace.c +++ b/arch/x86/kernel/stacktrace.c @@ -33,6 +33,19 @@ static void save_stack_address(void *data, unsigned long addr) trace->entries[trace->nr_entries++] = addr; } +static void save_stack_address_nosched(void *data, unsigned long addr) +{ + struct stack_trace *trace = (struct stack_trace *)data; + if (in_sched_functions(addr)) + return; + if (trace->skip > 0) { + trace->skip--; + return; + } + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = addr; +} + static const struct stacktrace_ops save_stack_ops = { .warning = save_stack_warning, .warning_symbol = save_stack_warning_symbol, @@ -40,6 +53,13 @@ static const struct stacktrace_ops save_stack_ops = { .address = save_stack_address, }; +static const struct stacktrace_ops save_stack_ops_nosched = { + .warning = save_stack_warning, + .warning_symbol = save_stack_warning_symbol, + .stack = save_stack_stack, + .address = save_stack_address_nosched, +}; + /* * Save stack-backtrace addresses into a stack_trace buffer. */ @@ -50,3 +70,10 @@ void save_stack_trace(struct stack_trace *trace) trace->entries[trace->nr_entries++] = ULONG_MAX; } EXPORT_SYMBOL(save_stack_trace); + +void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) +{ + dump_trace(tsk, NULL, NULL, &save_stack_ops_nosched, trace); + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = ULONG_MAX; +} |