diff options
| -rw-r--r-- | drivers/mxc/vpu/mxc_vpu.c | 25 | ||||
| -rw-r--r-- | include/asm-arm/arch-mxc/mxc_vpu.h | 3 |
2 files changed, 27 insertions, 1 deletions
diff --git a/drivers/mxc/vpu/mxc_vpu.c b/drivers/mxc/vpu/mxc_vpu.c index d78b4700f531..48ffe3659f63 100644 --- a/drivers/mxc/vpu/mxc_vpu.c +++ b/drivers/mxc/vpu/mxc_vpu.c @@ -271,6 +271,31 @@ static int vpu_ioctl(struct inode *inode, struct file *filp, u_int cmd, codec_done = 0; break; } + /* set/clear LHD (Latency Hiding Disable) bit in ESDCFG0 reg. + Tends to fix MPEG4 issue on MX27 TO2 */ + case VPU_IOC_LHD: + { + u_int disable = (u_int) arg; + u_int reg; + u_int reg_addr; + + reg_addr = IO_ADDRESS(SDRAMC_BASE_ADDR + 0x10); + reg = __raw_readl(reg_addr); + pr_debug("ESDCFG0: [ 0x%08x ]\n", reg); + + if (disable == 0) { + __raw_writel(reg & ~0x00000020, reg_addr); + pr_debug("Latency Hiding Disable\n"); + } else { + __raw_writel(reg | 0x00000020, reg_addr); + pr_debug("Latency Hiding Enable\n"); + } + + pr_debug("ESDCFG0: [ 0x%08x ]\n", + __raw_readl(reg_addr)); + + break; + } case VPU_IOC_VL2CC_FLUSH: if (cpu_is_mx32()) { vl2cc_flush(); diff --git a/include/asm-arm/arch-mxc/mxc_vpu.h b/include/asm-arm/arch-mxc/mxc_vpu.h index 2994d1e3f5de..757862426a4c 100644 --- a/include/asm-arm/arch-mxc/mxc_vpu.h +++ b/include/asm-arm/arch-mxc/mxc_vpu.h @@ -42,7 +42,8 @@ typedef struct vpu_mem_desc { #define VPU_IOC_WAIT4INT _IO(VPU_IOC_MAGIC, 2) #define VPU_IOC_PHYMEM_DUMP _IO(VPU_IOC_MAGIC, 3) #define VPU_IOC_REG_DUMP _IO(VPU_IOC_MAGIC, 4) -#define VPU_IOC_VL2CC_FLUSH _IO(VPU_IOC_MAGIC, 5) +#define VPU_IOC_LHD _IO(VPU_IOC_MAGIC, 5) +#define VPU_IOC_VL2CC_FLUSH _IO(VPU_IOC_MAGIC, 6) int vl2cc_init(u32 vl2cc_hw_base); void vl2cc_enable(void); |