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authorMichel Pollet <michel.pollet@bp.renesas.com>2018-06-14 11:56:32 +0100
committerSimon Horman <horms+renesas@verge.net.au>2018-07-23 13:33:03 +0200
commit769d7248a7aae5dace1c5c776c98b352d3d93617 (patch)
tree3b7ab89038f3aa0155196b19c2f80aae3742903b /tools/perf/scripts/python/syscall-counts.py
parentcdbfaf640a23334a7bd2d8a8689051711a4e23c2 (diff)
ARM: dts: Renesas R9A06G032 base device tree file
This adds the Renesas R9A06G032 bare bone support. This currently only handles the SYSCTRL block note, generic parts (gic, architected timer) and a UART. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: updated MAINTAINERS file [simon: do not use r9a06g032-sysctrl.h as it is not in the renesas tree yet] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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