diff options
| author | Paul Mackerras <paulus@samba.org> | 2006-08-01 10:37:25 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-08-01 10:37:25 +1000 |
| commit | 57cad8084e0837e0f2c97da789ec9b3f36809be9 (patch) | |
| tree | e9c790afb4286f78cb08d9664f58baa7e876fe55 /include/asm-mips/cpu.h | |
| parent | cb18bd40030c879cd93fef02fd579f74dbab473d (diff) | |
| parent | 49b1e3ea19b1c95c2f012b8331ffb3b169e4c042 (diff) | |
Merge branch 'merge'
Diffstat (limited to 'include/asm-mips/cpu.h')
| -rw-r--r-- | include/asm-mips/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index dff2a0a52f8f..d38fdbf845b2 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -242,7 +242,7 @@ #define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ #define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ #define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ -#define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */ +#define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */ #define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ #define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ #define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ |