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| author | Robin Gong <b38343@freescale.com> | 2014-07-04 16:05:46 +0800 |
|---|---|---|
| committer | Robin Gong <b38343@freescale.com> | 2014-07-04 17:24:08 +0800 |
| commit | 295dcfe35d2708721917d136493b7a0cc84adb76 (patch) | |
| tree | 65a47902032cbe7640515c6ac2b57d9e61c43c99 /drivers | |
| parent | 982f8797664030b41e0bb0ad39f138767ab89c7c (diff) | |
ENGR00321288 ARM: imx: gpc: fix VADC power off while pu management active
bit17/bit18 of GPC_CNTR worked as VADC power state control, that's function looks
different with other bits of this register: write 1 raise power request and write
0 do nothing. Need read and write only the related bit fields of the register to
avoid touch bit17/bit18 on i.mx6sx. Also fix the same for pcie power on/off.
Signed-off-by: Robin Gong <b38343@freescale.com>
Diffstat (limited to 'drivers')
0 files changed, 0 insertions, 0 deletions