Merge branch 'linus' into perfcounters/core-v2

Merge reason: we have gathered quite a few conflicts, need to merge upstream

Conflicts:
	arch/powerpc/kernel/Makefile
	arch/x86/ia32/ia32entry.S
	arch/x86/include/asm/hardirq.h
	arch/x86/include/asm/unistd_32.h
	arch/x86/include/asm/unistd_64.h
	arch/x86/kernel/cpu/common.c
	arch/x86/kernel/irq.c
	arch/x86/kernel/syscall_table_32.S
	arch/x86/mm/iomap_32.c
	include/linux/sched.h
	kernel/Makefile

Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 28 insertions, 28 deletions

diff --git a/drivers/net/ixgbe/ixgbe_dcb.h b/drivers/net/ixgbe/ixgbe_dcb.h
index 75f6efe1e369..64a9fa15c059 100644
--- a/drivers/net/ixgbe/ixgbe_dcb.h
+++ b/drivers/net/ixgbe/ixgbe_dcb.h
@@ -1,7 +1,7 @@
 /*******************************************************************************
 
   Intel 10 Gigabit PCI Express Linux driver
-  Copyright(c) 1999 - 2007 Intel Corporation.
+  Copyright(c) 1999 - 2009 Intel Corporation.
 
   This program is free software; you can redistribute it and/or modify it
   under the terms and conditions of the GNU General Public License,
@@ -75,6 +75,26 @@ enum strict_prio_type {
 	prio_link
 };
 
+/* DCB capability definitions */
+#define IXGBE_DCB_PG_SUPPORT        0x00000001
+#define IXGBE_DCB_PFC_SUPPORT       0x00000002
+#define IXGBE_DCB_BCN_SUPPORT       0x00000004
+#define IXGBE_DCB_UP2TC_SUPPORT     0x00000008
+#define IXGBE_DCB_GSP_SUPPORT       0x00000010
+
+#define IXGBE_DCB_8_TC_SUPPORT      0x80
+
+struct dcb_support {
+	/* DCB capabilities */
+	u32 capabilities;
+
+	/* Each bit represents a number of TCs configurable in the hw.
+	 * If 8 traffic classes can be configured, the value is 0x80.
+	 */
+	u8  traffic_classes;
+	u8  pfc_traffic_classes;
+};
+
 /* Traffic class bandwidth allocation per direction */
 struct tc_bw_alloc {
 	u8 bwg_id;		  /* Bandwidth Group (BWG) ID */
@@ -108,38 +128,18 @@ enum dcb_rx_pba_cfg {
 	pba_80_48      /* PBA[0-3] each use 80KB, PBA[4-7] each use 48KB */
 };
 
-/*
- * This structure contains many values encoded as fixed-point
- * numbers, meaning that some of bits are dedicated to the
- * magnitude and others to the fraction part. In the comments
- * this is shown as f=n, where n is the number of fraction bits.
- * These fraction bits are always the low-order bits. The size
- * of the magnitude is not specified.
- */
-struct bcn_config {
-	u32 rp_admin_mode[MAX_TRAFFIC_CLASS]; /* BCN enabled, per TC */
-	u32 bcna_option[2]; /* BCNA Port + MAC Addr */
-	u32 rp_w;        /* Derivative Weight, f=3 */
-	u32 rp_gi;       /* Increase Gain, f=12 */
-	u32 rp_gd;       /* Decrease Gain, f=12 */
-	u32 rp_ru;       /* Rate Unit */
-	u32 rp_alpha;    /* Max Decrease Factor, f=12 */
-	u32 rp_beta;     /* Max Increase Factor, f=12 */
-	u32 rp_ri;       /* Initial Rate */
-	u32 rp_td;       /* Drift Interval Timer */
-	u32 rp_rd;       /* Drift Increase */
-	u32 rp_tmax;     /* Severe Congestion Backoff Timer Range */
-	u32 rp_rmin;     /* Severe Congestion Restart Rate */
-	u32 rp_wrtt;     /* RTT Moving Average Weight */
+struct dcb_num_tcs {
+	u8 pg_tcs;
+	u8 pfc_tcs;
 };
 
 struct ixgbe_dcb_config {
-	struct bcn_config bcn;
-
+	struct dcb_support support;
+	struct dcb_num_tcs num_tcs;
 	struct tc_configuration tc_config[MAX_TRAFFIC_CLASS];
 	u8     bw_percentage[2][MAX_BW_GROUP]; /* One each for Tx/Rx */
-
-	bool  round_robin_enable;
+	bool   pfc_mode_enable;
+	bool   round_robin_enable;
 
 	enum dcb_rx_pba_cfg rx_pba_cfg;