summaryrefslogtreecommitdiff
path: root/drivers/memory/tegra20-mc.c
diff options
context:
space:
mode:
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-08-04 19:26:34 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-08-16 13:43:23 -0700
commit877fe62863d0d1dcac837bef9a7b0028f0cd8951 (patch)
tree1bceeda3302b61028bc46670e8b3706ac3f63a3a /drivers/memory/tegra20-mc.c
parent7b6fff65ecf92b265f48249f041b8c06557960ed (diff)
pinctrl: intel: merrifield: Correct UART pin lists
commit 5d996132d921c391af5f267123eca1a6a3148ecd upstream. UART pin lists consist GPIO numbers which is simply wrong. Replace it by pin numbers. Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/memory/tegra20-mc.c')
0 files changed, 0 insertions, 0 deletions