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authorKevin Hilman <khilman@linaro.org>2013-08-19 10:22:10 -0700
committerKevin Hilman <khilman@linaro.org>2013-08-19 10:22:31 -0700
commit5515d9981f5f30e82d096921f86ba016911c9ea8 (patch)
tree7680a87d16e2c2c1f0ca07a8606a65b53ab10ead /drivers/gpu/drm/i915/intel_ddi.c
parentf668adebf43556df9834f254479a44a20294dcf1 (diff)
parentcf470a1b1a741bca00080ebc70968b4f22d9b1ea (diff)
Merge tag 'omap-for-v3.12/dra7xx' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren: Minimal DRA7xx based SoC core support via Rajendra Nayak <rnayak@ti.com> * tag 'omap-for-v3.12/dra7xx' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (849 commits) ARM: DRA7: Add the build support in omap2plus ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5 ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512 ARM: DRA7: board-generic: Add basic DT support ARM: DRA7: Resue the clocksource, clockevent support ARM: DRA7: Reuse io tables and add a new .init_early ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra Linux 3.11-rc5 btrfs: don't loop on large offsets in readdir Btrfs: check to see if root_list is empty before adding it to dead roots Btrfs: release both paths before logging dir/changed extents Btrfs: allow splitting of hole em's when dropping extent cache Btrfs: make sure the backref walker catches all refs to our extent Btrfs: fix backref walking when we hit a compressed extent Btrfs: do not offset physical if we're compressed Btrfs: fix extent buffer leak after backref walking Btrfs: fix a bug of snapshot-aware defrag to make it work on partial extents btrfs: fix file truncation if FALLOC_FL_KEEP_SIZE is specified dlm: kill the unnecessary and wrong device_close()->recalc_sigpending() ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 324211ac9c55..b042ee5c4070 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -301,7 +301,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
struct intel_digital_port *intel_dig_port =
enc_to_dig_port(encoder);
- intel_dp->DP = intel_dig_port->port_reversal |
+ intel_dp->DP = intel_dig_port->saved_port_bits |
DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
@@ -1109,7 +1109,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
* enabling the port.
*/
I915_WRITE(DDI_BUF_CTL(port),
- intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE);
+ intel_dig_port->saved_port_bits |
+ DDI_BUF_CTL_ENABLE);
} else if (type == INTEL_OUTPUT_EDP) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -1347,8 +1348,9 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
intel_encoder->get_config = intel_ddi_get_config;
intel_dig_port->port = port;
- intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
- DDI_BUF_PORT_REVERSAL;
+ intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
+ (DDI_BUF_PORT_REVERSAL |
+ DDI_A_4_LANES);
intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
intel_encoder->type = INTEL_OUTPUT_UNKNOWN;