diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-22 17:40:37 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:53 -0800 |
| commit | 935cf35887d167f8cac58b72d8998a5d6712b27e (patch) | |
| tree | b061f08ddfd985cf99afacfa6392b9ee4739cc1b /arch | |
| parent | 699d5f11a7890392338ca9b67bf92b25783c958f (diff) | |
ARM: tegra: Trivial changes
Change-Id: Id45f6be8336370bf011484bea0a90e7e9f49f026
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
DW: Split into logical changes
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R06af455b61cb70a1a7dc18b38ad3f816d4ccba63
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/platsmp.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/pm.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/sleep.h | 2 |
3 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index b67a32680395..97bfb4db28a5 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -84,11 +84,10 @@ int boot_secondary(unsigned int cpu, struct task_struct *idle) if (is_lp_cluster()) { struct clk *cpu_clk, *cpu_g_clk; - /* The G CPU may not be available for a - variety of reasons. */ + /* The G CPU may not be available for a variety of reasons. */ status = is_g_cluster_available(cpu); if (status) - return status; + goto done; cpu_clk = tegra_get_clock_by_name("cpu"); cpu_g_clk = tegra_get_clock_by_name("cpu_g"); @@ -102,7 +101,7 @@ int boot_secondary(unsigned int cpu, struct task_struct *idle) status = clk_set_parent(cpu_clk, cpu_g_clk); if (status) - return status; + goto done; } smp_wmb(); @@ -150,7 +149,8 @@ done: */ void __init smp_init_cpus(void) { - unsigned int i, ncores = available_cpus(); + unsigned int ncores = available_cpus(); + unsigned int i; if (ncores > nr_cpu_ids) { pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 6a74589720db..25c4ed453574 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -552,7 +552,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) switch (mode) { case TEGRA_SUSPEND_LP0: /* - * lp0 boots through the AVP, which then resumes the AVP to + * LP0 boots through the AVP, which then resumes the AVP to * the address in scratch 39, and the cpu to the address in * scratch 41 to tegra_resume */ @@ -566,7 +566,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) break; case TEGRA_SUSPEND_LP1: /* - * lp1 boots through the normal cpu reset vector pointing to + * LP1 boots through the normal cpu reset vector pointing to * tegra_lp1_reset in IRAM, which resumes the CPU to * the address in scratch 41 to tegra_resume */ @@ -576,7 +576,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) break; case TEGRA_SUSPEND_LP2: /* - * lp2 boots through the normal cpu reset vector directly to + * LP2 boots through the normal cpu reset vector directly to * tegra_resume */ writel(virt_to_phys(tegra_resume), evp_reset); diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 78325f49b85e..c6700af4b45e 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -27,7 +27,7 @@ #define TEGRA_IRAM_CODE_AREA (TEGRA_IRAM_BASE + SZ_4K) -/* PMC_SCRATCH37-39 and 41 are used for tegra_pen_lock in idle */ +/* PMC_SCRATCH37-39 and 41 are used for tegra_pen_lock in Tegra2 idle */ #define PMC_SCRATCH37 0x130 #define PMC_SCRATCH38 0x134 /* PMC_SCRATCH39 stores the reset vector of the AVP (always 0) after LP0 */ |