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| author | Ingo Molnar <mingo@elte.hu> | 2010-12-07 07:49:48 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2010-12-07 07:49:51 +0100 |
| commit | 10a18d7dc0d9f12483c95ffc234118e9b80edfeb (patch) | |
| tree | 0f43620107d5231cab669bca4b3c923b721330c7 /arch/tile/include/asm/processor.h | |
| parent | f984ba4eb575e4a27ed28a76d4126d2aa9233c32 (diff) | |
| parent | cf7d7e5a1980d1116ee152d25dac382b112b9c17 (diff) | |
Merge commit 'v2.6.37-rc5' into perf/core
Merge reason: Pick up the latest -rc.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/tile/include/asm/processor.h')
| -rw-r--r-- | arch/tile/include/asm/processor.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/tile/include/asm/processor.h b/arch/tile/include/asm/processor.h index 1747ff3946b2..a9e7c8760334 100644 --- a/arch/tile/include/asm/processor.h +++ b/arch/tile/include/asm/processor.h @@ -292,8 +292,18 @@ extern int kstack_hash; /* Are we using huge pages in the TLB for kernel data? */ extern int kdata_huge; +/* Support standard Linux prefetching. */ +#define ARCH_HAS_PREFETCH +#define prefetch(x) __builtin_prefetch(x) #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE() +/* Bring a value into the L1D, faulting the TLB if necessary. */ +#ifdef __tilegx__ +#define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x)) +#else +#define prefetch_L1(x) __insn_prefetch_L1((void *)(x)) +#endif + #else /* __ASSEMBLY__ */ /* Do some slow action (e.g. read a slow SPR). */ |