Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits)
  m68knommu: convert to using tracehook_report_syscall_*
  m68knommu: some boards use fixed phy for FEC ethernet
  m68knommu: support the external GPIO based interrupts of the 5272
  m68knommu: mask of vector bits in exception word properly
  m68knommu: change to new flag variables
  m68knommu: Fix MCFUART_TXFIFOSIZE for m548x.
  m68knommu: add basic mmu-less m548x support
  m68knommu: .gitignore vmlinux.lds
  m68knommu: stop using __do_IRQ
  m68knommu: rename PT_OFF_VECTOR to PT_OFF_FORMATVEC.
  m68knommu: add support for Coldfire 547x/548x interrupt controller
  m68k{nommu}: Remove unused DEFINE's from asm-offsets.c
  m68knommu: whitespace cleanup in 68328/entry.S
  m68knommu: Document supported chips in intc-2.c and intc-simr.c.
  m68knommu: fix strace support for 68328/68360
  m68knommu: fix default starting date
  arch/m68knommu: Removing dead 68328_SERIAL_UART2 config option
  arch/m68knommu: Removing dead RAM_{16,32}_MB config option
  arch/m68knommu: Removing dead M68KFPU_EMU config option
  arch/m68knommu: Removing dead RELOCATE config option
  ...

1 files changed, 55 insertions, 0 deletions

diff --git a/arch/m68k/include/asm/m548xsim.h b/arch/m68k/include/asm/m548xsim.h
new file mode 100644
index 000000000000..149135ef30d2
--- /dev/null
+++ b/arch/m68k/include/asm/m548xsim.h
@@ -0,0 +1,55 @@
+/*
+ *	m548xsim.h -- ColdFire 547x/548x System Integration Unit support.
+ */
+
+#ifndef	m548xsim_h
+#define m548xsim_h
+
+#define MCFINT_VECBASE      64
+
+/*
+ *      Interrupt Controller Registers
+ */
+#define MCFICM_INTC0		0x0700		/* Base for Interrupt Ctrl 0 */
+#define MCFINTC_IPRH		0x00		/* Interrupt pending 32-63 */
+#define MCFINTC_IPRL		0x04		/* Interrupt pending 1-31 */
+#define MCFINTC_IMRH		0x08		/* Interrupt mask 32-63 */
+#define MCFINTC_IMRL		0x0c		/* Interrupt mask 1-31 */
+#define MCFINTC_INTFRCH		0x10		/* Interrupt force 32-63 */
+#define MCFINTC_INTFRCL		0x14		/* Interrupt force 1-31 */
+#define MCFINTC_IRLR		0x18		/* */
+#define MCFINTC_IACKL		0x19		/* */
+#define MCFINTC_ICR0		0x40		/* Base ICR register */
+
+/*
+ *	Define system peripheral IRQ usage.
+ */
+#define MCF_IRQ_TIMER		(64 + 54)	/* Slice Timer 0 */
+#define MCF_IRQ_PROFILER	(64 + 53)	/* Slice Timer 1 */
+
+/*
+ *	Generic GPIO support
+ */
+#define MCFGPIO_PIN_MAX		0	/* I am too lazy to count */
+#define MCFGPIO_IRQ_MAX		-1
+#define MCFGPIO_IRQ_VECBASE	-1
+
+/*
+ *	Some PSC related definitions
+ */
+#define MCF_PAR_PSC(x)		(0x000A4F-((x)&0x3))
+#define MCF_PAR_SDA		(0x0008)
+#define MCF_PAR_SCL		(0x0004)
+#define MCF_PAR_PSC_TXD		(0x04)
+#define MCF_PAR_PSC_RXD		(0x08)
+#define MCF_PAR_PSC_RTS(x)	(((x)&0x03)<<4)
+#define MCF_PAR_PSC_CTS(x)	(((x)&0x03)<<6)
+#define MCF_PAR_PSC_CTS_GPIO	(0x00)
+#define MCF_PAR_PSC_CTS_BCLK	(0x80)
+#define MCF_PAR_PSC_CTS_CTS	(0xC0)
+#define MCF_PAR_PSC_RTS_GPIO    (0x00)
+#define MCF_PAR_PSC_RTS_FSYNC	(0x20)
+#define MCF_PAR_PSC_RTS_RTS	(0x30)
+#define MCF_PAR_PSC_CANRX	(0x40)
+
+#endif	/* m548xsim_h */