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| author | Jiri Kosina <jkosina@suse.cz> | 2010-12-10 15:19:18 +0100 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2010-12-10 15:19:18 +0100 |
| commit | 2ade0c1d9d93b7642212657ef76f4a1e30233711 (patch) | |
| tree | 63bc720c0ffe5f4760cac4ed617b9870b050175e /arch/arm/mm/cache-v4wt.S | |
| parent | 504499f22c08a03e2e19dc88d31aa0ecd2ac815e (diff) | |
| parent | 6313e3c21743cc88bb5bd8aa72948ee1e83937b6 (diff) | |
Merge branch 'master' into upstream
Diffstat (limited to 'arch/arm/mm/cache-v4wt.S')
| -rw-r--r-- | arch/arm/mm/cache-v4wt.S | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S index 45c70312f43b..49c2b66cf3dd 100644 --- a/arch/arm/mm/cache-v4wt.S +++ b/arch/arm/mm/cache-v4wt.S @@ -41,6 +41,17 @@ #define CACHE_DLIMIT 16384 /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(v4wt_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(v4wt_flush_icache_all) + +/* * flush_user_cache_all() * * Invalidate all cache entries in a particular address @@ -188,6 +199,7 @@ ENDPROC(v4wt_dma_map_area) .type v4wt_cache_fns, #object ENTRY(v4wt_cache_fns) + .long v4wt_flush_icache_all .long v4wt_flush_kern_cache_all .long v4wt_flush_user_cache_all .long v4wt_flush_user_cache_range |