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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-19 09:47:30 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-19 09:47:30 +0100 |
| commit | 0d4a42f6bd298e826620585e766a154ab460617a (patch) | |
| tree | 406d8f7778691d858dbe3e48e4bbb10e99c0a58a /arch/arm/mach-tegra/fuse.c | |
| parent | d62b4892f3d9f7dd2002e5309be10719d6805b0f (diff) | |
| parent | a937536b868b8369b98967929045f1df54234323 (diff) | |
Merge tag 'v3.9-rc3' into drm-intel-next-queued
Backmerge so that I can merge Imre Deak's coalesced sg entries fixes,
which depend upon the new for_each_sg_page introduce in
commit a321e91b6d73ed011ffceed384c40d2785cf723b
Author: Imre Deak <imre.deak@intel.com>
Date: Wed Feb 27 17:02:56 2013 -0800
lib/scatterlist: add simple page iterator
The merge itself is just two trivial conflicts:
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'arch/arm/mach-tegra/fuse.c')
| -rw-r--r-- | arch/arm/mach-tegra/fuse.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index 8121742711fe..f7db0782a6b6 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -20,6 +20,7 @@ #include <linux/kernel.h> #include <linux/io.h> #include <linux/export.h> +#include <linux/tegra-soc.h> #include "fuse.h" #include "iomap.h" @@ -105,6 +106,11 @@ static void tegra_get_process_id(void) tegra_core_process_id = (reg >> 12) & 3; } +u32 tegra_read_chipid(void) +{ + return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); +} + void tegra_init_fuse(void) { u32 id; @@ -119,7 +125,7 @@ void tegra_init_fuse(void) reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT; - id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); + id = tegra_read_chipid(); tegra_chip_id = (id >> 8) & 0xff; switch (tegra_chip_id) { |