diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2011-07-21 16:34:00 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-21 16:34:00 +0200 |
| commit | 1e09939bad24df95ddeeeca4fbec64fa94b66def (patch) | |
| tree | 8a4661ed8c4619db28863353858e0171171b7d8a /arch/arm/mach-s5p64x0/include/mach | |
| parent | 4d09a938861ef16248334d57ae250e109b0004ae (diff) | |
| parent | e8de616e39ccea3b8d3cf7e68f16d216f183c4bf (diff) | |
Merge branch 'next-samsung-devel' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/devel
Diffstat (limited to 'arch/arm/mach-s5p64x0/include/mach')
| -rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/clkdev.h | 7 | ||||
| -rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 10 |
3 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/clkdev.h b/arch/arm/mach-s5p64x0/include/mach/clkdev.h new file mode 100644 index 000000000000..7dffa83d23ff --- /dev/null +++ b/arch/arm/mach-s5p64x0/include/mach/clkdev.h @@ -0,0 +1,7 @@ +#ifndef __MACH_CLKDEV_H__ +#define __MACH_CLKDEV_H__ + +#define __clk_get(clk) ({ 1; }) +#define __clk_put(clk) do {} while (0) + +#endif diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h index 513abffc7604..5837a36ece8d 100644 --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h @@ -85,6 +85,8 @@ #define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4 #define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5 +#define IRQ_I2S0 IRQ_I2SV40 + /* S5P6450 EINT feature will be added */ /* diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h index 0953ef6b1c77..6ce254729f3b 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h @@ -34,4 +34,14 @@ #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) +/* External interrupt control registers for group0 */ + +#define EINT0CON0_OFFSET (0x900) +#define EINT0MASK_OFFSET (0x920) +#define EINT0PEND_OFFSET (0x924) + +#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) +#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) +#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) + #endif /* __ASM_ARCH_REGS_GPIO_H */ |