summaryrefslogtreecommitdiff
path: root/arch/arm/mach-imx/clk-imx6sx.c
diff options
context:
space:
mode:
authorAnson Huang <b20788@freescale.com>2014-09-01 16:08:07 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-04-14 13:59:35 -0500
commitfd376a56fd459dd928c091913d42c220ae0a9945 (patch)
tree881d5e0653b03ba955d68e72d509ea9dc6220511 /arch/arm/mach-imx/clk-imx6sx.c
parent02cfcf8ce279ee85c21a4b392d88369fa1516129 (diff)
ENGR00329475-4 ARM: imx: support perclk and uart clk parent to OSC on i.mx6sx
change perclk parent to OSC instead of IPG, as IPG clock may be changed by busfreq. when kernel command line has "uart_from_osc" defined, uart clk will select OSC as its parent, this is to make PLL3 be able to be off for low power purpose, as we need all PLLs off in low power idle mode. Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx6sx.c')
-rw-r--r--arch/arm/mach-imx/clk-imx6sx.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c
index 72f8902235d1..6711736043ff 100644
--- a/arch/arm/mach-imx/clk-imx6sx.c
+++ b/arch/arm/mach-imx/clk-imx6sx.c
@@ -124,6 +124,14 @@ static struct clk_div_table video_div_table[] = {
static u32 share_count_asrc;
static u32 share_count_audio;
static u32 share_count_esai;
+static bool uart_from_osc;
+
+static int __init setup_uart_clk(char *uart_rate)
+{
+ uart_from_osc = true;
+ return 1;
+}
+__setup("uart_from_osc", setup_uart_clk);
static void __init imx6sx_clocks_init(struct device_node *ccm_node)
{
@@ -454,6 +462,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clk_register_clkdev(clks[IMX6SX_CLK_GPT_BUS], "ipg", "imx-gpt.0");
clk_register_clkdev(clks[IMX6SX_CLK_GPT_SERIAL], "per", "imx-gpt.0");
+ /* set perclk to from OSC */
+ clk_set_parent(clks[IMX6SX_CLK_PERCLK_SEL], clks[IMX6SX_CLK_OSC]);
+
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
clk_prepare_enable(clks[clks_init_on[i]]);
@@ -515,6 +526,10 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
+ /* Set the UART parent if needed. */
+ if (uart_from_osc)
+ clk_set_parent(clks[IMX6SX_CLK_UART_SEL], clks[IMX6SX_CLK_OSC]);
+
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);