diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-22 18:24:26 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2011-02-22 18:41:48 +0100 |
| commit | 695884fb8acd9857e0e7120ccb2150e30f4b8fef (patch) | |
| tree | 49aa424c1a021ce432e9fa5ea29d37a23e4e30cc /arch/arm/mach-davinci/tnetv107x.c | |
| parent | 5df91509d324d44cfb11e55d9cb02fe18b53b045 (diff) | |
| parent | 04bea68b2f0eeebb089ecc67b618795925268b4a (diff) | |
Merge branch 'devicetree/for-x86' of git://git.secretlab.ca/git/linux-2.6 into x86/platform
Reason: x86 devicetree support for ce4100 depends on those device tree
changes scheduled for .39.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-davinci/tnetv107x.c')
| -rw-r--r-- | arch/arm/mach-davinci/tnetv107x.c | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c index daeae06430b9..6fcdecec8d8c 100644 --- a/arch/arm/mach-davinci/tnetv107x.c +++ b/arch/arm/mach-davinci/tnetv107x.c @@ -131,12 +131,13 @@ define_pll_clk(tdm, 1, 0x0ff, 0x200); define_pll_clk(eth, 2, 0x0ff, 0x400); /* Level 2 - divided outputs from the PLLs */ -#define define_pll_div_clk(pll, cname, div) \ - static struct clk pll##_##cname##_clk = { \ - .name = #pll "_" #cname "_clk",\ - .parent = &pll_##pll##_clk, \ - .flags = CLK_PLL, \ - .div_reg = PLLDIV##div, \ +#define define_pll_div_clk(pll, cname, div) \ + static struct clk pll##_##cname##_clk = { \ + .name = #pll "_" #cname "_clk", \ + .parent = &pll_##pll##_clk, \ + .flags = CLK_PLL, \ + .div_reg = PLLDIV##div, \ + .set_rate = davinci_set_sysclk_rate, \ } define_pll_div_clk(sys, arm1176, 1); @@ -192,6 +193,7 @@ lpsc_clk_enabled(system, sys_half_clk, SYSTEM); lpsc_clk_enabled(ddr2_vrst, sys_ddr_clk, DDR2_EMIF1_VRST); lpsc_clk_enabled(ddr2_vctl_rst, sys_ddr_clk, DDR2_EMIF2_VCTL_RST); lpsc_clk_enabled(wdt_arm, sys_half_clk, WDT_ARM); +lpsc_clk_enabled(timer1, sys_half_clk, TIMER1); lpsc_clk(mbx_lite, sys_arm1176_clk, MBX_LITE); lpsc_clk(ethss, eth_125mhz_clk, ETHSS); @@ -205,16 +207,15 @@ lpsc_clk(mdio, sys_half_clk, MDIO); lpsc_clk(sdio0, sys_half_clk, SDIO0); lpsc_clk(sdio1, sys_half_clk, SDIO1); lpsc_clk(timer0, sys_half_clk, TIMER0); -lpsc_clk(timer1, sys_half_clk, TIMER1); lpsc_clk(wdt_dsp, sys_half_clk, WDT_DSP); lpsc_clk(ssp, sys_half_clk, SSP); lpsc_clk(tdm0, tdm_0_clk, TDM0); lpsc_clk(tdm1, tdm_1_clk, TDM1); lpsc_clk(vlynq, sys_vlynq_ref_clk, VLYNQ); lpsc_clk(mcdma, sys_half_clk, MCDMA); -lpsc_clk(usb0, sys_half_clk, USB0); -lpsc_clk(usb1, sys_half_clk, USB1); lpsc_clk(usbss, sys_half_clk, USBSS); +lpsc_clk(usb0, clk_usbss, USB0); +lpsc_clk(usb1, clk_usbss, USB1); lpsc_clk(ethss_rgmii, eth_250mhz_clk, ETHSS_RGMII); lpsc_clk(imcop, sys_dsp_clk, IMCOP); lpsc_clk(spare, sys_half_clk, SPARE); @@ -281,7 +282,9 @@ static struct clk_lookup clks[] = { CLK(NULL, "clk_tdm0", &clk_tdm0), CLK(NULL, "clk_vlynq", &clk_vlynq), CLK(NULL, "clk_mcdma", &clk_mcdma), + CLK(NULL, "clk_usbss", &clk_usbss), CLK(NULL, "clk_usb0", &clk_usb0), + CLK(NULL, "clk_usb1", &clk_usb1), CLK(NULL, "clk_tdm1", &clk_tdm1), CLK(NULL, "clk_debugss", &clk_debugss), CLK(NULL, "clk_ethss_rgmii", &clk_ethss_rgmii), @@ -289,8 +292,6 @@ static struct clk_lookup clks[] = { CLK(NULL, "clk_imcop", &clk_imcop), CLK(NULL, "clk_spare", &clk_spare), CLK("davinci_mmc.1", NULL, &clk_sdio1), - CLK(NULL, "clk_usb1", &clk_usb1), - CLK(NULL, "clk_usbss", &clk_usbss), CLK(NULL, "clk_ddr2_vrst", &clk_ddr2_vrst), CLK(NULL, "clk_ddr2_vctl_rst", &clk_ddr2_vctl_rst), CLK(NULL, NULL, NULL), |