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authorJames Morris <jmorris@namei.org>2009-05-08 17:56:47 +1000
committerJames Morris <jmorris@namei.org>2009-05-08 17:56:47 +1000
commitd254117099d711f215e62427f55dfb8ebd5ad011 (patch)
tree0848ff8dd74314fec14a86497f8d288c86ba7c65 /Documentation/powerpc/dts-bindings/fsl/esdhc.txt
parent07ff7a0b187f3951788f64ae1f30e8109bc8e9eb (diff)
parent8c9ed899b44c19e81859fbb0e9d659fe2f8630fc (diff)
Merge branch 'master' into next
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+* Freescale Enhanced Secure Digital Host Controller (eSDHC)
+
+The Enhanced Secure Digital Host Controller provides an interface
+for MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+ - compatible : should be
+ "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
+ "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
+ - reg : should contain eSDHC registers location and length.
+ - interrupts : should contain eSDHC interrupt.
+ - interrupt-parent : interrupt source phandle.
+ - clock-frequency : specifies eSDHC base clock frequency.
+
+Example:
+
+sdhci@2e000 {
+ compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
+};