diff options
| author | Dharageswari R <dharageswari.r@intel.com> | 2016-06-03 18:29:37 +0530 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2016-06-07 14:19:11 +0100 |
| commit | 51a01b8c2ea632ed9a57f98c234a0cd9dafe181a (patch) | |
| tree | 7c13c502568b2af9cfce3f34f477deaeaad586d4 /Documentation/isdn/README.diversion | |
| parent | 1ae7ca041a460502b0f9877d84d0f0d9bed9cb72 (diff) | |
ASoC: Intel: Skylake: Disable SRAM Retention before D3
SW needs to set the PGCTL.LSRMD = 1 to disable LPSRAM retention
feature,otherwise it may lead to SRAM ECC Errors.
Signed-off-by: Dharageswari R <dharageswari.r@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/isdn/README.diversion')
0 files changed, 0 insertions, 0 deletions