diff options
| author | Richard Zhu <richard.zhu@freescale.com> | 2015-06-30 09:48:57 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-09-17 09:23:47 -0500 |
| commit | 00b54712c9a396a2e5c5eb1d1902e7a73dd03fec (patch) | |
| tree | 3e40036b7e52c48edc59e366d17ec0d27980e3a7 | |
| parent | 95e84bebfb873d78009277b4298559d2c886f6c9 (diff) | |
MLK-11155-1 arm: mu: keep mu rpmsg int enable
Keep the mu rpmsg int always enable.
- rpmsg transmissions are async, and drived by mu interactions
between the amp cores.
- the schedule delay is not real time mechanism, the mu
interactions maybe blocked by the previous rpmsg int disable
when there are very quick intercations between the amp cores.
Solution:
Keep mu rpmsg int always enable, since it is just to notify
rpmsg master that there is buffer to read, and can be re-entry
multi-times.
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
| -rw-r--r-- | arch/arm/mach-imx/mu.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/mu.c b/arch/arm/mach-imx/mu.c index dc5046530bc3..4131b80c751f 100644 --- a/arch/arm/mach-imx/mu.c +++ b/arch/arm/mach-imx/mu.c @@ -248,8 +248,6 @@ static void rpmsg_work_handler(struct work_struct *work) blocking_notifier_call_chain(&(mu_rpmsg_box.notifier), 4, (void *)m4_message); m4_message = 0; - writel_relaxed(readl_relaxed(mu_base + MU_ACR) | BIT(26), - mu_base + MU_ACR); } /*! @@ -452,8 +450,6 @@ static irqreturn_t imx_mu_isr(int irq, void *param) if (irqs & (1 << 26)) { /* get message from receive buffer */ m4_message = readl_relaxed(mu_base + MU_ARR1_OFFSET); - writel_relaxed(readl_relaxed(mu_base + MU_ACR) & (~BIT(26)), - mu_base + MU_ACR); schedule_delayed_work(&rpmsg_work, 0); } |