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author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2015-05-26 20:13:43 +0900 |
---|---|---|
committer | Sasha Levin <sasha.levin@oracle.com> | 2015-08-27 13:25:57 -0400 |
commit | 33fdddbdf9bf8f0200739483c4b562b895c11274 (patch) | |
tree | 94f96c4ad6f660e43e410e9f6c670dd9b32b36c6 | |
parent | 8066dce0a1bda0d34b1718c93222fe4a6bec80f2 (diff) |
usb: renesas_usbhs: Don't disable the pipe if Control write status stage
[ Upstream commit b4c2526134d5203e5ef1a17a49ce1edab20b9afd ]
commit 93fb9127cb63a3246b32d48fa273010764687862 upstream.
This patch fixes an issue that sometimes this controller is not able
to complete the Control write status stage.
This driver should enable DCPCTR.CCPL and PID_BUF to complete the status
stage. However, if this driver detects the ctrl_stage interruption first
before the control write data is received, this driver will clear the
PID_BUF wrongly in the usbhsf_pio_try_pop(). To avoid this issue, this
patch doesn't clear the PID_BUF in the usbhsf_pio_try_pop().
(Since also the privious code doesn't disable the PID_BUF after a control
transfer was finished, this patch doesn't have any side efforts.)
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
-rw-r--r-- | drivers/usb/renesas_usbhs/fifo.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c index cb87404e27d6..634c14d022ce 100644 --- a/drivers/usb/renesas_usbhs/fifo.c +++ b/drivers/usb/renesas_usbhs/fifo.c @@ -688,7 +688,14 @@ static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done) *is_done = 1; usbhsf_rx_irq_ctrl(pipe, 0); usbhs_pipe_running(pipe, 0); - usbhs_pipe_disable(pipe); /* disable pipe first */ + /* + * If function mode, since this controller is possible to enter + * Control Write status stage at this timing, this driver + * should not disable the pipe. If such a case happens, this + * controller is not able to complete the status stage. + */ + if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe)) + usbhs_pipe_disable(pipe); /* disable pipe first */ } /* |