summaryrefslogtreecommitdiff
path: root/arch/arm/dts/px30-evb-u-boot.dtsi
blob: a2a2c07dcc1f8c97408a95b78fb1749b73c13ceb (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
 */

/ {
	aliases {
		mmc0 = &emmc;
		mmc1 = &sdmmc;
	};

	chosen {
		u-boot,spl-boot-order = &emmc, &sdmmc;
	};
};

&dmc {
	u-boot,dm-pre-reloc;
};

&uart2 {
	clock-frequency = <24000000>;
	u-boot,dm-pre-reloc;
};

&uart5 {
	clock-frequency = <24000000>;
	u-boot,dm-pre-reloc;
};

&sdmmc {
	u-boot,dm-pre-reloc;

	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
	u-boot,spl-fifo-mode;
};

&emmc {
	u-boot,dm-pre-reloc;

	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
	u-boot,spl-fifo-mode;
};

&grf {
	u-boot,dm-pre-reloc;
};

&pmugrf {
	u-boot,dm-pre-reloc;
};

&xin24m {
	u-boot,dm-pre-reloc;
};

&cru {
	u-boot,dm-pre-reloc;
};

&pmucru {
	u-boot,dm-pre-reloc;
};

&saradc {
	u-boot,dm-pre-reloc;
	status = "okay";
};

&gpio0 {
	u-boot,dm-pre-reloc;
};

&gpio1 {
	u-boot,dm-pre-reloc;
};

&gpio2 {
	u-boot,dm-pre-reloc;
};

&gpio3 {
	u-boot,dm-pre-reloc;
};