From 6f5e1dc531d6b4a975e39054fdf7c737cbb4d8e9 Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 16 Sep 2011 13:21:35 -0700 Subject: powerpc/8xxx: Add support for interactive DDR programming interface Interactive DDR debugging provides a user interface to view and modify SPD, DIMM parameters, board options and DDR controller registers before DDR is initialized. With this feature, developers can fine-tune DDR for board bringup and other debugging without frequently having to reprogram the flash. To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header file and set an environment variable to activate it. Syntax: setenv ddr_interactive on After reset, U-boot prompts before initializing DDR controllers FSL DDR> The available commands are print print SPD and intermediate computed data reset reboot machine recompute reload SPD and options to default and recompute regs edit modify spd, parameter, or option compute recompute registers from current next_step to end next_step shows current next_step help this message go program the memory controller and continue with u-boot The first command should be "compute", which reads data from DIMM SPDs and board options, performs the calculation then stops before setting DDR controller. A user can use "print" and "edit" commands to view and modify anything. "Go" picks up from current step with any modification and compltes the calculation then enables the DDR controller to continue u-boot. "Recompute" does it over from fresh reading. Signed-off-by: York Sun Signed-off-by: Kumar Gala --- README | 3 +++ 1 file changed, 3 insertions(+) (limited to 'README') diff --git a/README b/README index 3a8938f4e3..36f5a1123c 100644 --- a/README +++ b/README @@ -3099,6 +3099,9 @@ Low Level (hardware related) configuration options: parameters are extracted from datasheet and hard-coded into header files or board specific files. +- CONFIG_FSL_DDR_INTERACTIVE + Enable interactive DDR debugging. See doc/README.fsl-ddr. + - CONFIG_SYS_83XX_DDR_USES_CS0 Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. -- cgit v1.2.3