Age | Commit message (Collapse) | Author |
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As we now have the configblock handling the MAC address is set
from the configblock.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Used during manufacturing for setting the boot fuses.
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While at it fix whitespace issue.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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While at it remove unusable boot modes from the list.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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This lives now in colibri_imx7_defconfig
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Code mostly ported from imx-kobs-5.3.
MTD partitioning is set accordingly.
writebcb: Write Boot Control Block (FCB and DBBT)
writeboot: Write bootloadder
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Modification taken from imx-kobs-5.3.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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We need raw nand access to write the fcb in cmd_writeboot.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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All fsl boards use this when booting from NAND.
While at it minimize it with savedefconfig.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Add pinmux and I2C setup call to register the Colibri I2C bus.
The fourth (I2C4) instance is used for the I2C bus defined in the
standard Colibri pinout. Use i2c dev 3 to switch to this bus.
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Note that this input mux seems to be missing in the current
reference manual, but has been proven to be working on actual
hardware.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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HW patch required. Connect RMII_CRS_DV - ENET1_RXC, remove R166
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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kobs-ng needs a partition which holds FCB, DBBT, and Bootloader,
not FCB, DBBT alone.
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Output 50MHz reference clock works, sending works but no reception.
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Introduce CONFIG_SERIAL_TAG_BOARD which removes the definition of
void get_board_serial(struct tag_serialnr *serialnr)
in order to allow its definition in board specific code.
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Use get_ram_size() to autodetect up to 2Gbyte of RAM on rank 0.
If chips with two ranks would get stuffed one would have to set the size
of one rank in DDRC_ADDRMAP0.
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The Colibri iMX7 uses a different pmic
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Add configs now needed with the update of U-Boot.
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Add empty callback now needed when CONFIG_LDO_BYPASS_CHECK is defined.
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http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/8111e4d0cd81226899be637013048281e3c097b4
http://compass.freescale.net/livelink/livelink?func=ll&objId=234753630&objAction=browse&viewType=1
arik_r2_sabre_ddr3_528_1.13.inc is for sabre-AI
arik_r2_sdb_ddr3_528_1.13.inc is for sabresd
1.13<-1.12:
Change log:
1. Remove 20c4080
1.12<-1.10
Change log:
1. NoC register DDRCONF change to 0 which is compatible
for only CS0 is used on board
2. Change 2 values to compatible with our DDR aid script,
these two registers doesn’t have any effect on current system
tRPA = 0;
//this bit only used in DDR2 mode
tAOFPD/tAONPD=0x4;
//These register only works when MDPDC. SLOW_PD = 1 which is 0 in script
Test results:
One mx6qp-sdb and one mx6qp-ard board and one mx6qp-ard board passed
60 hours memtester stress teset.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 5fb08a4dcc7b8478fc4236b90ad8dc2190cf94e7)
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This reverts commit e7d4767331f1a2cbef61b4e89beb73731f267499.
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This reverts commit 3b548a3ddf03dcbb646912ef7bbdd3cdb2daf81a.
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The fastboot.exe will get var partition-type:* firstly when "fastboot flash * *".
The uboot did not support get var partition-type: default.
This patch mask info the error when gat cat partition-type.
Signed-off-by: zhang sanshan <b51434@freescale.com>
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The ci_udc driver tries to use the ULPI interface for the USB OTG controller,
but this type is not supported by all i.MX6 and i.MX7 platforms. When setting to
ULPI, other platforms except the 6UL refuse the settings and keep default value.
But on 6UL, the PTW bit of PORTSC1 register which is documented as RO can change.
This cause the interface setting problem with USB PHY.
Fix the issue by removing the ULPI setting for i.MX6 and i.MX7. All will use default
UTMI setting.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit f78cbee0375dcb81b10bac2e0dcd254d0551baa9)
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Fixed the issue that mfgtool failed to download u-boot with plugin enabled.
The u-boot plugin common codes should not call rom___pu_irom_hwcnfg_setup
when using serial download mode.
rom___pu_irom_hwcnfg_setup will load the IVT2 image from boot media, but this
is invalid for USB serial download mode.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit b16ae36d2ae3fa9f536fec691a3e1bfa6f26a8d0)
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According to the latest datasheet(Rev. B, 07/2015), the VDD_SOC_IN
standby voltage should be 1.05V and on i.MX6QP, we can use the PMIC
'APS' mode in standby. we add a 25mV margin to cover the IR drop and
board tolerance, so the standby voltage of VDD_SOC_IN should be
setting to 1.075V.
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 3c38fae6dafd3b90fae2598dcbedf6cb7aa6f6af)
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on i.MX6QP SDB board, the SW1A/B/C regulator is used by
VDD_SOC_IN, the regulator of VDD_ARM_IN is SW2, the voltage
setting for VDD_ARM_IN should be corresponding to SW2. So fix
the regulator mismatch issue on i.MX6QP SDB board.
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 55a80625e81ea9ff5a5286f1d2183a2f0900f5c3)
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