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authorAnup Patel <Anup.Patel@wdc.com>2019-02-25 08:14:55 +0000
committerAndes <uboot@andestech.com>2019-02-27 09:12:33 +0800
commitb630d57d0ab45639eea02f2671c2aa0d023c89ac (patch)
tree62edb2090d371ae6a998d4654443223dee0273d1 /test
parentc40b6df87fc0193a7184ada9f53aaf57cdec0cdf (diff)
clk: Add fixed-factor clock driver
This patch adds fixed-factor clock driver which derives clock rate by dividing (div) and multiplying (mult) fixed factors to a parent clock. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'test')
-rw-r--r--test/dm/clk.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 898c034e27..112d5cbbc9 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -12,12 +12,15 @@
static int dm_test_clk(struct unit_test_state *uts)
{
- struct udevice *dev_fixed, *dev_clk, *dev_test;
+ struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
ulong rate;
ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
&dev_fixed));
+ ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor",
+ &dev_fixed_factor));
+
ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
&dev_clk));
ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));