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authorTom Rini <trini@konsulko.com>2019-05-08 16:21:43 -0400
committerTom Rini <trini@konsulko.com>2019-05-08 16:21:43 -0400
commit504bf790da08db9b4a443566cf6ef577f9c7996a (patch)
tree20eb0e88c11749a6c14ae1b5bc7b0823efd6ef7b /test
parent8c66fb88e3bd00b486d2da2b90f5ff8534b7e3c0 (diff)
parentc23b33f5311abe32db96884318996d2b41db4c94 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- H6 Beelink GS1 board (Clément) - Olimex A64-Teres-I board (Jonas) - sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej) - Change include order (Jagan) - EPHY clock changes (Jagan) - EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
Diffstat (limited to 'test')
-rw-r--r--test/dm/clk.c21
-rw-r--r--test/dm/reset.c23
2 files changed, 44 insertions, 0 deletions
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 112d5cbbc9..f301ecbb45 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -4,12 +4,33 @@
*/
#include <common.h>
+#include <clk.h>
#include <dm.h>
#include <asm/clk.h>
#include <dm/test.h>
#include <linux/err.h>
#include <test/ut.h>
+/* Base test of the clk uclass */
+static int dm_test_clk_base(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ struct clk clk_method1;
+ struct clk clk_method2;
+
+ /* Get the device using the clk device */
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev));
+
+ /* Get the same clk port in 2 different ways and compare */
+ ut_assertok(clk_get_by_index(dev, 1, &clk_method1));
+ ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2));
+ ut_asserteq(clk_method1.id, clk_method2.id);
+
+ return 0;
+}
+
+DM_TEST(dm_test_clk_base, DM_TESTF_SCAN_FDT);
+
static int dm_test_clk(struct unit_test_state *uts)
{
struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
diff --git a/test/dm/reset.c b/test/dm/reset.c
index c02866a2f0..c61daed490 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <dm.h>
+#include <reset.h>
#include <dm/test.h>
#include <asm/reset.h>
#include <test/ut.h>
@@ -15,6 +16,28 @@
/* This is the other reset phandle specifier handled by bulk */
#define OTHER_RESET_ID 2
+/* Base test of the reset uclass */
+static int dm_test_reset_base(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ struct reset_ctl reset_method1;
+ struct reset_ctl reset_method2;
+
+ /* Get the device using the reset device */
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
+ &dev));
+
+ /* Get the same reset port in 2 different ways and compare */
+ ut_assertok(reset_get_by_index(dev, 1, &reset_method1));
+ ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 1,
+ &reset_method2));
+ ut_asserteq(reset_method1.id, reset_method2.id);
+
+ return 0;
+}
+
+DM_TEST(dm_test_reset_base, DM_TESTF_SCAN_FDT);
+
static int dm_test_reset(struct unit_test_state *uts)
{
struct udevice *dev_reset;