diff options
| author | Ye Li <ye.li@nxp.com> | 2017-03-27 15:46:55 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-04-27 02:32:28 -0700 |
| commit | 99c90ff2de4849aafa0043932353e2c199d22e5f (patch) | |
| tree | a9df110c5c71874704a63f0fa4b7345af4fa7be9 /scripts | |
| parent | fd99a9f057097a64034cd7b419fd983f487791e4 (diff) | |
MLK-14938-17 pcie: Add support for i.MX8QM/QXP PCIe
- one lane pcie gen2 link is okay, the cfg space
of the rc/ep can be accessed.
rc cfg base 0x5f00_0000. ep cfg base 0x6000_0000
- limit to gen2 speed
- mask the wait of eq3 finish, because it is used
for gen3.
- use pcie_ctrla_init_rc() to do the initialization
of the pciea controller
- setup the common pcie codes in pcie_imx8x.c, separate
the different soc speicifed initialization codes into
their own pcie/board codes, move the macro definitions
into the new header file imx8_hsio.h.
- i.MX8QXP only have PCIe Control B. Enable PORT B at default.
i.MX8QM needs to set CONFIG_IMX_PCIEB to enable PORT B.
- Disable the LTSSM when link is down.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 03141c2b955ce6034f06e701126aea1493dc2b4b)
Diffstat (limited to 'scripts')
| -rw-r--r-- | scripts/config_whitelist.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 9c56bb05ad..ed43578b4b 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -676,6 +676,7 @@ CONFIG_FSL_ESDHC_PIN_MUX CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK CONFIG_FSL_FIXED_MMC_LOCATION CONFIG_FSL_FM_10GEC_REGULAR_NOTATION +CONFIG_FSL_HSIO CONFIG_FSL_I2C_CUSTOM_DFSR CONFIG_FSL_I2C_CUSTOM_FDR CONFIG_FSL_IIM @@ -994,6 +995,7 @@ CONFIG_IMX6_PWM_PER_CLK CONFIG_IMX_HDMI CONFIG_IMX_NAND CONFIG_IMX_OTP +CONFIG_IMX_PCIEB CONFIG_IMX_VIDEO_SKIP CONFIG_IMX_WATCHDOG CONFIG_INETSPACE_V2 @@ -1501,6 +1503,7 @@ CONFIG_PCIE2 CONFIG_PCIE3 CONFIG_PCIE4 CONFIG_PCIE_IMX +CONFIG_PCIE_IMX8X CONFIG_PCIE_IMX_PERST_GPIO CONFIG_PCIE_IMX_POWER_GPIO CONFIG_PCISLAVE |