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authorYe Li <ye.li@nxp.com>2018-08-20 23:35:20 -0700
committerYe Li <ye.li@nxp.com>2018-08-21 02:22:55 -0700
commitced8dc6ce85f2227a29a52d55836b73223e71e73 (patch)
tree075533f3870b88df426a7e5f907b9e640001864a /board
parentebdf2c75f3c820c74d7d9a5ee0993a0937cf3443 (diff)
MLK-19263-2 imx8mq_evk: Adjust SPL malloc pool and stack address
Currently the SRAM is allocated to malloc pool due to large malloc needed by USB SDP. The stack is moved to OCRAM. This causes a problem when enabling HAB. The HAB authentication needs large memory on stack, so after ATF image loaded, the stack overwrites the ATF image in OCRAM and causes authentication failed. This patch moves the malloc pool to DDR and set back stack to SRAM. So SDP still can run with enough memory on DDR. And the stack overwrite issue can be fixed by enough memory 24KB left on SRAM. This change also need to use a early malloc pool by defining the CONFIG_MALLOC_F_ADDR. And in SPL codes, we have to adjust DDR init before board_init_r. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/imx8mq_evk/spl.c30
1 files changed, 20 insertions, 10 deletions
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index f7274e0983..12f7bf1c5a 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -187,16 +187,6 @@ int power_init_board(void)
void spl_board_init(void)
{
- enable_tzc380();
-
- /* Adjust pmic voltage to 1.0V for 800M */
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
- power_init_board();
-
- /* DDR initialization */
- spl_dram_init();
-
#ifndef CONFIG_SPL_USB_SDP_SUPPORT
/* Serial download mode */
if (is_usb_boot()) {
@@ -205,6 +195,8 @@ void spl_board_init(void)
}
#endif
+ init_usb_clk();
+
puts("Normal Boot\n");
}
@@ -220,6 +212,8 @@ int board_fit_config_name_match(const char *name)
void board_init_f(ulong dummy)
{
+ int ret;
+
/* Clear global data */
memset((void *)gd, 0, sizeof(gd_t));
@@ -236,5 +230,21 @@ void board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
+ ret = spl_init();
+ if (ret) {
+ debug("spl_init() failed: %d\n", ret);
+ hang();
+ }
+
+ enable_tzc380();
+
+ /* Adjust pmic voltage to 1.0V for 800M */
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+
+ power_init_board();
+
+ /* DDR initialization */
+ spl_dram_init();
+
board_init_r(NULL, 0);
}