diff options
| author | Dominik Sliwa <dominik.sliwa@toradex.com> | 2019-08-01 11:06:39 +0300 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-08-16 20:09:12 +0200 |
| commit | 739442620b33b70b5a2049f98bd6c6855b312392 (patch) | |
| tree | 1b8211d56ceed6be032b2c9251eeeb54de40fe19 /board | |
| parent | 0a5a6a1ea3e97ef77c09bd7832a02153e26f4f06 (diff) | |
apalis-tk1: remove non-essential power rails on boot
When mainline kernels reboot TK1 they use SW_RESET,
that reset mode does not reset PMIC. Some rails
need to be off for RAM Re-repair to work correctly.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit 5a20adf446bc248a8db02f6d262b43b14587812d)
Diffstat (limited to 'board')
| -rw-r--r-- | board/toradex/apalis-tk1/as3722_init.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c index bd754e5fcf..15f8dce2f1 100644 --- a/board/toradex/apalis-tk1/as3722_init.c +++ b/board/toradex/apalis-tk1/as3722_init.c @@ -43,6 +43,29 @@ void pmic_enable_cpu_vdd(void) udelay(10 * 1000); #endif + /* + * Make sure all non-fused regulators are down. + * That way we're in known state after software reboot from linux + */ + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0003, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0004, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x001b, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0014, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x001a, I2C_SEND_2_BYTES); + udelay(10 * 1000); + tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); + tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES); + udelay(10 * 1000); + debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); /* * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. |