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authorDetlev Zundel <dzu@denx.de>2010-03-12 10:01:12 +0100
committerWolfgang Denk <wd@denx.de>2010-03-21 22:44:42 +0100
commitfd428c05c863aefb575b12b2a1916b02d5bfa759 (patch)
treeaf61cbc1d945fde6037ef62ce66723e7231183d5 /board/tqc
parentc0c316569f70055eb7c70864aaa6d48666782600 (diff)
mpc5xxx: Remove all references to MGT5100
We do not support a processor that never reached a real customer. Signed-off-by: Detlev Zundel <dzu@denx.de>
Diffstat (limited to 'board/tqc')
-rw-r--r--board/tqc/tqm5200/mt48lc16m16a2-75.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/board/tqc/tqm5200/mt48lc16m16a2-75.h b/board/tqc/tqm5200/mt48lc16m16a2-75.h
index 3f1e1691bb..48b43213dc 100644
--- a/board/tqc/tqm5200/mt48lc16m16a2-75.h
+++ b/board/tqc/tqm5200/mt48lc16m16a2-75.h
@@ -23,7 +23,6 @@
#define SDRAM_DDR 0 /* is SDR */
-#if defined(CONFIG_MPC5200)
/* Settings for XLB = 132 MHz */
#define SDRAM_MODE 0x00CD0000
/* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */
@@ -33,15 +32,3 @@
/*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */
#define SDRAM_CONFIG2 0x8AD70000
/*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE 0x008D0000
-#define SDRAM_CONTROL 0x504F0000
-#define SDRAM_CONFIG1 0xC2222600
-#define SDRAM_CONFIG2 0x88B70004
-#define SDRAM_ADDRSEL 0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif