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| author | Ye Li <ye.li@nxp.com> | 2018-10-11 23:04:07 -0700 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-10-11 23:44:24 -0700 |
| commit | 0ede884b92ba342725528f8e2dcc44bf5a6a7d8d (patch) | |
| tree | 4bcb7fb082458aa39f39f36d3b4332570acfba46 /board/freescale/imx8mm_evk/ddr4_timing.c | |
| parent | b6ed4990f519a1ec73d38108065c7d56841ad3b0 (diff) | |
MLK-19848 mx6dq: Fix chip version issue for rev1.3
According to iMX6DQ RM, the minor field (low 8 bits) in DIGPROG is not
aligned on silicon revision 1.3. So update get_cpu_rev to correct the
revision.
0x00630002 Silicon revision 1.2
0x00630005 Silicon revision 1.3
0x00630006 Silicon revision 1.6
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 8891410c729bfa604467440919a9709fea76e47c)
Diffstat (limited to 'board/freescale/imx8mm_evk/ddr4_timing.c')
0 files changed, 0 insertions, 0 deletions