diff options
| author | Fabio Estevam <festevam@gmail.com> | 2020-06-18 20:21:19 -0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-06-22 17:40:56 +0200 |
| commit | db86e6c66a8c17911c1442e974c8380ada009975 (patch) | |
| tree | d7072918a000f4fbeb1d1bfc6c4864b607c755f9 /arch | |
| parent | 89b5bd54c1a425e416d67ce21b0fd5fd7da6a1d4 (diff) | |
ARM: dts: imx6qdl-sr-som: Sync with kernel 5.8-rc1
Sync the device tree with 5.8-rc1.
It basically contains the following extra kernel commit:
commit 86b08bd5b99480b79a25343f24c1b8c4ddcb5c09
Author: Russell King <rmk+kernel@armlinux.org.uk>
Date: Wed Apr 15 16:44:17 2020 +0100
ARM: dts: imx6-sr-som: add ethernet PHY configuration
Add ethernet PHY configuration ahead of removing the quirk that
configures the clocking mode for the PHY. The RGMII delay is
already set correctly.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
, which passes the 'qca,clk-out-frequency' property and it is important
to specify the correct frequency generated by the AR8035.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/imx6qdl-sr-som.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi b/arch/arm/dts/imx6qdl-sr-som.dtsi index 6d7f6b9035..b06577808f 100644 --- a/arch/arm/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi @@ -53,10 +53,21 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; + phy-handle = <&phy>; phy-mode = "rgmii-id"; phy-reset-duration = <2>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy: ethernet-phy@0 { + reg = <0>; + qca,clk-out-frequency = <125000000>; + }; + }; }; &iomuxc { |