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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-12-13 22:40:40 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-12-13 22:40:40 +0100 |
| commit | f7bd7906f174024aa09c24ce388a6fa724d7c568 (patch) | |
| tree | f5d298a3c170d78fed41b1fc9ce08ac6ba7dad4a | |
| parent | d0f629e63c22eb1a8510b3fcdef8baa15a59b0a8 (diff) | |
verdin imx8mp: remove config_fec_mxc_phyaddr/xcv_type, phy_aneg_timeout
Remove CONFIG_FEC_MXC_PHYADDR, CONFIG_FEC_XCV_TYPE and PHY_ANEG_TIMEOUT
in favour of device tree configuration via DM_ETH_PHY/PHYLIB.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rw-r--r-- | include/configs/verdin-imx8mp.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 4fbb599fde..2f54ad96ca 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -47,16 +47,11 @@ #if defined(CONFIG_CMD_NET) #define CONFIG_ETHPRIME "eth1" /* eqos is on-module Ethernet interface */ -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 3 #define FEC_QUIRK_ENET_MAC #ifdef CONFIG_DWC_ETH_QOS #define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ #endif - -#define PHY_ANEG_TIMEOUT 20000 - #endif /* CONFIG_CMD_NET */ #define MEM_LAYOUT_ENV_SETTINGS \ |