colibri_vf: rename colibri_vf61 to colibri_vf

Now as the colibri_vf61 configuration supports memory size as well as
module type auto detection actually rename it to colibri_vf to be
universally used for Colibri VF50 as well as VF61.

14 files changed, 4 insertions, 1172 deletions

diff --git a/Makefile b/Makefile
index f3b200fc9c..66ac848de3 100644
--- a/Makefile
+++ b/Makefile
@@ -790,7 +790,7 @@ backup:
 	F=`basename $(TOPDIR)` ; cd .. ; \
 	gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
 
-ifneq (,$(filter $(BOARD),colibri_vf50 colibri_vf61))
+ifeq ($(BOARD),colibri_vf)
 .DEFAULT_GOAL := u-boot.imx
 ifeq ($(CONFIG_NANDBOOT),y)
 .DEFAULT_GOAL := u-boot.nand
diff --git a/board/toradex/colibri_vf50/Makefile b/board/toradex/colibri_vf/Makefile
index da6375c570..da6375c570 100644
--- a/board/toradex/colibri_vf50/Makefile
+++ b/board/toradex/colibri_vf/Makefile
diff --git a/board/toradex/colibri_vf61/colibri_vf61.c b/board/toradex/colibri_vf/colibri_vf.c
index 97eaa9e6c4..97eaa9e6c4 100644
--- a/board/toradex/colibri_vf61/colibri_vf61.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
diff --git a/board/toradex/colibri_vf50/nandimage.cfg b/board/toradex/colibri_vf/nandimage.cfg
index dd093f90ac..dd093f90ac 100644
--- a/board/toradex/colibri_vf50/nandimage.cfg
+++ b/board/toradex/colibri_vf/nandimage.cfg
diff --git a/board/toradex/colibri_vf50/sdbootimage.cfg b/board/toradex/colibri_vf/sdbootimage.cfg
index 85e5869806..85e5869806 100644
--- a/board/toradex/colibri_vf50/sdbootimage.cfg
+++ b/board/toradex/colibri_vf/sdbootimage.cfg
diff --git a/board/toradex/colibri_vf50/colibri_vf50.c b/board/toradex/colibri_vf50/colibri_vf50.c
deleted file mode 100644
index 654cc05988..0000000000
--- a/board/toradex/colibri_vf50/colibri_vf50.c
+++ /dev/null
@@ -1,619 +0,0 @@
-/*
- * Copyright 2013 Toradex, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h> /* do not change order of include file */
-
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/scsc_regs.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/vybrid-pins.h>
-#include <asm/arch/vybrid-regs.h>
-#include <asm/errno.h>
-#include <asm/fec.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <fsl_esdhc.h>
-#include <i2c.h>
-#include <malloc.h>
-#include <mmc.h>
-#include <nand.h>
-#include <usb/ehci-fsl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_BOARD_LATE_INIT) && (defined(CONFIG_TRDX_CFG_BLOCK) || \
-		defined(CONFIG_REVISION_TAG) || defined(CONFIG_SERIAL_TAG))
-static unsigned char *config_block = NULL;
-#endif
-
-#ifdef CONFIG_FSL_ESDHC
-struct fsl_esdhc_cfg esdhc_cfg[] = {
-	{CONFIG_SYS_ESDHC1_BASE, 1},
-};
-#endif /* CONFIG_FSL_ESDHC */
-
-void ddr_phy_init(void);
-void setup_iomux_ddr(void);
-void setup_iomux_nfc(void);
-void setup_iomux_uart(void);
-
-int board_early_init_f(void)
-{
-	setup_iomux_uart();
-
-#ifdef CONFIG_NAND_FSL_NFC
-	setup_iomux_nfc();
-#endif
-
-	return 0;
-}
-
-int board_init(void)
-{
-	u32 temp;
-	struct vybrid_scsc_reg *scsc = (struct vybrid_scsc_reg *)SCSCM_BASE_ADDR;
-
-	/* address of boot parameters */
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-	/*
-	 * Enable external 32K Oscillator
-	 *
-	 * The internal clock experiences significant drift
-         * so we must use the external oscillator in order
-	 * to maintain correct time in the hwclock
-	 */
-	temp = __raw_readl(&scsc->sosc_ctr);
-	temp |= VYBRID_SCSC_SICR_CTR_SOSC_EN;
-	__raw_writel(temp, &scsc->sosc_ctr);
-
-	return 0;
-}
-
-#ifdef CONFIG_BOARD_LATE_INIT
-int board_late_init(void)
-{
-	char env_str[256];
-
-	int i;
-
-	char *addr_str, *end;
-	unsigned char bi_enetaddr[6]	= {0, 0, 0, 0, 0, 0}; /* Ethernet address */
-	unsigned char *mac_addr;
-	unsigned char mac_addr00[6]	= {0, 0, 0, 0, 0, 0};
-
-	size_t size			= 4096;
-	unsigned char toradex_oui[3]	= { 0x00, 0x14, 0x2d };
-	int valid			= 0;
-
-        int ret;
-
-	/* Allocate RAM area for config block */
-	config_block = malloc(size);
-	if (!config_block) {
-		printf("Not enough malloc space available!\n");
-		return -1;
-	}
-
-	/* Clear it */
-	memset((void *)config_block, 0, size);
-
-	/* Read production parameter config block from NAND */
-	ret = nand_read_skip_bad(&nand_info[0], CONFIG_TRDX_CFG_BLOCK_OFFSET, &size,
-			(unsigned char *)config_block);
-
-	/* Check validity */
-	if ((ret == 0) && (size > 0)) {
-		mac_addr = config_block + 8;
-		if (!(memcmp(mac_addr, toradex_oui, 3))) {
-			valid = 1;
-		}
-	}
-
-	if (!valid) {
-		printf("Missing Colibri config block\n");
-		memset((void *)config_block, 0, size);
-	} else {
-		/* Get MAC address from environment */
-		if ((addr_str = getenv("ethaddr")) != NULL) {
-			for (i = 0; i < 6; i++) {
-				bi_enetaddr[i] = addr_str ? simple_strtoul(addr_str, &end, 16) : 0;
-				if (addr_str) {
-					addr_str = (*end) ? end + 1 : end;
-				}
-			}
-		}
-
-		/* Set Ethernet MAC address from config block if not already set */
-		if (memcmp(mac_addr00, bi_enetaddr, 6) == 0) {
-			sprintf(env_str, "%02x:%02x:%02x:%02x:%02x:%02x",
-				mac_addr[0], mac_addr[1], mac_addr[2],
-				mac_addr[3], mac_addr[4], mac_addr[5]);
-			setenv("ethaddr", env_str);
-#ifndef CONFIG_ENV_IS_NOWHERE
-			saveenv();
-#endif
-		}
-	}
-
-#ifdef CONFIG_MXC_SPI
-	setup_iomux_spi();
-#endif
-
-	return 0;
-}
-#endif /* CONFIG_BOARD_LATE_INIT */
-
-#ifdef CONFIG_FSL_ESDHC
-int board_mmc_getcd(struct mmc *mmc)
-{
-	/*struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;*/
-	int ret;
-
-	__raw_writel(0x005031ef, IOMUXC_PAD_014);	/* clk */
-	__raw_writel(0x005031ef, IOMUXC_PAD_015);	/* cmd */
-	__raw_writel(0x005031ef, IOMUXC_PAD_016);	/* dat0 */
-	__raw_writel(0x005031ef, IOMUXC_PAD_017);	/* dat1 */
-	__raw_writel(0x005031ef, IOMUXC_PAD_018);	/* dat2 */
-	__raw_writel(0x005031ef, IOMUXC_PAD_019);	/* dat3 */
-
-	ret = 1;
-	return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-	u32 index = 0;
-	s32 status = 0;
-
-	status |= fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
-	return status;
-}
-#endif /* CONFIG_FSL_ESDHC */
-
-int checkboard(void)
-{
-	puts("Board: Colibri VF50\n");
-
-	return 0;
-}
-
-unsigned long ddr_ctrl_init(void)
-{
-	int dram_size, rows, cols, banks, port;
-
-	__raw_writel(0x00000600, DDR_CR000);	/* DDR3 */
-	__raw_writel(0x00000020, DDR_CR002);	/* TINIT */
-	__raw_writel(0x0000007c, DDR_CR010);	/* reset during power on */
-						/* warm boot - 200ns */
-	__raw_writel(0x00013880, DDR_CR011);	/* 500us - 10ns */
-	__raw_writel(0x0000050c, DDR_CR012);	/* CASLAT_LIN, WRLAT */
-	__raw_writel(0x15040404, DDR_CR013);	/* trc, trrd, tccd
-						   tbst_int_interval */
-	__raw_writel(0x1406040F, DDR_CR014);	/* tfaw, tfp, twtr, tras_min */
-	__raw_writel(0x04040000, DDR_CR016);	/* tmrd, trtp */
-	__raw_writel(0x006DB00C, DDR_CR017);	/* tras_max, tmod */
-	__raw_writel(0x00000403, DDR_CR018);	/* tckesr, tcke */
-
-	__raw_writel(0x01000000, DDR_CR020);	/* ap, writrp */
-	__raw_writel(0x06060101, DDR_CR021);	/* trcd_int, tras_lockout
-						   ccAP */
-	__raw_writel(0x000B0000, DDR_CR022);	/* tdal */
-	__raw_writel(0x03000200, DDR_CR023);	/* bstlen, tmrr, tdll */
-	__raw_writel(0x00000006, DDR_CR024);	/* addr_mirror, reg_dimm
-						   trp_ab */
-	__raw_writel(0x00010000, DDR_CR025);	/* tref_enable, auto_refresh
-						   arefresh */
-	__raw_writel(0x0C28002C, DDR_CR026);	/* tref, trfc */
-	__raw_writel(0x00000005, DDR_CR028);	/* tref_interval fixed at 5 */
-	__raw_writel(0x00000003, DDR_CR029);	/* tpdex */
-
-	__raw_writel(0x0000000A, DDR_CR030);	/* txpdll */
-	__raw_writel(0x00440200, DDR_CR031);	/* txsnr, txsr */
-	__raw_writel(0x00010000, DDR_CR033);	/* cke_dly, en_quick_srefresh
-						 * srefresh_exit_no_refresh,
-						 * pwr, srefresh_exit
-						 */
-	__raw_writel(0x00050500, DDR_CR034);	/* cksrx, */
-						/* cksre, lowpwr_ref_en */
-
-	/* Frequency change */
-	__raw_writel(0x00000100, DDR_CR038);	/* freq change... */
-	__raw_writel(0x04001002, DDR_CR039);
-
-	__raw_writel(0x00000001, DDR_CR041);	/* dfi_init_start */
-	__raw_writel(0x00000000, DDR_CR045);	/* wrmd */
-	__raw_writel(0x00000000, DDR_CR046);	/* rdmd */
-	__raw_writel(0x00000000, DDR_CR047);	/* REF_PER_AUTO_TEMPCHK:
-						 *   LPDDR2 set to 2, else 0
-						 */
-
-	/* DRAM device Mode registers */
-	__raw_writel(0x00460420, DDR_CR048);	/* mr0, ddr3 burst of 8 only
-						 * mr1, if freq < 125
-						 * dll_dis = 1, rtt = 0
-						 * if freq > 125, dll_dis = 0
-						 * rtt = 3
-						 */
-	__raw_writel(0x00000000, DDR_CR049);	/* mr2 */
-	__raw_writel(0x00000000, DDR_CR051);	/* mr3 & mrsingle_data_0 */
-
-	__raw_writel(0x00000000, DDR_CR057);	/* ctrl_raw */
-
-	/* ECC */
-	/*__raw_writel(0x00000000, DDR_CR058);*/
-
-	/* ZQ stuff */
-	__raw_writel(0x01000200, DDR_CR066);	/* zqcl, zqinit */
-	__raw_writel(0x02000040, DDR_CR067);	/* zqcs */
-	__raw_writel(0x00000200, DDR_CR069);	/* zq_on_sref_exit, qz_req */
-
-	__raw_writel(0x00000040, DDR_CR070);	/* ref_per_zq */
-	__raw_writel(0x00000000, DDR_CR071);	/* zqreset, ddr3 set to 0 */
-	__raw_writel(0x01000000, DDR_CR072);	/* zqcs_rotate, no_zq_init */
-
-	/* DRAM controller misc */
-	__raw_writel(0x0a010300, DDR_CR073);	/* arebit, col_diff, row_diff
-						   bank_diff */
-	__raw_writel(0x0101ffff, DDR_CR074);	/* bank_split, addr_cmp_en
-						   cmd/age cnt */
-	__raw_writel(0x01010101, DDR_CR075);	/* rw same pg, rw same en
-						   pri en, plen */
-	__raw_writel(0x03030101, DDR_CR076);	/* #q_entries_act_dis
-						 * (#cmdqueues
-						 * dis_rw_grp_w_bnk_conflict
-						 * w2r_split_en, cs_same_en */
-	__raw_writel(0x01000101, DDR_CR077);	/* cs_map, inhibit_dram_cmd
-						 * dis_interleave, swen */
-	__raw_writel(0x0000000C, DDR_CR078);	/* qfull, lpddr2_s4, reduc
-						   burst_on_fly */
-	__raw_writel(0x01000000, DDR_CR079);	/* ctrlupd_req_per aref en
-						 * ctrlupd_req
-						 * ctrller busy
-						 * in_ord_accept */
-	/* disable interrupts */
-	__raw_writel(0x1FFFFFFF, DDR_CR082);
-
-	/* ODT */
-	__raw_writel(0x01010000, DDR_CR087);	/* odt: wr_map_cs0
-						 * rd_map_cs0
-						 * port_data_err_id */
-	__raw_writel(0x00040000, DDR_CR088);	/* todtl_2cmd */
-	__raw_writel(0x00000002, DDR_CR089);	/* add_odt stuff */
-
-	__raw_writel(0x00020000, DDR_CR091);
-	__raw_writel(0x00000000, DDR_CR092);	/* tdqsck _min, max */
-
-	__raw_writel(0x00002819, DDR_CR096);	/* wlmrd, wldqsen */
-
-	/* AXI ports */
-	__raw_writel(0x00202000, DDR_CR105);
-	__raw_writel(0x20200000, DDR_CR106);
-	__raw_writel(0x00002020, DDR_CR110);
-	__raw_writel(0x00202000, DDR_CR114);
-	__raw_writel(0x20200000, DDR_CR115);
-
-	__raw_writel(0x00000101, DDR_CR117);	/* FIFO type (0-async, 1-2:1
-						 *	2-1:2, 3- sync, w_pri
-						 * r_pri
-						 */
-	__raw_writel(0x01010000, DDR_CR118);	/* w_pri, rpri, en */
-	__raw_writel(0x00000000, DDR_CR119);	/* fifo_type */
-
-	__raw_writel(0x02020000, DDR_CR120);
-	__raw_writel(0x00000202, DDR_CR121);
-	__raw_writel(0x01010064, DDR_CR122);
-	__raw_writel(0x00000101, DDR_CR123);
-	__raw_writel(0x00000064, DDR_CR124);
-
-	/* TDFI */
-	__raw_writel(0x00000000, DDR_CR125);
-	__raw_writel(0x00000B00, DDR_CR126);	/* PHY rdlat */
-	__raw_writel(0x00000000, DDR_CR127);	/* dram ck dis */
-
-	__raw_writel(0x00000000, DDR_CR131);
-	__raw_writel(0x00000506, DDR_CR132);	/* wrlat, rdlat */
-	__raw_writel(0x02000000, DDR_CR137);
-	__raw_writel(0x04070303, DDR_CR139);
-
-	__raw_writel(0x00000000, DDR_CR136);
-
-	__raw_writel(0x682C0000, DDR_CR154);	/* Bit 19–18 DDR_SEL_PAD_Contr
-						   DDR_SEL = 11 (DDR3 mode) */
-	__raw_writel(0x00000202, DDR_CR155);	/* pad_ibe, _sel */
-	__raw_writel(0x00000006, DDR_CR158);	/* twr */
-	__raw_writel(0x00000006, DDR_CR159);	/* todth */
-
-	ddr_phy_init();
-
-	__raw_writel(0x00000601, DDR_CR000);	/* LPDDR2 or DDR3, start */
-
-	udelay(200);
-
-	rows = (__raw_readl(DDR_CR001) & 0x1F) -
-	       ((__raw_readl(DDR_CR073) >> 8) & 3);
-	cols = ((__raw_readl(DDR_CR001) >> 8) & 0xF) -
-	       ((__raw_readl(DDR_CR073) >> 16) & 7);
-	banks = 1 << (3 - (__raw_readl(DDR_CR073) & 3));
-	port = ((__raw_readl(DDR_CR078) >> 8) & 1) ? 1 : 2;
-
-	dram_size = (1 << (rows + cols)) * banks * port;
-
-	return dram_size;
-}
-
-void ddr_phy_init(void)
-{
-#define PHY_DQ_TIMING		0x00002613
-#define PHY_DQS_TIMING		0x00002615
-#define PHY_CTRL		0x01210080
-#define PHY_MASTER_CTRL		0x0001012a
-#define PHY_SLAVE_CTRL		0x00012020
-
-	/* phy_dq_timing_reg freq set 0 */
-	__raw_writel(PHY_DQ_TIMING, DDR_PHY000);
-	__raw_writel(PHY_DQ_TIMING, DDR_PHY016);
-	__raw_writel(PHY_DQ_TIMING, DDR_PHY032);
-	__raw_writel(PHY_DQ_TIMING, DDR_PHY048);
-
-	/* phy_dqs_timing_reg freq set 0 */
-	__raw_writel(PHY_DQS_TIMING, DDR_PHY001);
-	__raw_writel(PHY_DQS_TIMING, DDR_PHY017);
-	__raw_writel(PHY_DQS_TIMING, DDR_PHY033);
-	__raw_writel(PHY_DQS_TIMING, DDR_PHY049);
-
-	/* phy_gate_lpbk_ctrl_reg freq set 0 */
-	__raw_writel(PHY_CTRL, DDR_PHY002);	/* read delay bit21:19 */
-	__raw_writel(PHY_CTRL, DDR_PHY018);	/* phase_detect_sel bit18:16 */
-	__raw_writel(PHY_CTRL, DDR_PHY034);	/* bit lpbk_ctrl bit12 */
-	__raw_writel(PHY_CTRL, DDR_PHY050);
-
-	/* phy_dll_master_ctrl_reg freq set 0 */
-	__raw_writel(PHY_MASTER_CTRL, DDR_PHY003);
-	__raw_writel(PHY_MASTER_CTRL, DDR_PHY019);
-	__raw_writel(PHY_MASTER_CTRL, DDR_PHY035);
-	__raw_writel(PHY_MASTER_CTRL, DDR_PHY051);
-
-	/* phy_dll_slave_ctrl_reg freq set 0 */
-	__raw_writel(PHY_SLAVE_CTRL, DDR_PHY004);
-	__raw_writel(PHY_SLAVE_CTRL, DDR_PHY020);
-	__raw_writel(PHY_SLAVE_CTRL, DDR_PHY036);
-	__raw_writel(PHY_SLAVE_CTRL, DDR_PHY052);
-
-	__raw_writel(0x00001105, DDR_PHY050);
-}
-
-int dram_init(void)
-{
-	setup_iomux_ddr();
-	gd->ram_size = ddr_ctrl_init();
-
-	return 0;
-}
-
-#if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
-{
-	struct fec_info_s *info = (struct fec_info_s *)dev->priv;
-
-	/* 5.2.1 Software MUX Pad Control Register 0 (IOMUXC_PTA6) */
-	__raw_writel(0x00103191, IOMUXC_PAD_000);	/* RMII_CLKOUT */
-
-	if (setclear) {
-		if (info->iobase == CONFIG_SYS_FEC1_IOBASE) {
-			__raw_writel(0x00103192, IOMUXC_PAD_054);	/* MDC */
-			__raw_writel(0x00103193, IOMUXC_PAD_055);	/* MDIO */
-			__raw_writel(0x00103191, IOMUXC_PAD_056);	/* RxDV */
-			__raw_writel(0x00103191, IOMUXC_PAD_057);	/* RxD1 */
-			__raw_writel(0x00103191, IOMUXC_PAD_058);	/* RxD0 */
-			__raw_writel(0x00103191, IOMUXC_PAD_059);	/* RxER */
-			__raw_writel(0x00103192, IOMUXC_PAD_060);	/* TxD1 */
-			__raw_writel(0x00103192, IOMUXC_PAD_061);	/* TxD0 */
-			__raw_writel(0x00103192, IOMUXC_PAD_062);	/* TxEn */
-		}
-	} else {
-		if (info->iobase == CONFIG_SYS_FEC1_IOBASE) {
-			__raw_writel(0x00003192, IOMUXC_PAD_054);	/* MDC */
-			__raw_writel(0x00003193, IOMUXC_PAD_055);	/* MDIO */
-			__raw_writel(0x00003191, IOMUXC_PAD_056);	/* RxDV */
-			__raw_writel(0x00003191, IOMUXC_PAD_057);	/* RxD1 */
-			__raw_writel(0x00003191, IOMUXC_PAD_058);	/* RxD0 */
-			__raw_writel(0x00003191, IOMUXC_PAD_059);	/* RxER */
-			__raw_writel(0x00003192, IOMUXC_PAD_060);	/* TxD1 */
-			__raw_writel(0x00003192, IOMUXC_PAD_061);	/* TxD0 */
-			__raw_writel(0x00003192, IOMUXC_PAD_062);	/* TxEn */
-		}
-	}
-
-	return 0;
-}
-#endif /* CONFIG_CMD_NET */
-
-#ifdef CONFIG_REVISION_TAG
-u32 get_board_rev(void)
-{
-#ifdef CONFIG_BOARD_LATE_INIT
-	int i;
-	unsigned short major = 0, minor = 0, release = 0;
-	size_t size = 4096;
-
-	if(config_block == NULL) {
-		return 0;
-	}
-
-	/* Parse revision information in config block */
-	for (i = 0; i < (size - 8); i++) {
-		if (config_block[i] == 0x02 && config_block[i+1] == 0x40 &&
-				config_block[i+2] == 0x08) {
-			break;
-		}
-	}
-
-	major = (config_block[i+3] << 8) | config_block[i+4];
-	minor = (config_block[i+5] << 8) | config_block[i+6];
-	release = (config_block[i+7] << 8) | config_block[i+8];
-
-	/* Check validity */
-	if (major)
-		return ((major & 0xff) << 8) | ((minor & 0xf) << 4) | ((release & 0xf) + 0xa);
-	else
-		return 0;
-#else
-	return 0;
-#endif /* CONFIG_BOARD_LATE_INIT */
-}
-#endif /* CONFIG_REVISION_TAG */
-
-#ifdef CONFIG_SERIAL_TAG
-void get_board_serial(struct tag_serialnr *serialnr)
-{
-#ifdef CONFIG_BOARD_LATE_INIT
-	int array[8];
-	int i;
-	unsigned int serial		= 0;
-	unsigned int serial_offset	= 11;
-
-	if(config_block == NULL) {
-		serialnr->low = 0;
-		serialnr->high = 0;
-		return;
-	}
-
-	/* Get MAC address from config block */
-	memcpy(&serial, config_block + serial_offset, 3);
-	serial = ntohl(serial);
-	serial >>= 8;
-
-	/* Check validity */
-	if (serial) {
-		/* Convert to Linux serial number format (hexadecimal coded decimal) */
-		i = 7;
-		while (serial) {
-			array[i--] = serial % 10;
-			serial /= 10;
-		}
-		while (i >= 0) {
-			array[i--] = 0;
-		}
-		serial = array[0];
-		for (i = 1; i < 8; i++) {
-			serial *= 16;
-			serial += array[i];
-		}
-	}
-
-	serialnr->low = serial;
-#else
-	serialnr->low = 0;
-#endif /* CONFIG_BOARD_LATE_INIT */
-	serialnr->high = 0;
-}
-#endif /* CONFIG_SERIAL_TAG */
-
-void setup_iomux_ddr(void)
-{
-#define DDR_IOMUX	0x00000180
-#define DDR_IOMUX1	0x00010180
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A15);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A14);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A13);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A12);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A11);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A10);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A9);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A8);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A7);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A6);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A5);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A4);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A3);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A2);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_A1);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_BA2);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_BA1);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_BA0);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_CAS);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_CKE);
-	__raw_writel(DDR_IOMUX1, IOMUXC_DDR_CLK);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_CS);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D15);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D14);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D13);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D12);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D11);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D10);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D9);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D8);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D7);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D6);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D5);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D4);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D3);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D2);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D1);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_D0);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_DQM1);	/* UDM */
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_DQM0);	/* LDM */
-	__raw_writel(DDR_IOMUX1, IOMUXC_DDR_DQS1);	/* UDQS */
-	__raw_writel(DDR_IOMUX1, IOMUXC_DDR_DQS0);	/* LDQS */
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_RAS);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_WE);
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_ODT1);	/* ? */
-	__raw_writel(DDR_IOMUX, IOMUXC_DDR_ODT0);
-}
-
-#ifdef CONFIG_NAND_FSL_NFC
-void setup_iomux_nfc(void)
-{
-	__raw_writel(0x002038df, IOMUXC_PAD_071);
-	__raw_writel(0x002038df, IOMUXC_PAD_072);
-	__raw_writel(0x002038df, IOMUXC_PAD_073);
-	__raw_writel(0x002038df, IOMUXC_PAD_074);
-	__raw_writel(0x002038df, IOMUXC_PAD_075);
-	__raw_writel(0x002038df, IOMUXC_PAD_076);
-	__raw_writel(0x002038df, IOMUXC_PAD_077);
-	__raw_writel(0x002038df, IOMUXC_PAD_078);
-	__raw_writel(0x005038d2, IOMUXC_PAD_094);
-	__raw_writel(0x005038d2, IOMUXC_PAD_095);
-	__raw_writel(0x006038d2, IOMUXC_PAD_097);
-	__raw_writel(0x005038dd, IOMUXC_PAD_099);
-	__raw_writel(0x006038d2, IOMUXC_PAD_100);
-	__raw_writel(0x006038d2, IOMUXC_PAD_101);
-}
-#endif /* CONFIG_NAND_FSL_NFC */
-
-#ifdef CONFIG_MXC_SPI
-void setup_iomux_spi(void)
-{
-}
-#endif /* CONFIG_MXC_SPI */
-
-void setup_iomux_uart(void)
-{
-	__raw_writel(0x002011a2, IOMUXC_PAD_026);	/* UART_C_TXD: SCI1_TX */
-	__raw_writel(0x002011a1, IOMUXC_PAD_027);	/* UART_C_RXD: SCI1_RX */
-	__raw_writel(0x001011a2, IOMUXC_PAD_032);	/* UART_A_TXD: SCI0_TX */
-	__raw_writel(0x001011a1, IOMUXC_PAD_033);	/* UART_A_RXD: SCI0_RX */
-	__raw_writel(0x001011a2, IOMUXC_PAD_079);	/* UART_B_TXD: SCI2_TX */
-	__raw_writel(0x001011a1, IOMUXC_PAD_080);	/* UART_B_RXD: SCI2_RX */
-}
diff --git a/board/toradex/colibri_vf61/Makefile b/board/toradex/colibri_vf61/Makefile
deleted file mode 100644
index da6375c570..0000000000
--- a/board/toradex/colibri_vf61/Makefile
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-#
-# Copyright 2013 Toradex, Inc.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	:= $(BOARD).o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/toradex/colibri_vf61/nandimage.cfg b/board/toradex/colibri_vf61/nandimage.cfg
deleted file mode 100644
index dd093f90ac..0000000000
--- a/board/toradex/colibri_vf61/nandimage.cfg
+++ /dev/null
@@ -1,61 +0,0 @@
-#
-# Copyright 2013 Toradex, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not write to the Free Software
-# Foundation Inc. 51 Franklin Street Fifth Floor Boston,
-# MA 02110-1301 USA
-#
-# Refer docs/README.imxmage for more details about how-to configure
-# and create imximage boot image
-#
-# The syntax is taken as close as possible with the kwbimage
-
-IMAGE_VERSION	2
-
-# Boot Device : one of
-# spi, sd (the board has no nand neither onenand)
-
-BOOT_FROM	nand
-
-# Device Configuration Data (DCD)
-#
-# Each entry must have the format:
-# Addr-type           Address        Value
-#
-# where:
-#	Addr-type register length (1,2 or 4 bytes)
-#	Address	  absolute address of the register
-#	value	  value to be stored in the register
-
-# Hack for ROM to read past the first 4k of the NAND image.
-
-# If the FW is located at a different location in flash the
-# row address will need to be changed to the first page of
-# the new location.
-# This forces a NAND page read
-DATA 4 0x400E3F0C 0x11000100   # Row address - page 256
-DATA 4 0x400E3F20 0x3F040000
-DATA 4 0x400E3F34 0x3F040800
-DATA 4 0x400E3F38 0x60160000
-DATA 4 0x400E3F04 0x007EE001
-
-# This forces a NAND page read
-DATA 4 0x400E3F0C 0x11000100   # Row address - page 256
-DATA 4 0x400E3F20 0x3F040000
-DATA 4 0x400E3F34 0x3F040800
-DATA 4 0x400E3F38 0x60160000
-DATA 4 0x400E3F04 0x007EE001
diff --git a/board/toradex/colibri_vf61/sdbootimage.cfg b/board/toradex/colibri_vf61/sdbootimage.cfg
deleted file mode 100644
index 85e5869806..0000000000
--- a/board/toradex/colibri_vf61/sdbootimage.cfg
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# Copyright 2013 Toradex, Inc.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not write to the Free Software
-# Foundation Inc. 51 Franklin Street Fifth Floor Boston,
-# MA 02110-1301 USA
-#
-# Refer docs/README.imxmage for more details about how-to configure
-# and create imximage boot image
-#
-# The syntax is taken as close as possible with the kwbimage
-
-IMAGE_VERSION	2
-
-# Boot Device : one of
-# spi, sd (the board has no nand neither onenand)
-
-BOOT_FROM	sd
-
-# Device Configuration Data (DCD)
-#
-# Each entry must have the format:
-# Addr-type           Address        Value
-#
-# where:
-#	Addr-type register length (1,2 or 4 bytes)
-#	Address	  absolute address of the register
-#	value	  value to be stored in the register
-
-# Setting IOMUXC
diff --git a/boards.cfg b/boards.cfg
index c1dd5baaa8..d9f5f62a31 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -192,10 +192,8 @@ am335x_evm                   arm         armv7       am335x              ti
 highbank                     arm         armv7       highbank            -              highbank
 efikamx                      arm         armv7       efikamx             -              mx5		efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg
 efikasb                      arm         armv7       efikamx             -              mx5		efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg
-colibri_vf50                 arm         armv7       colibri_vf50        toradex        vybrid          colibri_vf50:SYS_TEXT_BASE=0x3F400800,IMX_CONFIG=board/toradex/colibri_vf50/nandimage.cfg,NANDBOOT
-colibri_vf50_sdboot          arm         armv7       colibri_vf50        toradex        vybrid          colibri_vf50_sdboot:SYS_TEXT_BASE=0x3F400800,IMX_CONFIG=board/toradex/colibri_vf50/sdbootimage.cfg
-colibri_vf61                 arm         armv7       colibri_vf61        toradex        vybrid          colibri_vf61:SYS_TEXT_BASE=0x3F400800,IMX_CONFIG=board/toradex/colibri_vf61/nandimage.cfg,NANDBOOT
-colibri_vf61_sdboot          arm         armv7       colibri_vf61        toradex        vybrid          colibri_vf61_sdboot:SYS_TEXT_BASE=0x3F400800,IMX_CONFIG=board/toradex/colibri_vf61/sdbootimage.cfg
+colibri_vf                   arm         armv7       colibri_vf          toradex        vybrid          colibri_vf:SYS_TEXT_BASE=0x3F400800,IMX_CONFIG=board/toradex/colibri_vf/nandimage.cfg,NANDBOOT
+colibri_vf_sdboot            arm         armv7       colibri_vf          toradex        vybrid          colibri_vf_sdboot:SYS_TEXT_BASE=0x3F400800,IMX_CONFIG=board/toradex/colibri_vf/sdbootimage.cfg
 vybrid_auto                  arm         armv7       vybrid_auto         freescale      vybrid          vybrid_auto:SYS_TEXT_BASE=0x3F000800,IMX_CONFIG=board/freescale/vybrid_auto/vybridimage.cfg
 vybrid_auto_iram             arm         armv7       vybrid_auto         freescale      vybrid          vybrid_auto_iram:SYS_TEXT_BASE=0x3F000400,IMX_CONFIG=board/freescale/vybrid_auto/vybridimage.cfg
 vybrid                       arm         armv7       vybrid              freescale      vybrid          vybrid:SYS_TEXT_BASE=0x3F000800,IMX_CONFIG=board/freescale/vybrid/vybridimage.cfg
diff --git a/include/configs/colibri_vf61.h b/include/configs/colibri_vf.h
index b59da572df..b59da572df 100644
--- a/include/configs/colibri_vf61.h
+++ b/include/configs/colibri_vf.h
diff --git a/include/configs/colibri_vf50.h b/include/configs/colibri_vf50.h
deleted file mode 100644
index 139a1ab644..0000000000
--- a/include/configs/colibri_vf50.h
+++ /dev/null
@@ -1,342 +0,0 @@
-/*
- * Copyright 2013 Toradex, Inc.
- *
- * Configuration settings for the Colibri VF50 module booting from NAND flash.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* We now boot from the gfxRAM area of the OCRAM. */
-#define CONFIG_BOARD_SIZE_LIMIT		524288
-
- /* High Level Configuration Options */
-
-#define CONFIG_VYBRID
-
-#define CONFIG_SYS_VYBRID_HCLK		24000000
-#define CONFIG_SYS_VYBRID_CLK32		32768
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_CACHELINE_SIZE	64
-
-#include <asm/arch/vybrid-regs.h>
-
-/*
- * Disabled for now due to build problems under Debian and a significant
- * increase in the final file size: 144260 vs. 109536 Bytes.
- */
-
-#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
-#undef CONFIG_SETUP_MEMORY_TAGS
-#undef CONFIG_INITRD_TAG
-
-#undef CONFIG_OF_LIBFDT
-
-#define CONFIG_MACH_TYPE		MACH_TYPE_COLIBRI_VF50
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 4 * 1024 * 1024)
-
-#define CONFIG_BOARD_LATE_INIT
-
-#define CONFIG_REVISION_TAG		1
-#define CONFIG_SERIAL_TAG		1
-
-#define CONFIG_TRDX_CFG_BLOCK
-#define CONFIG_TRDX_CFG_BLOCK_OFFSET	0x40000
-
-/* Hardware drivers */
-#define CONFIG_VYBRID_UART
-#define CONFIG_VYBRID_UART_BASE		UART0_BASE
-#define CONFIG_VYBRID_GPIO
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_UART_PORT		(0)
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
-
-/* Command definition */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_BDI		/* bdinfo */
-#define CONFIG_CMD_BOOTD
-#define CONFIG_CMD_CONSOLE	/* coninfo */
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ELF
-#undef CONFIG_CMD_FLASH
-#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_MEMORY	/* md mm nm mw cp cmp crc base loop mtest */
-#define CONFIG_CMD_MISC
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS		/* NFS support			*/
-#define CONFIG_CMD_PING
-#define	CONFIG_CMD_NAND
-#define CONFIG_RBTREE
-#define CONFIG_LZO
-#define CONFIG_CMD_UBI
-//#define CONFIG_CMD_UBIFS	/* increases size by almost 60 KB */
-#undef CONFIG_CMD_DATE
-#define CONFIG_CMD_IMI		/* iminfo */
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_LOADB		/* loadb */
-#undef CONFIG_CMD_LOADS		/* loads */
-
-#define CONFIG_BOOTDELAY		1
-
-#define CONFIG_BZIP2
-#define CONFIG_CRC32_VERIFY
-#define CONFIG_TIMESTAMP
-
-#define CONFIG_AUTO_COMPLETE
-
-/*
- * NAND FLASH
- */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_JFFS2_NAND
-#define CONFIG_NAND_FSL_NFC
-#define CONFIG_NAND_FSL_NFC_8BIT
-#define CONFIG_SYS_NAND_BASE		0x400E0000
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE
-#define CONFIG_SYS_NAND_SELECT_DEVICE
-#define	CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
-#endif /* CONFIG_CMD_NAND */
-
-/* Network configuration */
-#define CONFIG_MCFFEC
-#ifdef CONFIG_MCFFEC
-#	define CONFIG_MII		1
-#	define CONFIG_MII_INIT		1
-#	define CONFIG_SYS_DISCOVER_PHY
-#	define CONFIG_SYS_RX_ETH_BUFFER	8
-#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-#	define CONFIG_SYS_FEC1_PINMUX	0
-#	define CONFIG_SYS_FEC1_IOBASE	MACNET1_BASE_ADDR
-#	define CONFIG_SYS_FEC1_MIIBASE	MACNET1_BASE_ADDR
-#	define MCFFEC_TOUT_LOOP 50000
-#	undef CONFIG_HAS_ETH1
-
-#	define CONFIG_ETHPRIME		"FEC1"
-#	define CONFIG_IPADDR		192.168.10.2
-#	define CONFIG_NETMASK		255.255.255.0
-#	define CONFIG_SERVERIP		192.168.10.1
-#endif /* CONFIG_MCFFEC */
-
-#define DEFAULT_BOOTCOMMAND					\
-	"run ubiboot; run nfsboot"
-
-#define MMC_BOOTCMD						\
-	"run setup; "						\
-	"setenv bootargs ${defargs} ${mmcargs} ${mtdparts} ${setupargs}; " \
-	"echo Booting from MMC/SD card...; "			\
-	"fatload mmc 0:1 ${loadaddr} uImage && bootm"
-
-#define NFS_BOOTCMD						\
-	"run setup; "						\
-	"setenv bootargs ${defargs} ${nfsargs} ${mtdparts} ${setupargs}; " \
-	"echo Booting from NFS...; "				\
-	"dhcp && bootm"
-
-#define UBI_BOOTCMD						\
-	"run setup; "						\
-	"setenv bootargs ${defargs} ${ubiargs} ${mtdparts} ${setupargs}; " \
-	"echo Booting from NAND...; "				\
-	"ubi part kernel-ubi && ubi read ${loadaddr} kernel && bootm"
-
-#define CONFIG_BOOTCOMMAND	DEFAULT_BOOTCOMMAND
-#define CONFIG_NFSBOOTCOMMAND	NFS_BOOTCMD
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"defargs=vmalloc=64M mem=128M usb_high_speed=1\0" \
-	"mmcargs=root=/dev/mmcblk0p2 rw rootwait\0" \
-	"sdboot=" MMC_BOOTCMD "\0" \
-	"mtdparts=" MTDPARTS_DEFAULT "\0" \
-	"nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
-	"setup=setenv setupargs " \
-	"fec_mac=${ethaddr} no_console_suspend=1 console=tty1 console=ttymxc0" \
-		",${baudrate}n8\0" \
-	"ubiargs=ubi.mtd=5 root=ubi0:rootfs rootfstype=ubifs\0" \
-	"ubiboot=" UBI_BOOTCMD "\0" \
-	""
-
-/* Dynamic MTD partition support */
-#define CONFIG_CMD_MTDPARTS	/* Enable 'mtdparts' command line support */
-#define CONFIG_MTD_PARTITIONS	/* ??? */
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT		"nand0=NAND"
-#define MTDPARTS_DEFAULT	"mtdparts=NAND:"		\
-				"256k(fcb_)ro,"			\
-				"256k@256k(config-block)ro,"	\
-				"512k@512k(u-boot)ro,"		\
-				"1m(u-boot-env)ro,"		\
-				"8m(kernel-ubi),"		\
-				"-(rootfs-ubi)"
-
-/* SD/MMC */
-#define CONFIG_MMC
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_ESDHC1_BASE		ESDHC2_BASE_ADDR
-#define CONFIG_FSL_ESDHC
-#define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_FSL_ESDHC_NUM	1
-#define CONFIG_ESDHC_NO_SNOOP		1
-//#define CONFIG_MMC_TRACE
-
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
-
-#define CONFIG_CMD_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_DOS_PARTITION
-#endif /* CONFIG_MMC */
-
-/* FLASH and environment organization */
-#define CONFIG_SYS_NO_FLASH
-
-/* Environment not stored */
-//#define CONFIG_ENV_IS_NOWHERE
-#ifndef CONFIG_ENV_IS_NOWHERE
-/* Environment stored in NAND flash */
-#define CONFIG_ENV_IS_IN_NAND		1 /* use NAND for environment vars */
-#if defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_ENV_OFFSET		0x100000
-#define CONFIG_ENV_RANGE		0x100000
-#endif /* CONFIG_ENV_IS_IN_NAND */
-#endif /* !CONFIG_ENV_IS_NOWHERE */
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
-#define CONFIG_LOADADDR			0x80010000	/* loadaddr env var */
-#define CONFIG_ARP_TIMEOUT		200UL
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP		/* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		"Colibri VF50 # "
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		\
-			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START	0x80010000
-#define CONFIG_SYS_MEMTEST_END		0x87C00000
-
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
-
-#define CONFIG_SYS_HZ			1000
-#define CONFIG_CMDLINE_EDITING
-
-#define CONFIG_PRAM			2048
-
-/*
- * Stack sizes
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE		(128 * 1024)	/* regular stack */
-
-/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM_1_SIZE		(128 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE		(0x80000000)
-#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
-#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
-
-#define CONFIG_BOARD_EARLY_INIT_F
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* timer */
-#define FTM_BASE_ADDR			FTM0_BASE_ADDR
-#define CONFIG_TMR_USEPIT
-
-/* clock/PLL configuration */
-#define CONFIG_SYS_CLKCTL_CCGR0		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR1		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR2		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR3		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR4		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR5		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR6		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR7		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR8		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR9		0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR10	0xFFFFFFFF
-#define CONFIG_SYS_CLKCTL_CCGR11	0xFFFFFFFF
-
-#define CONFIG_SYS_CLKCTRL_CCR		0x00010005
-/* 10.2.3 CCM Clock Switcher Register (CCM_CCSR) */
-//DDRC_CLK_SEL: PLL2 PFD2 clk
-//PLL2 (PLL 528 MHz)
-//PFD2 396 MHz
-#define CONFIG_SYS_CLKCTRL_CCSR		0x0003FF24
-#define CONFIG_SYS_CLKCTRL_CACRR	0x00000810
-#define CONFIG_SYS_CLKCTRL_CSCMR1	0x03CA0000
-#define CONFIG_SYS_CLKCTRL_CSCDR1	0x01000000
-#define CONFIG_SYS_CLKCTRL_CSCDR2	0x30114240
-#define CONFIG_SYS_CLKCTRL_CSCDR3	0x00003F1F
-/* 9.10.6 Ethernet RMII/MII Clocking
-   10.2.9 CCM Serial Clock Multiplexer Register 2 (CCM_CSCMR2) */
-#define CONFIG_SYS_CLKCTRL_CSCMR2	0x00000020	/* RMII_CLK_SEL:
-							   PLL5 main clock */
-#define CONFIG_SYS_CLKCTRL_CSCDR4	0x00000000
-#define CONFIG_SYS_CLKCTRL_CLPCR	0x00000078
-
-#define CONFIG_SYS_ANADIG_USB1_CTRL	0x00012000
-#define CONFIG_SYS_ANADIG_USB2_CTRL	0x00012000
-#define CONFIG_SYS_ANADIG_528_CTRL	0x00002001
-#define CONFIG_SYS_ANADIG_528_SS	0x00000000
-#define CONFIG_SYS_ANADIG_528_NUM	0x00000000
-#define CONFIG_SYS_ANADIG_528_DENOM	0x00000012
-#define CONFIG_SYS_ANADIG_VID_CTRL	0x00011028
-#define CONFIG_SYS_ANADIG_VID_NUM	0x00000000
-#define CONFIG_SYS_ANADIG_VID_DENOM	0x00000012
-/* 11.21.13 PLL5 Control register (ANADIG_PLL5_CTRL) */
-#define CONFIG_SYS_ANADIG_ENET_CTRL	0x00002001	/* !BYPASS, !POWERDOWN,
-							   ENABLE */
-#define CONFIG_SYS_ANADIG_PFD_USB1	0x1B1D1A1C
-#define CONFIG_SYS_ANADIG_PFD_528	0x171C1813
-#define CONFIG_SYS_ANADIG_USB1_MISC	0x00000002
-#define CONFIG_SYS_ANADIG_USB2_VBUS	0x00100004
-#define CONFIG_SYS_ANADIG_USB2_CHRG	0x00000000
-#define CONFIG_SYS_ANADIG_USB2_MISC	0x00000002
-#define CONFIG_SYS_ANADIG_SYS_CTRL	0x00002001
-#define CONFIG_SYS_ANADIG_SYS_SS	0x00000000
-#define CONFIG_SYS_ANADIG_SYS_NUM	0x00000000
-#define CONFIG_SYS_ANADIG_SYS_DENOM	0x00000012
-#define CONFIG_SYS_ANADIG_SYS_PFD_528	0x00000000
-#define CONFIG_SYS_ANADIG_SYS_PLL_LOCK	0x00000000
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/colibri_vf50_sdboot.h b/include/configs/colibri_vf50_sdboot.h
deleted file mode 100644
index cf555e6b2b..0000000000
--- a/include/configs/colibri_vf50_sdboot.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright 2013 Toradex, Inc.
- *
- * Configuration settings for the Colibri VF50 module booting from SD card.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Use this configuration for an u-boot which stores its environment in SD/MMC
- * Useful if SD/MMC is selected as the boot device, so also the environment is taken from there
- *
- * Use colibri_vf50.h for everything which is not specific to using SD/MMC as the boot device!!
- */
-
-#ifndef __CONFIG_SDBOOT_H
-#define __CONFIG_SDBOOT_H
-
-#include "colibri_vf50.h"
-
-#undef DEFAULT_BOOTCOMMAND
-#undef CONFIG_BOOTCOMMAND
-
-#define DEFAULT_BOOTCOMMAND \
-	"run sdboot; run nfsboot"
-#define CONFIG_BOOTCOMMAND	DEFAULT_BOOTCOMMAND
-
-
-#ifdef CONFIG_ENV_IS_NOWHERE
-#undef CONFIG_ENV_IS_NOWHERE
-#endif
-#ifdef CONFIG_ENV_IS_IN_NAND
-#undef CONFIG_ENV_IS_IN_NAND
-#undef CONFIG_ENV_OFFSET
-#undef CONFIG_ENV_RANGE
-#endif
-
-/* Environment stored in SD/MMC */
-#define CONFIG_ENV_IS_IN_MMC 1
-
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 0 /* use MMC0, slot on eval board and Iris */
-#define CONFIG_ENV_OFFSET (512 * 1024)
-#endif
-
-#endif /* __CONFIG_SDBOOT_H */
diff --git a/include/configs/colibri_vf61_sdboot.h b/include/configs/colibri_vf_sdboot.h
index dbb05929aa..b0e7e5c25c 100644
--- a/include/configs/colibri_vf61_sdboot.h
+++ b/include/configs/colibri_vf_sdboot.h
@@ -29,7 +29,7 @@
 #ifndef __CONFIG_SDBOOT_H
 #define __CONFIG_SDBOOT_H
 
-#include "colibri_vf61.h"
+#include "colibri_vf.h"
 
 #undef DEFAULT_BOOTCOMMAND
 #undef CONFIG_BOOTCOMMAND