summaryrefslogtreecommitdiff
path: root/recipes-kernel/linux/linux-toradex-mainline-4.14/0030-apalis-tk1-enable-ddr52-mode-on-emmc.patch
diff options
context:
space:
mode:
Diffstat (limited to 'recipes-kernel/linux/linux-toradex-mainline-4.14/0030-apalis-tk1-enable-ddr52-mode-on-emmc.patch')
-rw-r--r--recipes-kernel/linux/linux-toradex-mainline-4.14/0030-apalis-tk1-enable-ddr52-mode-on-emmc.patch49
1 files changed, 0 insertions, 49 deletions
diff --git a/recipes-kernel/linux/linux-toradex-mainline-4.14/0030-apalis-tk1-enable-ddr52-mode-on-emmc.patch b/recipes-kernel/linux/linux-toradex-mainline-4.14/0030-apalis-tk1-enable-ddr52-mode-on-emmc.patch
deleted file mode 100644
index 4111cb5..0000000
--- a/recipes-kernel/linux/linux-toradex-mainline-4.14/0030-apalis-tk1-enable-ddr52-mode-on-emmc.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 41eac99552d6f0c1895e31b868d0a7cfa8334b4e Mon Sep 17 00:00:00 2001
-Message-Id: <41eac99552d6f0c1895e31b868d0a7cfa8334b4e.1531317141.git.marcel.ziswiler@toradex.com>
-In-Reply-To: <6654e1bd342708a683daf47e7558455f709a3e7e.1531317141.git.marcel.ziswiler@toradex.com>
-References: <6654e1bd342708a683daf47e7558455f709a3e7e.1531317141.git.marcel.ziswiler@toradex.com>
-From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-Date: Wed, 11 Jul 2018 10:38:06 +0200
-Subject: [PATCH 30/33] apalis-tk1: enable ddr52 mode on emmc
-
-Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
----
- arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 5 +++++
- arch/arm/boot/dts/tegra124-apalis.dtsi | 5 +++++
- 2 files changed, 10 insertions(+)
-
-diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
-index 0620dcbe5817..08e4b08e26f8 100644
---- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
-+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
-@@ -1939,6 +1939,11 @@
- status = "okay";
- bus-width = <8>;
- non-removable;
-+ vmmc-supply = <&reg_3v3>; /* VCC */
-+ vqmmc-supply = <&vddio_1v8>; /* VCCQ */
-+ /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */
-+ sdhci-caps-mask = <0x7 0x0>;
-+ mmc-ddr-1_8v;
- };
-
- /* CPU DFLL clock */
-diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
-index 8f80a8cf6a05..a19844e61adc 100644
---- a/arch/arm/boot/dts/tegra124-apalis.dtsi
-+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
-@@ -1949,6 +1949,11 @@
- status = "okay";
- bus-width = <8>;
- non-removable;
-+ vmmc-supply = <&reg_3v3>; /* VCC */
-+ vqmmc-supply = <&vddio_1v8>; /* VCCQ */
-+ /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */
-+ sdhci-caps-mask = <0x7 0x0>;
-+ mmc-ddr-1_8v;
- };
-
- /* CPU DFLL clock */
---
-2.14.4
-