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// SPDX-License-Identifier: GPL-2.0
/**
* DT Overlay for enabling EHRPWMs on RPi expansion header on AM69 SK board.
*
* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/pinctrl/k3.h>
&main_pmx0 {
rpi_header_gpio0_pins_default: rpi-header-gpio0-pins-default {
pinctrl-single,pins = <
J784S4_IOPAD(0x0bc, PIN_INPUT, 7) /* (AD33) MCASP1_AFSX.GPIO0_47 */
J784S4_IOPAD(0x06c, PIN_INPUT, 7) /* (AJ37) MCASP4_AFSX.GPIO0_27 */
J784S4_IOPAD(0x0b4, PIN_INPUT, 7) /* (AL34) MCASP1_AXR4.GPIO0_45 */
J784S4_IOPAD(0x0c0, PIN_INPUT, 7) /* (AD38) MCASP1_AXR0.GPIO0_48 */
J784S4_IOPAD(0x00c, PIN_INPUT, 7) /* (AF33) MCAN13_TX.GPIO0_3 */
J784S4_IOPAD(0x0b8, PIN_INPUT, 7) /* (AC34) MCASP1_ACLKX.GPIO0_46 */
J784S4_IOPAD(0x090, PIN_INPUT, 7) /* (AC35) MCASP0_AXR8.GPIO0_36 */
J784S4_IOPAD(0x0a8, PIN_INPUT, 7) /* (AF34) MCASP0_AXR14.GPIO0_42 */
J784S4_IOPAD(0x034, PIN_INPUT, 7) /* (AJ34) PMIC_WAKE0n.GPIO0_13 */
J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */
J784S4_IOPAD(0x004, PIN_INPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */
>;
};
rpi_header_ehrpwm0_pins_default: rpi-header-ehrpwm0-pins-default {
pinctrl-single,pins = <
J784S4_IOPAD(0x0cc, PIN_INPUT, 5) /* (AM37) SPI0_CS0.EHRPWM0_A */
>;
};
rpi_header_ehrpwm3_pins_default: rpi-header-ehrpwm3-pins-default {
pinctrl-single,pins = <
J784S4_IOPAD(0x08c, PIN_INPUT, 9) /* (AE35) MCASP0_AXR7.EHRPWM3_A */
>;
};
rpi_header_ehrpwm4_pins_default: rpi-header-ehrpwm4-pins-default {
pinctrl-single,pins = <
J784S4_IOPAD(0x0a4, PIN_INPUT, 9) /* (AJ36) MCASP0_AXR13.EHRPWM4_A */
>;
};
};
&main_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&rpi_header_gpio0_pins_default>;
};
&main_ehrpwm0 {
pinctrl-names = "default";
pinctrl-0 = <&rpi_header_ehrpwm0_pins_default>;
status = "okay";
};
&main_ehrpwm3 {
pinctrl-names = "default";
pinctrl-0 = <&rpi_header_ehrpwm3_pins_default>;
status = "okay";
};
&main_ehrpwm4 {
pinctrl-names = "default";
pinctrl-0 = <&rpi_header_ehrpwm4_pins_default>;
status = "okay";
};
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