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// SPDX-License-Identifier: GPL-2.0
/**
* LI OV5640 MIPI Camera module.
*
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/k3.h>
&wkup_pmx0 {
csi2_exp_refclk_pins_default: csi2-exp-refclk-pins-default {
pinctrl-single,pins = <
J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (F25) WKUP_GPIO0_11.MCU_CLKOUT0 */
>;
};
};
&main_pmx0 {
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
J721S2_IOPAD(0x0ac, PIN_INPUT, 13) /* (AC25) MCASP0_AXR15.I2C1_SCL */
J721S2_IOPAD(0x0b0, PIN_INPUT, 13) /* (AD26) MCASP1_AXR3.I2C1_SDA */
>;
};
};
&k3_clks {
/* Confiure AUDIO_EXT_REFCLK2 pin as output */
pinctrl-names = "default";
pinctrl-0 = <&csi2_exp_refclk_pins_default>;
};
&main_i2c1 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
exp3: gpio@20 {
compatible = "ti,tca6408";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPn",
"IO_EXP_CSI2_EXP_RSTz","CSI0_B_GPIO1",
"CSI1_B_GPIO1";
};
i2c-switch@70 {
compatible = "nxp,pca9543";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
/* CAM0 I2C */
ti_cam0_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
ov5640: camera@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
powerdown-gpios = <&exp3 2 GPIO_ACTIVE_LOW>;
/* MCU_CLKOUT0 WKUP_GPIO0_11 (F25) */
clocks = <&k3_clks 157 221>;
clock-names = "xclk";
/* HSDIV4_16FFT_MCU_2_HSDIVOUT0_CLK10 -> REFCLK2 */
assigned-clocks = <&k3_clks 157 221>;
assigned-clock-parents = <&k3_clks 157 223>;
assigned-clock-rates = <25000000>;
port {
csi2_cam0: endpoint {
remote-endpoint = <&csi2rx0_in_sensor>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
};
};
};
};
&csi0_port0 {
status = "okay";
csi2rx0_in_sensor: endpoint {
remote-endpoint = <&csi2_cam0>;
bus-type = <4>; /* CSI2 DPHY. */
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
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