From be2eaebf08c7789142595b73910ebf1d12d1ef0f Mon Sep 17 00:00:00 2001 From: Parth Pancholi Date: Tue, 16 Apr 2024 10:26:56 +0200 Subject: net: ethernet: ti: am65-cpsw: Enable SGMII mode for J784S4 CPSW9G TI's J784S4 SoC supports SGMII mode. Add SGMII mode to the extra_modes member of the J784S4 SoC data. Upstream-Status: Pending Signed-off-by: Parth Pancholi --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 684c6e120e1c..b5f1e6f5d5af 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2899,7 +2899,8 @@ static const struct am65_cpsw_pdata j784s4_cpswxg_pdata = { .quirks = 0, .ale_dev_id = "am64-cpswxg", .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, - .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_USXGMII), + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) | + BIT(PHY_INTERFACE_MODE_USXGMII), }; static const struct of_device_id am65_cpsw_nuss_of_mtable[] = { -- cgit v1.2.3